From 1d7a0c42c04213c5e553997bde88ac5afa4ece12 Mon Sep 17 00:00:00 2001 From: Harald Wolff Date: Mon, 4 Dec 2017 09:53:05 +0100 Subject: [PATCH] CPU m1284 --- core/include/rb2/register.h | 5 + cpu/atmega1284/Makefile | 1 + cpu/atmega1284/global.make | 2 +- cpu/atmega1284p/global.make | 4 +- math/fixpoint/Makefile | 2 + math/fixpoint/include/math/fix16.h | 24 +++++ math/fixpoint/include/math/fix8.h | 41 ++++++++ math/fixpoint/include/math/fixpoint.h | 127 +++++++++++++++++++++++ math/fixpoint/src/fix16.cc | 35 +++++++ math/fixpoint/src/fix16float.S | 142 ++++++++++++++++++++++++++ 10 files changed, 379 insertions(+), 4 deletions(-) create mode 100644 math/fixpoint/Makefile create mode 100644 math/fixpoint/include/math/fix16.h create mode 100644 math/fixpoint/include/math/fix8.h create mode 100644 math/fixpoint/include/math/fixpoint.h create mode 100644 math/fixpoint/src/fix16.cc create mode 100644 math/fixpoint/src/fix16float.S diff --git a/core/include/rb2/register.h b/core/include/rb2/register.h index 1cc53e5..20832ca 100755 --- a/core/include/rb2/register.h +++ b/core/include/rb2/register.h @@ -35,6 +35,11 @@ typedef int (*register_node_proc)(int op,int regno,uint8_t *type,void *buffer); +#define EMBED_NODE_PROC(op,regno,type,buffer,proc,base,len) \ + if (IN_LIMITS(regno, base, base + len - 1)){ \ + return proc(op,regno - base,type,buffer); \ + }; \ + // diff --git a/cpu/atmega1284/Makefile b/cpu/atmega1284/Makefile index 832a1ba..dcc3735 100755 --- a/cpu/atmega1284/Makefile +++ b/cpu/atmega1284/Makefile @@ -1 +1,2 @@ DEPENDS=../atmega1284p + diff --git a/cpu/atmega1284/global.make b/cpu/atmega1284/global.make index f26fe37..cc70405 100755 --- a/cpu/atmega1284/global.make +++ b/cpu/atmega1284/global.make @@ -3,7 +3,7 @@ CFLAGS+=-ggdb -mmcu=atmega1284p -Wall -Os ASFLAGS+=-ggdb -mmcu=atmega1284p LDFLAGS+=-ggdb -mmcu=atmega1284p - +AVR_MCU=m1284 diff --git a/cpu/atmega1284p/global.make b/cpu/atmega1284p/global.make index f26fe37..615ded0 100755 --- a/cpu/atmega1284p/global.make +++ b/cpu/atmega1284p/global.make @@ -3,7 +3,5 @@ CFLAGS+=-ggdb -mmcu=atmega1284p -Wall -Os ASFLAGS+=-ggdb -mmcu=atmega1284p LDFLAGS+=-ggdb -mmcu=atmega1284p - - - +AVR_MCU=m1284p diff --git a/math/fixpoint/Makefile b/math/fixpoint/Makefile new file mode 100644 index 0000000..7cfa3ae --- /dev/null +++ b/math/fixpoint/Makefile @@ -0,0 +1,2 @@ + +DEPENDS= diff --git a/math/fixpoint/include/math/fix16.h b/math/fixpoint/include/math/fix16.h new file mode 100644 index 0000000..5dec18c --- /dev/null +++ b/math/fixpoint/include/math/fix16.h @@ -0,0 +1,24 @@ +#pragma once + +#include + +struct fp_00_16 { + uint16_t value; +}; + +struct fp_16_16 { + uint32_t value; +}; + +struct fp_48_16 { + uint64_t value; +}; + +int64_t float_fix16(float v); + +typedef struct fp_00_16 fp0016_t; +typedef struct fp_16_16 fp1616_t; +typedef struct fp_48_16 fp4816_t; + + + diff --git a/math/fixpoint/include/math/fix8.h b/math/fixpoint/include/math/fix8.h new file mode 100644 index 0000000..f66ed80 --- /dev/null +++ b/math/fixpoint/include/math/fix8.h @@ -0,0 +1,41 @@ +#pragma once + +#include + +struct fp_00_08; +struct fp_08_08; +struct fp_24_08; + +struct fp_00_08 { + uint16_t value; + +#if defined(__cplusplus) + fp_00_08& operator =(long v); + fp_00_08& operator =(fp_08_08& src); + fp_00_08& operator =(fp_24_08& src); +#endif +}; + +struct fp_08_08 { + uint32_t value; + +#if defined(__cplusplus) + fp_08_08& operator =(long v); + fp_08_08& operator =(fp_00_08& src); + fp_08_08& operator =(fp_24_08& src); +#endif +}; + +struct fp_24_08 { + uint64_t value; + +#if defined(__cplusplus) + fp_24_08& operator =(fp_00_08& src); + fp_24_08& operator =(fp_08_08& src); +#endif +}; + +typedef struct fp_00_08 fp0008_t; +typedef struct fp_08_08 fp0808_t; +typedef struct fp_24_08 fp2408_t; + diff --git a/math/fixpoint/include/math/fixpoint.h b/math/fixpoint/include/math/fixpoint.h new file mode 100644 index 0000000..6df5517 --- /dev/null +++ b/math/fixpoint/include/math/fixpoint.h @@ -0,0 +1,127 @@ +#pragma once + +//#include +//#include + +#define FPDECL(width,fract) \ + typedef struct { int ## width ## _t value; } fp ## width ## fract ## _t; \ + static inline fp ## width ## fract ## _t FP ## width ## fract (float v) { return (fp ## width ## fract ## _t){ (int ## width ## _t)(v * 65536) }; }; \ + // + + +FPDECL(8,3); +FPDECL(16,3); +FPDECL(32,3); +FPDECL(64,3); + +FPDECL(8,7); +FPDECL(16,7); +FPDECL(32,7); +FPDECL(64,7); + +FPDECL(16,11); +FPDECL(32,11); +FPDECL(64,11); + +FPDECL(16,15); +FPDECL(32,15); +FPDECL(64,15); + +#define FPDOT3(dst,n) { dst.value = (n << 3); } +#define FPDOT7(dst,n) { dst.value = (n << 7); } +#define FPDOT11(dst,n) { dst.value = (n << 11); } +#define FPDOT15(dst,n) { dst.value = (n << 15); } + +/** + * Dynamic Fixpoint Arithemtics + */ + +typedef struct dfp16 { + int16_t value; + uint8_t fragsize; +} dfp16_t; + +typedef struct dfp32 { + int32_t value; + uint8_t fragsize; +} dfp32_t; + +static inline dfp16_t dfp16from32(dfp32_t v){ return (dfp16_t){ fragsize: v.fragsize, value: v.value }; }; +static inline dfp32_t dfp32from16(dfp16_t v){ return (dfp32_t){ fragsize: v.fragsize, value: v.value }; }; + +static inline dfp16_t dfp16_from_float(uint8_t prec,float v){ return (dfp16_t){ fragsize: prec, value: (int16_t)(v * (1<> -n : a << n) +#define SHR(a,n) (n < 0 ? a << -n : a >> n) + +static inline +dfp16_t dfp16_add(uint8_t prec,dfp16_t a,dfp16_t b){ + dfp16_t v = { fragsize: prec, value: SHL(a.value,(prec-a.fragsize)) }; + v.value += SHL(b.value,(prec-b.fragsize)); + return v; +}; + +static inline +dfp16_t dfp16_sub(uint8_t prec,dfp16_t a,dfp16_t b){ + dfp16_t v = { fragsize: prec, value: SHL(a.value,(prec-a.fragsize)) }; + v.value -= SHL(b.value,(prec-b.fragsize)); + return v; +}; + +static inline +dfp16_t dfp16_mul(int8_t prec,dfp16_t a,dfp16_t b){ + return (dfp16_t){ + fragsize: prec, + value: SHL((int32_t)a.value * (int32_t)b.value, (prec - (a.fragsize + b.fragsize))) + }; +}; + +static inline +dfp16_t dfp16_div(int8_t prec,dfp16_t a,dfp16_t b){ + return (dfp16_t){ + fragsize: prec, + value: + SHL( + ((int32_t)a.value / (int32_t)b.value), + (prec + b.fragsize - a.fragsize) + ) + }; +}; + +static inline +dfp32_t dfp32_add(uint8_t prec,dfp32_t a,dfp32_t b){ + dfp32_t v = { fragsize: prec, value: SHL(a.value,(prec-a.fragsize)) }; + v.value += SHL(b.value,(prec-b.fragsize)); + return v; +}; + +static inline +dfp32_t dfp32_sub(uint8_t prec,dfp32_t a,dfp32_t b){ + dfp32_t v = { fragsize: prec, value: SHL(a.value,(prec-a.fragsize)) }; + v.value -= SHL(b.value,(prec-b.fragsize)); + return v; +}; + +static inline +dfp32_t dfp32_mul(uint8_t prec,dfp32_t a,dfp32_t b){ + return (dfp32_t){ + fragsize: prec, + value: SHL((int64_t)a.value * (int64_t)b.value, (prec - (a.fragsize + b.fragsize))) + }; +}; + +static inline +dfp32_t dfp32_div(uint8_t prec,dfp32_t a,dfp32_t b){ + return (dfp32_t){ + fragsize: prec, + value: + SHL( + ((int64_t)a.value), + (prec + b.fragsize - a.fragsize) + ) / b.value + }; +}; diff --git a/math/fixpoint/src/fix16.cc b/math/fixpoint/src/fix16.cc new file mode 100644 index 0000000..1d0cf06 --- /dev/null +++ b/math/fixpoint/src/fix16.cc @@ -0,0 +1,35 @@ +#if 0 + +#include + +fp_00_16& fp_00_16::operator =(long v){ + this->value = (v << 16); + return *this; +}; + +fp_00_16& fp_00_16::operator =(struct fp_16_16& src){ + this->value = src.value; + return *this; +}; + +fp_00_16& fp_00_16::operator =(struct fp_48_16& src){ + this->value = src.value; + return *this; +}; + +fp_16_16& fp_16_16::operator =(long v){ + this->value = (v << 16); + return *this; +}; + +fp_16_16& fp_16_16::operator =(fp_00_16& src){ + this->value = src.value; + return *this; +}; + +fp_16_16& fp_16_16::operator =(fp_48_16& src){ + this->value = src.value; + return *this; +}; + +#endif diff --git a/math/fixpoint/src/fix16float.S b/math/fixpoint/src/fix16float.S new file mode 100644 index 0000000..953cee9 --- /dev/null +++ b/math/fixpoint/src/fix16float.S @@ -0,0 +1,142 @@ + +.global float_fix16 + +float_fix16: +; param: in float r22:r25 +; ret int64(48.16)r18:r25 +; var: exp r13 +; sign r12.1 + + push r17 + push r16 + push r15 + push r14 + push r13 + push r12 + + cp r22, r1 + cpc r23, r1 + cpc r24, r1 + cpc r25, r1 + breq _zero + + ; Mantisse verschieben => r18:r20.(0-6) + mov r18, r22 + mov r19, r23 + mov r20, r24 + ori r20, 0x80 + + ; Exponent sichern => r13 (korrektur: -7, wg. Position mantisse B.24 auf E+8) + mov r13, r25 + mov r12, r24 + lsl r12 + rol r13 + ldi r16, 134 + sub r13, r16 + + ; Sign => r12.0 + eor r12, r12 + ldi r16, 0x01 + sbrc r25, 7 + or r12, r16 + + eor r21, r21 + eor r22, r22 + eor r23, r23 + eor r24, r24 + eor r25, r25 + + cp r13, r1 + breq _l1 + brmi _shr + +; Shift left... + +_shl: + lsl r18 + rol r19 + rol r20 + rol r21 + rol r22 + rol r23 + rol r24 + rol r25 + dec r13 + tst r13 + brne _shl + + rjmp _l1 + +; Shift right... +_shr: + ldi r16, -23 + cp r13, r16 + brlo _zero + +_shr2: + lsr r20 + ror r19 + ror r18 + inc r13 + tst r13 + brne _shr2 + + +_l1: + sbrs r12, 0 + rjmp _exit + + com r18 + com r19 + com r20 + com r21 + com r22 + com r23 + com r24 + com r25 + ldi r16, 0x01 + add r18, r16 + adc r19, r1 + adc r20, r1 + adc r21, r1 + adc r22, r1 + adc r23, r1 + adc r24, r1 + adc r25, r1 + + rjmp _exit + +_zero: + eor r18, r18 + eor r19, r19 + eor r20, r20 + eor r21, r21 + eor r22, r22 + eor r23, r23 + eor r24, r24 + eor r25, r25 + +_exit: + pop r12 + pop r13 + pop r14 + pop r15 + pop r16 + pop r17 + ret + + +#if 0 +fp4816_t fp4816_from_float(float value) +{ + IEEEFLOAT ieee = { value }; + int16_t exp = ieee.exponent - 127; + int32_t mantisse = ieee.mantisse | 0x00800000; + fp4816_t fp = (fp4816_t)(mantisse >> (15 - exp)); + + if (ieee.sign) + fp *= -1; + + return fp; +}; +#endif