2018-02-09 14:23:18 +01:00
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/*
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* QEMU paravirtual RDMA - Resource Manager Implementation
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*
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* Copyright (C) 2018 Oracle
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* Copyright (C) 2018 Red Hat Inc
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*
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* Authors:
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* Yuval Shaia <yuval.shaia@oracle.com>
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* Marcel Apfelbaum <marcel@redhat.com>
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*
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* This work is licensed under the terms of the GNU GPL, version 2 or later.
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* See the COPYING file in the top-level directory.
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*
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*/
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2018-03-21 16:22:07 +01:00
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#include "qemu/osdep.h"
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#include "qapi/error.h"
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#include "cpu.h"
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2019-03-11 11:29:09 +01:00
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#include "monitor/monitor.h"
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2018-02-09 14:23:18 +01:00
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2019-03-11 11:29:05 +01:00
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#include "trace.h"
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2018-02-09 14:23:18 +01:00
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#include "rdma_utils.h"
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#include "rdma_backend.h"
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#include "rdma_rm.h"
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/* Page directory and page tables */
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#define PG_DIR_SZ { TARGET_PAGE_SIZE / sizeof(__u64) }
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#define PG_TBL_SZ { TARGET_PAGE_SIZE / sizeof(__u64) }
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2019-03-11 11:29:09 +01:00
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void rdma_dump_device_counters(Monitor *mon, RdmaDeviceResources *dev_res)
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{
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monitor_printf(mon, "\ttx : %" PRId64 "\n",
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dev_res->stats.tx);
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monitor_printf(mon, "\ttx_len : %" PRId64 "\n",
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dev_res->stats.tx_len);
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monitor_printf(mon, "\ttx_err : %" PRId64 "\n",
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dev_res->stats.tx_err);
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monitor_printf(mon, "\trx_bufs : %" PRId64 "\n",
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dev_res->stats.rx_bufs);
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2019-04-03 13:33:40 +02:00
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monitor_printf(mon, "\trx_srq : %" PRId64 "\n",
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dev_res->stats.rx_srq);
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2019-03-11 11:29:09 +01:00
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monitor_printf(mon, "\trx_bufs_len : %" PRId64 "\n",
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dev_res->stats.rx_bufs_len);
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monitor_printf(mon, "\trx_bufs_err : %" PRId64 "\n",
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dev_res->stats.rx_bufs_err);
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monitor_printf(mon, "\tcomps : %" PRId64 "\n",
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dev_res->stats.completions);
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monitor_printf(mon, "\tmissing_comps : %" PRId32 "\n",
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dev_res->stats.missing_cqe);
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monitor_printf(mon, "\tpoll_cq (bk) : %" PRId64 "\n",
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dev_res->stats.poll_cq_from_bk);
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monitor_printf(mon, "\tpoll_cq_ppoll_to : %" PRId64 "\n",
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dev_res->stats.poll_cq_ppoll_to);
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monitor_printf(mon, "\tpoll_cq (fe) : %" PRId64 "\n",
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dev_res->stats.poll_cq_from_guest);
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monitor_printf(mon, "\tpoll_cq_empty : %" PRId64 "\n",
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dev_res->stats.poll_cq_from_guest_empty);
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monitor_printf(mon, "\tmad_tx : %" PRId64 "\n",
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dev_res->stats.mad_tx);
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monitor_printf(mon, "\tmad_tx_err : %" PRId64 "\n",
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dev_res->stats.mad_tx_err);
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monitor_printf(mon, "\tmad_rx : %" PRId64 "\n",
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dev_res->stats.mad_rx);
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monitor_printf(mon, "\tmad_rx_err : %" PRId64 "\n",
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dev_res->stats.mad_rx_err);
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monitor_printf(mon, "\tmad_rx_bufs : %" PRId64 "\n",
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dev_res->stats.mad_rx_bufs);
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monitor_printf(mon, "\tmad_rx_bufs_err : %" PRId64 "\n",
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dev_res->stats.mad_rx_bufs_err);
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monitor_printf(mon, "\tPDs : %" PRId32 "\n",
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dev_res->pd_tbl.used);
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monitor_printf(mon, "\tMRs : %" PRId32 "\n",
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dev_res->mr_tbl.used);
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monitor_printf(mon, "\tUCs : %" PRId32 "\n",
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dev_res->uc_tbl.used);
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monitor_printf(mon, "\tQPs : %" PRId32 "\n",
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dev_res->qp_tbl.used);
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monitor_printf(mon, "\tCQs : %" PRId32 "\n",
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dev_res->cq_tbl.used);
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monitor_printf(mon, "\tCEQ_CTXs : %" PRId32 "\n",
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dev_res->cqe_ctx_tbl.used);
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}
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2018-02-09 14:23:18 +01:00
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static inline void res_tbl_init(const char *name, RdmaRmResTbl *tbl,
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uint32_t tbl_sz, uint32_t res_sz)
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{
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tbl->tbl = g_malloc(tbl_sz * res_sz);
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strncpy(tbl->name, name, MAX_RM_TBL_NAME);
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tbl->name[MAX_RM_TBL_NAME - 1] = 0;
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tbl->bitmap = bitmap_new(tbl_sz);
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tbl->tbl_sz = tbl_sz;
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tbl->res_sz = res_sz;
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2019-03-11 11:29:08 +01:00
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tbl->used = 0;
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2018-02-09 14:23:18 +01:00
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qemu_mutex_init(&tbl->lock);
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}
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static inline void res_tbl_free(RdmaRmResTbl *tbl)
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{
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2019-01-16 16:15:38 +01:00
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if (!tbl->bitmap) {
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return;
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}
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2018-02-09 14:23:18 +01:00
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qemu_mutex_destroy(&tbl->lock);
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g_free(tbl->tbl);
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2018-12-21 15:40:35 +01:00
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g_free(tbl->bitmap);
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2018-02-09 14:23:18 +01:00
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}
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2019-03-11 11:29:05 +01:00
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static inline void *rdma_res_tbl_get(RdmaRmResTbl *tbl, uint32_t handle)
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2018-02-09 14:23:18 +01:00
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{
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2019-03-11 11:29:05 +01:00
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trace_rdma_res_tbl_get(tbl->name, handle);
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2018-02-09 14:23:18 +01:00
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if ((handle < tbl->tbl_sz) && (test_bit(handle, tbl->bitmap))) {
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return tbl->tbl + handle * tbl->res_sz;
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} else {
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2019-03-11 11:29:05 +01:00
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rdma_error_report("Table %s, invalid handle %d", tbl->name, handle);
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2018-02-09 14:23:18 +01:00
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return NULL;
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}
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}
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2019-03-11 11:29:05 +01:00
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static inline void *rdma_res_tbl_alloc(RdmaRmResTbl *tbl, uint32_t *handle)
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2018-02-09 14:23:18 +01:00
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{
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qemu_mutex_lock(&tbl->lock);
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*handle = find_first_zero_bit(tbl->bitmap, tbl->tbl_sz);
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if (*handle > tbl->tbl_sz) {
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2019-03-11 11:29:05 +01:00
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rdma_error_report("Table %s, failed to allocate, bitmap is full",
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tbl->name);
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2018-02-09 14:23:18 +01:00
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qemu_mutex_unlock(&tbl->lock);
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return NULL;
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}
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set_bit(*handle, tbl->bitmap);
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2019-03-11 11:29:08 +01:00
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tbl->used++;
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2018-02-09 14:23:18 +01:00
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qemu_mutex_unlock(&tbl->lock);
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memset(tbl->tbl + *handle * tbl->res_sz, 0, tbl->res_sz);
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2019-03-11 11:29:05 +01:00
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trace_rdma_res_tbl_alloc(tbl->name, *handle);
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2018-02-09 14:23:18 +01:00
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return tbl->tbl + *handle * tbl->res_sz;
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}
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2019-03-11 11:29:05 +01:00
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static inline void rdma_res_tbl_dealloc(RdmaRmResTbl *tbl, uint32_t handle)
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2018-02-09 14:23:18 +01:00
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{
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2019-03-11 11:29:05 +01:00
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trace_rdma_res_tbl_dealloc(tbl->name, handle);
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2018-02-09 14:23:18 +01:00
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2020-04-02 08:50:35 +02:00
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QEMU_LOCK_GUARD(&tbl->lock);
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2018-02-09 14:23:18 +01:00
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if (handle < tbl->tbl_sz) {
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clear_bit(handle, tbl->bitmap);
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2019-03-11 11:29:08 +01:00
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tbl->used--;
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2018-02-09 14:23:18 +01:00
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}
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}
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int rdma_rm_alloc_pd(RdmaDeviceResources *dev_res, RdmaBackendDev *backend_dev,
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uint32_t *pd_handle, uint32_t ctx_handle)
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{
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RdmaRmPD *pd;
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int ret = -ENOMEM;
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2019-03-11 11:29:05 +01:00
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pd = rdma_res_tbl_alloc(&dev_res->pd_tbl, pd_handle);
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2018-02-09 14:23:18 +01:00
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if (!pd) {
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goto out;
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}
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ret = rdma_backend_create_pd(backend_dev, &pd->backend_pd);
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if (ret) {
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ret = -EIO;
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goto out_tbl_dealloc;
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}
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pd->ctx_handle = ctx_handle;
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return 0;
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out_tbl_dealloc:
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2019-03-11 11:29:05 +01:00
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rdma_res_tbl_dealloc(&dev_res->pd_tbl, *pd_handle);
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2018-02-09 14:23:18 +01:00
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out:
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return ret;
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}
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RdmaRmPD *rdma_rm_get_pd(RdmaDeviceResources *dev_res, uint32_t pd_handle)
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{
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2019-03-11 11:29:05 +01:00
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return rdma_res_tbl_get(&dev_res->pd_tbl, pd_handle);
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2018-02-09 14:23:18 +01:00
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}
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void rdma_rm_dealloc_pd(RdmaDeviceResources *dev_res, uint32_t pd_handle)
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{
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RdmaRmPD *pd = rdma_rm_get_pd(dev_res, pd_handle);
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if (pd) {
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rdma_backend_destroy_pd(&pd->backend_pd);
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2019-03-11 11:29:05 +01:00
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rdma_res_tbl_dealloc(&dev_res->pd_tbl, pd_handle);
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2018-02-09 14:23:18 +01:00
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}
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}
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int rdma_rm_alloc_mr(RdmaDeviceResources *dev_res, uint32_t pd_handle,
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2019-03-11 11:29:05 +01:00
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uint64_t guest_start, uint64_t guest_length,
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void *host_virt, int access_flags, uint32_t *mr_handle,
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uint32_t *lkey, uint32_t *rkey)
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2018-02-09 14:23:18 +01:00
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{
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RdmaRmMR *mr;
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int ret = 0;
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RdmaRmPD *pd;
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pd = rdma_rm_get_pd(dev_res, pd_handle);
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if (!pd) {
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return -EINVAL;
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}
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2019-03-11 11:29:05 +01:00
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mr = rdma_res_tbl_alloc(&dev_res->mr_tbl, mr_handle);
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2018-02-09 14:23:18 +01:00
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if (!mr) {
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return -ENOMEM;
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}
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2019-03-11 11:29:05 +01:00
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trace_rdma_rm_alloc_mr(*mr_handle, host_virt, guest_start, guest_length,
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access_flags);
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2018-08-05 17:35:12 +02:00
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if (host_virt) {
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2018-08-05 17:35:11 +02:00
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mr->virt = host_virt;
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mr->start = guest_start;
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2018-08-05 17:35:12 +02:00
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mr->length = guest_length;
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2018-08-05 17:35:17 +02:00
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mr->virt += (mr->start & (TARGET_PAGE_SIZE - 1));
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2018-02-09 14:23:18 +01:00
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2019-08-18 15:21:07 +02:00
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ret = rdma_backend_create_mr(&mr->backend_mr, &pd->backend_pd, mr->virt,
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mr->length, guest_start, access_flags);
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2018-08-05 17:35:12 +02:00
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if (ret) {
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ret = -EIO;
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goto out_dealloc_mr;
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}
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2020-03-20 15:34:29 +01:00
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#ifdef LEGACY_RDMA_REG_MR
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/* We keep mr_handle in lkey so send and recv get get mr ptr */
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*lkey = *mr_handle;
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#else
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*lkey = rdma_backend_mr_lkey(&mr->backend_mr);
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#endif
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2018-02-09 14:23:18 +01:00
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}
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2018-08-05 17:35:12 +02:00
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*rkey = -1;
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2018-02-09 14:23:18 +01:00
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mr->pd_handle = pd_handle;
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return 0;
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out_dealloc_mr:
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2019-03-11 11:29:05 +01:00
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rdma_res_tbl_dealloc(&dev_res->mr_tbl, *mr_handle);
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2018-02-09 14:23:18 +01:00
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return ret;
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}
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RdmaRmMR *rdma_rm_get_mr(RdmaDeviceResources *dev_res, uint32_t mr_handle)
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{
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2019-03-11 11:29:05 +01:00
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return rdma_res_tbl_get(&dev_res->mr_tbl, mr_handle);
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2018-02-09 14:23:18 +01:00
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}
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void rdma_rm_dealloc_mr(RdmaDeviceResources *dev_res, uint32_t mr_handle)
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{
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RdmaRmMR *mr = rdma_rm_get_mr(dev_res, mr_handle);
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if (mr) {
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rdma_backend_destroy_mr(&mr->backend_mr);
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2019-03-11 11:29:05 +01:00
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trace_rdma_rm_dealloc_mr(mr_handle, mr->start);
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2018-08-05 17:35:12 +02:00
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if (mr->start) {
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2018-08-05 17:35:17 +02:00
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mr->virt -= (mr->start & (TARGET_PAGE_SIZE - 1));
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2018-08-05 17:35:12 +02:00
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munmap(mr->virt, mr->length);
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}
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2019-03-11 11:29:05 +01:00
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rdma_res_tbl_dealloc(&dev_res->mr_tbl, mr_handle);
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2018-02-09 14:23:18 +01:00
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}
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}
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int rdma_rm_alloc_uc(RdmaDeviceResources *dev_res, uint32_t pfn,
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uint32_t *uc_handle)
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{
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RdmaRmUC *uc;
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/* TODO: Need to make sure pfn is between bar start address and
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* bsd+RDMA_BAR2_UAR_SIZE
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if (pfn > RDMA_BAR2_UAR_SIZE) {
|
2019-03-11 11:29:05 +01:00
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rdma_error_report("pfn out of range (%d > %d)", pfn,
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RDMA_BAR2_UAR_SIZE);
|
2018-02-09 14:23:18 +01:00
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return -ENOMEM;
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}
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*/
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2019-03-11 11:29:05 +01:00
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uc = rdma_res_tbl_alloc(&dev_res->uc_tbl, uc_handle);
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2018-02-09 14:23:18 +01:00
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if (!uc) {
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return -ENOMEM;
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}
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return 0;
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}
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RdmaRmUC *rdma_rm_get_uc(RdmaDeviceResources *dev_res, uint32_t uc_handle)
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{
|
2019-03-11 11:29:05 +01:00
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|
|
return rdma_res_tbl_get(&dev_res->uc_tbl, uc_handle);
|
2018-02-09 14:23:18 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
void rdma_rm_dealloc_uc(RdmaDeviceResources *dev_res, uint32_t uc_handle)
|
|
|
|
{
|
|
|
|
RdmaRmUC *uc = rdma_rm_get_uc(dev_res, uc_handle);
|
|
|
|
|
|
|
|
if (uc) {
|
2019-03-11 11:29:05 +01:00
|
|
|
rdma_res_tbl_dealloc(&dev_res->uc_tbl, uc_handle);
|
2018-02-09 14:23:18 +01:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
RdmaRmCQ *rdma_rm_get_cq(RdmaDeviceResources *dev_res, uint32_t cq_handle)
|
|
|
|
{
|
2019-03-11 11:29:05 +01:00
|
|
|
return rdma_res_tbl_get(&dev_res->cq_tbl, cq_handle);
|
2018-02-09 14:23:18 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
int rdma_rm_alloc_cq(RdmaDeviceResources *dev_res, RdmaBackendDev *backend_dev,
|
|
|
|
uint32_t cqe, uint32_t *cq_handle, void *opaque)
|
|
|
|
{
|
|
|
|
int rc;
|
|
|
|
RdmaRmCQ *cq;
|
|
|
|
|
2019-03-11 11:29:05 +01:00
|
|
|
cq = rdma_res_tbl_alloc(&dev_res->cq_tbl, cq_handle);
|
2018-02-09 14:23:18 +01:00
|
|
|
if (!cq) {
|
|
|
|
return -ENOMEM;
|
|
|
|
}
|
|
|
|
|
|
|
|
cq->opaque = opaque;
|
2018-12-21 15:40:16 +01:00
|
|
|
cq->notify = CNT_CLEAR;
|
2018-02-09 14:23:18 +01:00
|
|
|
|
|
|
|
rc = rdma_backend_create_cq(backend_dev, &cq->backend_cq, cqe);
|
|
|
|
if (rc) {
|
|
|
|
rc = -EIO;
|
|
|
|
goto out_dealloc_cq;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
out_dealloc_cq:
|
|
|
|
rdma_rm_dealloc_cq(dev_res, *cq_handle);
|
|
|
|
|
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
|
|
|
|
void rdma_rm_req_notify_cq(RdmaDeviceResources *dev_res, uint32_t cq_handle,
|
|
|
|
bool notify)
|
|
|
|
{
|
|
|
|
RdmaRmCQ *cq;
|
|
|
|
|
|
|
|
cq = rdma_rm_get_cq(dev_res, cq_handle);
|
|
|
|
if (!cq) {
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2018-12-21 15:40:16 +01:00
|
|
|
if (cq->notify != CNT_SET) {
|
|
|
|
cq->notify = notify ? CNT_ARM : CNT_CLEAR;
|
|
|
|
}
|
2018-02-09 14:23:18 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
void rdma_rm_dealloc_cq(RdmaDeviceResources *dev_res, uint32_t cq_handle)
|
|
|
|
{
|
|
|
|
RdmaRmCQ *cq;
|
|
|
|
|
|
|
|
cq = rdma_rm_get_cq(dev_res, cq_handle);
|
|
|
|
if (!cq) {
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
rdma_backend_destroy_cq(&cq->backend_cq);
|
|
|
|
|
2019-03-11 11:29:05 +01:00
|
|
|
rdma_res_tbl_dealloc(&dev_res->cq_tbl, cq_handle);
|
2018-02-09 14:23:18 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
RdmaRmQP *rdma_rm_get_qp(RdmaDeviceResources *dev_res, uint32_t qpn)
|
|
|
|
{
|
|
|
|
GBytes *key = g_bytes_new(&qpn, sizeof(qpn));
|
|
|
|
|
|
|
|
RdmaRmQP *qp = g_hash_table_lookup(dev_res->qp_hash, key);
|
|
|
|
|
|
|
|
g_bytes_unref(key);
|
|
|
|
|
2019-03-11 11:29:05 +01:00
|
|
|
if (!qp) {
|
|
|
|
rdma_error_report("Invalid QP handle %d", qpn);
|
|
|
|
}
|
|
|
|
|
2018-02-09 14:23:18 +01:00
|
|
|
return qp;
|
|
|
|
}
|
|
|
|
|
|
|
|
int rdma_rm_alloc_qp(RdmaDeviceResources *dev_res, uint32_t pd_handle,
|
|
|
|
uint8_t qp_type, uint32_t max_send_wr,
|
|
|
|
uint32_t max_send_sge, uint32_t send_cq_handle,
|
|
|
|
uint32_t max_recv_wr, uint32_t max_recv_sge,
|
2019-04-03 13:33:42 +02:00
|
|
|
uint32_t recv_cq_handle, void *opaque, uint32_t *qpn,
|
|
|
|
uint8_t is_srq, uint32_t srq_handle)
|
2018-02-09 14:23:18 +01:00
|
|
|
{
|
|
|
|
int rc;
|
|
|
|
RdmaRmQP *qp;
|
|
|
|
RdmaRmCQ *scq, *rcq;
|
|
|
|
RdmaRmPD *pd;
|
2019-04-03 13:33:42 +02:00
|
|
|
RdmaRmSRQ *srq = NULL;
|
2018-02-09 14:23:18 +01:00
|
|
|
uint32_t rm_qpn;
|
|
|
|
|
|
|
|
pd = rdma_rm_get_pd(dev_res, pd_handle);
|
|
|
|
if (!pd) {
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
scq = rdma_rm_get_cq(dev_res, send_cq_handle);
|
|
|
|
rcq = rdma_rm_get_cq(dev_res, recv_cq_handle);
|
|
|
|
|
|
|
|
if (!scq || !rcq) {
|
2019-03-11 11:29:05 +01:00
|
|
|
rdma_error_report("Invalid send_cqn or recv_cqn (%d, %d)",
|
|
|
|
send_cq_handle, recv_cq_handle);
|
2018-02-09 14:23:18 +01:00
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2019-04-03 13:33:42 +02:00
|
|
|
if (is_srq) {
|
|
|
|
srq = rdma_rm_get_srq(dev_res, srq_handle);
|
|
|
|
if (!srq) {
|
|
|
|
rdma_error_report("Invalid srqn %d", srq_handle);
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
srq->recv_cq_handle = recv_cq_handle;
|
|
|
|
}
|
|
|
|
|
2018-12-21 15:40:16 +01:00
|
|
|
if (qp_type == IBV_QPT_GSI) {
|
|
|
|
scq->notify = CNT_SET;
|
|
|
|
rcq->notify = CNT_SET;
|
|
|
|
}
|
|
|
|
|
2019-03-11 11:29:05 +01:00
|
|
|
qp = rdma_res_tbl_alloc(&dev_res->qp_tbl, &rm_qpn);
|
2018-02-09 14:23:18 +01:00
|
|
|
if (!qp) {
|
|
|
|
return -ENOMEM;
|
|
|
|
}
|
|
|
|
|
|
|
|
qp->qpn = rm_qpn;
|
|
|
|
qp->qp_state = IBV_QPS_RESET;
|
|
|
|
qp->qp_type = qp_type;
|
|
|
|
qp->send_cq_handle = send_cq_handle;
|
|
|
|
qp->recv_cq_handle = recv_cq_handle;
|
|
|
|
qp->opaque = opaque;
|
2019-04-03 13:33:42 +02:00
|
|
|
qp->is_srq = is_srq;
|
2018-02-09 14:23:18 +01:00
|
|
|
|
|
|
|
rc = rdma_backend_create_qp(&qp->backend_qp, qp_type, &pd->backend_pd,
|
2019-04-03 13:33:42 +02:00
|
|
|
&scq->backend_cq, &rcq->backend_cq,
|
|
|
|
is_srq ? &srq->backend_srq : NULL,
|
|
|
|
max_send_wr, max_recv_wr, max_send_sge,
|
|
|
|
max_recv_sge);
|
|
|
|
|
2018-02-09 14:23:18 +01:00
|
|
|
if (rc) {
|
|
|
|
rc = -EIO;
|
|
|
|
goto out_dealloc_qp;
|
|
|
|
}
|
|
|
|
|
|
|
|
*qpn = rdma_backend_qpn(&qp->backend_qp);
|
2019-03-11 11:29:05 +01:00
|
|
|
trace_rdma_rm_alloc_qp(rm_qpn, *qpn, qp_type);
|
2018-02-09 14:23:18 +01:00
|
|
|
g_hash_table_insert(dev_res->qp_hash, g_bytes_new(qpn, sizeof(*qpn)), qp);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
out_dealloc_qp:
|
2019-03-11 11:29:05 +01:00
|
|
|
rdma_res_tbl_dealloc(&dev_res->qp_tbl, qp->qpn);
|
2018-02-09 14:23:18 +01:00
|
|
|
|
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
|
|
|
|
int rdma_rm_modify_qp(RdmaDeviceResources *dev_res, RdmaBackendDev *backend_dev,
|
2018-12-21 15:40:25 +01:00
|
|
|
uint32_t qp_handle, uint32_t attr_mask, uint8_t sgid_idx,
|
2018-02-09 14:23:18 +01:00
|
|
|
union ibv_gid *dgid, uint32_t dqpn,
|
|
|
|
enum ibv_qp_state qp_state, uint32_t qkey,
|
|
|
|
uint32_t rq_psn, uint32_t sq_psn)
|
|
|
|
{
|
|
|
|
RdmaRmQP *qp;
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
qp = rdma_rm_get_qp(dev_res, qp_handle);
|
|
|
|
if (!qp) {
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (qp->qp_type == IBV_QPT_SMI) {
|
2019-03-11 11:29:05 +01:00
|
|
|
rdma_error_report("Got QP0 request");
|
2018-02-09 14:23:18 +01:00
|
|
|
return -EPERM;
|
|
|
|
} else if (qp->qp_type == IBV_QPT_GSI) {
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2019-03-11 11:29:05 +01:00
|
|
|
trace_rdma_rm_modify_qp(qp_handle, attr_mask, qp_state, sgid_idx);
|
|
|
|
|
2018-02-09 14:23:18 +01:00
|
|
|
if (attr_mask & IBV_QP_STATE) {
|
|
|
|
qp->qp_state = qp_state;
|
|
|
|
|
|
|
|
if (qp->qp_state == IBV_QPS_INIT) {
|
|
|
|
ret = rdma_backend_qp_state_init(backend_dev, &qp->backend_qp,
|
|
|
|
qp->qp_type, qkey);
|
|
|
|
if (ret) {
|
|
|
|
return -EIO;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
if (qp->qp_state == IBV_QPS_RTR) {
|
2018-12-21 15:40:25 +01:00
|
|
|
/* Get backend gid index */
|
|
|
|
sgid_idx = rdma_rm_get_backend_gid_index(dev_res, backend_dev,
|
|
|
|
sgid_idx);
|
|
|
|
if (sgid_idx <= 0) { /* TODO check also less than bk.max_sgid */
|
2019-03-11 11:29:05 +01:00
|
|
|
rdma_error_report("Failed to get bk sgid_idx for sgid_idx %d",
|
|
|
|
sgid_idx);
|
2018-12-21 15:40:25 +01:00
|
|
|
return -EIO;
|
|
|
|
}
|
|
|
|
|
2018-02-09 14:23:18 +01:00
|
|
|
ret = rdma_backend_qp_state_rtr(backend_dev, &qp->backend_qp,
|
2018-12-21 15:40:25 +01:00
|
|
|
qp->qp_type, sgid_idx, dgid, dqpn,
|
|
|
|
rq_psn, qkey,
|
|
|
|
attr_mask & IBV_QP_QKEY);
|
2018-02-09 14:23:18 +01:00
|
|
|
if (ret) {
|
|
|
|
return -EIO;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
if (qp->qp_state == IBV_QPS_RTS) {
|
|
|
|
ret = rdma_backend_qp_state_rts(&qp->backend_qp, qp->qp_type,
|
|
|
|
sq_psn, qkey,
|
|
|
|
attr_mask & IBV_QP_QKEY);
|
|
|
|
if (ret) {
|
|
|
|
return -EIO;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2018-03-20 20:00:22 +01:00
|
|
|
int rdma_rm_query_qp(RdmaDeviceResources *dev_res, RdmaBackendDev *backend_dev,
|
|
|
|
uint32_t qp_handle, struct ibv_qp_attr *attr,
|
|
|
|
int attr_mask, struct ibv_qp_init_attr *init_attr)
|
|
|
|
{
|
|
|
|
RdmaRmQP *qp;
|
|
|
|
|
|
|
|
qp = rdma_rm_get_qp(dev_res, qp_handle);
|
|
|
|
if (!qp) {
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
return rdma_backend_query_qp(&qp->backend_qp, attr, attr_mask, init_attr);
|
|
|
|
}
|
|
|
|
|
2018-02-09 14:23:18 +01:00
|
|
|
void rdma_rm_dealloc_qp(RdmaDeviceResources *dev_res, uint32_t qp_handle)
|
|
|
|
{
|
|
|
|
RdmaRmQP *qp;
|
|
|
|
GBytes *key;
|
|
|
|
|
|
|
|
key = g_bytes_new(&qp_handle, sizeof(qp_handle));
|
|
|
|
qp = g_hash_table_lookup(dev_res->qp_hash, key);
|
|
|
|
g_hash_table_remove(dev_res->qp_hash, key);
|
|
|
|
g_bytes_unref(key);
|
|
|
|
|
|
|
|
if (!qp) {
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2019-03-11 11:29:11 +01:00
|
|
|
rdma_backend_destroy_qp(&qp->backend_qp, dev_res);
|
2018-02-09 14:23:18 +01:00
|
|
|
|
2019-03-11 11:29:05 +01:00
|
|
|
rdma_res_tbl_dealloc(&dev_res->qp_tbl, qp->qpn);
|
2018-02-09 14:23:18 +01:00
|
|
|
}
|
|
|
|
|
2019-04-03 13:33:41 +02:00
|
|
|
RdmaRmSRQ *rdma_rm_get_srq(RdmaDeviceResources *dev_res, uint32_t srq_handle)
|
|
|
|
{
|
|
|
|
return rdma_res_tbl_get(&dev_res->srq_tbl, srq_handle);
|
|
|
|
}
|
|
|
|
|
|
|
|
int rdma_rm_alloc_srq(RdmaDeviceResources *dev_res, uint32_t pd_handle,
|
|
|
|
uint32_t max_wr, uint32_t max_sge, uint32_t srq_limit,
|
|
|
|
uint32_t *srq_handle, void *opaque)
|
|
|
|
{
|
|
|
|
RdmaRmSRQ *srq;
|
|
|
|
RdmaRmPD *pd;
|
|
|
|
int rc;
|
|
|
|
|
|
|
|
pd = rdma_rm_get_pd(dev_res, pd_handle);
|
|
|
|
if (!pd) {
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
srq = rdma_res_tbl_alloc(&dev_res->srq_tbl, srq_handle);
|
|
|
|
if (!srq) {
|
|
|
|
return -ENOMEM;
|
|
|
|
}
|
|
|
|
|
|
|
|
rc = rdma_backend_create_srq(&srq->backend_srq, &pd->backend_pd,
|
|
|
|
max_wr, max_sge, srq_limit);
|
|
|
|
if (rc) {
|
|
|
|
rc = -EIO;
|
|
|
|
goto out_dealloc_srq;
|
|
|
|
}
|
|
|
|
|
|
|
|
srq->opaque = opaque;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
out_dealloc_srq:
|
|
|
|
rdma_res_tbl_dealloc(&dev_res->srq_tbl, *srq_handle);
|
|
|
|
|
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
|
|
|
|
int rdma_rm_query_srq(RdmaDeviceResources *dev_res, uint32_t srq_handle,
|
|
|
|
struct ibv_srq_attr *srq_attr)
|
|
|
|
{
|
|
|
|
RdmaRmSRQ *srq;
|
|
|
|
|
|
|
|
srq = rdma_rm_get_srq(dev_res, srq_handle);
|
|
|
|
if (!srq) {
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
return rdma_backend_query_srq(&srq->backend_srq, srq_attr);
|
|
|
|
}
|
|
|
|
|
|
|
|
int rdma_rm_modify_srq(RdmaDeviceResources *dev_res, uint32_t srq_handle,
|
|
|
|
struct ibv_srq_attr *srq_attr, int srq_attr_mask)
|
|
|
|
{
|
|
|
|
RdmaRmSRQ *srq;
|
|
|
|
|
|
|
|
srq = rdma_rm_get_srq(dev_res, srq_handle);
|
|
|
|
if (!srq) {
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
if ((srq_attr_mask & IBV_SRQ_LIMIT) &&
|
|
|
|
(srq_attr->srq_limit == 0)) {
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
if ((srq_attr_mask & IBV_SRQ_MAX_WR) &&
|
|
|
|
(srq_attr->max_wr == 0)) {
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
return rdma_backend_modify_srq(&srq->backend_srq, srq_attr,
|
|
|
|
srq_attr_mask);
|
|
|
|
}
|
|
|
|
|
|
|
|
void rdma_rm_dealloc_srq(RdmaDeviceResources *dev_res, uint32_t srq_handle)
|
|
|
|
{
|
|
|
|
RdmaRmSRQ *srq;
|
|
|
|
|
|
|
|
srq = rdma_rm_get_srq(dev_res, srq_handle);
|
|
|
|
if (!srq) {
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
rdma_backend_destroy_srq(&srq->backend_srq, dev_res);
|
|
|
|
rdma_res_tbl_dealloc(&dev_res->srq_tbl, srq_handle);
|
|
|
|
}
|
|
|
|
|
2018-02-09 14:23:18 +01:00
|
|
|
void *rdma_rm_get_cqe_ctx(RdmaDeviceResources *dev_res, uint32_t cqe_ctx_id)
|
|
|
|
{
|
|
|
|
void **cqe_ctx;
|
|
|
|
|
2019-03-11 11:29:05 +01:00
|
|
|
cqe_ctx = rdma_res_tbl_get(&dev_res->cqe_ctx_tbl, cqe_ctx_id);
|
2018-02-09 14:23:18 +01:00
|
|
|
if (!cqe_ctx) {
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
return *cqe_ctx;
|
|
|
|
}
|
|
|
|
|
|
|
|
int rdma_rm_alloc_cqe_ctx(RdmaDeviceResources *dev_res, uint32_t *cqe_ctx_id,
|
|
|
|
void *ctx)
|
|
|
|
{
|
|
|
|
void **cqe_ctx;
|
|
|
|
|
2019-03-11 11:29:05 +01:00
|
|
|
cqe_ctx = rdma_res_tbl_alloc(&dev_res->cqe_ctx_tbl, cqe_ctx_id);
|
2018-02-09 14:23:18 +01:00
|
|
|
if (!cqe_ctx) {
|
|
|
|
return -ENOMEM;
|
|
|
|
}
|
|
|
|
|
|
|
|
*cqe_ctx = ctx;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
void rdma_rm_dealloc_cqe_ctx(RdmaDeviceResources *dev_res, uint32_t cqe_ctx_id)
|
|
|
|
{
|
2019-03-11 11:29:05 +01:00
|
|
|
rdma_res_tbl_dealloc(&dev_res->cqe_ctx_tbl, cqe_ctx_id);
|
2018-02-09 14:23:18 +01:00
|
|
|
}
|
|
|
|
|
2018-12-21 15:40:25 +01:00
|
|
|
int rdma_rm_add_gid(RdmaDeviceResources *dev_res, RdmaBackendDev *backend_dev,
|
|
|
|
const char *ifname, union ibv_gid *gid, int gid_idx)
|
|
|
|
{
|
|
|
|
int rc;
|
|
|
|
|
|
|
|
rc = rdma_backend_add_gid(backend_dev, ifname, gid);
|
|
|
|
if (rc) {
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2018-12-21 15:40:32 +01:00
|
|
|
memcpy(&dev_res->port.gid_tbl[gid_idx].gid, gid, sizeof(*gid));
|
2018-12-21 15:40:25 +01:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
int rdma_rm_del_gid(RdmaDeviceResources *dev_res, RdmaBackendDev *backend_dev,
|
|
|
|
const char *ifname, int gid_idx)
|
|
|
|
{
|
|
|
|
int rc;
|
|
|
|
|
2018-12-21 15:40:36 +01:00
|
|
|
if (!dev_res->port.gid_tbl[gid_idx].gid.global.interface_id) {
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2018-12-21 15:40:25 +01:00
|
|
|
rc = rdma_backend_del_gid(backend_dev, ifname,
|
2018-12-21 15:40:32 +01:00
|
|
|
&dev_res->port.gid_tbl[gid_idx].gid);
|
2018-12-21 15:40:25 +01:00
|
|
|
if (rc) {
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2018-12-21 15:40:32 +01:00
|
|
|
memset(dev_res->port.gid_tbl[gid_idx].gid.raw, 0,
|
|
|
|
sizeof(dev_res->port.gid_tbl[gid_idx].gid));
|
|
|
|
dev_res->port.gid_tbl[gid_idx].backend_gid_index = -1;
|
2018-12-21 15:40:25 +01:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
int rdma_rm_get_backend_gid_index(RdmaDeviceResources *dev_res,
|
|
|
|
RdmaBackendDev *backend_dev, int sgid_idx)
|
|
|
|
{
|
2019-01-03 14:12:51 +01:00
|
|
|
if (unlikely(sgid_idx < 0 || sgid_idx >= MAX_PORT_GIDS)) {
|
2019-03-11 11:29:05 +01:00
|
|
|
rdma_error_report("Got invalid sgid_idx %d", sgid_idx);
|
2018-12-21 15:40:25 +01:00
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2018-12-21 15:40:32 +01:00
|
|
|
if (unlikely(dev_res->port.gid_tbl[sgid_idx].backend_gid_index == -1)) {
|
|
|
|
dev_res->port.gid_tbl[sgid_idx].backend_gid_index =
|
2018-12-21 15:40:25 +01:00
|
|
|
rdma_backend_get_gid_index(backend_dev,
|
2018-12-21 15:40:32 +01:00
|
|
|
&dev_res->port.gid_tbl[sgid_idx].gid);
|
2018-12-21 15:40:25 +01:00
|
|
|
}
|
|
|
|
|
2018-12-21 15:40:32 +01:00
|
|
|
return dev_res->port.gid_tbl[sgid_idx].backend_gid_index;
|
2018-12-21 15:40:25 +01:00
|
|
|
}
|
|
|
|
|
2018-02-09 14:23:18 +01:00
|
|
|
static void destroy_qp_hash_key(gpointer data)
|
|
|
|
{
|
|
|
|
g_bytes_unref(data);
|
|
|
|
}
|
|
|
|
|
2018-12-21 15:40:25 +01:00
|
|
|
static void init_ports(RdmaDeviceResources *dev_res)
|
|
|
|
{
|
2018-12-21 15:40:32 +01:00
|
|
|
int i;
|
2018-12-21 15:40:25 +01:00
|
|
|
|
2018-12-21 15:40:32 +01:00
|
|
|
memset(&dev_res->port, 0, sizeof(dev_res->port));
|
2018-12-21 15:40:25 +01:00
|
|
|
|
2018-12-21 15:40:32 +01:00
|
|
|
dev_res->port.state = IBV_PORT_DOWN;
|
|
|
|
for (i = 0; i < MAX_PORT_GIDS; i++) {
|
|
|
|
dev_res->port.gid_tbl[i].backend_gid_index = -1;
|
2018-12-21 15:40:25 +01:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static void fini_ports(RdmaDeviceResources *dev_res,
|
|
|
|
RdmaBackendDev *backend_dev, const char *ifname)
|
|
|
|
{
|
|
|
|
int i;
|
|
|
|
|
2018-12-21 15:40:32 +01:00
|
|
|
dev_res->port.state = IBV_PORT_DOWN;
|
2018-12-21 15:40:25 +01:00
|
|
|
for (i = 0; i < MAX_PORT_GIDS; i++) {
|
|
|
|
rdma_rm_del_gid(dev_res, backend_dev, ifname, i);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2019-03-11 11:29:05 +01:00
|
|
|
int rdma_rm_init(RdmaDeviceResources *dev_res, struct ibv_device_attr *dev_attr)
|
2018-02-09 14:23:18 +01:00
|
|
|
{
|
|
|
|
dev_res->qp_hash = g_hash_table_new_full(g_bytes_hash, g_bytes_equal,
|
|
|
|
destroy_qp_hash_key, NULL);
|
|
|
|
if (!dev_res->qp_hash) {
|
|
|
|
return -ENOMEM;
|
|
|
|
}
|
|
|
|
|
|
|
|
res_tbl_init("PD", &dev_res->pd_tbl, dev_attr->max_pd, sizeof(RdmaRmPD));
|
|
|
|
res_tbl_init("CQ", &dev_res->cq_tbl, dev_attr->max_cq, sizeof(RdmaRmCQ));
|
|
|
|
res_tbl_init("MR", &dev_res->mr_tbl, dev_attr->max_mr, sizeof(RdmaRmMR));
|
|
|
|
res_tbl_init("QP", &dev_res->qp_tbl, dev_attr->max_qp, sizeof(RdmaRmQP));
|
|
|
|
res_tbl_init("CQE_CTX", &dev_res->cqe_ctx_tbl, dev_attr->max_qp *
|
|
|
|
dev_attr->max_qp_wr, sizeof(void *));
|
|
|
|
res_tbl_init("UC", &dev_res->uc_tbl, MAX_UCS, sizeof(RdmaRmUC));
|
2019-04-03 13:33:41 +02:00
|
|
|
res_tbl_init("SRQ", &dev_res->srq_tbl, dev_attr->max_srq,
|
|
|
|
sizeof(RdmaRmSRQ));
|
2018-02-09 14:23:18 +01:00
|
|
|
|
2018-12-21 15:40:25 +01:00
|
|
|
init_ports(dev_res);
|
|
|
|
|
2019-03-11 11:29:07 +01:00
|
|
|
qemu_mutex_init(&dev_res->lock);
|
|
|
|
|
2019-03-11 11:29:08 +01:00
|
|
|
memset(&dev_res->stats, 0, sizeof(dev_res->stats));
|
|
|
|
atomic_set(&dev_res->stats.missing_cqe, 0);
|
|
|
|
|
2018-02-09 14:23:18 +01:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2018-12-21 15:40:25 +01:00
|
|
|
void rdma_rm_fini(RdmaDeviceResources *dev_res, RdmaBackendDev *backend_dev,
|
|
|
|
const char *ifname)
|
2018-02-09 14:23:18 +01:00
|
|
|
{
|
2019-03-11 11:29:07 +01:00
|
|
|
qemu_mutex_destroy(&dev_res->lock);
|
|
|
|
|
2018-12-21 15:40:25 +01:00
|
|
|
fini_ports(dev_res, backend_dev, ifname);
|
|
|
|
|
2019-04-03 13:33:41 +02:00
|
|
|
res_tbl_free(&dev_res->srq_tbl);
|
2018-02-09 14:23:18 +01:00
|
|
|
res_tbl_free(&dev_res->uc_tbl);
|
|
|
|
res_tbl_free(&dev_res->cqe_ctx_tbl);
|
|
|
|
res_tbl_free(&dev_res->qp_tbl);
|
|
|
|
res_tbl_free(&dev_res->mr_tbl);
|
2018-08-05 17:35:13 +02:00
|
|
|
res_tbl_free(&dev_res->cq_tbl);
|
2018-02-09 14:23:18 +01:00
|
|
|
res_tbl_free(&dev_res->pd_tbl);
|
2018-08-05 17:35:13 +02:00
|
|
|
|
2019-01-16 16:15:38 +01:00
|
|
|
if (dev_res->qp_hash) {
|
|
|
|
g_hash_table_destroy(dev_res->qp_hash);
|
|
|
|
}
|
2018-02-09 14:23:18 +01:00
|
|
|
}
|