2018-03-02 11:45:40 +01:00
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/*
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* ARM V2M MPS2 board emulation, trustzone aware FPGA images
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*
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* Copyright (c) 2017 Linaro Limited
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* Written by Peter Maydell
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 or
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* (at your option) any later version.
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*/
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/* The MPS2 and MPS2+ dev boards are FPGA based (the 2+ has a bigger
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* FPGA but is otherwise the same as the 2). Since the CPU itself
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* and most of the devices are in the FPGA, the details of the board
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* as seen by the guest depend significantly on the FPGA image.
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* This source file covers the following FPGA images, for TrustZone cores:
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* "mps2-an505" -- Cortex-M33 as documented in ARM Application Note AN505
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2019-02-01 15:55:44 +01:00
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* "mps2-an521" -- Dual Cortex-M33 as documented in Application Note AN521
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2021-02-15 12:51:34 +01:00
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* "mps2-an524" -- Dual Cortex-M33 as documented in Application Note AN524
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2018-03-02 11:45:40 +01:00
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*
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* Links to the TRM for the board itself and to the various Application
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* Notes which document the FPGA images can be found here:
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* https://developer.arm.com/products/system-design/development-boards/fpga-prototyping-boards/mps2
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*
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* Board TRM:
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2021-02-15 12:51:38 +01:00
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* https://developer.arm.com/documentation/100112/latest/
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2018-03-02 11:45:40 +01:00
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* Application Note AN505:
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2021-02-15 12:51:38 +01:00
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* https://developer.arm.com/documentation/dai0505/latest/
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2019-02-01 15:55:44 +01:00
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* Application Note AN521:
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2021-02-15 12:51:38 +01:00
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* https://developer.arm.com/documentation/dai0521/latest/
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2021-02-15 12:51:34 +01:00
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* Application Note AN524:
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* https://developer.arm.com/documentation/dai0524/latest/
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2018-03-02 11:45:40 +01:00
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*
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* The AN505 defers to the Cortex-M33 processor ARMv8M IoT Kit FVP User Guide
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* (ARM ECM0601256) for the details of some of the device layout:
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2021-02-15 12:51:38 +01:00
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* https://developer.arm.com/documentation/ecm0601256/latest
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2021-02-15 12:51:34 +01:00
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* Similarly, the AN521 and AN524 use the SSE-200, and the SSE-200 TRM defines
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2019-02-01 15:55:44 +01:00
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* most of the device layout:
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2021-02-15 12:51:38 +01:00
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* https://developer.arm.com/documentation/101104/latest/
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2018-03-02 11:45:40 +01:00
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*/
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#include "qemu/osdep.h"
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2019-10-22 17:50:37 +02:00
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#include "qemu/units.h"
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2020-02-19 17:08:56 +01:00
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#include "qemu/cutils.h"
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2018-03-02 11:45:40 +01:00
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#include "qapi/error.h"
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#include "qemu/error-report.h"
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2019-05-23 15:47:43 +02:00
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#include "hw/arm/boot.h"
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2018-03-02 11:45:40 +01:00
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#include "hw/arm/armv7m.h"
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#include "hw/or-irq.h"
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#include "hw/boards.h"
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#include "exec/address-spaces.h"
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#include "sysemu/sysemu.h"
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#include "hw/misc/unimp.h"
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#include "hw/char/cmsdk-apb-uart.h"
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#include "hw/timer/cmsdk-apb-timer.h"
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#include "hw/misc/mps2-scc.h"
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#include "hw/misc/mps2-fpgaio.h"
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2018-06-22 14:28:41 +02:00
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#include "hw/misc/tz-mpc.h"
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2018-08-24 14:17:44 +02:00
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#include "hw/misc/tz-msc.h"
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2019-02-01 15:55:42 +01:00
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#include "hw/arm/armsse.h"
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2018-08-24 14:17:44 +02:00
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#include "hw/dma/pl080.h"
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2021-02-15 12:51:36 +01:00
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#include "hw/rtc/pl031.h"
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2018-08-24 14:17:47 +02:00
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#include "hw/ssi/pl022.h"
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2020-06-17 09:25:39 +02:00
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#include "hw/i2c/arm_sbcon_i2c.h"
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2019-04-12 18:54:15 +02:00
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#include "hw/net/lan9118.h"
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2018-03-02 11:45:40 +01:00
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#include "net/net.h"
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#include "hw/core/split-irq.h"
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2021-01-28 12:41:34 +01:00
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#include "hw/qdev-clock.h"
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2020-09-03 22:43:22 +02:00
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#include "qom/object.h"
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2018-03-02 11:45:40 +01:00
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2021-02-15 12:51:34 +01:00
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#define MPS2TZ_NUMIRQ_MAX 95
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2021-02-15 12:51:30 +01:00
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#define MPS2TZ_RAM_MAX 4
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2019-02-01 15:55:43 +01:00
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2018-03-02 11:45:40 +01:00
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typedef enum MPS2TZFPGAType {
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FPGA_AN505,
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2019-02-01 15:55:43 +01:00
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FPGA_AN521,
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2021-02-15 12:51:34 +01:00
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FPGA_AN524,
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2018-03-02 11:45:40 +01:00
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} MPS2TZFPGAType;
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2021-02-15 12:51:30 +01:00
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/*
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* Define the layout of RAM in a board, including which parts are
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* behind which MPCs.
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* mrindex specifies the index into mms->ram[] to use for the backing RAM;
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* -1 means "use the system RAM".
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*/
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typedef struct RAMInfo {
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const char *name;
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uint32_t base;
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uint32_t size;
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int mpc; /* MPC number, -1 for "not behind an MPC" */
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int mrindex;
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int flags;
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} RAMInfo;
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/*
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* Flag values:
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* IS_ALIAS: this RAM area is an alias to the upstream end of the
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* MPC specified by its .mpc value
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2021-02-15 12:51:32 +01:00
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* IS_ROM: this RAM area is read-only
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2021-02-15 12:51:30 +01:00
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*/
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#define IS_ALIAS 1
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2021-02-15 12:51:32 +01:00
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#define IS_ROM 2
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2021-02-15 12:51:30 +01:00
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2020-09-03 22:43:22 +02:00
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struct MPS2TZMachineClass {
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2018-03-02 11:45:40 +01:00
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MachineClass parent;
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MPS2TZFPGAType fpga_type;
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uint32_t scc_id;
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2021-02-15 12:51:15 +01:00
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uint32_t sysclk_frq; /* Main SYSCLK frequency in Hz */
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2021-02-15 12:51:18 +01:00
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uint32_t len_oscclk;
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const uint32_t *oscclk;
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2021-02-15 12:51:21 +01:00
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uint32_t fpgaio_num_leds; /* Number of LEDs in FPGAIO LED0 register */
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bool fpgaio_has_switches; /* Does FPGAIO have SWITCH register? */
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2021-02-15 12:51:23 +01:00
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int numirq; /* Number of external interrupts */
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2021-02-15 12:51:30 +01:00
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const RAMInfo *raminfo;
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2019-02-01 15:55:44 +01:00
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const char *armsse_type;
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2020-09-03 22:43:22 +02:00
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};
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2018-03-02 11:45:40 +01:00
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2020-09-03 22:43:22 +02:00
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struct MPS2TZMachineState {
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2018-03-02 11:45:40 +01:00
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MachineState parent;
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2019-02-01 15:55:41 +01:00
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ARMSSE iotkit;
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2021-02-15 12:51:30 +01:00
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MemoryRegion ram[MPS2TZ_RAM_MAX];
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2021-02-15 12:51:35 +01:00
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MemoryRegion eth_usb_container;
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2018-03-02 11:45:40 +01:00
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MPS2SCC scc;
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MPS2FPGAIO fpgaio;
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TZPPC ppc[5];
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2021-02-15 12:51:30 +01:00
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TZMPC mpc[3];
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2018-08-24 14:17:47 +02:00
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PL022State spi[5];
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2021-02-15 12:51:34 +01:00
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ArmSbconI2CState i2c[5];
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2018-03-02 11:45:40 +01:00
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UnimplementedDeviceState i2s_audio;
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2018-06-15 15:57:13 +02:00
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UnimplementedDeviceState gpio[4];
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2018-03-02 11:45:40 +01:00
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UnimplementedDeviceState gfx;
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2021-02-15 12:51:34 +01:00
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UnimplementedDeviceState cldc;
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2021-02-15 12:51:35 +01:00
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UnimplementedDeviceState usb;
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2021-02-15 12:51:36 +01:00
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PL031State rtc;
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2018-08-24 14:17:44 +02:00
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PL080State dma[4];
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TZMSC msc[4];
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2021-02-15 12:51:34 +01:00
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CMSDKAPBUART uart[6];
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2018-03-02 11:45:40 +01:00
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SplitIRQ sec_resp_splitter;
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qemu_or_irq uart_irq_orgate;
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2018-06-15 15:57:13 +02:00
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DeviceState *lan9118;
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2021-02-15 12:51:23 +01:00
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SplitIRQ cpu_irq_splitter[MPS2TZ_NUMIRQ_MAX];
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2021-01-28 12:41:34 +01:00
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Clock *sysclk;
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Clock *s32kclk;
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2020-09-03 22:43:22 +02:00
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};
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2018-03-02 11:45:40 +01:00
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#define TYPE_MPS2TZ_MACHINE "mps2tz"
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#define TYPE_MPS2TZ_AN505_MACHINE MACHINE_TYPE_NAME("mps2-an505")
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2019-02-01 15:55:44 +01:00
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#define TYPE_MPS2TZ_AN521_MACHINE MACHINE_TYPE_NAME("mps2-an521")
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2021-02-15 12:51:34 +01:00
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#define TYPE_MPS3TZ_AN524_MACHINE MACHINE_TYPE_NAME("mps3-an524")
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2018-03-02 11:45:40 +01:00
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2020-09-16 20:25:18 +02:00
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OBJECT_DECLARE_TYPE(MPS2TZMachineState, MPS2TZMachineClass, MPS2TZ_MACHINE)
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2018-03-02 11:45:40 +01:00
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2021-01-28 12:41:34 +01:00
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/* Slow 32Khz S32KCLK frequency in Hz */
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#define S32KCLK_FRQ (32 * 1000)
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2018-03-02 11:45:40 +01:00
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2021-02-15 12:51:34 +01:00
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/*
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* The MPS3 DDR is 2GiB, but on a 32-bit host QEMU doesn't permit
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* emulation of that much guest RAM, so artificially make it smaller.
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*/
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#if HOST_LONG_BITS == 32
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#define MPS3_DDR_SIZE (1 * GiB)
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#else
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#define MPS3_DDR_SIZE (2 * GiB)
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#endif
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2021-02-15 12:51:18 +01:00
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static const uint32_t an505_oscclk[] = {
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40000000,
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24580000,
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25000000,
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};
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2021-02-15 12:51:34 +01:00
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static const uint32_t an524_oscclk[] = {
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24000000,
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32000000,
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50000000,
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50000000,
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24576000,
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23750000,
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};
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2021-02-15 12:51:30 +01:00
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static const RAMInfo an505_raminfo[] = { {
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.name = "ssram-0",
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.base = 0x00000000,
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.size = 0x00400000,
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.mpc = 0,
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.mrindex = 0,
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}, {
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.name = "ssram-1",
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.base = 0x28000000,
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.size = 0x00200000,
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.mpc = 1,
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.mrindex = 1,
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}, {
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.name = "ssram-2",
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.base = 0x28200000,
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.size = 0x00200000,
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.mpc = 2,
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.mrindex = 2,
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}, {
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.name = "ssram-0-alias",
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.base = 0x00400000,
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.size = 0x00400000,
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.mpc = 0,
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.mrindex = 3,
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.flags = IS_ALIAS,
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}, {
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/* Use the largest bit of contiguous RAM as our "system memory" */
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.name = "mps.ram",
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.base = 0x80000000,
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.size = 16 * MiB,
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.mpc = -1,
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.mrindex = -1,
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}, {
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.name = NULL,
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},
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};
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2021-02-15 12:51:34 +01:00
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static const RAMInfo an524_raminfo[] = { {
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.name = "bram",
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.base = 0x00000000,
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.size = 512 * KiB,
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.mpc = 0,
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.mrindex = 0,
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}, {
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.name = "sram",
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.base = 0x20000000,
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.size = 32 * 4 * KiB,
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.mpc = 1,
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.mrindex = 1,
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}, {
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/* We don't model QSPI flash yet; for now expose it as simple ROM */
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.name = "QSPI",
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.base = 0x28000000,
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.size = 8 * MiB,
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.mpc = 1,
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.mrindex = 2,
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.flags = IS_ROM,
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}, {
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.name = "DDR",
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.base = 0x60000000,
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.size = MPS3_DDR_SIZE,
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.mpc = 2,
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.mrindex = -1,
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}, {
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.name = NULL,
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},
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};
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2021-02-15 12:51:30 +01:00
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static const RAMInfo *find_raminfo_for_mpc(MPS2TZMachineState *mms, int mpc)
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{
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MPS2TZMachineClass *mmc = MPS2TZ_MACHINE_GET_CLASS(mms);
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const RAMInfo *p;
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for (p = mmc->raminfo; p->name; p++) {
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if (p->mpc == mpc && !(p->flags & IS_ALIAS)) {
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return p;
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}
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}
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/* if raminfo array doesn't have an entry for each MPC this is a bug */
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g_assert_not_reached();
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}
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static MemoryRegion *mr_for_raminfo(MPS2TZMachineState *mms,
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const RAMInfo *raminfo)
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{
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/* Return an initialized MemoryRegion for the RAMInfo. */
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MemoryRegion *ram;
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if (raminfo->mrindex < 0) {
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/* Means this RAMInfo is for QEMU's "system memory" */
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MachineState *machine = MACHINE(mms);
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2021-02-15 12:51:32 +01:00
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assert(!(raminfo->flags & IS_ROM));
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2021-02-15 12:51:30 +01:00
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return machine->ram;
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}
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assert(raminfo->mrindex < MPS2TZ_RAM_MAX);
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ram = &mms->ram[raminfo->mrindex];
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memory_region_init_ram(ram, NULL, raminfo->name,
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raminfo->size, &error_fatal);
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2021-02-15 12:51:32 +01:00
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if (raminfo->flags & IS_ROM) {
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memory_region_set_readonly(ram, true);
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}
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2021-02-15 12:51:30 +01:00
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return ram;
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}
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2018-03-02 11:45:40 +01:00
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/* Create an alias of an entire original MemoryRegion @orig
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* located at @base in the memory map.
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*/
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|
|
static void make_ram_alias(MemoryRegion *mr, const char *name,
|
|
|
|
MemoryRegion *orig, hwaddr base)
|
|
|
|
{
|
|
|
|
memory_region_init_alias(mr, NULL, name, orig, 0,
|
|
|
|
memory_region_size(orig));
|
|
|
|
memory_region_add_subregion(get_system_memory(), base, mr);
|
|
|
|
}
|
|
|
|
|
2019-02-01 15:55:43 +01:00
|
|
|
static qemu_irq get_sse_irq_in(MPS2TZMachineState *mms, int irqno)
|
|
|
|
{
|
hw/arm/mps2-tz: Correct wrong interrupt numbers for DMA and SPI
On the MPS2 boards, the first 32 interrupt lines are entirely
internal to the SSE; interrupt lines for devices outside the SSE
start at 32. In the application notes that document each FPGA image,
the interrupt wiring is documented from the point of view of the CPU,
so '0' is the first of the SSE's interrupts and the devices in the
FPGA image itself are '32' and up: so the UART 0 Receive interrupt is
32, the SPI #0 interrupt is 51, and so on.
Within our implementation, because the external interrupts must be
connected to the EXP_IRQ[0...n] lines of the SSE object, we made the
get_sse_irq_in() function take an irqno whose values start at 0 for
the first FPGA device interrupt. In this numbering scheme the UART 0
Receive interrupt is 0, the SPI #0 interrupt is 19, and so on.
The result of these two different numbering schemes has been that
half of the devices were wired up to the wrong IRQs: the UART IRQs
are wired up correctly, but the DMA and SPI devices were passing
start-at-32 values to get_sse_irq_in() and so being mis-connected.
Fix the bug by making get_sse_irq_in() take values specified with the
same scheme that the hardware manuals use, to avoid confusion.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210215115138.20465-12-peter.maydell@linaro.org
2021-02-15 12:51:25 +01:00
|
|
|
/*
|
|
|
|
* Return a qemu_irq which will signal IRQ n to all CPUs in the
|
|
|
|
* SSE. The irqno should be as the CPU sees it, so the first
|
|
|
|
* external-to-the-SSE interrupt is 32.
|
|
|
|
*/
|
2021-02-15 12:51:22 +01:00
|
|
|
MachineClass *mc = MACHINE_GET_CLASS(mms);
|
2021-02-15 12:51:23 +01:00
|
|
|
MPS2TZMachineClass *mmc = MPS2TZ_MACHINE_GET_CLASS(mms);
|
2019-02-01 15:55:43 +01:00
|
|
|
|
hw/arm/mps2-tz: Correct wrong interrupt numbers for DMA and SPI
On the MPS2 boards, the first 32 interrupt lines are entirely
internal to the SSE; interrupt lines for devices outside the SSE
start at 32. In the application notes that document each FPGA image,
the interrupt wiring is documented from the point of view of the CPU,
so '0' is the first of the SSE's interrupts and the devices in the
FPGA image itself are '32' and up: so the UART 0 Receive interrupt is
32, the SPI #0 interrupt is 51, and so on.
Within our implementation, because the external interrupts must be
connected to the EXP_IRQ[0...n] lines of the SSE object, we made the
get_sse_irq_in() function take an irqno whose values start at 0 for
the first FPGA device interrupt. In this numbering scheme the UART 0
Receive interrupt is 0, the SPI #0 interrupt is 19, and so on.
The result of these two different numbering schemes has been that
half of the devices were wired up to the wrong IRQs: the UART IRQs
are wired up correctly, but the DMA and SPI devices were passing
start-at-32 values to get_sse_irq_in() and so being mis-connected.
Fix the bug by making get_sse_irq_in() take values specified with the
same scheme that the hardware manuals use, to avoid confusion.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210215115138.20465-12-peter.maydell@linaro.org
2021-02-15 12:51:25 +01:00
|
|
|
assert(irqno >= 32 && irqno < (mmc->numirq + 32));
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Convert from "CPU irq number" (as listed in the FPGA image
|
|
|
|
* documentation) to the SSE external-interrupt number.
|
|
|
|
*/
|
|
|
|
irqno -= 32;
|
2019-02-01 15:55:43 +01:00
|
|
|
|
2021-02-15 12:51:22 +01:00
|
|
|
if (mc->max_cpus > 1) {
|
2019-02-01 15:55:43 +01:00
|
|
|
return qdev_get_gpio_in(DEVICE(&mms->cpu_irq_splitter[irqno]), 0);
|
2021-02-15 12:51:22 +01:00
|
|
|
} else {
|
|
|
|
return qdev_get_gpio_in_named(DEVICE(&mms->iotkit), "EXP_IRQ", irqno);
|
2019-02-01 15:55:43 +01:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2018-03-02 11:45:40 +01:00
|
|
|
/* Most of the devices in the AN505 FPGA image sit behind
|
|
|
|
* Peripheral Protection Controllers. These data structures
|
|
|
|
* define the layout of which devices sit behind which PPCs.
|
|
|
|
* The devfn for each port is a function which creates, configures
|
|
|
|
* and initializes the device, returning the MemoryRegion which
|
|
|
|
* needs to be plugged into the downstream end of the PPC port.
|
|
|
|
*/
|
|
|
|
typedef MemoryRegion *MakeDevFn(MPS2TZMachineState *mms, void *opaque,
|
2021-02-15 12:51:26 +01:00
|
|
|
const char *name, hwaddr size,
|
|
|
|
const int *irqs);
|
2018-03-02 11:45:40 +01:00
|
|
|
|
|
|
|
typedef struct PPCPortInfo {
|
|
|
|
const char *name;
|
|
|
|
MakeDevFn *devfn;
|
|
|
|
void *opaque;
|
|
|
|
hwaddr addr;
|
|
|
|
hwaddr size;
|
2021-02-15 12:51:26 +01:00
|
|
|
int irqs[3]; /* currently no device needs more IRQ lines than this */
|
2018-03-02 11:45:40 +01:00
|
|
|
} PPCPortInfo;
|
|
|
|
|
|
|
|
typedef struct PPCInfo {
|
|
|
|
const char *name;
|
|
|
|
PPCPortInfo ports[TZ_NUM_PORTS];
|
|
|
|
} PPCInfo;
|
|
|
|
|
|
|
|
static MemoryRegion *make_unimp_dev(MPS2TZMachineState *mms,
|
2021-02-15 12:51:26 +01:00
|
|
|
void *opaque,
|
|
|
|
const char *name, hwaddr size,
|
|
|
|
const int *irqs)
|
2018-03-02 11:45:40 +01:00
|
|
|
{
|
|
|
|
/* Initialize, configure and realize a TYPE_UNIMPLEMENTED_DEVICE,
|
|
|
|
* and return a pointer to its MemoryRegion.
|
|
|
|
*/
|
|
|
|
UnimplementedDeviceState *uds = opaque;
|
|
|
|
|
sysbus: Convert qdev_set_parent_bus() use with Coccinelle, part 1
I'm converting from qdev_set_parent_bus()/realize to qdev_realize();
recent commit "qdev: Convert uses of qdev_set_parent_bus() with
Coccinelle" explains why.
sysbus_init_child_obj() is a wrapper around
object_initialize_child_with_props() and qdev_set_parent_bus(). It
passes no properties.
Convert sysbus_init_child_obj()/realize to object_initialize_child()/
qdev_realize().
Coccinelle script:
@@
expression parent, name, size, type, errp;
expression child;
symbol true;
@@
- sysbus_init_child_obj(parent, name, &child, size, type);
+ sysbus_init_child_XXX(parent, name, &child, size, type);
...
- object_property_set_bool(OBJECT(&child), true, "realized", errp);
+ sysbus_realize(SYS_BUS_DEVICE(&child), errp);
@@
expression parent, name, size, type, errp;
expression child;
symbol true;
@@
- sysbus_init_child_obj(parent, name, child, size, type);
+ sysbus_init_child_XXX(parent, name, child, size, type);
...
- object_property_set_bool(OBJECT(child), true, "realized", errp);
+ sysbus_realize(SYS_BUS_DEVICE(child), errp);
@@
expression parent, name, size, type;
expression child;
expression dev;
expression expr;
@@
- sysbus_init_child_obj(parent, name, child, size, type);
+ sysbus_init_child_XXX(parent, name, child, size, type);
...
dev = DEVICE(child);
... when != dev = expr;
- qdev_init_nofail(dev);
+ sysbus_realize(SYS_BUS_DEVICE(dev), &error_fatal);
@@
expression parent, propname, type;
expression child;
@@
- sysbus_init_child_XXX(parent, propname, child, sizeof(*child), type)
+ object_initialize_child(parent, propname, child, type)
@@
expression parent, propname, type;
expression child;
@@
- sysbus_init_child_XXX(parent, propname, &child, sizeof(child), type)
+ object_initialize_child(parent, propname, &child, type)
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <20200610053247.1583243-48-armbru@redhat.com>
2020-06-10 07:32:36 +02:00
|
|
|
object_initialize_child(OBJECT(mms), name, uds, TYPE_UNIMPLEMENTED_DEVICE);
|
2018-03-02 11:45:40 +01:00
|
|
|
qdev_prop_set_string(DEVICE(uds), "name", name);
|
|
|
|
qdev_prop_set_uint64(DEVICE(uds), "size", size);
|
sysbus: Convert qdev_set_parent_bus() use with Coccinelle, part 1
I'm converting from qdev_set_parent_bus()/realize to qdev_realize();
recent commit "qdev: Convert uses of qdev_set_parent_bus() with
Coccinelle" explains why.
sysbus_init_child_obj() is a wrapper around
object_initialize_child_with_props() and qdev_set_parent_bus(). It
passes no properties.
Convert sysbus_init_child_obj()/realize to object_initialize_child()/
qdev_realize().
Coccinelle script:
@@
expression parent, name, size, type, errp;
expression child;
symbol true;
@@
- sysbus_init_child_obj(parent, name, &child, size, type);
+ sysbus_init_child_XXX(parent, name, &child, size, type);
...
- object_property_set_bool(OBJECT(&child), true, "realized", errp);
+ sysbus_realize(SYS_BUS_DEVICE(&child), errp);
@@
expression parent, name, size, type, errp;
expression child;
symbol true;
@@
- sysbus_init_child_obj(parent, name, child, size, type);
+ sysbus_init_child_XXX(parent, name, child, size, type);
...
- object_property_set_bool(OBJECT(child), true, "realized", errp);
+ sysbus_realize(SYS_BUS_DEVICE(child), errp);
@@
expression parent, name, size, type;
expression child;
expression dev;
expression expr;
@@
- sysbus_init_child_obj(parent, name, child, size, type);
+ sysbus_init_child_XXX(parent, name, child, size, type);
...
dev = DEVICE(child);
... when != dev = expr;
- qdev_init_nofail(dev);
+ sysbus_realize(SYS_BUS_DEVICE(dev), &error_fatal);
@@
expression parent, propname, type;
expression child;
@@
- sysbus_init_child_XXX(parent, propname, child, sizeof(*child), type)
+ object_initialize_child(parent, propname, child, type)
@@
expression parent, propname, type;
expression child;
@@
- sysbus_init_child_XXX(parent, propname, &child, sizeof(child), type)
+ object_initialize_child(parent, propname, &child, type)
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <20200610053247.1583243-48-armbru@redhat.com>
2020-06-10 07:32:36 +02:00
|
|
|
sysbus_realize(SYS_BUS_DEVICE(uds), &error_fatal);
|
2018-03-02 11:45:40 +01:00
|
|
|
return sysbus_mmio_get_region(SYS_BUS_DEVICE(uds), 0);
|
|
|
|
}
|
|
|
|
|
|
|
|
static MemoryRegion *make_uart(MPS2TZMachineState *mms, void *opaque,
|
2021-02-15 12:51:26 +01:00
|
|
|
const char *name, hwaddr size,
|
|
|
|
const int *irqs)
|
2018-03-02 11:45:40 +01:00
|
|
|
{
|
2021-02-15 12:51:27 +01:00
|
|
|
/* The irq[] array is tx, rx, combined, in that order */
|
2021-02-15 12:51:15 +01:00
|
|
|
MPS2TZMachineClass *mmc = MPS2TZ_MACHINE_GET_CLASS(mms);
|
2018-03-02 11:45:40 +01:00
|
|
|
CMSDKAPBUART *uart = opaque;
|
|
|
|
int i = uart - &mms->uart[0];
|
|
|
|
SysBusDevice *s;
|
|
|
|
DeviceState *orgate_dev = DEVICE(&mms->uart_irq_orgate);
|
|
|
|
|
sysbus: Convert qdev_set_parent_bus() use with Coccinelle, part 1
I'm converting from qdev_set_parent_bus()/realize to qdev_realize();
recent commit "qdev: Convert uses of qdev_set_parent_bus() with
Coccinelle" explains why.
sysbus_init_child_obj() is a wrapper around
object_initialize_child_with_props() and qdev_set_parent_bus(). It
passes no properties.
Convert sysbus_init_child_obj()/realize to object_initialize_child()/
qdev_realize().
Coccinelle script:
@@
expression parent, name, size, type, errp;
expression child;
symbol true;
@@
- sysbus_init_child_obj(parent, name, &child, size, type);
+ sysbus_init_child_XXX(parent, name, &child, size, type);
...
- object_property_set_bool(OBJECT(&child), true, "realized", errp);
+ sysbus_realize(SYS_BUS_DEVICE(&child), errp);
@@
expression parent, name, size, type, errp;
expression child;
symbol true;
@@
- sysbus_init_child_obj(parent, name, child, size, type);
+ sysbus_init_child_XXX(parent, name, child, size, type);
...
- object_property_set_bool(OBJECT(child), true, "realized", errp);
+ sysbus_realize(SYS_BUS_DEVICE(child), errp);
@@
expression parent, name, size, type;
expression child;
expression dev;
expression expr;
@@
- sysbus_init_child_obj(parent, name, child, size, type);
+ sysbus_init_child_XXX(parent, name, child, size, type);
...
dev = DEVICE(child);
... when != dev = expr;
- qdev_init_nofail(dev);
+ sysbus_realize(SYS_BUS_DEVICE(dev), &error_fatal);
@@
expression parent, propname, type;
expression child;
@@
- sysbus_init_child_XXX(parent, propname, child, sizeof(*child), type)
+ object_initialize_child(parent, propname, child, type)
@@
expression parent, propname, type;
expression child;
@@
- sysbus_init_child_XXX(parent, propname, &child, sizeof(child), type)
+ object_initialize_child(parent, propname, &child, type)
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <20200610053247.1583243-48-armbru@redhat.com>
2020-06-10 07:32:36 +02:00
|
|
|
object_initialize_child(OBJECT(mms), name, uart, TYPE_CMSDK_APB_UART);
|
2018-04-20 16:52:44 +02:00
|
|
|
qdev_prop_set_chr(DEVICE(uart), "chardev", serial_hd(i));
|
2021-02-15 12:51:15 +01:00
|
|
|
qdev_prop_set_uint32(DEVICE(uart), "pclk-frq", mmc->sysclk_frq);
|
sysbus: Convert qdev_set_parent_bus() use with Coccinelle, part 1
I'm converting from qdev_set_parent_bus()/realize to qdev_realize();
recent commit "qdev: Convert uses of qdev_set_parent_bus() with
Coccinelle" explains why.
sysbus_init_child_obj() is a wrapper around
object_initialize_child_with_props() and qdev_set_parent_bus(). It
passes no properties.
Convert sysbus_init_child_obj()/realize to object_initialize_child()/
qdev_realize().
Coccinelle script:
@@
expression parent, name, size, type, errp;
expression child;
symbol true;
@@
- sysbus_init_child_obj(parent, name, &child, size, type);
+ sysbus_init_child_XXX(parent, name, &child, size, type);
...
- object_property_set_bool(OBJECT(&child), true, "realized", errp);
+ sysbus_realize(SYS_BUS_DEVICE(&child), errp);
@@
expression parent, name, size, type, errp;
expression child;
symbol true;
@@
- sysbus_init_child_obj(parent, name, child, size, type);
+ sysbus_init_child_XXX(parent, name, child, size, type);
...
- object_property_set_bool(OBJECT(child), true, "realized", errp);
+ sysbus_realize(SYS_BUS_DEVICE(child), errp);
@@
expression parent, name, size, type;
expression child;
expression dev;
expression expr;
@@
- sysbus_init_child_obj(parent, name, child, size, type);
+ sysbus_init_child_XXX(parent, name, child, size, type);
...
dev = DEVICE(child);
... when != dev = expr;
- qdev_init_nofail(dev);
+ sysbus_realize(SYS_BUS_DEVICE(dev), &error_fatal);
@@
expression parent, propname, type;
expression child;
@@
- sysbus_init_child_XXX(parent, propname, child, sizeof(*child), type)
+ object_initialize_child(parent, propname, child, type)
@@
expression parent, propname, type;
expression child;
@@
- sysbus_init_child_XXX(parent, propname, &child, sizeof(child), type)
+ object_initialize_child(parent, propname, &child, type)
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <20200610053247.1583243-48-armbru@redhat.com>
2020-06-10 07:32:36 +02:00
|
|
|
sysbus_realize(SYS_BUS_DEVICE(uart), &error_fatal);
|
2018-03-02 11:45:40 +01:00
|
|
|
s = SYS_BUS_DEVICE(uart);
|
2021-02-15 12:51:27 +01:00
|
|
|
sysbus_connect_irq(s, 0, get_sse_irq_in(mms, irqs[0]));
|
|
|
|
sysbus_connect_irq(s, 1, get_sse_irq_in(mms, irqs[1]));
|
2018-03-02 11:45:40 +01:00
|
|
|
sysbus_connect_irq(s, 2, qdev_get_gpio_in(orgate_dev, i * 2));
|
|
|
|
sysbus_connect_irq(s, 3, qdev_get_gpio_in(orgate_dev, i * 2 + 1));
|
2021-02-15 12:51:27 +01:00
|
|
|
sysbus_connect_irq(s, 4, get_sse_irq_in(mms, irqs[2]));
|
2018-03-02 11:45:40 +01:00
|
|
|
return sysbus_mmio_get_region(SYS_BUS_DEVICE(uart), 0);
|
|
|
|
}
|
|
|
|
|
|
|
|
static MemoryRegion *make_scc(MPS2TZMachineState *mms, void *opaque,
|
2021-02-15 12:51:26 +01:00
|
|
|
const char *name, hwaddr size,
|
|
|
|
const int *irqs)
|
2018-03-02 11:45:40 +01:00
|
|
|
{
|
|
|
|
MPS2SCC *scc = opaque;
|
|
|
|
DeviceState *sccdev;
|
|
|
|
MPS2TZMachineClass *mmc = MPS2TZ_MACHINE_GET_CLASS(mms);
|
2021-02-15 12:51:18 +01:00
|
|
|
uint32_t i;
|
2018-03-02 11:45:40 +01:00
|
|
|
|
sysbus: Convert qdev_set_parent_bus() use with Coccinelle, part 1
I'm converting from qdev_set_parent_bus()/realize to qdev_realize();
recent commit "qdev: Convert uses of qdev_set_parent_bus() with
Coccinelle" explains why.
sysbus_init_child_obj() is a wrapper around
object_initialize_child_with_props() and qdev_set_parent_bus(). It
passes no properties.
Convert sysbus_init_child_obj()/realize to object_initialize_child()/
qdev_realize().
Coccinelle script:
@@
expression parent, name, size, type, errp;
expression child;
symbol true;
@@
- sysbus_init_child_obj(parent, name, &child, size, type);
+ sysbus_init_child_XXX(parent, name, &child, size, type);
...
- object_property_set_bool(OBJECT(&child), true, "realized", errp);
+ sysbus_realize(SYS_BUS_DEVICE(&child), errp);
@@
expression parent, name, size, type, errp;
expression child;
symbol true;
@@
- sysbus_init_child_obj(parent, name, child, size, type);
+ sysbus_init_child_XXX(parent, name, child, size, type);
...
- object_property_set_bool(OBJECT(child), true, "realized", errp);
+ sysbus_realize(SYS_BUS_DEVICE(child), errp);
@@
expression parent, name, size, type;
expression child;
expression dev;
expression expr;
@@
- sysbus_init_child_obj(parent, name, child, size, type);
+ sysbus_init_child_XXX(parent, name, child, size, type);
...
dev = DEVICE(child);
... when != dev = expr;
- qdev_init_nofail(dev);
+ sysbus_realize(SYS_BUS_DEVICE(dev), &error_fatal);
@@
expression parent, propname, type;
expression child;
@@
- sysbus_init_child_XXX(parent, propname, child, sizeof(*child), type)
+ object_initialize_child(parent, propname, child, type)
@@
expression parent, propname, type;
expression child;
@@
- sysbus_init_child_XXX(parent, propname, &child, sizeof(child), type)
+ object_initialize_child(parent, propname, &child, type)
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <20200610053247.1583243-48-armbru@redhat.com>
2020-06-10 07:32:36 +02:00
|
|
|
object_initialize_child(OBJECT(mms), "scc", scc, TYPE_MPS2_SCC);
|
2018-03-02 11:45:40 +01:00
|
|
|
sccdev = DEVICE(scc);
|
|
|
|
qdev_prop_set_uint32(sccdev, "scc-cfg4", 0x2);
|
2018-08-24 14:17:47 +02:00
|
|
|
qdev_prop_set_uint32(sccdev, "scc-aid", 0x00200008);
|
2018-03-02 11:45:40 +01:00
|
|
|
qdev_prop_set_uint32(sccdev, "scc-id", mmc->scc_id);
|
2021-02-15 12:51:18 +01:00
|
|
|
qdev_prop_set_uint32(sccdev, "len-oscclk", mmc->len_oscclk);
|
|
|
|
for (i = 0; i < mmc->len_oscclk; i++) {
|
|
|
|
g_autofree char *propname = g_strdup_printf("oscclk[%u]", i);
|
|
|
|
qdev_prop_set_uint32(sccdev, propname, mmc->oscclk[i]);
|
|
|
|
}
|
sysbus: Convert qdev_set_parent_bus() use with Coccinelle, part 1
I'm converting from qdev_set_parent_bus()/realize to qdev_realize();
recent commit "qdev: Convert uses of qdev_set_parent_bus() with
Coccinelle" explains why.
sysbus_init_child_obj() is a wrapper around
object_initialize_child_with_props() and qdev_set_parent_bus(). It
passes no properties.
Convert sysbus_init_child_obj()/realize to object_initialize_child()/
qdev_realize().
Coccinelle script:
@@
expression parent, name, size, type, errp;
expression child;
symbol true;
@@
- sysbus_init_child_obj(parent, name, &child, size, type);
+ sysbus_init_child_XXX(parent, name, &child, size, type);
...
- object_property_set_bool(OBJECT(&child), true, "realized", errp);
+ sysbus_realize(SYS_BUS_DEVICE(&child), errp);
@@
expression parent, name, size, type, errp;
expression child;
symbol true;
@@
- sysbus_init_child_obj(parent, name, child, size, type);
+ sysbus_init_child_XXX(parent, name, child, size, type);
...
- object_property_set_bool(OBJECT(child), true, "realized", errp);
+ sysbus_realize(SYS_BUS_DEVICE(child), errp);
@@
expression parent, name, size, type;
expression child;
expression dev;
expression expr;
@@
- sysbus_init_child_obj(parent, name, child, size, type);
+ sysbus_init_child_XXX(parent, name, child, size, type);
...
dev = DEVICE(child);
... when != dev = expr;
- qdev_init_nofail(dev);
+ sysbus_realize(SYS_BUS_DEVICE(dev), &error_fatal);
@@
expression parent, propname, type;
expression child;
@@
- sysbus_init_child_XXX(parent, propname, child, sizeof(*child), type)
+ object_initialize_child(parent, propname, child, type)
@@
expression parent, propname, type;
expression child;
@@
- sysbus_init_child_XXX(parent, propname, &child, sizeof(child), type)
+ object_initialize_child(parent, propname, &child, type)
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <20200610053247.1583243-48-armbru@redhat.com>
2020-06-10 07:32:36 +02:00
|
|
|
sysbus_realize(SYS_BUS_DEVICE(scc), &error_fatal);
|
2018-03-02 11:45:40 +01:00
|
|
|
return sysbus_mmio_get_region(SYS_BUS_DEVICE(sccdev), 0);
|
|
|
|
}
|
|
|
|
|
|
|
|
static MemoryRegion *make_fpgaio(MPS2TZMachineState *mms, void *opaque,
|
2021-02-15 12:51:26 +01:00
|
|
|
const char *name, hwaddr size,
|
|
|
|
const int *irqs)
|
2018-03-02 11:45:40 +01:00
|
|
|
{
|
|
|
|
MPS2FPGAIO *fpgaio = opaque;
|
2021-02-15 12:51:21 +01:00
|
|
|
MPS2TZMachineClass *mmc = MPS2TZ_MACHINE_GET_CLASS(mms);
|
2018-03-02 11:45:40 +01:00
|
|
|
|
sysbus: Convert qdev_set_parent_bus() use with Coccinelle, part 1
I'm converting from qdev_set_parent_bus()/realize to qdev_realize();
recent commit "qdev: Convert uses of qdev_set_parent_bus() with
Coccinelle" explains why.
sysbus_init_child_obj() is a wrapper around
object_initialize_child_with_props() and qdev_set_parent_bus(). It
passes no properties.
Convert sysbus_init_child_obj()/realize to object_initialize_child()/
qdev_realize().
Coccinelle script:
@@
expression parent, name, size, type, errp;
expression child;
symbol true;
@@
- sysbus_init_child_obj(parent, name, &child, size, type);
+ sysbus_init_child_XXX(parent, name, &child, size, type);
...
- object_property_set_bool(OBJECT(&child), true, "realized", errp);
+ sysbus_realize(SYS_BUS_DEVICE(&child), errp);
@@
expression parent, name, size, type, errp;
expression child;
symbol true;
@@
- sysbus_init_child_obj(parent, name, child, size, type);
+ sysbus_init_child_XXX(parent, name, child, size, type);
...
- object_property_set_bool(OBJECT(child), true, "realized", errp);
+ sysbus_realize(SYS_BUS_DEVICE(child), errp);
@@
expression parent, name, size, type;
expression child;
expression dev;
expression expr;
@@
- sysbus_init_child_obj(parent, name, child, size, type);
+ sysbus_init_child_XXX(parent, name, child, size, type);
...
dev = DEVICE(child);
... when != dev = expr;
- qdev_init_nofail(dev);
+ sysbus_realize(SYS_BUS_DEVICE(dev), &error_fatal);
@@
expression parent, propname, type;
expression child;
@@
- sysbus_init_child_XXX(parent, propname, child, sizeof(*child), type)
+ object_initialize_child(parent, propname, child, type)
@@
expression parent, propname, type;
expression child;
@@
- sysbus_init_child_XXX(parent, propname, &child, sizeof(child), type)
+ object_initialize_child(parent, propname, &child, type)
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <20200610053247.1583243-48-armbru@redhat.com>
2020-06-10 07:32:36 +02:00
|
|
|
object_initialize_child(OBJECT(mms), "fpgaio", fpgaio, TYPE_MPS2_FPGAIO);
|
2021-02-15 12:51:21 +01:00
|
|
|
qdev_prop_set_uint32(DEVICE(fpgaio), "num-leds", mmc->fpgaio_num_leds);
|
|
|
|
qdev_prop_set_bit(DEVICE(fpgaio), "has-switches", mmc->fpgaio_has_switches);
|
sysbus: Convert qdev_set_parent_bus() use with Coccinelle, part 1
I'm converting from qdev_set_parent_bus()/realize to qdev_realize();
recent commit "qdev: Convert uses of qdev_set_parent_bus() with
Coccinelle" explains why.
sysbus_init_child_obj() is a wrapper around
object_initialize_child_with_props() and qdev_set_parent_bus(). It
passes no properties.
Convert sysbus_init_child_obj()/realize to object_initialize_child()/
qdev_realize().
Coccinelle script:
@@
expression parent, name, size, type, errp;
expression child;
symbol true;
@@
- sysbus_init_child_obj(parent, name, &child, size, type);
+ sysbus_init_child_XXX(parent, name, &child, size, type);
...
- object_property_set_bool(OBJECT(&child), true, "realized", errp);
+ sysbus_realize(SYS_BUS_DEVICE(&child), errp);
@@
expression parent, name, size, type, errp;
expression child;
symbol true;
@@
- sysbus_init_child_obj(parent, name, child, size, type);
+ sysbus_init_child_XXX(parent, name, child, size, type);
...
- object_property_set_bool(OBJECT(child), true, "realized", errp);
+ sysbus_realize(SYS_BUS_DEVICE(child), errp);
@@
expression parent, name, size, type;
expression child;
expression dev;
expression expr;
@@
- sysbus_init_child_obj(parent, name, child, size, type);
+ sysbus_init_child_XXX(parent, name, child, size, type);
...
dev = DEVICE(child);
... when != dev = expr;
- qdev_init_nofail(dev);
+ sysbus_realize(SYS_BUS_DEVICE(dev), &error_fatal);
@@
expression parent, propname, type;
expression child;
@@
- sysbus_init_child_XXX(parent, propname, child, sizeof(*child), type)
+ object_initialize_child(parent, propname, child, type)
@@
expression parent, propname, type;
expression child;
@@
- sysbus_init_child_XXX(parent, propname, &child, sizeof(child), type)
+ object_initialize_child(parent, propname, &child, type)
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <20200610053247.1583243-48-armbru@redhat.com>
2020-06-10 07:32:36 +02:00
|
|
|
sysbus_realize(SYS_BUS_DEVICE(fpgaio), &error_fatal);
|
2018-03-02 11:45:40 +01:00
|
|
|
return sysbus_mmio_get_region(SYS_BUS_DEVICE(fpgaio), 0);
|
|
|
|
}
|
|
|
|
|
2018-06-15 15:57:13 +02:00
|
|
|
static MemoryRegion *make_eth_dev(MPS2TZMachineState *mms, void *opaque,
|
2021-02-15 12:51:26 +01:00
|
|
|
const char *name, hwaddr size,
|
|
|
|
const int *irqs)
|
2018-06-15 15:57:13 +02:00
|
|
|
{
|
|
|
|
SysBusDevice *s;
|
|
|
|
NICInfo *nd = &nd_table[0];
|
|
|
|
|
|
|
|
/* In hardware this is a LAN9220; the LAN9118 is software compatible
|
|
|
|
* except that it doesn't support the checksum-offload feature.
|
|
|
|
*/
|
|
|
|
qemu_check_nic_model(nd, "lan9118");
|
qdev: Convert uses of qdev_create() with Coccinelle
This is the transformation explained in the commit before previous.
Takes care of just one pattern that needs conversion. More to come in
this series.
Coccinelle script:
@ depends on !(file in "hw/arm/highbank.c")@
expression bus, type_name, dev, expr;
@@
- dev = qdev_create(bus, type_name);
+ dev = qdev_new(type_name);
... when != dev = expr
- qdev_init_nofail(dev);
+ qdev_realize_and_unref(dev, bus, &error_fatal);
@@
expression bus, type_name, dev, expr;
identifier DOWN;
@@
- dev = DOWN(qdev_create(bus, type_name));
+ dev = DOWN(qdev_new(type_name));
... when != dev = expr
- qdev_init_nofail(DEVICE(dev));
+ qdev_realize_and_unref(DEVICE(dev), bus, &error_fatal);
@@
expression bus, type_name, expr;
identifier dev;
@@
- DeviceState *dev = qdev_create(bus, type_name);
+ DeviceState *dev = qdev_new(type_name);
... when != dev = expr
- qdev_init_nofail(dev);
+ qdev_realize_and_unref(dev, bus, &error_fatal);
@@
expression bus, type_name, dev, expr, errp;
symbol true;
@@
- dev = qdev_create(bus, type_name);
+ dev = qdev_new(type_name);
... when != dev = expr
- object_property_set_bool(OBJECT(dev), true, "realized", errp);
+ qdev_realize_and_unref(dev, bus, errp);
@@
expression bus, type_name, expr, errp;
identifier dev;
symbol true;
@@
- DeviceState *dev = qdev_create(bus, type_name);
+ DeviceState *dev = qdev_new(type_name);
... when != dev = expr
- object_property_set_bool(OBJECT(dev), true, "realized", errp);
+ qdev_realize_and_unref(dev, bus, errp);
The first rule exempts hw/arm/highbank.c, because it matches along two
control flow paths there, with different @type_name. Covered by the
next commit's manual conversions.
Missing #include "qapi/error.h" added manually.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <20200610053247.1583243-10-armbru@redhat.com>
[Conflicts in hw/misc/empty_slot.c and hw/sparc/leon3.c resolved]
2020-06-10 07:31:58 +02:00
|
|
|
mms->lan9118 = qdev_new(TYPE_LAN9118);
|
2018-06-15 15:57:13 +02:00
|
|
|
qdev_set_nic_properties(mms->lan9118, nd);
|
|
|
|
|
|
|
|
s = SYS_BUS_DEVICE(mms->lan9118);
|
sysbus: Convert to sysbus_realize() etc. with Coccinelle
Convert from qdev_realize(), qdev_realize_and_unref() with null @bus
argument to sysbus_realize(), sysbus_realize_and_unref().
Coccinelle script:
@@
expression dev, errp;
@@
- qdev_realize(DEVICE(dev), NULL, errp);
+ sysbus_realize(SYS_BUS_DEVICE(dev), errp);
@@
expression sysbus_dev, dev, errp;
@@
+ sysbus_dev = SYS_BUS_DEVICE(dev);
- qdev_realize_and_unref(dev, NULL, errp);
+ sysbus_realize_and_unref(sysbus_dev, errp);
- sysbus_dev = SYS_BUS_DEVICE(dev);
@@
expression sysbus_dev, dev, errp;
expression expr;
@@
sysbus_dev = SYS_BUS_DEVICE(dev);
... when != dev = expr;
- qdev_realize_and_unref(dev, NULL, errp);
+ sysbus_realize_and_unref(sysbus_dev, errp);
@@
expression dev, errp;
@@
- qdev_realize_and_unref(DEVICE(dev), NULL, errp);
+ sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), errp);
@@
expression dev, errp;
@@
- qdev_realize_and_unref(dev, NULL, errp);
+ sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), errp);
Whitespace changes minimized manually.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <20200610053247.1583243-46-armbru@redhat.com>
[Conflicts in hw/misc/empty_slot.c and hw/sparc/leon3.c resolved]
2020-06-10 07:32:34 +02:00
|
|
|
sysbus_realize_and_unref(s, &error_fatal);
|
2021-02-15 12:51:27 +01:00
|
|
|
sysbus_connect_irq(s, 0, get_sse_irq_in(mms, irqs[0]));
|
2018-06-15 15:57:13 +02:00
|
|
|
return sysbus_mmio_get_region(s, 0);
|
|
|
|
}
|
|
|
|
|
2021-02-15 12:51:35 +01:00
|
|
|
static MemoryRegion *make_eth_usb(MPS2TZMachineState *mms, void *opaque,
|
|
|
|
const char *name, hwaddr size,
|
|
|
|
const int *irqs)
|
|
|
|
{
|
|
|
|
/*
|
|
|
|
* The AN524 makes the ethernet and USB share a PPC port.
|
|
|
|
* irqs[] is the ethernet IRQ.
|
|
|
|
*/
|
|
|
|
SysBusDevice *s;
|
|
|
|
NICInfo *nd = &nd_table[0];
|
|
|
|
|
|
|
|
memory_region_init(&mms->eth_usb_container, OBJECT(mms),
|
|
|
|
"mps2-tz-eth-usb-container", 0x200000);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* In hardware this is a LAN9220; the LAN9118 is software compatible
|
|
|
|
* except that it doesn't support the checksum-offload feature.
|
|
|
|
*/
|
|
|
|
qemu_check_nic_model(nd, "lan9118");
|
|
|
|
mms->lan9118 = qdev_new(TYPE_LAN9118);
|
|
|
|
qdev_set_nic_properties(mms->lan9118, nd);
|
|
|
|
|
|
|
|
s = SYS_BUS_DEVICE(mms->lan9118);
|
|
|
|
sysbus_realize_and_unref(s, &error_fatal);
|
|
|
|
sysbus_connect_irq(s, 0, get_sse_irq_in(mms, irqs[0]));
|
|
|
|
|
|
|
|
memory_region_add_subregion(&mms->eth_usb_container,
|
|
|
|
0, sysbus_mmio_get_region(s, 0));
|
|
|
|
|
|
|
|
/* The USB OTG controller is an ISP1763; we don't have a model of it. */
|
|
|
|
object_initialize_child(OBJECT(mms), "usb-otg",
|
|
|
|
&mms->usb, TYPE_UNIMPLEMENTED_DEVICE);
|
|
|
|
qdev_prop_set_string(DEVICE(&mms->usb), "name", "usb-otg");
|
|
|
|
qdev_prop_set_uint64(DEVICE(&mms->usb), "size", 0x100000);
|
|
|
|
s = SYS_BUS_DEVICE(&mms->usb);
|
|
|
|
sysbus_realize(s, &error_fatal);
|
|
|
|
|
|
|
|
memory_region_add_subregion(&mms->eth_usb_container,
|
|
|
|
0x100000, sysbus_mmio_get_region(s, 0));
|
|
|
|
|
|
|
|
return &mms->eth_usb_container;
|
|
|
|
}
|
|
|
|
|
2018-06-22 14:28:41 +02:00
|
|
|
static MemoryRegion *make_mpc(MPS2TZMachineState *mms, void *opaque,
|
2021-02-15 12:51:26 +01:00
|
|
|
const char *name, hwaddr size,
|
|
|
|
const int *irqs)
|
2018-06-22 14:28:41 +02:00
|
|
|
{
|
|
|
|
TZMPC *mpc = opaque;
|
2021-02-15 12:51:30 +01:00
|
|
|
int i = mpc - &mms->mpc[0];
|
2018-06-22 14:28:41 +02:00
|
|
|
MemoryRegion *upstream;
|
2021-02-15 12:51:30 +01:00
|
|
|
const RAMInfo *raminfo = find_raminfo_for_mpc(mms, i);
|
|
|
|
MemoryRegion *ram = mr_for_raminfo(mms, raminfo);
|
2018-06-22 14:28:41 +02:00
|
|
|
|
2021-02-15 12:51:30 +01:00
|
|
|
object_initialize_child(OBJECT(mms), name, mpc, TYPE_TZ_MPC);
|
|
|
|
object_property_set_link(OBJECT(mpc), "downstream", OBJECT(ram),
|
qom: Put name parameter before value / visitor parameter
The object_property_set_FOO() setters take property name and value in
an unusual order:
void object_property_set_FOO(Object *obj, FOO_TYPE value,
const char *name, Error **errp)
Having to pass value before name feels grating. Swap them.
Same for object_property_set(), object_property_get(), and
object_property_parse().
Convert callers with this Coccinelle script:
@@
identifier fun = {
object_property_get, object_property_parse, object_property_set_str,
object_property_set_link, object_property_set_bool,
object_property_set_int, object_property_set_uint, object_property_set,
object_property_set_qobject
};
expression obj, v, name, errp;
@@
- fun(obj, v, name, errp)
+ fun(obj, name, v, errp)
Chokes on hw/arm/musicpal.c's lcd_refresh() with the unhelpful error
message "no position information". Convert that one manually.
Fails to convert hw/arm/armsse.c, because Coccinelle gets confused by
ARMSSE being used both as typedef and function-like macro there.
Convert manually.
Fails to convert hw/rx/rx-gdbsim.c, because Coccinelle gets confused
by RXCPU being used both as typedef and function-like macro there.
Convert manually. The other files using RXCPU that way don't need
conversion.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Reviewed-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com>
Message-Id: <20200707160613.848843-27-armbru@redhat.com>
[Straightforwad conflict with commit 2336172d9b "audio: set default
value for pcspk.iobase property" resolved]
2020-07-07 18:05:54 +02:00
|
|
|
&error_fatal);
|
sysbus: Convert qdev_set_parent_bus() use with Coccinelle, part 1
I'm converting from qdev_set_parent_bus()/realize to qdev_realize();
recent commit "qdev: Convert uses of qdev_set_parent_bus() with
Coccinelle" explains why.
sysbus_init_child_obj() is a wrapper around
object_initialize_child_with_props() and qdev_set_parent_bus(). It
passes no properties.
Convert sysbus_init_child_obj()/realize to object_initialize_child()/
qdev_realize().
Coccinelle script:
@@
expression parent, name, size, type, errp;
expression child;
symbol true;
@@
- sysbus_init_child_obj(parent, name, &child, size, type);
+ sysbus_init_child_XXX(parent, name, &child, size, type);
...
- object_property_set_bool(OBJECT(&child), true, "realized", errp);
+ sysbus_realize(SYS_BUS_DEVICE(&child), errp);
@@
expression parent, name, size, type, errp;
expression child;
symbol true;
@@
- sysbus_init_child_obj(parent, name, child, size, type);
+ sysbus_init_child_XXX(parent, name, child, size, type);
...
- object_property_set_bool(OBJECT(child), true, "realized", errp);
+ sysbus_realize(SYS_BUS_DEVICE(child), errp);
@@
expression parent, name, size, type;
expression child;
expression dev;
expression expr;
@@
- sysbus_init_child_obj(parent, name, child, size, type);
+ sysbus_init_child_XXX(parent, name, child, size, type);
...
dev = DEVICE(child);
... when != dev = expr;
- qdev_init_nofail(dev);
+ sysbus_realize(SYS_BUS_DEVICE(dev), &error_fatal);
@@
expression parent, propname, type;
expression child;
@@
- sysbus_init_child_XXX(parent, propname, child, sizeof(*child), type)
+ object_initialize_child(parent, propname, child, type)
@@
expression parent, propname, type;
expression child;
@@
- sysbus_init_child_XXX(parent, propname, &child, sizeof(child), type)
+ object_initialize_child(parent, propname, &child, type)
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <20200610053247.1583243-48-armbru@redhat.com>
2020-06-10 07:32:36 +02:00
|
|
|
sysbus_realize(SYS_BUS_DEVICE(mpc), &error_fatal);
|
2018-06-22 14:28:41 +02:00
|
|
|
/* Map the upstream end of the MPC into system memory */
|
|
|
|
upstream = sysbus_mmio_get_region(SYS_BUS_DEVICE(mpc), 1);
|
2021-02-15 12:51:30 +01:00
|
|
|
memory_region_add_subregion(get_system_memory(), raminfo->base, upstream);
|
2018-06-22 14:28:41 +02:00
|
|
|
/* and connect its interrupt to the IoTKit */
|
|
|
|
qdev_connect_gpio_out_named(DEVICE(mpc), "irq", 0,
|
|
|
|
qdev_get_gpio_in_named(DEVICE(&mms->iotkit),
|
|
|
|
"mpcexp_status", i));
|
|
|
|
|
|
|
|
/* Return the register interface MR for our caller to map behind the PPC */
|
|
|
|
return sysbus_mmio_get_region(SYS_BUS_DEVICE(mpc), 0);
|
|
|
|
}
|
|
|
|
|
2018-08-24 14:17:44 +02:00
|
|
|
static MemoryRegion *make_dma(MPS2TZMachineState *mms, void *opaque,
|
2021-02-15 12:51:26 +01:00
|
|
|
const char *name, hwaddr size,
|
|
|
|
const int *irqs)
|
2018-08-24 14:17:44 +02:00
|
|
|
{
|
2021-02-15 12:51:27 +01:00
|
|
|
/* The irq[] array is DMACINTR, DMACINTERR, DMACINTTC, in that order */
|
2018-08-24 14:17:44 +02:00
|
|
|
PL080State *dma = opaque;
|
|
|
|
int i = dma - &mms->dma[0];
|
|
|
|
SysBusDevice *s;
|
|
|
|
char *mscname = g_strdup_printf("%s-msc", name);
|
|
|
|
TZMSC *msc = &mms->msc[i];
|
|
|
|
DeviceState *iotkitdev = DEVICE(&mms->iotkit);
|
|
|
|
MemoryRegion *msc_upstream;
|
|
|
|
MemoryRegion *msc_downstream;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Each DMA device is a PL081 whose transaction master interface
|
|
|
|
* is guarded by a Master Security Controller. The downstream end of
|
|
|
|
* the MSC connects to the IoTKit AHB Slave Expansion port, so the
|
|
|
|
* DMA devices can see all devices and memory that the CPU does.
|
|
|
|
*/
|
sysbus: Convert qdev_set_parent_bus() use with Coccinelle, part 1
I'm converting from qdev_set_parent_bus()/realize to qdev_realize();
recent commit "qdev: Convert uses of qdev_set_parent_bus() with
Coccinelle" explains why.
sysbus_init_child_obj() is a wrapper around
object_initialize_child_with_props() and qdev_set_parent_bus(). It
passes no properties.
Convert sysbus_init_child_obj()/realize to object_initialize_child()/
qdev_realize().
Coccinelle script:
@@
expression parent, name, size, type, errp;
expression child;
symbol true;
@@
- sysbus_init_child_obj(parent, name, &child, size, type);
+ sysbus_init_child_XXX(parent, name, &child, size, type);
...
- object_property_set_bool(OBJECT(&child), true, "realized", errp);
+ sysbus_realize(SYS_BUS_DEVICE(&child), errp);
@@
expression parent, name, size, type, errp;
expression child;
symbol true;
@@
- sysbus_init_child_obj(parent, name, child, size, type);
+ sysbus_init_child_XXX(parent, name, child, size, type);
...
- object_property_set_bool(OBJECT(child), true, "realized", errp);
+ sysbus_realize(SYS_BUS_DEVICE(child), errp);
@@
expression parent, name, size, type;
expression child;
expression dev;
expression expr;
@@
- sysbus_init_child_obj(parent, name, child, size, type);
+ sysbus_init_child_XXX(parent, name, child, size, type);
...
dev = DEVICE(child);
... when != dev = expr;
- qdev_init_nofail(dev);
+ sysbus_realize(SYS_BUS_DEVICE(dev), &error_fatal);
@@
expression parent, propname, type;
expression child;
@@
- sysbus_init_child_XXX(parent, propname, child, sizeof(*child), type)
+ object_initialize_child(parent, propname, child, type)
@@
expression parent, propname, type;
expression child;
@@
- sysbus_init_child_XXX(parent, propname, &child, sizeof(child), type)
+ object_initialize_child(parent, propname, &child, type)
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <20200610053247.1583243-48-armbru@redhat.com>
2020-06-10 07:32:36 +02:00
|
|
|
object_initialize_child(OBJECT(mms), mscname, msc, TYPE_TZ_MSC);
|
2018-08-24 14:17:44 +02:00
|
|
|
msc_downstream = sysbus_mmio_get_region(SYS_BUS_DEVICE(&mms->iotkit), 0);
|
qom: Put name parameter before value / visitor parameter
The object_property_set_FOO() setters take property name and value in
an unusual order:
void object_property_set_FOO(Object *obj, FOO_TYPE value,
const char *name, Error **errp)
Having to pass value before name feels grating. Swap them.
Same for object_property_set(), object_property_get(), and
object_property_parse().
Convert callers with this Coccinelle script:
@@
identifier fun = {
object_property_get, object_property_parse, object_property_set_str,
object_property_set_link, object_property_set_bool,
object_property_set_int, object_property_set_uint, object_property_set,
object_property_set_qobject
};
expression obj, v, name, errp;
@@
- fun(obj, v, name, errp)
+ fun(obj, name, v, errp)
Chokes on hw/arm/musicpal.c's lcd_refresh() with the unhelpful error
message "no position information". Convert that one manually.
Fails to convert hw/arm/armsse.c, because Coccinelle gets confused by
ARMSSE being used both as typedef and function-like macro there.
Convert manually.
Fails to convert hw/rx/rx-gdbsim.c, because Coccinelle gets confused
by RXCPU being used both as typedef and function-like macro there.
Convert manually. The other files using RXCPU that way don't need
conversion.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Reviewed-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com>
Message-Id: <20200707160613.848843-27-armbru@redhat.com>
[Straightforwad conflict with commit 2336172d9b "audio: set default
value for pcspk.iobase property" resolved]
2020-07-07 18:05:54 +02:00
|
|
|
object_property_set_link(OBJECT(msc), "downstream",
|
|
|
|
OBJECT(msc_downstream), &error_fatal);
|
|
|
|
object_property_set_link(OBJECT(msc), "idau", OBJECT(mms), &error_fatal);
|
sysbus: Convert qdev_set_parent_bus() use with Coccinelle, part 1
I'm converting from qdev_set_parent_bus()/realize to qdev_realize();
recent commit "qdev: Convert uses of qdev_set_parent_bus() with
Coccinelle" explains why.
sysbus_init_child_obj() is a wrapper around
object_initialize_child_with_props() and qdev_set_parent_bus(). It
passes no properties.
Convert sysbus_init_child_obj()/realize to object_initialize_child()/
qdev_realize().
Coccinelle script:
@@
expression parent, name, size, type, errp;
expression child;
symbol true;
@@
- sysbus_init_child_obj(parent, name, &child, size, type);
+ sysbus_init_child_XXX(parent, name, &child, size, type);
...
- object_property_set_bool(OBJECT(&child), true, "realized", errp);
+ sysbus_realize(SYS_BUS_DEVICE(&child), errp);
@@
expression parent, name, size, type, errp;
expression child;
symbol true;
@@
- sysbus_init_child_obj(parent, name, child, size, type);
+ sysbus_init_child_XXX(parent, name, child, size, type);
...
- object_property_set_bool(OBJECT(child), true, "realized", errp);
+ sysbus_realize(SYS_BUS_DEVICE(child), errp);
@@
expression parent, name, size, type;
expression child;
expression dev;
expression expr;
@@
- sysbus_init_child_obj(parent, name, child, size, type);
+ sysbus_init_child_XXX(parent, name, child, size, type);
...
dev = DEVICE(child);
... when != dev = expr;
- qdev_init_nofail(dev);
+ sysbus_realize(SYS_BUS_DEVICE(dev), &error_fatal);
@@
expression parent, propname, type;
expression child;
@@
- sysbus_init_child_XXX(parent, propname, child, sizeof(*child), type)
+ object_initialize_child(parent, propname, child, type)
@@
expression parent, propname, type;
expression child;
@@
- sysbus_init_child_XXX(parent, propname, &child, sizeof(child), type)
+ object_initialize_child(parent, propname, &child, type)
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <20200610053247.1583243-48-armbru@redhat.com>
2020-06-10 07:32:36 +02:00
|
|
|
sysbus_realize(SYS_BUS_DEVICE(msc), &error_fatal);
|
2018-08-24 14:17:44 +02:00
|
|
|
|
|
|
|
qdev_connect_gpio_out_named(DEVICE(msc), "irq", 0,
|
|
|
|
qdev_get_gpio_in_named(iotkitdev,
|
|
|
|
"mscexp_status", i));
|
|
|
|
qdev_connect_gpio_out_named(iotkitdev, "mscexp_clear", i,
|
|
|
|
qdev_get_gpio_in_named(DEVICE(msc),
|
|
|
|
"irq_clear", 0));
|
|
|
|
qdev_connect_gpio_out_named(iotkitdev, "mscexp_ns", i,
|
|
|
|
qdev_get_gpio_in_named(DEVICE(msc),
|
|
|
|
"cfg_nonsec", 0));
|
|
|
|
qdev_connect_gpio_out(DEVICE(&mms->sec_resp_splitter),
|
|
|
|
ARRAY_SIZE(mms->ppc) + i,
|
|
|
|
qdev_get_gpio_in_named(DEVICE(msc),
|
|
|
|
"cfg_sec_resp", 0));
|
|
|
|
msc_upstream = sysbus_mmio_get_region(SYS_BUS_DEVICE(msc), 0);
|
|
|
|
|
sysbus: Convert qdev_set_parent_bus() use with Coccinelle, part 1
I'm converting from qdev_set_parent_bus()/realize to qdev_realize();
recent commit "qdev: Convert uses of qdev_set_parent_bus() with
Coccinelle" explains why.
sysbus_init_child_obj() is a wrapper around
object_initialize_child_with_props() and qdev_set_parent_bus(). It
passes no properties.
Convert sysbus_init_child_obj()/realize to object_initialize_child()/
qdev_realize().
Coccinelle script:
@@
expression parent, name, size, type, errp;
expression child;
symbol true;
@@
- sysbus_init_child_obj(parent, name, &child, size, type);
+ sysbus_init_child_XXX(parent, name, &child, size, type);
...
- object_property_set_bool(OBJECT(&child), true, "realized", errp);
+ sysbus_realize(SYS_BUS_DEVICE(&child), errp);
@@
expression parent, name, size, type, errp;
expression child;
symbol true;
@@
- sysbus_init_child_obj(parent, name, child, size, type);
+ sysbus_init_child_XXX(parent, name, child, size, type);
...
- object_property_set_bool(OBJECT(child), true, "realized", errp);
+ sysbus_realize(SYS_BUS_DEVICE(child), errp);
@@
expression parent, name, size, type;
expression child;
expression dev;
expression expr;
@@
- sysbus_init_child_obj(parent, name, child, size, type);
+ sysbus_init_child_XXX(parent, name, child, size, type);
...
dev = DEVICE(child);
... when != dev = expr;
- qdev_init_nofail(dev);
+ sysbus_realize(SYS_BUS_DEVICE(dev), &error_fatal);
@@
expression parent, propname, type;
expression child;
@@
- sysbus_init_child_XXX(parent, propname, child, sizeof(*child), type)
+ object_initialize_child(parent, propname, child, type)
@@
expression parent, propname, type;
expression child;
@@
- sysbus_init_child_XXX(parent, propname, &child, sizeof(child), type)
+ object_initialize_child(parent, propname, &child, type)
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <20200610053247.1583243-48-armbru@redhat.com>
2020-06-10 07:32:36 +02:00
|
|
|
object_initialize_child(OBJECT(mms), name, dma, TYPE_PL081);
|
qom: Put name parameter before value / visitor parameter
The object_property_set_FOO() setters take property name and value in
an unusual order:
void object_property_set_FOO(Object *obj, FOO_TYPE value,
const char *name, Error **errp)
Having to pass value before name feels grating. Swap them.
Same for object_property_set(), object_property_get(), and
object_property_parse().
Convert callers with this Coccinelle script:
@@
identifier fun = {
object_property_get, object_property_parse, object_property_set_str,
object_property_set_link, object_property_set_bool,
object_property_set_int, object_property_set_uint, object_property_set,
object_property_set_qobject
};
expression obj, v, name, errp;
@@
- fun(obj, v, name, errp)
+ fun(obj, name, v, errp)
Chokes on hw/arm/musicpal.c's lcd_refresh() with the unhelpful error
message "no position information". Convert that one manually.
Fails to convert hw/arm/armsse.c, because Coccinelle gets confused by
ARMSSE being used both as typedef and function-like macro there.
Convert manually.
Fails to convert hw/rx/rx-gdbsim.c, because Coccinelle gets confused
by RXCPU being used both as typedef and function-like macro there.
Convert manually. The other files using RXCPU that way don't need
conversion.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Reviewed-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com>
Message-Id: <20200707160613.848843-27-armbru@redhat.com>
[Straightforwad conflict with commit 2336172d9b "audio: set default
value for pcspk.iobase property" resolved]
2020-07-07 18:05:54 +02:00
|
|
|
object_property_set_link(OBJECT(dma), "downstream", OBJECT(msc_upstream),
|
|
|
|
&error_fatal);
|
sysbus: Convert qdev_set_parent_bus() use with Coccinelle, part 1
I'm converting from qdev_set_parent_bus()/realize to qdev_realize();
recent commit "qdev: Convert uses of qdev_set_parent_bus() with
Coccinelle" explains why.
sysbus_init_child_obj() is a wrapper around
object_initialize_child_with_props() and qdev_set_parent_bus(). It
passes no properties.
Convert sysbus_init_child_obj()/realize to object_initialize_child()/
qdev_realize().
Coccinelle script:
@@
expression parent, name, size, type, errp;
expression child;
symbol true;
@@
- sysbus_init_child_obj(parent, name, &child, size, type);
+ sysbus_init_child_XXX(parent, name, &child, size, type);
...
- object_property_set_bool(OBJECT(&child), true, "realized", errp);
+ sysbus_realize(SYS_BUS_DEVICE(&child), errp);
@@
expression parent, name, size, type, errp;
expression child;
symbol true;
@@
- sysbus_init_child_obj(parent, name, child, size, type);
+ sysbus_init_child_XXX(parent, name, child, size, type);
...
- object_property_set_bool(OBJECT(child), true, "realized", errp);
+ sysbus_realize(SYS_BUS_DEVICE(child), errp);
@@
expression parent, name, size, type;
expression child;
expression dev;
expression expr;
@@
- sysbus_init_child_obj(parent, name, child, size, type);
+ sysbus_init_child_XXX(parent, name, child, size, type);
...
dev = DEVICE(child);
... when != dev = expr;
- qdev_init_nofail(dev);
+ sysbus_realize(SYS_BUS_DEVICE(dev), &error_fatal);
@@
expression parent, propname, type;
expression child;
@@
- sysbus_init_child_XXX(parent, propname, child, sizeof(*child), type)
+ object_initialize_child(parent, propname, child, type)
@@
expression parent, propname, type;
expression child;
@@
- sysbus_init_child_XXX(parent, propname, &child, sizeof(child), type)
+ object_initialize_child(parent, propname, &child, type)
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <20200610053247.1583243-48-armbru@redhat.com>
2020-06-10 07:32:36 +02:00
|
|
|
sysbus_realize(SYS_BUS_DEVICE(dma), &error_fatal);
|
2018-08-24 14:17:44 +02:00
|
|
|
|
|
|
|
s = SYS_BUS_DEVICE(dma);
|
|
|
|
/* Wire up DMACINTR, DMACINTERR, DMACINTTC */
|
2021-02-15 12:51:27 +01:00
|
|
|
sysbus_connect_irq(s, 0, get_sse_irq_in(mms, irqs[0]));
|
|
|
|
sysbus_connect_irq(s, 1, get_sse_irq_in(mms, irqs[1]));
|
|
|
|
sysbus_connect_irq(s, 2, get_sse_irq_in(mms, irqs[2]));
|
2018-08-24 14:17:44 +02:00
|
|
|
|
2018-12-14 14:30:54 +01:00
|
|
|
g_free(mscname);
|
2018-08-24 14:17:44 +02:00
|
|
|
return sysbus_mmio_get_region(s, 0);
|
|
|
|
}
|
|
|
|
|
2018-08-24 14:17:47 +02:00
|
|
|
static MemoryRegion *make_spi(MPS2TZMachineState *mms, void *opaque,
|
2021-02-15 12:51:26 +01:00
|
|
|
const char *name, hwaddr size,
|
|
|
|
const int *irqs)
|
2018-08-24 14:17:47 +02:00
|
|
|
{
|
|
|
|
/*
|
|
|
|
* The AN505 has five PL022 SPI controllers.
|
|
|
|
* One of these should have the LCD controller behind it; the others
|
|
|
|
* are connected only to the FPGA's "general purpose SPI connector"
|
|
|
|
* or "shield" expansion connectors.
|
|
|
|
* Note that if we do implement devices behind SPI, the chip select
|
|
|
|
* lines are set via the "MISC" register in the MPS2 FPGAIO device.
|
|
|
|
*/
|
|
|
|
PL022State *spi = opaque;
|
|
|
|
SysBusDevice *s;
|
|
|
|
|
sysbus: Convert qdev_set_parent_bus() use with Coccinelle, part 1
I'm converting from qdev_set_parent_bus()/realize to qdev_realize();
recent commit "qdev: Convert uses of qdev_set_parent_bus() with
Coccinelle" explains why.
sysbus_init_child_obj() is a wrapper around
object_initialize_child_with_props() and qdev_set_parent_bus(). It
passes no properties.
Convert sysbus_init_child_obj()/realize to object_initialize_child()/
qdev_realize().
Coccinelle script:
@@
expression parent, name, size, type, errp;
expression child;
symbol true;
@@
- sysbus_init_child_obj(parent, name, &child, size, type);
+ sysbus_init_child_XXX(parent, name, &child, size, type);
...
- object_property_set_bool(OBJECT(&child), true, "realized", errp);
+ sysbus_realize(SYS_BUS_DEVICE(&child), errp);
@@
expression parent, name, size, type, errp;
expression child;
symbol true;
@@
- sysbus_init_child_obj(parent, name, child, size, type);
+ sysbus_init_child_XXX(parent, name, child, size, type);
...
- object_property_set_bool(OBJECT(child), true, "realized", errp);
+ sysbus_realize(SYS_BUS_DEVICE(child), errp);
@@
expression parent, name, size, type;
expression child;
expression dev;
expression expr;
@@
- sysbus_init_child_obj(parent, name, child, size, type);
+ sysbus_init_child_XXX(parent, name, child, size, type);
...
dev = DEVICE(child);
... when != dev = expr;
- qdev_init_nofail(dev);
+ sysbus_realize(SYS_BUS_DEVICE(dev), &error_fatal);
@@
expression parent, propname, type;
expression child;
@@
- sysbus_init_child_XXX(parent, propname, child, sizeof(*child), type)
+ object_initialize_child(parent, propname, child, type)
@@
expression parent, propname, type;
expression child;
@@
- sysbus_init_child_XXX(parent, propname, &child, sizeof(child), type)
+ object_initialize_child(parent, propname, &child, type)
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <20200610053247.1583243-48-armbru@redhat.com>
2020-06-10 07:32:36 +02:00
|
|
|
object_initialize_child(OBJECT(mms), name, spi, TYPE_PL022);
|
|
|
|
sysbus_realize(SYS_BUS_DEVICE(spi), &error_fatal);
|
2018-08-24 14:17:47 +02:00
|
|
|
s = SYS_BUS_DEVICE(spi);
|
2021-02-15 12:51:27 +01:00
|
|
|
sysbus_connect_irq(s, 0, get_sse_irq_in(mms, irqs[0]));
|
2018-08-24 14:17:47 +02:00
|
|
|
return sysbus_mmio_get_region(s, 0);
|
|
|
|
}
|
|
|
|
|
2020-06-17 09:25:39 +02:00
|
|
|
static MemoryRegion *make_i2c(MPS2TZMachineState *mms, void *opaque,
|
2021-02-15 12:51:26 +01:00
|
|
|
const char *name, hwaddr size,
|
|
|
|
const int *irqs)
|
2020-06-17 09:25:39 +02:00
|
|
|
{
|
|
|
|
ArmSbconI2CState *i2c = opaque;
|
|
|
|
SysBusDevice *s;
|
|
|
|
|
|
|
|
object_initialize_child(OBJECT(mms), name, i2c, TYPE_ARM_SBCON_I2C);
|
|
|
|
s = SYS_BUS_DEVICE(i2c);
|
|
|
|
sysbus_realize(s, &error_fatal);
|
|
|
|
return sysbus_mmio_get_region(s, 0);
|
|
|
|
}
|
|
|
|
|
2021-02-15 12:51:36 +01:00
|
|
|
static MemoryRegion *make_rtc(MPS2TZMachineState *mms, void *opaque,
|
|
|
|
const char *name, hwaddr size,
|
|
|
|
const int *irqs)
|
|
|
|
{
|
|
|
|
PL031State *pl031 = opaque;
|
|
|
|
SysBusDevice *s;
|
|
|
|
|
|
|
|
object_initialize_child(OBJECT(mms), name, pl031, TYPE_PL031);
|
|
|
|
s = SYS_BUS_DEVICE(pl031);
|
|
|
|
sysbus_realize(s, &error_fatal);
|
|
|
|
/*
|
|
|
|
* The board docs don't give an IRQ number for the PL031, so
|
|
|
|
* presumably it is not connected.
|
|
|
|
*/
|
|
|
|
return sysbus_mmio_get_region(s, 0);
|
|
|
|
}
|
|
|
|
|
2021-02-15 12:51:30 +01:00
|
|
|
static void create_non_mpc_ram(MPS2TZMachineState *mms)
|
|
|
|
{
|
|
|
|
/*
|
|
|
|
* Handle the RAMs which are either not behind MPCs or which are
|
|
|
|
* aliases to another MPC.
|
|
|
|
*/
|
|
|
|
const RAMInfo *p;
|
|
|
|
MPS2TZMachineClass *mmc = MPS2TZ_MACHINE_GET_CLASS(mms);
|
|
|
|
|
|
|
|
for (p = mmc->raminfo; p->name; p++) {
|
|
|
|
if (p->flags & IS_ALIAS) {
|
|
|
|
SysBusDevice *mpc_sbd = SYS_BUS_DEVICE(&mms->mpc[p->mpc]);
|
|
|
|
MemoryRegion *upstream = sysbus_mmio_get_region(mpc_sbd, 1);
|
|
|
|
make_ram_alias(&mms->ram[p->mrindex], p->name, upstream, p->base);
|
|
|
|
} else if (p->mpc == -1) {
|
|
|
|
/* RAM not behind an MPC */
|
|
|
|
MemoryRegion *mr = mr_for_raminfo(mms, p);
|
|
|
|
memory_region_add_subregion(get_system_memory(), p->base, mr);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2021-02-15 12:51:33 +01:00
|
|
|
static uint32_t boot_ram_size(MPS2TZMachineState *mms)
|
|
|
|
{
|
|
|
|
/* Return the size of the RAM block at guest address zero */
|
|
|
|
const RAMInfo *p;
|
|
|
|
MPS2TZMachineClass *mmc = MPS2TZ_MACHINE_GET_CLASS(mms);
|
|
|
|
|
|
|
|
for (p = mmc->raminfo; p->name; p++) {
|
|
|
|
if (p->base == 0) {
|
|
|
|
return p->size;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
g_assert_not_reached();
|
|
|
|
}
|
|
|
|
|
2018-03-02 11:45:40 +01:00
|
|
|
static void mps2tz_common_init(MachineState *machine)
|
|
|
|
{
|
|
|
|
MPS2TZMachineState *mms = MPS2TZ_MACHINE(machine);
|
2019-02-01 15:55:43 +01:00
|
|
|
MPS2TZMachineClass *mmc = MPS2TZ_MACHINE_GET_CLASS(mms);
|
2018-03-02 11:45:40 +01:00
|
|
|
MachineClass *mc = MACHINE_GET_CLASS(machine);
|
|
|
|
MemoryRegion *system_memory = get_system_memory();
|
|
|
|
DeviceState *iotkitdev;
|
|
|
|
DeviceState *dev_splitter;
|
2021-02-15 12:51:29 +01:00
|
|
|
const PPCInfo *ppcs;
|
|
|
|
int num_ppcs;
|
2018-03-02 11:45:40 +01:00
|
|
|
int i;
|
|
|
|
|
|
|
|
if (strcmp(machine->cpu_type, mc->default_cpu_type) != 0) {
|
|
|
|
error_report("This board can only be used with CPU %s",
|
|
|
|
mc->default_cpu_type);
|
|
|
|
exit(1);
|
|
|
|
}
|
|
|
|
|
2020-02-19 17:08:56 +01:00
|
|
|
if (machine->ram_size != mc->default_ram_size) {
|
|
|
|
char *sz = size_to_str(mc->default_ram_size);
|
|
|
|
error_report("Invalid RAM size, should be %s", sz);
|
|
|
|
g_free(sz);
|
|
|
|
exit(EXIT_FAILURE);
|
|
|
|
}
|
|
|
|
|
2021-01-28 12:41:34 +01:00
|
|
|
/* These clocks don't need migration because they are fixed-frequency */
|
|
|
|
mms->sysclk = clock_new(OBJECT(machine), "SYSCLK");
|
2021-02-15 12:51:15 +01:00
|
|
|
clock_set_hz(mms->sysclk, mmc->sysclk_frq);
|
2021-01-28 12:41:34 +01:00
|
|
|
mms->s32kclk = clock_new(OBJECT(machine), "S32KCLK");
|
|
|
|
clock_set_hz(mms->s32kclk, S32KCLK_FRQ);
|
|
|
|
|
sysbus: Convert qdev_set_parent_bus() use with Coccinelle, part 1
I'm converting from qdev_set_parent_bus()/realize to qdev_realize();
recent commit "qdev: Convert uses of qdev_set_parent_bus() with
Coccinelle" explains why.
sysbus_init_child_obj() is a wrapper around
object_initialize_child_with_props() and qdev_set_parent_bus(). It
passes no properties.
Convert sysbus_init_child_obj()/realize to object_initialize_child()/
qdev_realize().
Coccinelle script:
@@
expression parent, name, size, type, errp;
expression child;
symbol true;
@@
- sysbus_init_child_obj(parent, name, &child, size, type);
+ sysbus_init_child_XXX(parent, name, &child, size, type);
...
- object_property_set_bool(OBJECT(&child), true, "realized", errp);
+ sysbus_realize(SYS_BUS_DEVICE(&child), errp);
@@
expression parent, name, size, type, errp;
expression child;
symbol true;
@@
- sysbus_init_child_obj(parent, name, child, size, type);
+ sysbus_init_child_XXX(parent, name, child, size, type);
...
- object_property_set_bool(OBJECT(child), true, "realized", errp);
+ sysbus_realize(SYS_BUS_DEVICE(child), errp);
@@
expression parent, name, size, type;
expression child;
expression dev;
expression expr;
@@
- sysbus_init_child_obj(parent, name, child, size, type);
+ sysbus_init_child_XXX(parent, name, child, size, type);
...
dev = DEVICE(child);
... when != dev = expr;
- qdev_init_nofail(dev);
+ sysbus_realize(SYS_BUS_DEVICE(dev), &error_fatal);
@@
expression parent, propname, type;
expression child;
@@
- sysbus_init_child_XXX(parent, propname, child, sizeof(*child), type)
+ object_initialize_child(parent, propname, child, type)
@@
expression parent, propname, type;
expression child;
@@
- sysbus_init_child_XXX(parent, propname, &child, sizeof(child), type)
+ object_initialize_child(parent, propname, &child, type)
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <20200610053247.1583243-48-armbru@redhat.com>
2020-06-10 07:32:36 +02:00
|
|
|
object_initialize_child(OBJECT(machine), TYPE_IOTKIT, &mms->iotkit,
|
|
|
|
mmc->armsse_type);
|
2018-03-02 11:45:40 +01:00
|
|
|
iotkitdev = DEVICE(&mms->iotkit);
|
qom: Put name parameter before value / visitor parameter
The object_property_set_FOO() setters take property name and value in
an unusual order:
void object_property_set_FOO(Object *obj, FOO_TYPE value,
const char *name, Error **errp)
Having to pass value before name feels grating. Swap them.
Same for object_property_set(), object_property_get(), and
object_property_parse().
Convert callers with this Coccinelle script:
@@
identifier fun = {
object_property_get, object_property_parse, object_property_set_str,
object_property_set_link, object_property_set_bool,
object_property_set_int, object_property_set_uint, object_property_set,
object_property_set_qobject
};
expression obj, v, name, errp;
@@
- fun(obj, v, name, errp)
+ fun(obj, name, v, errp)
Chokes on hw/arm/musicpal.c's lcd_refresh() with the unhelpful error
message "no position information". Convert that one manually.
Fails to convert hw/arm/armsse.c, because Coccinelle gets confused by
ARMSSE being used both as typedef and function-like macro there.
Convert manually.
Fails to convert hw/rx/rx-gdbsim.c, because Coccinelle gets confused
by RXCPU being used both as typedef and function-like macro there.
Convert manually. The other files using RXCPU that way don't need
conversion.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Reviewed-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com>
Message-Id: <20200707160613.848843-27-armbru@redhat.com>
[Straightforwad conflict with commit 2336172d9b "audio: set default
value for pcspk.iobase property" resolved]
2020-07-07 18:05:54 +02:00
|
|
|
object_property_set_link(OBJECT(&mms->iotkit), "memory",
|
|
|
|
OBJECT(system_memory), &error_abort);
|
2021-02-15 12:51:23 +01:00
|
|
|
qdev_prop_set_uint32(iotkitdev, "EXP_NUMIRQ", mmc->numirq);
|
2021-01-28 12:41:34 +01:00
|
|
|
qdev_connect_clock_in(iotkitdev, "MAINCLK", mms->sysclk);
|
|
|
|
qdev_connect_clock_in(iotkitdev, "S32KCLK", mms->s32kclk);
|
sysbus: Convert qdev_set_parent_bus() use with Coccinelle, part 1
I'm converting from qdev_set_parent_bus()/realize to qdev_realize();
recent commit "qdev: Convert uses of qdev_set_parent_bus() with
Coccinelle" explains why.
sysbus_init_child_obj() is a wrapper around
object_initialize_child_with_props() and qdev_set_parent_bus(). It
passes no properties.
Convert sysbus_init_child_obj()/realize to object_initialize_child()/
qdev_realize().
Coccinelle script:
@@
expression parent, name, size, type, errp;
expression child;
symbol true;
@@
- sysbus_init_child_obj(parent, name, &child, size, type);
+ sysbus_init_child_XXX(parent, name, &child, size, type);
...
- object_property_set_bool(OBJECT(&child), true, "realized", errp);
+ sysbus_realize(SYS_BUS_DEVICE(&child), errp);
@@
expression parent, name, size, type, errp;
expression child;
symbol true;
@@
- sysbus_init_child_obj(parent, name, child, size, type);
+ sysbus_init_child_XXX(parent, name, child, size, type);
...
- object_property_set_bool(OBJECT(child), true, "realized", errp);
+ sysbus_realize(SYS_BUS_DEVICE(child), errp);
@@
expression parent, name, size, type;
expression child;
expression dev;
expression expr;
@@
- sysbus_init_child_obj(parent, name, child, size, type);
+ sysbus_init_child_XXX(parent, name, child, size, type);
...
dev = DEVICE(child);
... when != dev = expr;
- qdev_init_nofail(dev);
+ sysbus_realize(SYS_BUS_DEVICE(dev), &error_fatal);
@@
expression parent, propname, type;
expression child;
@@
- sysbus_init_child_XXX(parent, propname, child, sizeof(*child), type)
+ object_initialize_child(parent, propname, child, type)
@@
expression parent, propname, type;
expression child;
@@
- sysbus_init_child_XXX(parent, propname, &child, sizeof(child), type)
+ object_initialize_child(parent, propname, &child, type)
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <20200610053247.1583243-48-armbru@redhat.com>
2020-06-10 07:32:36 +02:00
|
|
|
sysbus_realize(SYS_BUS_DEVICE(&mms->iotkit), &error_fatal);
|
2018-03-02 11:45:40 +01:00
|
|
|
|
2019-02-01 15:55:43 +01:00
|
|
|
/*
|
2021-02-15 12:51:22 +01:00
|
|
|
* If this board has more than one CPU, then we need to create splitters
|
|
|
|
* to feed the IRQ inputs for each CPU in the SSE from each device in the
|
|
|
|
* board. If there is only one CPU, we can just wire the device IRQ
|
|
|
|
* directly to the SSE's IRQ input.
|
2019-02-01 15:55:43 +01:00
|
|
|
*/
|
2021-02-15 12:51:23 +01:00
|
|
|
assert(mmc->numirq <= MPS2TZ_NUMIRQ_MAX);
|
2021-02-15 12:51:22 +01:00
|
|
|
if (mc->max_cpus > 1) {
|
2021-02-15 12:51:23 +01:00
|
|
|
for (i = 0; i < mmc->numirq; i++) {
|
2019-02-01 15:55:43 +01:00
|
|
|
char *name = g_strdup_printf("mps2-irq-splitter%d", i);
|
|
|
|
SplitIRQ *splitter = &mms->cpu_irq_splitter[i];
|
|
|
|
|
qom: Less verbose object_initialize_child()
All users of object_initialize_child() pass the obvious child size
argument. Almost all pass &error_abort and no properties. Tiresome.
Rename object_initialize_child() to
object_initialize_child_with_props() to free the name. New
convenience wrapper object_initialize_child() automates the size
argument, and passes &error_abort and no properties.
Rename object_initialize_childv() to
object_initialize_child_with_propsv() for consistency.
Convert callers with this Coccinelle script:
@@
expression parent, propname, type;
expression child, size;
symbol error_abort;
@@
- object_initialize_child(parent, propname, OBJECT(child), size, type, &error_abort, NULL)
+ object_initialize_child(parent, propname, child, size, type, &error_abort, NULL)
@@
expression parent, propname, type;
expression child;
symbol error_abort;
@@
- object_initialize_child(parent, propname, child, sizeof(*child), type, &error_abort, NULL)
+ object_initialize_child(parent, propname, child, type)
@@
expression parent, propname, type;
expression child;
symbol error_abort;
@@
- object_initialize_child(parent, propname, &child, sizeof(child), type, &error_abort, NULL)
+ object_initialize_child(parent, propname, &child, type)
@@
expression parent, propname, type;
expression child, size, err;
expression list props;
@@
- object_initialize_child(parent, propname, child, size, type, err, props)
+ object_initialize_child_with_props(parent, propname, child, size, type, err, props)
Note that Coccinelle chokes on ARMSSE typedef vs. macro in
hw/arm/armsse.c. Worked around by temporarily renaming the macro for
the spatch run.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
[Rebased: machine opentitan is new (commit fe0fe4735e7)]
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <20200610053247.1583243-37-armbru@redhat.com>
2020-06-10 07:32:25 +02:00
|
|
|
object_initialize_child_with_props(OBJECT(machine), name,
|
|
|
|
splitter, sizeof(*splitter),
|
|
|
|
TYPE_SPLIT_IRQ, &error_fatal,
|
|
|
|
NULL);
|
2019-02-01 15:55:43 +01:00
|
|
|
g_free(name);
|
|
|
|
|
qom: Put name parameter before value / visitor parameter
The object_property_set_FOO() setters take property name and value in
an unusual order:
void object_property_set_FOO(Object *obj, FOO_TYPE value,
const char *name, Error **errp)
Having to pass value before name feels grating. Swap them.
Same for object_property_set(), object_property_get(), and
object_property_parse().
Convert callers with this Coccinelle script:
@@
identifier fun = {
object_property_get, object_property_parse, object_property_set_str,
object_property_set_link, object_property_set_bool,
object_property_set_int, object_property_set_uint, object_property_set,
object_property_set_qobject
};
expression obj, v, name, errp;
@@
- fun(obj, v, name, errp)
+ fun(obj, name, v, errp)
Chokes on hw/arm/musicpal.c's lcd_refresh() with the unhelpful error
message "no position information". Convert that one manually.
Fails to convert hw/arm/armsse.c, because Coccinelle gets confused by
ARMSSE being used both as typedef and function-like macro there.
Convert manually.
Fails to convert hw/rx/rx-gdbsim.c, because Coccinelle gets confused
by RXCPU being used both as typedef and function-like macro there.
Convert manually. The other files using RXCPU that way don't need
conversion.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Reviewed-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com>
Message-Id: <20200707160613.848843-27-armbru@redhat.com>
[Straightforwad conflict with commit 2336172d9b "audio: set default
value for pcspk.iobase property" resolved]
2020-07-07 18:05:54 +02:00
|
|
|
object_property_set_int(OBJECT(splitter), "num-lines", 2,
|
2019-02-01 15:55:43 +01:00
|
|
|
&error_fatal);
|
qdev: Convert bus-less devices to qdev_realize() with Coccinelle
All remaining conversions to qdev_realize() are for bus-less devices.
Coccinelle script:
// only correct for bus-less @dev!
@@
expression errp;
expression dev;
@@
- qdev_init_nofail(dev);
+ qdev_realize(dev, NULL, &error_fatal);
@ depends on !(file in "hw/core/qdev.c") && !(file in "hw/core/bus.c")@
expression errp;
expression dev;
symbol true;
@@
- object_property_set_bool(OBJECT(dev), true, "realized", errp);
+ qdev_realize(DEVICE(dev), NULL, errp);
@ depends on !(file in "hw/core/qdev.c") && !(file in "hw/core/bus.c")@
expression errp;
expression dev;
symbol true;
@@
- object_property_set_bool(dev, true, "realized", errp);
+ qdev_realize(DEVICE(dev), NULL, errp);
Note that Coccinelle chokes on ARMSSE typedef vs. macro in
hw/arm/armsse.c. Worked around by temporarily renaming the macro for
the spatch run.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <20200610053247.1583243-57-armbru@redhat.com>
2020-06-10 07:32:45 +02:00
|
|
|
qdev_realize(DEVICE(splitter), NULL, &error_fatal);
|
2019-02-01 15:55:43 +01:00
|
|
|
qdev_connect_gpio_out(DEVICE(splitter), 0,
|
|
|
|
qdev_get_gpio_in_named(DEVICE(&mms->iotkit),
|
|
|
|
"EXP_IRQ", i));
|
|
|
|
qdev_connect_gpio_out(DEVICE(splitter), 1,
|
|
|
|
qdev_get_gpio_in_named(DEVICE(&mms->iotkit),
|
|
|
|
"EXP_CPU1_IRQ", i));
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2018-03-02 11:45:40 +01:00
|
|
|
/* The sec_resp_cfg output from the IoTKit must be split into multiple
|
2018-08-24 14:17:44 +02:00
|
|
|
* lines, one for each of the PPCs we create here, plus one per MSC.
|
2018-03-02 11:45:40 +01:00
|
|
|
*/
|
2019-08-23 16:32:45 +02:00
|
|
|
object_initialize_child(OBJECT(machine), "sec-resp-splitter",
|
qom: Less verbose object_initialize_child()
All users of object_initialize_child() pass the obvious child size
argument. Almost all pass &error_abort and no properties. Tiresome.
Rename object_initialize_child() to
object_initialize_child_with_props() to free the name. New
convenience wrapper object_initialize_child() automates the size
argument, and passes &error_abort and no properties.
Rename object_initialize_childv() to
object_initialize_child_with_propsv() for consistency.
Convert callers with this Coccinelle script:
@@
expression parent, propname, type;
expression child, size;
symbol error_abort;
@@
- object_initialize_child(parent, propname, OBJECT(child), size, type, &error_abort, NULL)
+ object_initialize_child(parent, propname, child, size, type, &error_abort, NULL)
@@
expression parent, propname, type;
expression child;
symbol error_abort;
@@
- object_initialize_child(parent, propname, child, sizeof(*child), type, &error_abort, NULL)
+ object_initialize_child(parent, propname, child, type)
@@
expression parent, propname, type;
expression child;
symbol error_abort;
@@
- object_initialize_child(parent, propname, &child, sizeof(child), type, &error_abort, NULL)
+ object_initialize_child(parent, propname, &child, type)
@@
expression parent, propname, type;
expression child, size, err;
expression list props;
@@
- object_initialize_child(parent, propname, child, size, type, err, props)
+ object_initialize_child_with_props(parent, propname, child, size, type, err, props)
Note that Coccinelle chokes on ARMSSE typedef vs. macro in
hw/arm/armsse.c. Worked around by temporarily renaming the macro for
the spatch run.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
[Rebased: machine opentitan is new (commit fe0fe4735e7)]
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <20200610053247.1583243-37-armbru@redhat.com>
2020-06-10 07:32:25 +02:00
|
|
|
&mms->sec_resp_splitter, TYPE_SPLIT_IRQ);
|
qom: Put name parameter before value / visitor parameter
The object_property_set_FOO() setters take property name and value in
an unusual order:
void object_property_set_FOO(Object *obj, FOO_TYPE value,
const char *name, Error **errp)
Having to pass value before name feels grating. Swap them.
Same for object_property_set(), object_property_get(), and
object_property_parse().
Convert callers with this Coccinelle script:
@@
identifier fun = {
object_property_get, object_property_parse, object_property_set_str,
object_property_set_link, object_property_set_bool,
object_property_set_int, object_property_set_uint, object_property_set,
object_property_set_qobject
};
expression obj, v, name, errp;
@@
- fun(obj, v, name, errp)
+ fun(obj, name, v, errp)
Chokes on hw/arm/musicpal.c's lcd_refresh() with the unhelpful error
message "no position information". Convert that one manually.
Fails to convert hw/arm/armsse.c, because Coccinelle gets confused by
ARMSSE being used both as typedef and function-like macro there.
Convert manually.
Fails to convert hw/rx/rx-gdbsim.c, because Coccinelle gets confused
by RXCPU being used both as typedef and function-like macro there.
Convert manually. The other files using RXCPU that way don't need
conversion.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Reviewed-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com>
Message-Id: <20200707160613.848843-27-armbru@redhat.com>
[Straightforwad conflict with commit 2336172d9b "audio: set default
value for pcspk.iobase property" resolved]
2020-07-07 18:05:54 +02:00
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|
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object_property_set_int(OBJECT(&mms->sec_resp_splitter), "num-lines",
|
2018-08-24 14:17:44 +02:00
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|
|
ARRAY_SIZE(mms->ppc) + ARRAY_SIZE(mms->msc),
|
qom: Put name parameter before value / visitor parameter
The object_property_set_FOO() setters take property name and value in
an unusual order:
void object_property_set_FOO(Object *obj, FOO_TYPE value,
const char *name, Error **errp)
Having to pass value before name feels grating. Swap them.
Same for object_property_set(), object_property_get(), and
object_property_parse().
Convert callers with this Coccinelle script:
@@
identifier fun = {
object_property_get, object_property_parse, object_property_set_str,
object_property_set_link, object_property_set_bool,
object_property_set_int, object_property_set_uint, object_property_set,
object_property_set_qobject
};
expression obj, v, name, errp;
@@
- fun(obj, v, name, errp)
+ fun(obj, name, v, errp)
Chokes on hw/arm/musicpal.c's lcd_refresh() with the unhelpful error
message "no position information". Convert that one manually.
Fails to convert hw/arm/armsse.c, because Coccinelle gets confused by
ARMSSE being used both as typedef and function-like macro there.
Convert manually.
Fails to convert hw/rx/rx-gdbsim.c, because Coccinelle gets confused
by RXCPU being used both as typedef and function-like macro there.
Convert manually. The other files using RXCPU that way don't need
conversion.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Reviewed-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com>
Message-Id: <20200707160613.848843-27-armbru@redhat.com>
[Straightforwad conflict with commit 2336172d9b "audio: set default
value for pcspk.iobase property" resolved]
2020-07-07 18:05:54 +02:00
|
|
|
&error_fatal);
|
qdev: Convert bus-less devices to qdev_realize() with Coccinelle
All remaining conversions to qdev_realize() are for bus-less devices.
Coccinelle script:
// only correct for bus-less @dev!
@@
expression errp;
expression dev;
@@
- qdev_init_nofail(dev);
+ qdev_realize(dev, NULL, &error_fatal);
@ depends on !(file in "hw/core/qdev.c") && !(file in "hw/core/bus.c")@
expression errp;
expression dev;
symbol true;
@@
- object_property_set_bool(OBJECT(dev), true, "realized", errp);
+ qdev_realize(DEVICE(dev), NULL, errp);
@ depends on !(file in "hw/core/qdev.c") && !(file in "hw/core/bus.c")@
expression errp;
expression dev;
symbol true;
@@
- object_property_set_bool(dev, true, "realized", errp);
+ qdev_realize(DEVICE(dev), NULL, errp);
Note that Coccinelle chokes on ARMSSE typedef vs. macro in
hw/arm/armsse.c. Worked around by temporarily renaming the macro for
the spatch run.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <20200610053247.1583243-57-armbru@redhat.com>
2020-06-10 07:32:45 +02:00
|
|
|
qdev_realize(DEVICE(&mms->sec_resp_splitter), NULL, &error_fatal);
|
2018-03-02 11:45:40 +01:00
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dev_splitter = DEVICE(&mms->sec_resp_splitter);
|
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qdev_connect_gpio_out_named(iotkitdev, "sec_resp_cfg", 0,
|
|
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qdev_get_gpio_in(dev_splitter, 0));
|
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2021-02-15 12:51:30 +01:00
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|
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/*
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|
|
|
* The IoTKit sets up much of the memory layout, including
|
2018-03-02 11:45:40 +01:00
|
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* the aliases between secure and non-secure regions in the
|
2021-02-15 12:51:30 +01:00
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* address space, and also most of the devices in the system.
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* The FPGA itself contains various RAMs and some additional devices.
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* The FPGA images have an odd combination of different RAMs,
|
2018-03-02 11:45:40 +01:00
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* because in hardware they are different implementations and
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* connected to different buses, giving varying performance/size
|
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* tradeoffs. For QEMU they're all just RAM, though. We arbitrarily
|
2021-02-15 12:51:30 +01:00
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* call the largest lump our "system memory".
|
2018-03-02 11:45:40 +01:00
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*/
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2021-02-15 12:51:28 +01:00
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|
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/*
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* The overflow IRQs for all UARTs are ORed together.
|
2018-03-02 11:45:40 +01:00
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* Tx, Rx and "combined" IRQs are sent to the NVIC separately.
|
2021-02-15 12:51:28 +01:00
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* Create the OR gate for this: it has one input for the TX overflow
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* and one for the RX overflow for each UART we might have.
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* (If the board has fewer than the maximum possible number of UARTs
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* those inputs are never wired up and are treated as always-zero.)
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2018-03-02 11:45:40 +01:00
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*/
|
2019-08-23 16:32:45 +02:00
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object_initialize_child(OBJECT(mms), "uart-irq-orgate",
|
qom: Less verbose object_initialize_child()
All users of object_initialize_child() pass the obvious child size
argument. Almost all pass &error_abort and no properties. Tiresome.
Rename object_initialize_child() to
object_initialize_child_with_props() to free the name. New
convenience wrapper object_initialize_child() automates the size
argument, and passes &error_abort and no properties.
Rename object_initialize_childv() to
object_initialize_child_with_propsv() for consistency.
Convert callers with this Coccinelle script:
@@
expression parent, propname, type;
expression child, size;
symbol error_abort;
@@
- object_initialize_child(parent, propname, OBJECT(child), size, type, &error_abort, NULL)
+ object_initialize_child(parent, propname, child, size, type, &error_abort, NULL)
@@
expression parent, propname, type;
expression child;
symbol error_abort;
@@
- object_initialize_child(parent, propname, child, sizeof(*child), type, &error_abort, NULL)
+ object_initialize_child(parent, propname, child, type)
@@
expression parent, propname, type;
expression child;
symbol error_abort;
@@
- object_initialize_child(parent, propname, &child, sizeof(child), type, &error_abort, NULL)
+ object_initialize_child(parent, propname, &child, type)
@@
expression parent, propname, type;
expression child, size, err;
expression list props;
@@
- object_initialize_child(parent, propname, child, size, type, err, props)
+ object_initialize_child_with_props(parent, propname, child, size, type, err, props)
Note that Coccinelle chokes on ARMSSE typedef vs. macro in
hw/arm/armsse.c. Worked around by temporarily renaming the macro for
the spatch run.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
[Rebased: machine opentitan is new (commit fe0fe4735e7)]
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <20200610053247.1583243-37-armbru@redhat.com>
2020-06-10 07:32:25 +02:00
|
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|
&mms->uart_irq_orgate, TYPE_OR_IRQ);
|
2021-02-15 12:51:28 +01:00
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object_property_set_int(OBJECT(&mms->uart_irq_orgate), "num-lines",
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2 * ARRAY_SIZE(mms->uart),
|
2018-03-02 11:45:40 +01:00
|
|
|
&error_fatal);
|
qdev: Convert bus-less devices to qdev_realize() with Coccinelle
All remaining conversions to qdev_realize() are for bus-less devices.
Coccinelle script:
// only correct for bus-less @dev!
@@
expression errp;
expression dev;
@@
- qdev_init_nofail(dev);
+ qdev_realize(dev, NULL, &error_fatal);
@ depends on !(file in "hw/core/qdev.c") && !(file in "hw/core/bus.c")@
expression errp;
expression dev;
symbol true;
@@
- object_property_set_bool(OBJECT(dev), true, "realized", errp);
+ qdev_realize(DEVICE(dev), NULL, errp);
@ depends on !(file in "hw/core/qdev.c") && !(file in "hw/core/bus.c")@
expression errp;
expression dev;
symbol true;
@@
- object_property_set_bool(dev, true, "realized", errp);
+ qdev_realize(DEVICE(dev), NULL, errp);
Note that Coccinelle chokes on ARMSSE typedef vs. macro in
hw/arm/armsse.c. Worked around by temporarily renaming the macro for
the spatch run.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <20200610053247.1583243-57-armbru@redhat.com>
2020-06-10 07:32:45 +02:00
|
|
|
qdev_realize(DEVICE(&mms->uart_irq_orgate), NULL, &error_fatal);
|
2018-03-02 11:45:40 +01:00
|
|
|
qdev_connect_gpio_out(DEVICE(&mms->uart_irq_orgate), 0,
|
hw/arm/mps2-tz: Correct wrong interrupt numbers for DMA and SPI
On the MPS2 boards, the first 32 interrupt lines are entirely
internal to the SSE; interrupt lines for devices outside the SSE
start at 32. In the application notes that document each FPGA image,
the interrupt wiring is documented from the point of view of the CPU,
so '0' is the first of the SSE's interrupts and the devices in the
FPGA image itself are '32' and up: so the UART 0 Receive interrupt is
32, the SPI #0 interrupt is 51, and so on.
Within our implementation, because the external interrupts must be
connected to the EXP_IRQ[0...n] lines of the SSE object, we made the
get_sse_irq_in() function take an irqno whose values start at 0 for
the first FPGA device interrupt. In this numbering scheme the UART 0
Receive interrupt is 0, the SPI #0 interrupt is 19, and so on.
The result of these two different numbering schemes has been that
half of the devices were wired up to the wrong IRQs: the UART IRQs
are wired up correctly, but the DMA and SPI devices were passing
start-at-32 values to get_sse_irq_in() and so being mis-connected.
Fix the bug by making get_sse_irq_in() take values specified with the
same scheme that the hardware manuals use, to avoid confusion.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210215115138.20465-12-peter.maydell@linaro.org
2021-02-15 12:51:25 +01:00
|
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get_sse_irq_in(mms, 47));
|
2018-03-02 11:45:40 +01:00
|
|
|
|
|
|
|
/* Most of the devices in the FPGA are behind Peripheral Protection
|
|
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* Controllers. The required order for initializing things is:
|
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|
* + initialize the PPC
|
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* + initialize, configure and realize downstream devices
|
|
|
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* + connect downstream device MemoryRegions to the PPC
|
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* + realize the PPC
|
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* + map the PPC's MemoryRegions to the places in the address map
|
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* where the downstream devices should appear
|
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* + wire up the PPC's control lines to the IoTKit object
|
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*/
|
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|
|
2021-02-15 12:51:29 +01:00
|
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const PPCInfo an505_ppcs[] = { {
|
2018-03-02 11:45:40 +01:00
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.name = "apb_ppcexp0",
|
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.ports = {
|
2021-02-15 12:51:30 +01:00
|
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{ "ssram-0-mpc", make_mpc, &mms->mpc[0], 0x58007000, 0x1000 },
|
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{ "ssram-1-mpc", make_mpc, &mms->mpc[1], 0x58008000, 0x1000 },
|
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{ "ssram-2-mpc", make_mpc, &mms->mpc[2], 0x58009000, 0x1000 },
|
2018-03-02 11:45:40 +01:00
|
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},
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}, {
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.name = "apb_ppcexp1",
|
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.ports = {
|
2021-02-15 12:51:27 +01:00
|
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{ "spi0", make_spi, &mms->spi[0], 0x40205000, 0x1000, { 51 } },
|
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{ "spi1", make_spi, &mms->spi[1], 0x40206000, 0x1000, { 52 } },
|
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|
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{ "spi2", make_spi, &mms->spi[2], 0x40209000, 0x1000, { 53 } },
|
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|
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{ "spi3", make_spi, &mms->spi[3], 0x4020a000, 0x1000, { 54 } },
|
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{ "spi4", make_spi, &mms->spi[4], 0x4020b000, 0x1000, { 55 } },
|
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|
|
{ "uart0", make_uart, &mms->uart[0], 0x40200000, 0x1000, { 32, 33, 42 } },
|
|
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{ "uart1", make_uart, &mms->uart[1], 0x40201000, 0x1000, { 34, 35, 43 } },
|
|
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{ "uart2", make_uart, &mms->uart[2], 0x40202000, 0x1000, { 36, 37, 44 } },
|
|
|
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{ "uart3", make_uart, &mms->uart[3], 0x40203000, 0x1000, { 38, 39, 45 } },
|
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|
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{ "uart4", make_uart, &mms->uart[4], 0x40204000, 0x1000, { 40, 41, 46 } },
|
2020-06-17 09:25:39 +02:00
|
|
|
{ "i2c0", make_i2c, &mms->i2c[0], 0x40207000, 0x1000 },
|
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|
{ "i2c1", make_i2c, &mms->i2c[1], 0x40208000, 0x1000 },
|
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{ "i2c2", make_i2c, &mms->i2c[2], 0x4020c000, 0x1000 },
|
|
|
|
{ "i2c3", make_i2c, &mms->i2c[3], 0x4020d000, 0x1000 },
|
2018-03-02 11:45:40 +01:00
|
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},
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}, {
|
|
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.name = "apb_ppcexp2",
|
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|
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.ports = {
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|
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{ "scc", make_scc, &mms->scc, 0x40300000, 0x1000 },
|
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{ "i2s-audio", make_unimp_dev, &mms->i2s_audio,
|
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0x40301000, 0x1000 },
|
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{ "fpgaio", make_fpgaio, &mms->fpgaio, 0x40302000, 0x1000 },
|
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},
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}, {
|
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.name = "ahb_ppcexp0",
|
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.ports = {
|
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|
{ "gfx", make_unimp_dev, &mms->gfx, 0x41000000, 0x140000 },
|
|
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|
{ "gpio0", make_unimp_dev, &mms->gpio[0], 0x40100000, 0x1000 },
|
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|
|
{ "gpio1", make_unimp_dev, &mms->gpio[1], 0x40101000, 0x1000 },
|
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|
{ "gpio2", make_unimp_dev, &mms->gpio[2], 0x40102000, 0x1000 },
|
|
|
|
{ "gpio3", make_unimp_dev, &mms->gpio[3], 0x40103000, 0x1000 },
|
2021-02-15 12:51:27 +01:00
|
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|
{ "eth", make_eth_dev, NULL, 0x42000000, 0x100000, { 48 } },
|
2018-03-02 11:45:40 +01:00
|
|
|
},
|
|
|
|
}, {
|
|
|
|
.name = "ahb_ppcexp1",
|
|
|
|
.ports = {
|
2021-02-15 12:51:27 +01:00
|
|
|
{ "dma0", make_dma, &mms->dma[0], 0x40110000, 0x1000, { 58, 56, 57 } },
|
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{ "dma1", make_dma, &mms->dma[1], 0x40111000, 0x1000, { 61, 59, 60 } },
|
|
|
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{ "dma2", make_dma, &mms->dma[2], 0x40112000, 0x1000, { 64, 62, 63 } },
|
|
|
|
{ "dma3", make_dma, &mms->dma[3], 0x40113000, 0x1000, { 67, 65, 66 } },
|
2018-03-02 11:45:40 +01:00
|
|
|
},
|
|
|
|
},
|
|
|
|
};
|
|
|
|
|
2021-02-15 12:51:34 +01:00
|
|
|
const PPCInfo an524_ppcs[] = { {
|
|
|
|
.name = "apb_ppcexp0",
|
|
|
|
.ports = {
|
|
|
|
{ "bram-mpc", make_mpc, &mms->mpc[0], 0x58007000, 0x1000 },
|
|
|
|
{ "qspi-mpc", make_mpc, &mms->mpc[1], 0x58008000, 0x1000 },
|
|
|
|
{ "ddr-mpc", make_mpc, &mms->mpc[2], 0x58009000, 0x1000 },
|
|
|
|
},
|
|
|
|
}, {
|
|
|
|
.name = "apb_ppcexp1",
|
|
|
|
.ports = {
|
|
|
|
{ "i2c0", make_i2c, &mms->i2c[0], 0x41200000, 0x1000 },
|
|
|
|
{ "i2c1", make_i2c, &mms->i2c[1], 0x41201000, 0x1000 },
|
|
|
|
{ "spi0", make_spi, &mms->spi[0], 0x41202000, 0x1000, { 52 } },
|
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|
|
{ "spi1", make_spi, &mms->spi[1], 0x41203000, 0x1000, { 53 } },
|
|
|
|
{ "spi2", make_spi, &mms->spi[2], 0x41204000, 0x1000, { 54 } },
|
|
|
|
{ "i2c2", make_i2c, &mms->i2c[2], 0x41205000, 0x1000 },
|
|
|
|
{ "i2c3", make_i2c, &mms->i2c[3], 0x41206000, 0x1000 },
|
|
|
|
{ /* port 7 reserved */ },
|
|
|
|
{ "i2c4", make_i2c, &mms->i2c[4], 0x41208000, 0x1000 },
|
|
|
|
},
|
|
|
|
}, {
|
|
|
|
.name = "apb_ppcexp2",
|
|
|
|
.ports = {
|
|
|
|
{ "scc", make_scc, &mms->scc, 0x41300000, 0x1000 },
|
|
|
|
{ "i2s-audio", make_unimp_dev, &mms->i2s_audio,
|
|
|
|
0x41301000, 0x1000 },
|
|
|
|
{ "fpgaio", make_fpgaio, &mms->fpgaio, 0x41302000, 0x1000 },
|
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|
|
{ "uart0", make_uart, &mms->uart[0], 0x41303000, 0x1000, { 32, 33, 42 } },
|
|
|
|
{ "uart1", make_uart, &mms->uart[1], 0x41304000, 0x1000, { 34, 35, 43 } },
|
|
|
|
{ "uart2", make_uart, &mms->uart[2], 0x41305000, 0x1000, { 36, 37, 44 } },
|
|
|
|
{ "uart3", make_uart, &mms->uart[3], 0x41306000, 0x1000, { 38, 39, 45 } },
|
|
|
|
{ "uart4", make_uart, &mms->uart[4], 0x41307000, 0x1000, { 40, 41, 46 } },
|
|
|
|
{ "uart5", make_uart, &mms->uart[5], 0x41308000, 0x1000, { 124, 125, 126 } },
|
|
|
|
|
|
|
|
{ /* port 9 reserved */ },
|
|
|
|
{ "clcd", make_unimp_dev, &mms->cldc, 0x4130a000, 0x1000 },
|
2021-02-15 12:51:36 +01:00
|
|
|
{ "rtc", make_rtc, &mms->rtc, 0x4130b000, 0x1000 },
|
2021-02-15 12:51:34 +01:00
|
|
|
},
|
|
|
|
}, {
|
|
|
|
.name = "ahb_ppcexp0",
|
|
|
|
.ports = {
|
|
|
|
{ "gpio0", make_unimp_dev, &mms->gpio[0], 0x41100000, 0x1000 },
|
|
|
|
{ "gpio1", make_unimp_dev, &mms->gpio[1], 0x41101000, 0x1000 },
|
|
|
|
{ "gpio2", make_unimp_dev, &mms->gpio[2], 0x41102000, 0x1000 },
|
|
|
|
{ "gpio3", make_unimp_dev, &mms->gpio[3], 0x41103000, 0x1000 },
|
2021-02-15 12:51:35 +01:00
|
|
|
{ "eth-usb", make_eth_usb, NULL, 0x41400000, 0x200000, { 48 } },
|
2021-02-15 12:51:34 +01:00
|
|
|
},
|
|
|
|
},
|
|
|
|
};
|
|
|
|
|
2021-02-15 12:51:29 +01:00
|
|
|
switch (mmc->fpga_type) {
|
|
|
|
case FPGA_AN505:
|
|
|
|
case FPGA_AN521:
|
|
|
|
ppcs = an505_ppcs;
|
|
|
|
num_ppcs = ARRAY_SIZE(an505_ppcs);
|
|
|
|
break;
|
2021-02-15 12:51:34 +01:00
|
|
|
case FPGA_AN524:
|
|
|
|
ppcs = an524_ppcs;
|
|
|
|
num_ppcs = ARRAY_SIZE(an524_ppcs);
|
|
|
|
break;
|
2021-02-15 12:51:29 +01:00
|
|
|
default:
|
|
|
|
g_assert_not_reached();
|
|
|
|
}
|
|
|
|
|
|
|
|
for (i = 0; i < num_ppcs; i++) {
|
2018-03-02 11:45:40 +01:00
|
|
|
const PPCInfo *ppcinfo = &ppcs[i];
|
|
|
|
TZPPC *ppc = &mms->ppc[i];
|
|
|
|
DeviceState *ppcdev;
|
|
|
|
int port;
|
|
|
|
char *gpioname;
|
|
|
|
|
sysbus: Convert qdev_set_parent_bus() use with Coccinelle, part 1
I'm converting from qdev_set_parent_bus()/realize to qdev_realize();
recent commit "qdev: Convert uses of qdev_set_parent_bus() with
Coccinelle" explains why.
sysbus_init_child_obj() is a wrapper around
object_initialize_child_with_props() and qdev_set_parent_bus(). It
passes no properties.
Convert sysbus_init_child_obj()/realize to object_initialize_child()/
qdev_realize().
Coccinelle script:
@@
expression parent, name, size, type, errp;
expression child;
symbol true;
@@
- sysbus_init_child_obj(parent, name, &child, size, type);
+ sysbus_init_child_XXX(parent, name, &child, size, type);
...
- object_property_set_bool(OBJECT(&child), true, "realized", errp);
+ sysbus_realize(SYS_BUS_DEVICE(&child), errp);
@@
expression parent, name, size, type, errp;
expression child;
symbol true;
@@
- sysbus_init_child_obj(parent, name, child, size, type);
+ sysbus_init_child_XXX(parent, name, child, size, type);
...
- object_property_set_bool(OBJECT(child), true, "realized", errp);
+ sysbus_realize(SYS_BUS_DEVICE(child), errp);
@@
expression parent, name, size, type;
expression child;
expression dev;
expression expr;
@@
- sysbus_init_child_obj(parent, name, child, size, type);
+ sysbus_init_child_XXX(parent, name, child, size, type);
...
dev = DEVICE(child);
... when != dev = expr;
- qdev_init_nofail(dev);
+ sysbus_realize(SYS_BUS_DEVICE(dev), &error_fatal);
@@
expression parent, propname, type;
expression child;
@@
- sysbus_init_child_XXX(parent, propname, child, sizeof(*child), type)
+ object_initialize_child(parent, propname, child, type)
@@
expression parent, propname, type;
expression child;
@@
- sysbus_init_child_XXX(parent, propname, &child, sizeof(child), type)
+ object_initialize_child(parent, propname, &child, type)
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <20200610053247.1583243-48-armbru@redhat.com>
2020-06-10 07:32:36 +02:00
|
|
|
object_initialize_child(OBJECT(machine), ppcinfo->name, ppc,
|
|
|
|
TYPE_TZ_PPC);
|
2018-03-02 11:45:40 +01:00
|
|
|
ppcdev = DEVICE(ppc);
|
|
|
|
|
|
|
|
for (port = 0; port < TZ_NUM_PORTS; port++) {
|
|
|
|
const PPCPortInfo *pinfo = &ppcinfo->ports[port];
|
|
|
|
MemoryRegion *mr;
|
|
|
|
char *portname;
|
|
|
|
|
|
|
|
if (!pinfo->devfn) {
|
|
|
|
continue;
|
|
|
|
}
|
|
|
|
|
2021-02-15 12:51:26 +01:00
|
|
|
mr = pinfo->devfn(mms, pinfo->opaque, pinfo->name, pinfo->size,
|
|
|
|
pinfo->irqs);
|
2018-03-02 11:45:40 +01:00
|
|
|
portname = g_strdup_printf("port[%d]", port);
|
qom: Put name parameter before value / visitor parameter
The object_property_set_FOO() setters take property name and value in
an unusual order:
void object_property_set_FOO(Object *obj, FOO_TYPE value,
const char *name, Error **errp)
Having to pass value before name feels grating. Swap them.
Same for object_property_set(), object_property_get(), and
object_property_parse().
Convert callers with this Coccinelle script:
@@
identifier fun = {
object_property_get, object_property_parse, object_property_set_str,
object_property_set_link, object_property_set_bool,
object_property_set_int, object_property_set_uint, object_property_set,
object_property_set_qobject
};
expression obj, v, name, errp;
@@
- fun(obj, v, name, errp)
+ fun(obj, name, v, errp)
Chokes on hw/arm/musicpal.c's lcd_refresh() with the unhelpful error
message "no position information". Convert that one manually.
Fails to convert hw/arm/armsse.c, because Coccinelle gets confused by
ARMSSE being used both as typedef and function-like macro there.
Convert manually.
Fails to convert hw/rx/rx-gdbsim.c, because Coccinelle gets confused
by RXCPU being used both as typedef and function-like macro there.
Convert manually. The other files using RXCPU that way don't need
conversion.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Reviewed-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com>
Message-Id: <20200707160613.848843-27-armbru@redhat.com>
[Straightforwad conflict with commit 2336172d9b "audio: set default
value for pcspk.iobase property" resolved]
2020-07-07 18:05:54 +02:00
|
|
|
object_property_set_link(OBJECT(ppc), portname, OBJECT(mr),
|
|
|
|
&error_fatal);
|
2018-03-02 11:45:40 +01:00
|
|
|
g_free(portname);
|
|
|
|
}
|
|
|
|
|
sysbus: Convert qdev_set_parent_bus() use with Coccinelle, part 1
I'm converting from qdev_set_parent_bus()/realize to qdev_realize();
recent commit "qdev: Convert uses of qdev_set_parent_bus() with
Coccinelle" explains why.
sysbus_init_child_obj() is a wrapper around
object_initialize_child_with_props() and qdev_set_parent_bus(). It
passes no properties.
Convert sysbus_init_child_obj()/realize to object_initialize_child()/
qdev_realize().
Coccinelle script:
@@
expression parent, name, size, type, errp;
expression child;
symbol true;
@@
- sysbus_init_child_obj(parent, name, &child, size, type);
+ sysbus_init_child_XXX(parent, name, &child, size, type);
...
- object_property_set_bool(OBJECT(&child), true, "realized", errp);
+ sysbus_realize(SYS_BUS_DEVICE(&child), errp);
@@
expression parent, name, size, type, errp;
expression child;
symbol true;
@@
- sysbus_init_child_obj(parent, name, child, size, type);
+ sysbus_init_child_XXX(parent, name, child, size, type);
...
- object_property_set_bool(OBJECT(child), true, "realized", errp);
+ sysbus_realize(SYS_BUS_DEVICE(child), errp);
@@
expression parent, name, size, type;
expression child;
expression dev;
expression expr;
@@
- sysbus_init_child_obj(parent, name, child, size, type);
+ sysbus_init_child_XXX(parent, name, child, size, type);
...
dev = DEVICE(child);
... when != dev = expr;
- qdev_init_nofail(dev);
+ sysbus_realize(SYS_BUS_DEVICE(dev), &error_fatal);
@@
expression parent, propname, type;
expression child;
@@
- sysbus_init_child_XXX(parent, propname, child, sizeof(*child), type)
+ object_initialize_child(parent, propname, child, type)
@@
expression parent, propname, type;
expression child;
@@
- sysbus_init_child_XXX(parent, propname, &child, sizeof(child), type)
+ object_initialize_child(parent, propname, &child, type)
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <20200610053247.1583243-48-armbru@redhat.com>
2020-06-10 07:32:36 +02:00
|
|
|
sysbus_realize(SYS_BUS_DEVICE(ppc), &error_fatal);
|
2018-03-02 11:45:40 +01:00
|
|
|
|
|
|
|
for (port = 0; port < TZ_NUM_PORTS; port++) {
|
|
|
|
const PPCPortInfo *pinfo = &ppcinfo->ports[port];
|
|
|
|
|
|
|
|
if (!pinfo->devfn) {
|
|
|
|
continue;
|
|
|
|
}
|
|
|
|
sysbus_mmio_map(SYS_BUS_DEVICE(ppc), port, pinfo->addr);
|
|
|
|
|
|
|
|
gpioname = g_strdup_printf("%s_nonsec", ppcinfo->name);
|
|
|
|
qdev_connect_gpio_out_named(iotkitdev, gpioname, port,
|
|
|
|
qdev_get_gpio_in_named(ppcdev,
|
|
|
|
"cfg_nonsec",
|
|
|
|
port));
|
|
|
|
g_free(gpioname);
|
|
|
|
gpioname = g_strdup_printf("%s_ap", ppcinfo->name);
|
|
|
|
qdev_connect_gpio_out_named(iotkitdev, gpioname, port,
|
|
|
|
qdev_get_gpio_in_named(ppcdev,
|
|
|
|
"cfg_ap", port));
|
|
|
|
g_free(gpioname);
|
|
|
|
}
|
|
|
|
|
|
|
|
gpioname = g_strdup_printf("%s_irq_enable", ppcinfo->name);
|
|
|
|
qdev_connect_gpio_out_named(iotkitdev, gpioname, 0,
|
|
|
|
qdev_get_gpio_in_named(ppcdev,
|
|
|
|
"irq_enable", 0));
|
|
|
|
g_free(gpioname);
|
|
|
|
gpioname = g_strdup_printf("%s_irq_clear", ppcinfo->name);
|
|
|
|
qdev_connect_gpio_out_named(iotkitdev, gpioname, 0,
|
|
|
|
qdev_get_gpio_in_named(ppcdev,
|
|
|
|
"irq_clear", 0));
|
|
|
|
g_free(gpioname);
|
|
|
|
gpioname = g_strdup_printf("%s_irq_status", ppcinfo->name);
|
|
|
|
qdev_connect_gpio_out_named(ppcdev, "irq", 0,
|
|
|
|
qdev_get_gpio_in_named(iotkitdev,
|
|
|
|
gpioname, 0));
|
|
|
|
g_free(gpioname);
|
|
|
|
|
|
|
|
qdev_connect_gpio_out(dev_splitter, i,
|
|
|
|
qdev_get_gpio_in_named(ppcdev,
|
|
|
|
"cfg_sec_resp", 0));
|
|
|
|
}
|
|
|
|
|
|
|
|
create_unimplemented_device("FPGA NS PC", 0x48007000, 0x1000);
|
|
|
|
|
2021-02-15 12:51:30 +01:00
|
|
|
create_non_mpc_ram(mms);
|
|
|
|
|
2021-02-15 12:51:33 +01:00
|
|
|
armv7m_load_kernel(ARM_CPU(first_cpu), machine->kernel_filename,
|
|
|
|
boot_ram_size(mms));
|
2018-03-02 11:45:40 +01:00
|
|
|
}
|
|
|
|
|
2018-08-24 14:17:44 +02:00
|
|
|
static void mps2_tz_idau_check(IDAUInterface *ii, uint32_t address,
|
|
|
|
int *iregion, bool *exempt, bool *ns, bool *nsc)
|
|
|
|
{
|
|
|
|
/*
|
|
|
|
* The MPS2 TZ FPGA images have IDAUs in them which are connected to
|
|
|
|
* the Master Security Controllers. Thes have the same logic as
|
|
|
|
* is used by the IoTKit for the IDAU connected to the CPU, except
|
|
|
|
* that MSCs don't care about the NSC attribute.
|
|
|
|
*/
|
|
|
|
int region = extract32(address, 28, 4);
|
|
|
|
|
|
|
|
*ns = !(region & 1);
|
|
|
|
*nsc = false;
|
|
|
|
/* 0xe0000000..0xe00fffff and 0xf0000000..0xf00fffff are exempt */
|
|
|
|
*exempt = (address & 0xeff00000) == 0xe0000000;
|
|
|
|
*iregion = region;
|
|
|
|
}
|
|
|
|
|
2018-03-02 11:45:40 +01:00
|
|
|
static void mps2tz_class_init(ObjectClass *oc, void *data)
|
|
|
|
{
|
|
|
|
MachineClass *mc = MACHINE_CLASS(oc);
|
2018-08-24 14:17:44 +02:00
|
|
|
IDAUInterfaceClass *iic = IDAU_INTERFACE_CLASS(oc);
|
2018-03-02 11:45:40 +01:00
|
|
|
|
|
|
|
mc->init = mps2tz_common_init;
|
2018-08-24 14:17:44 +02:00
|
|
|
iic->check = mps2_tz_idau_check;
|
2021-02-15 12:51:31 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
static void mps2tz_set_default_ram_info(MPS2TZMachineClass *mmc)
|
|
|
|
{
|
|
|
|
/*
|
|
|
|
* Set mc->default_ram_size and default_ram_id from the
|
|
|
|
* information in mmc->raminfo.
|
|
|
|
*/
|
|
|
|
MachineClass *mc = MACHINE_CLASS(mmc);
|
|
|
|
const RAMInfo *p;
|
|
|
|
|
|
|
|
for (p = mmc->raminfo; p->name; p++) {
|
|
|
|
if (p->mrindex < 0) {
|
|
|
|
/* Found the entry for "system memory" */
|
|
|
|
mc->default_ram_size = p->size;
|
|
|
|
mc->default_ram_id = p->name;
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
g_assert_not_reached();
|
2018-03-02 11:45:40 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
static void mps2tz_an505_class_init(ObjectClass *oc, void *data)
|
|
|
|
{
|
|
|
|
MachineClass *mc = MACHINE_CLASS(oc);
|
|
|
|
MPS2TZMachineClass *mmc = MPS2TZ_MACHINE_CLASS(oc);
|
|
|
|
|
|
|
|
mc->desc = "ARM MPS2 with AN505 FPGA image for Cortex-M33";
|
2019-02-01 15:55:44 +01:00
|
|
|
mc->default_cpus = 1;
|
|
|
|
mc->min_cpus = mc->default_cpus;
|
|
|
|
mc->max_cpus = mc->default_cpus;
|
2018-03-02 11:45:40 +01:00
|
|
|
mmc->fpga_type = FPGA_AN505;
|
|
|
|
mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-m33");
|
2018-08-24 14:17:47 +02:00
|
|
|
mmc->scc_id = 0x41045050;
|
2021-02-15 12:51:15 +01:00
|
|
|
mmc->sysclk_frq = 20 * 1000 * 1000; /* 20MHz */
|
2021-02-15 12:51:18 +01:00
|
|
|
mmc->oscclk = an505_oscclk;
|
|
|
|
mmc->len_oscclk = ARRAY_SIZE(an505_oscclk);
|
2021-02-15 12:51:21 +01:00
|
|
|
mmc->fpgaio_num_leds = 2;
|
|
|
|
mmc->fpgaio_has_switches = false;
|
2021-02-15 12:51:23 +01:00
|
|
|
mmc->numirq = 92;
|
2021-02-15 12:51:30 +01:00
|
|
|
mmc->raminfo = an505_raminfo;
|
2019-02-01 15:55:44 +01:00
|
|
|
mmc->armsse_type = TYPE_IOTKIT;
|
2021-02-15 12:51:31 +01:00
|
|
|
mps2tz_set_default_ram_info(mmc);
|
2019-02-01 15:55:44 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
static void mps2tz_an521_class_init(ObjectClass *oc, void *data)
|
|
|
|
{
|
|
|
|
MachineClass *mc = MACHINE_CLASS(oc);
|
|
|
|
MPS2TZMachineClass *mmc = MPS2TZ_MACHINE_CLASS(oc);
|
|
|
|
|
|
|
|
mc->desc = "ARM MPS2 with AN521 FPGA image for dual Cortex-M33";
|
|
|
|
mc->default_cpus = 2;
|
|
|
|
mc->min_cpus = mc->default_cpus;
|
|
|
|
mc->max_cpus = mc->default_cpus;
|
|
|
|
mmc->fpga_type = FPGA_AN521;
|
|
|
|
mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-m33");
|
|
|
|
mmc->scc_id = 0x41045210;
|
2021-02-15 12:51:15 +01:00
|
|
|
mmc->sysclk_frq = 20 * 1000 * 1000; /* 20MHz */
|
2021-02-15 12:51:18 +01:00
|
|
|
mmc->oscclk = an505_oscclk; /* AN521 is the same as AN505 here */
|
|
|
|
mmc->len_oscclk = ARRAY_SIZE(an505_oscclk);
|
2021-02-15 12:51:21 +01:00
|
|
|
mmc->fpgaio_num_leds = 2;
|
|
|
|
mmc->fpgaio_has_switches = false;
|
2021-02-15 12:51:23 +01:00
|
|
|
mmc->numirq = 92;
|
2021-02-15 12:51:30 +01:00
|
|
|
mmc->raminfo = an505_raminfo; /* AN521 is the same as AN505 here */
|
2019-02-01 15:55:44 +01:00
|
|
|
mmc->armsse_type = TYPE_SSE200;
|
2021-02-15 12:51:31 +01:00
|
|
|
mps2tz_set_default_ram_info(mmc);
|
2018-03-02 11:45:40 +01:00
|
|
|
}
|
|
|
|
|
2021-02-15 12:51:34 +01:00
|
|
|
static void mps3tz_an524_class_init(ObjectClass *oc, void *data)
|
|
|
|
{
|
|
|
|
MachineClass *mc = MACHINE_CLASS(oc);
|
|
|
|
MPS2TZMachineClass *mmc = MPS2TZ_MACHINE_CLASS(oc);
|
|
|
|
|
|
|
|
mc->desc = "ARM MPS3 with AN524 FPGA image for dual Cortex-M33";
|
|
|
|
mc->default_cpus = 2;
|
|
|
|
mc->min_cpus = mc->default_cpus;
|
|
|
|
mc->max_cpus = mc->default_cpus;
|
|
|
|
mmc->fpga_type = FPGA_AN524;
|
|
|
|
mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-m33");
|
|
|
|
mmc->scc_id = 0x41045240;
|
|
|
|
mmc->sysclk_frq = 32 * 1000 * 1000; /* 32MHz */
|
|
|
|
mmc->oscclk = an524_oscclk;
|
|
|
|
mmc->len_oscclk = ARRAY_SIZE(an524_oscclk);
|
|
|
|
mmc->fpgaio_num_leds = 10;
|
|
|
|
mmc->fpgaio_has_switches = true;
|
|
|
|
mmc->numirq = 95;
|
|
|
|
mmc->raminfo = an524_raminfo;
|
|
|
|
mmc->armsse_type = TYPE_SSE200;
|
|
|
|
mps2tz_set_default_ram_info(mmc);
|
|
|
|
}
|
|
|
|
|
2018-03-02 11:45:40 +01:00
|
|
|
static const TypeInfo mps2tz_info = {
|
|
|
|
.name = TYPE_MPS2TZ_MACHINE,
|
|
|
|
.parent = TYPE_MACHINE,
|
|
|
|
.abstract = true,
|
|
|
|
.instance_size = sizeof(MPS2TZMachineState),
|
|
|
|
.class_size = sizeof(MPS2TZMachineClass),
|
|
|
|
.class_init = mps2tz_class_init,
|
2018-08-24 14:17:44 +02:00
|
|
|
.interfaces = (InterfaceInfo[]) {
|
|
|
|
{ TYPE_IDAU_INTERFACE },
|
|
|
|
{ }
|
|
|
|
},
|
2018-03-02 11:45:40 +01:00
|
|
|
};
|
|
|
|
|
|
|
|
static const TypeInfo mps2tz_an505_info = {
|
|
|
|
.name = TYPE_MPS2TZ_AN505_MACHINE,
|
|
|
|
.parent = TYPE_MPS2TZ_MACHINE,
|
|
|
|
.class_init = mps2tz_an505_class_init,
|
|
|
|
};
|
|
|
|
|
2019-02-01 15:55:44 +01:00
|
|
|
static const TypeInfo mps2tz_an521_info = {
|
|
|
|
.name = TYPE_MPS2TZ_AN521_MACHINE,
|
|
|
|
.parent = TYPE_MPS2TZ_MACHINE,
|
|
|
|
.class_init = mps2tz_an521_class_init,
|
|
|
|
};
|
|
|
|
|
2021-02-15 12:51:34 +01:00
|
|
|
static const TypeInfo mps3tz_an524_info = {
|
|
|
|
.name = TYPE_MPS3TZ_AN524_MACHINE,
|
|
|
|
.parent = TYPE_MPS2TZ_MACHINE,
|
|
|
|
.class_init = mps3tz_an524_class_init,
|
|
|
|
};
|
|
|
|
|
2018-03-02 11:45:40 +01:00
|
|
|
static void mps2tz_machine_init(void)
|
|
|
|
{
|
|
|
|
type_register_static(&mps2tz_info);
|
|
|
|
type_register_static(&mps2tz_an505_info);
|
2019-02-01 15:55:44 +01:00
|
|
|
type_register_static(&mps2tz_an521_info);
|
2021-02-15 12:51:34 +01:00
|
|
|
type_register_static(&mps3tz_an524_info);
|
2018-03-02 11:45:40 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
type_init(mps2tz_machine_init);
|