2007-09-16 23:08:06 +02:00
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/*
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2007-04-06 18:49:48 +02:00
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* Arm PrimeCell PL181 MultiMedia Card Interface
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*
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* Copyright (c) 2007 CodeSourcery.
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* Written by Paul Brook
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*
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2011-06-26 04:21:35 +02:00
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* This code is licensed under the GPL.
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2007-04-06 18:49:48 +02:00
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*/
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2016-01-26 19:17:05 +01:00
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#include "qemu/osdep.h"
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2012-12-17 18:20:04 +01:00
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#include "sysemu/blockdev.h"
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2013-02-04 15:40:22 +01:00
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#include "hw/sysbus.h"
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2019-08-12 07:23:45 +02:00
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#include "migration/vmstate.h"
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2019-08-12 07:23:42 +02:00
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#include "hw/irq.h"
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2015-10-08 15:21:01 +02:00
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#include "hw/sd/sd.h"
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2015-12-15 13:16:16 +01:00
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#include "qemu/log.h"
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2019-05-23 16:35:07 +02:00
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#include "qemu/module.h"
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hw/sd/pl181: Replace fprintf(stderr, "*\n") with error_report()
Replace a large number of the fprintf(stderr, "*\n" calls with
error_report(). The functions were renamed with these commands and then
compiler issues where manually fixed.
find ./* -type f -exec sed -i \
'N;N;N;N;N;N;N;N;N;N;N;N; {s|fprintf(stderr, "\(.*\)\\n"\(.*\));|error_report("\1"\2);|Ig}' \
{} +
find ./* -type f -exec sed -i \
'N;N;N;N;N;N;N;N;N;N;N; {s|fprintf(stderr, "\(.*\)\\n"\(.*\));|error_report("\1"\2);|Ig}' \
{} +
find ./* -type f -exec sed -i \
'N;N;N;N;N;N;N;N;N; {s|fprintf(stderr, "\(.*\)\\n"\(.*\));|error_report("\1"\2);|Ig}' \
{} +
find ./* -type f -exec sed -i \
'N;N;N;N;N;N;N;N; {s|fprintf(stderr, "\(.*\)\\n"\(.*\));|error_report("\1"\2);|Ig}' \
{} +
find ./* -type f -exec sed -i \
'N;N;N;N;N;N;N; {s|fprintf(stderr, "\(.*\)\\n"\(.*\));|error_report("\1"\2);|Ig}' \
{} +
find ./* -type f -exec sed -i \
'N;N;N;N;N;N; {s|fprintf(stderr, "\(.*\)\\n"\(.*\));|error_report("\1"\2);|Ig}' \
{} +
find ./* -type f -exec sed -i \
'N;N;N;N;N; {s|fprintf(stderr, "\(.*\)\\n"\(.*\));|error_report("\1"\2);|Ig}' \
{} +
find ./* -type f -exec sed -i \
'N;N;N;N; {s|fprintf(stderr, "\(.*\)\\n"\(.*\));|error_report("\1"\2);|Ig}' \
{} +
find ./* -type f -exec sed -i \
'N;N;N; {s|fprintf(stderr, "\(.*\)\\n"\(.*\));|error_report("\1"\2);|Ig}' \
{} +
find ./* -type f -exec sed -i \
'N;N; {s|fprintf(stderr, "\(.*\)\\n"\(.*\));|error_report("\1"\2);|Ig}' \
{} +
find ./* -type f -exec sed -i \
'N; {s|fprintf(stderr, "\(.*\)\\n"\(.*\));|error_report("\1"\2);|Ig}' \
{} +
Some lines where then manually tweaked to pass checkpatch.
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>
Message-Id: <488ba8d4c562ea44119de8ea0f385a898bd8fa1e.1513790495.git.alistair.francis@xilinx.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Acked-by: Peter Maydell <peter.maydell@linaro.org>
2017-12-20 18:24:47 +01:00
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#include "qemu/error-report.h"
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2016-06-14 16:59:14 +02:00
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#include "qapi/error.h"
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2020-07-05 19:57:50 +02:00
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#include "trace.h"
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2007-04-06 18:49:48 +02:00
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#define PL181_FIFO_LEN 16
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2013-07-27 13:23:41 +02:00
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#define TYPE_PL181 "pl181"
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#define PL181(obj) OBJECT_CHECK(PL181State, (obj), TYPE_PL181)
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2018-01-23 04:58:35 +01:00
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#define TYPE_PL181_BUS "pl181-bus"
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2013-07-27 13:20:09 +02:00
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typedef struct PL181State {
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2013-07-27 13:23:41 +02:00
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SysBusDevice parent_obj;
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2011-10-11 13:54:48 +02:00
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MemoryRegion iomem;
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2018-01-23 04:58:35 +01:00
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SDBus sdbus;
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2007-04-06 18:49:48 +02:00
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uint32_t clock;
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uint32_t power;
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uint32_t cmdarg;
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uint32_t cmd;
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uint32_t datatimer;
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uint32_t datalength;
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uint32_t respcmd;
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uint32_t response[4];
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uint32_t datactrl;
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uint32_t datacnt;
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uint32_t status;
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uint32_t mask[2];
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2011-12-19 13:01:44 +01:00
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int32_t fifo_pos;
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int32_t fifo_len;
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2007-06-09 16:07:54 +02:00
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/* The linux 2.6.21 driver is buggy, and misbehaves if new data arrives
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2015-09-08 23:45:14 +02:00
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while it is reading the FIFO. We hack around this by deferring
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2007-06-09 16:07:54 +02:00
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subsequent transfers until after the driver polls the status word.
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http://www.arm.linux.org.uk/developer/patches/viewpatch.php?id=4446/1
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*/
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2011-12-19 13:01:44 +01:00
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int32_t linux_hack;
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2020-07-05 19:54:31 +02:00
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uint32_t fifo[PL181_FIFO_LEN]; /* TODO use Fifo32 */
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2007-04-07 20:14:41 +02:00
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qemu_irq irq[2];
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2011-02-21 21:57:49 +01:00
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/* GPIO outputs for 'card is readonly' and 'card inserted' */
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2020-07-05 13:39:53 +02:00
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qemu_irq card_readonly;
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qemu_irq card_inserted;
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2013-07-27 13:20:09 +02:00
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} PL181State;
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2007-04-06 18:49:48 +02:00
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2011-12-19 13:01:44 +01:00
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static const VMStateDescription vmstate_pl181 = {
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.name = "pl181",
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.version_id = 1,
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.minimum_version_id = 1,
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.fields = (VMStateField[]) {
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2013-07-27 13:20:09 +02:00
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VMSTATE_UINT32(clock, PL181State),
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VMSTATE_UINT32(power, PL181State),
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VMSTATE_UINT32(cmdarg, PL181State),
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VMSTATE_UINT32(cmd, PL181State),
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VMSTATE_UINT32(datatimer, PL181State),
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VMSTATE_UINT32(datalength, PL181State),
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VMSTATE_UINT32(respcmd, PL181State),
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VMSTATE_UINT32_ARRAY(response, PL181State, 4),
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VMSTATE_UINT32(datactrl, PL181State),
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VMSTATE_UINT32(datacnt, PL181State),
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VMSTATE_UINT32(status, PL181State),
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VMSTATE_UINT32_ARRAY(mask, PL181State, 2),
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VMSTATE_INT32(fifo_pos, PL181State),
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VMSTATE_INT32(fifo_len, PL181State),
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VMSTATE_INT32(linux_hack, PL181State),
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VMSTATE_UINT32_ARRAY(fifo, PL181State, PL181_FIFO_LEN),
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2011-12-19 13:01:44 +01:00
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VMSTATE_END_OF_LIST()
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}
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};
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2007-04-06 18:49:48 +02:00
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#define PL181_CMD_INDEX 0x3f
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#define PL181_CMD_RESPONSE (1 << 6)
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#define PL181_CMD_LONGRESP (1 << 7)
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#define PL181_CMD_INTERRUPT (1 << 8)
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#define PL181_CMD_PENDING (1 << 9)
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#define PL181_CMD_ENABLE (1 << 10)
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#define PL181_DATA_ENABLE (1 << 0)
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#define PL181_DATA_DIRECTION (1 << 1)
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#define PL181_DATA_MODE (1 << 2)
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#define PL181_DATA_DMAENABLE (1 << 3)
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#define PL181_STATUS_CMDCRCFAIL (1 << 0)
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#define PL181_STATUS_DATACRCFAIL (1 << 1)
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#define PL181_STATUS_CMDTIMEOUT (1 << 2)
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#define PL181_STATUS_DATATIMEOUT (1 << 3)
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#define PL181_STATUS_TXUNDERRUN (1 << 4)
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#define PL181_STATUS_RXOVERRUN (1 << 5)
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#define PL181_STATUS_CMDRESPEND (1 << 6)
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#define PL181_STATUS_CMDSENT (1 << 7)
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#define PL181_STATUS_DATAEND (1 << 8)
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#define PL181_STATUS_DATABLOCKEND (1 << 10)
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#define PL181_STATUS_CMDACTIVE (1 << 11)
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#define PL181_STATUS_TXACTIVE (1 << 12)
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#define PL181_STATUS_RXACTIVE (1 << 13)
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#define PL181_STATUS_TXFIFOHALFEMPTY (1 << 14)
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#define PL181_STATUS_RXFIFOHALFFULL (1 << 15)
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#define PL181_STATUS_TXFIFOFULL (1 << 16)
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#define PL181_STATUS_RXFIFOFULL (1 << 17)
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#define PL181_STATUS_TXFIFOEMPTY (1 << 18)
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#define PL181_STATUS_RXFIFOEMPTY (1 << 19)
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#define PL181_STATUS_TXDATAAVLBL (1 << 20)
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#define PL181_STATUS_RXDATAAVLBL (1 << 21)
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#define PL181_STATUS_TX_FIFO (PL181_STATUS_TXACTIVE \
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|PL181_STATUS_TXFIFOHALFEMPTY \
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|PL181_STATUS_TXFIFOFULL \
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|PL181_STATUS_TXFIFOEMPTY \
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|PL181_STATUS_TXDATAAVLBL)
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#define PL181_STATUS_RX_FIFO (PL181_STATUS_RXACTIVE \
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|PL181_STATUS_RXFIFOHALFFULL \
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|PL181_STATUS_RXFIFOFULL \
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|PL181_STATUS_RXFIFOEMPTY \
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|PL181_STATUS_RXDATAAVLBL)
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static const unsigned char pl181_id[] =
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{ 0x81, 0x11, 0x04, 0x00, 0x0d, 0xf0, 0x05, 0xb1 };
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2013-07-27 13:20:09 +02:00
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static void pl181_update(PL181State *s)
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2007-04-06 18:49:48 +02:00
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{
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int i;
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for (i = 0; i < 2; i++) {
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2007-04-07 20:14:41 +02:00
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qemu_set_irq(s->irq[i], (s->status & s->mask[i]) != 0);
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2007-04-06 18:49:48 +02:00
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}
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}
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2013-07-27 13:20:09 +02:00
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static void pl181_fifo_push(PL181State *s, uint32_t value)
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2007-04-06 18:49:48 +02:00
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{
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int n;
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if (s->fifo_len == PL181_FIFO_LEN) {
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hw/sd/pl181: Replace fprintf(stderr, "*\n") with error_report()
Replace a large number of the fprintf(stderr, "*\n" calls with
error_report(). The functions were renamed with these commands and then
compiler issues where manually fixed.
find ./* -type f -exec sed -i \
'N;N;N;N;N;N;N;N;N;N;N;N; {s|fprintf(stderr, "\(.*\)\\n"\(.*\));|error_report("\1"\2);|Ig}' \
{} +
find ./* -type f -exec sed -i \
'N;N;N;N;N;N;N;N;N;N;N; {s|fprintf(stderr, "\(.*\)\\n"\(.*\));|error_report("\1"\2);|Ig}' \
{} +
find ./* -type f -exec sed -i \
'N;N;N;N;N;N;N;N;N; {s|fprintf(stderr, "\(.*\)\\n"\(.*\));|error_report("\1"\2);|Ig}' \
{} +
find ./* -type f -exec sed -i \
'N;N;N;N;N;N;N;N; {s|fprintf(stderr, "\(.*\)\\n"\(.*\));|error_report("\1"\2);|Ig}' \
{} +
find ./* -type f -exec sed -i \
'N;N;N;N;N;N;N; {s|fprintf(stderr, "\(.*\)\\n"\(.*\));|error_report("\1"\2);|Ig}' \
{} +
find ./* -type f -exec sed -i \
'N;N;N;N;N;N; {s|fprintf(stderr, "\(.*\)\\n"\(.*\));|error_report("\1"\2);|Ig}' \
{} +
find ./* -type f -exec sed -i \
'N;N;N;N;N; {s|fprintf(stderr, "\(.*\)\\n"\(.*\));|error_report("\1"\2);|Ig}' \
{} +
find ./* -type f -exec sed -i \
'N;N;N;N; {s|fprintf(stderr, "\(.*\)\\n"\(.*\));|error_report("\1"\2);|Ig}' \
{} +
find ./* -type f -exec sed -i \
'N;N;N; {s|fprintf(stderr, "\(.*\)\\n"\(.*\));|error_report("\1"\2);|Ig}' \
{} +
find ./* -type f -exec sed -i \
'N;N; {s|fprintf(stderr, "\(.*\)\\n"\(.*\));|error_report("\1"\2);|Ig}' \
{} +
find ./* -type f -exec sed -i \
'N; {s|fprintf(stderr, "\(.*\)\\n"\(.*\));|error_report("\1"\2);|Ig}' \
{} +
Some lines where then manually tweaked to pass checkpatch.
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>
Message-Id: <488ba8d4c562ea44119de8ea0f385a898bd8fa1e.1513790495.git.alistair.francis@xilinx.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Acked-by: Peter Maydell <peter.maydell@linaro.org>
2017-12-20 18:24:47 +01:00
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error_report("%s: FIFO overflow", __func__);
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2007-04-06 18:49:48 +02:00
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return;
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}
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n = (s->fifo_pos + s->fifo_len) & (PL181_FIFO_LEN - 1);
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s->fifo_len++;
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s->fifo[n] = value;
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2020-07-05 19:57:50 +02:00
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trace_pl181_fifo_push(value);
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2007-04-06 18:49:48 +02:00
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}
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2013-07-27 13:20:09 +02:00
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static uint32_t pl181_fifo_pop(PL181State *s)
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2007-04-06 18:49:48 +02:00
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{
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uint32_t value;
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if (s->fifo_len == 0) {
|
hw/sd/pl181: Replace fprintf(stderr, "*\n") with error_report()
Replace a large number of the fprintf(stderr, "*\n" calls with
error_report(). The functions were renamed with these commands and then
compiler issues where manually fixed.
find ./* -type f -exec sed -i \
'N;N;N;N;N;N;N;N;N;N;N;N; {s|fprintf(stderr, "\(.*\)\\n"\(.*\));|error_report("\1"\2);|Ig}' \
{} +
find ./* -type f -exec sed -i \
'N;N;N;N;N;N;N;N;N;N;N; {s|fprintf(stderr, "\(.*\)\\n"\(.*\));|error_report("\1"\2);|Ig}' \
{} +
find ./* -type f -exec sed -i \
'N;N;N;N;N;N;N;N;N; {s|fprintf(stderr, "\(.*\)\\n"\(.*\));|error_report("\1"\2);|Ig}' \
{} +
find ./* -type f -exec sed -i \
'N;N;N;N;N;N;N;N; {s|fprintf(stderr, "\(.*\)\\n"\(.*\));|error_report("\1"\2);|Ig}' \
{} +
find ./* -type f -exec sed -i \
'N;N;N;N;N;N;N; {s|fprintf(stderr, "\(.*\)\\n"\(.*\));|error_report("\1"\2);|Ig}' \
{} +
find ./* -type f -exec sed -i \
'N;N;N;N;N;N; {s|fprintf(stderr, "\(.*\)\\n"\(.*\));|error_report("\1"\2);|Ig}' \
{} +
find ./* -type f -exec sed -i \
'N;N;N;N;N; {s|fprintf(stderr, "\(.*\)\\n"\(.*\));|error_report("\1"\2);|Ig}' \
{} +
find ./* -type f -exec sed -i \
'N;N;N;N; {s|fprintf(stderr, "\(.*\)\\n"\(.*\));|error_report("\1"\2);|Ig}' \
{} +
find ./* -type f -exec sed -i \
'N;N;N; {s|fprintf(stderr, "\(.*\)\\n"\(.*\));|error_report("\1"\2);|Ig}' \
{} +
find ./* -type f -exec sed -i \
'N;N; {s|fprintf(stderr, "\(.*\)\\n"\(.*\));|error_report("\1"\2);|Ig}' \
{} +
find ./* -type f -exec sed -i \
'N; {s|fprintf(stderr, "\(.*\)\\n"\(.*\));|error_report("\1"\2);|Ig}' \
{} +
Some lines where then manually tweaked to pass checkpatch.
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>
Message-Id: <488ba8d4c562ea44119de8ea0f385a898bd8fa1e.1513790495.git.alistair.francis@xilinx.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Acked-by: Peter Maydell <peter.maydell@linaro.org>
2017-12-20 18:24:47 +01:00
|
|
|
error_report("%s: FIFO underflow", __func__);
|
2007-04-06 18:49:48 +02:00
|
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|
return 0;
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}
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value = s->fifo[s->fifo_pos];
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|
s->fifo_len--;
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s->fifo_pos = (s->fifo_pos + 1) & (PL181_FIFO_LEN - 1);
|
2020-07-05 19:57:50 +02:00
|
|
|
trace_pl181_fifo_pop(value);
|
2007-04-06 18:49:48 +02:00
|
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|
return value;
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}
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|
2020-07-05 19:42:05 +02:00
|
|
|
static void pl181_do_command(PL181State *s)
|
2007-04-06 18:49:48 +02:00
|
|
|
{
|
2009-05-10 02:44:56 +02:00
|
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|
SDRequest request;
|
2007-04-06 18:49:48 +02:00
|
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|
uint8_t response[16];
|
|
|
|
int rlen;
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|
|
|
|
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|
request.cmd = s->cmd & PL181_CMD_INDEX;
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|
request.arg = s->cmdarg;
|
2020-07-05 19:57:50 +02:00
|
|
|
trace_pl181_command_send(request.cmd, request.arg);
|
2018-01-23 04:58:35 +01:00
|
|
|
rlen = sdbus_do_command(&s->sdbus, &request, response);
|
2007-04-06 18:49:48 +02:00
|
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|
if (rlen < 0)
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|
goto error;
|
|
|
|
if (s->cmd & PL181_CMD_RESPONSE) {
|
|
|
|
if (rlen == 0 || (rlen == 4 && (s->cmd & PL181_CMD_LONGRESP)))
|
|
|
|
goto error;
|
|
|
|
if (rlen != 4 && rlen != 16)
|
|
|
|
goto error;
|
2018-06-29 16:11:20 +02:00
|
|
|
s->response[0] = ldl_be_p(&response[0]);
|
2007-04-06 18:49:48 +02:00
|
|
|
if (rlen == 4) {
|
|
|
|
s->response[1] = s->response[2] = s->response[3] = 0;
|
|
|
|
} else {
|
2018-06-29 16:11:20 +02:00
|
|
|
s->response[1] = ldl_be_p(&response[4]);
|
|
|
|
s->response[2] = ldl_be_p(&response[8]);
|
|
|
|
s->response[3] = ldl_be_p(&response[12]) & ~1;
|
2007-04-06 18:49:48 +02:00
|
|
|
}
|
2020-07-05 19:57:50 +02:00
|
|
|
trace_pl181_command_response_pending();
|
2007-04-06 18:49:48 +02:00
|
|
|
s->status |= PL181_STATUS_CMDRESPEND;
|
|
|
|
} else {
|
2020-07-05 19:57:50 +02:00
|
|
|
trace_pl181_command_sent();
|
2007-04-06 18:49:48 +02:00
|
|
|
s->status |= PL181_STATUS_CMDSENT;
|
|
|
|
}
|
|
|
|
return;
|
|
|
|
|
|
|
|
error:
|
2020-07-05 19:57:50 +02:00
|
|
|
trace_pl181_command_timeout();
|
2007-04-06 18:49:48 +02:00
|
|
|
s->status |= PL181_STATUS_CMDTIMEOUT;
|
|
|
|
}
|
|
|
|
|
2007-07-12 00:48:58 +02:00
|
|
|
/* Transfer data between the card and the FIFO. This is complicated by
|
2007-04-06 18:49:48 +02:00
|
|
|
the FIFO holding 32-bit words and the card taking data in single byte
|
|
|
|
chunks. FIFO bytes are transferred in little-endian order. */
|
2007-09-17 10:09:54 +02:00
|
|
|
|
2013-07-27 13:20:09 +02:00
|
|
|
static void pl181_fifo_run(PL181State *s)
|
2007-04-06 18:49:48 +02:00
|
|
|
{
|
|
|
|
uint32_t bits;
|
2010-02-22 21:42:51 +01:00
|
|
|
uint32_t value = 0;
|
2007-04-06 18:49:48 +02:00
|
|
|
int n;
|
|
|
|
int is_read;
|
|
|
|
|
|
|
|
is_read = (s->datactrl & PL181_DATA_DIRECTION) != 0;
|
2018-01-23 04:58:35 +01:00
|
|
|
if (s->datacnt != 0 && (!is_read || sdbus_data_ready(&s->sdbus))
|
2007-06-09 16:07:54 +02:00
|
|
|
&& !s->linux_hack) {
|
2010-02-22 16:33:59 +01:00
|
|
|
if (is_read) {
|
|
|
|
n = 0;
|
|
|
|
while (s->datacnt && s->fifo_len < PL181_FIFO_LEN) {
|
2020-08-14 11:23:42 +02:00
|
|
|
value |= (uint32_t)sdbus_read_byte(&s->sdbus) << (n * 8);
|
2010-02-22 16:33:59 +01:00
|
|
|
s->datacnt--;
|
2007-04-06 18:49:48 +02:00
|
|
|
n++;
|
|
|
|
if (n == 4) {
|
|
|
|
pl181_fifo_push(s, value);
|
|
|
|
n = 0;
|
2010-02-22 16:33:59 +01:00
|
|
|
value = 0;
|
2007-04-06 18:49:48 +02:00
|
|
|
}
|
2010-02-22 16:33:59 +01:00
|
|
|
}
|
|
|
|
if (n != 0) {
|
|
|
|
pl181_fifo_push(s, value);
|
|
|
|
}
|
|
|
|
} else { /* write */
|
|
|
|
n = 0;
|
|
|
|
while (s->datacnt > 0 && (s->fifo_len > 0 || n > 0)) {
|
2007-04-06 18:49:48 +02:00
|
|
|
if (n == 0) {
|
|
|
|
value = pl181_fifo_pop(s);
|
|
|
|
n = 4;
|
|
|
|
}
|
2010-02-22 16:33:59 +01:00
|
|
|
n--;
|
|
|
|
s->datacnt--;
|
2020-08-14 11:23:41 +02:00
|
|
|
sdbus_write_byte(&s->sdbus, value & 0xff);
|
2007-04-06 18:49:48 +02:00
|
|
|
value >>= 8;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
s->status &= ~(PL181_STATUS_RX_FIFO | PL181_STATUS_TX_FIFO);
|
|
|
|
if (s->datacnt == 0) {
|
|
|
|
s->status |= PL181_STATUS_DATAEND;
|
|
|
|
/* HACK: */
|
|
|
|
s->status |= PL181_STATUS_DATABLOCKEND;
|
2020-07-05 19:57:50 +02:00
|
|
|
trace_pl181_fifo_transfer_complete();
|
2007-04-06 18:49:48 +02:00
|
|
|
}
|
2007-06-09 16:07:54 +02:00
|
|
|
if (s->datacnt == 0 && s->fifo_len == 0) {
|
2007-04-06 18:49:48 +02:00
|
|
|
s->datactrl &= ~PL181_DATA_ENABLE;
|
2020-07-05 19:57:50 +02:00
|
|
|
trace_pl181_data_engine_idle();
|
2007-04-06 18:49:48 +02:00
|
|
|
} else {
|
|
|
|
/* Update FIFO bits. */
|
|
|
|
bits = PL181_STATUS_TXACTIVE | PL181_STATUS_RXACTIVE;
|
|
|
|
if (s->fifo_len == 0) {
|
|
|
|
bits |= PL181_STATUS_TXFIFOEMPTY;
|
|
|
|
bits |= PL181_STATUS_RXFIFOEMPTY;
|
|
|
|
} else {
|
|
|
|
bits |= PL181_STATUS_TXDATAAVLBL;
|
|
|
|
bits |= PL181_STATUS_RXDATAAVLBL;
|
|
|
|
}
|
|
|
|
if (s->fifo_len == 16) {
|
|
|
|
bits |= PL181_STATUS_TXFIFOFULL;
|
|
|
|
bits |= PL181_STATUS_RXFIFOFULL;
|
|
|
|
}
|
|
|
|
if (s->fifo_len <= 8) {
|
|
|
|
bits |= PL181_STATUS_TXFIFOHALFEMPTY;
|
|
|
|
}
|
|
|
|
if (s->fifo_len >= 8) {
|
|
|
|
bits |= PL181_STATUS_RXFIFOHALFFULL;
|
|
|
|
}
|
|
|
|
if (s->datactrl & PL181_DATA_DIRECTION) {
|
|
|
|
bits &= PL181_STATUS_RX_FIFO;
|
|
|
|
} else {
|
|
|
|
bits &= PL181_STATUS_TX_FIFO;
|
|
|
|
}
|
|
|
|
s->status |= bits;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2012-10-23 12:30:10 +02:00
|
|
|
static uint64_t pl181_read(void *opaque, hwaddr offset,
|
2011-10-11 13:54:48 +02:00
|
|
|
unsigned size)
|
2007-04-06 18:49:48 +02:00
|
|
|
{
|
2013-07-27 13:20:09 +02:00
|
|
|
PL181State *s = (PL181State *)opaque;
|
2007-06-09 16:07:54 +02:00
|
|
|
uint32_t tmp;
|
2007-04-06 18:49:48 +02:00
|
|
|
|
|
|
|
if (offset >= 0xfe0 && offset < 0x1000) {
|
|
|
|
return pl181_id[(offset - 0xfe0) >> 2];
|
|
|
|
}
|
|
|
|
switch (offset) {
|
|
|
|
case 0x00: /* Power */
|
|
|
|
return s->power;
|
|
|
|
case 0x04: /* Clock */
|
|
|
|
return s->clock;
|
|
|
|
case 0x08: /* Argument */
|
|
|
|
return s->cmdarg;
|
|
|
|
case 0x0c: /* Command */
|
|
|
|
return s->cmd;
|
|
|
|
case 0x10: /* RespCmd */
|
|
|
|
return s->respcmd;
|
|
|
|
case 0x14: /* Response0 */
|
|
|
|
return s->response[0];
|
|
|
|
case 0x18: /* Response1 */
|
|
|
|
return s->response[1];
|
|
|
|
case 0x1c: /* Response2 */
|
|
|
|
return s->response[2];
|
|
|
|
case 0x20: /* Response3 */
|
|
|
|
return s->response[3];
|
|
|
|
case 0x24: /* DataTimer */
|
|
|
|
return s->datatimer;
|
|
|
|
case 0x28: /* DataLength */
|
|
|
|
return s->datalength;
|
|
|
|
case 0x2c: /* DataCtrl */
|
|
|
|
return s->datactrl;
|
|
|
|
case 0x30: /* DataCnt */
|
|
|
|
return s->datacnt;
|
|
|
|
case 0x34: /* Status */
|
2007-06-09 16:07:54 +02:00
|
|
|
tmp = s->status;
|
|
|
|
if (s->linux_hack) {
|
|
|
|
s->linux_hack = 0;
|
|
|
|
pl181_fifo_run(s);
|
|
|
|
pl181_update(s);
|
|
|
|
}
|
|
|
|
return tmp;
|
2007-04-06 18:49:48 +02:00
|
|
|
case 0x3c: /* Mask0 */
|
|
|
|
return s->mask[0];
|
|
|
|
case 0x40: /* Mask1 */
|
|
|
|
return s->mask[1];
|
|
|
|
case 0x48: /* FifoCnt */
|
2007-06-09 16:07:54 +02:00
|
|
|
/* The documentation is somewhat vague about exactly what FifoCnt
|
|
|
|
does. On real hardware it appears to be when decrememnted
|
2011-11-29 09:52:39 +01:00
|
|
|
when a word is transferred between the FIFO and the serial
|
2007-06-09 16:07:54 +02:00
|
|
|
data engine. DataCnt is decremented after each byte is
|
2011-11-29 09:52:39 +01:00
|
|
|
transferred between the serial engine and the card.
|
2007-06-09 16:07:54 +02:00
|
|
|
We don't emulate this level of detail, so both can be the same. */
|
|
|
|
tmp = (s->datacnt + 3) >> 2;
|
|
|
|
if (s->linux_hack) {
|
|
|
|
s->linux_hack = 0;
|
|
|
|
pl181_fifo_run(s);
|
|
|
|
pl181_update(s);
|
|
|
|
}
|
|
|
|
return tmp;
|
2007-04-06 18:49:48 +02:00
|
|
|
case 0x80: case 0x84: case 0x88: case 0x8c: /* FifoData */
|
|
|
|
case 0x90: case 0x94: case 0x98: case 0x9c:
|
|
|
|
case 0xa0: case 0xa4: case 0xa8: case 0xac:
|
|
|
|
case 0xb0: case 0xb4: case 0xb8: case 0xbc:
|
2007-06-09 16:07:54 +02:00
|
|
|
if (s->fifo_len == 0) {
|
2012-10-18 15:11:37 +02:00
|
|
|
qemu_log_mask(LOG_GUEST_ERROR, "pl181: Unexpected FIFO read\n");
|
2007-04-06 18:49:48 +02:00
|
|
|
return 0;
|
|
|
|
} else {
|
|
|
|
uint32_t value;
|
|
|
|
value = pl181_fifo_pop(s);
|
2007-06-09 16:07:54 +02:00
|
|
|
s->linux_hack = 1;
|
2007-04-06 18:49:48 +02:00
|
|
|
pl181_fifo_run(s);
|
|
|
|
pl181_update(s);
|
|
|
|
return value;
|
|
|
|
}
|
|
|
|
default:
|
2012-10-18 15:11:37 +02:00
|
|
|
qemu_log_mask(LOG_GUEST_ERROR,
|
|
|
|
"pl181_read: Bad offset %x\n", (int)offset);
|
2007-04-06 18:49:48 +02:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2012-10-23 12:30:10 +02:00
|
|
|
static void pl181_write(void *opaque, hwaddr offset,
|
2011-10-11 13:54:48 +02:00
|
|
|
uint64_t value, unsigned size)
|
2007-04-06 18:49:48 +02:00
|
|
|
{
|
2013-07-27 13:20:09 +02:00
|
|
|
PL181State *s = (PL181State *)opaque;
|
2007-04-06 18:49:48 +02:00
|
|
|
|
|
|
|
switch (offset) {
|
|
|
|
case 0x00: /* Power */
|
|
|
|
s->power = value & 0xff;
|
|
|
|
break;
|
|
|
|
case 0x04: /* Clock */
|
|
|
|
s->clock = value & 0xff;
|
|
|
|
break;
|
|
|
|
case 0x08: /* Argument */
|
|
|
|
s->cmdarg = value;
|
|
|
|
break;
|
|
|
|
case 0x0c: /* Command */
|
|
|
|
s->cmd = value;
|
|
|
|
if (s->cmd & PL181_CMD_ENABLE) {
|
|
|
|
if (s->cmd & PL181_CMD_INTERRUPT) {
|
2012-10-18 15:11:37 +02:00
|
|
|
qemu_log_mask(LOG_UNIMP,
|
|
|
|
"pl181: Interrupt mode not implemented\n");
|
2007-04-06 18:49:48 +02:00
|
|
|
} if (s->cmd & PL181_CMD_PENDING) {
|
2012-10-18 15:11:37 +02:00
|
|
|
qemu_log_mask(LOG_UNIMP,
|
|
|
|
"pl181: Pending commands not implemented\n");
|
2007-04-06 18:49:48 +02:00
|
|
|
} else {
|
2020-07-05 19:42:05 +02:00
|
|
|
pl181_do_command(s);
|
2007-04-06 18:49:48 +02:00
|
|
|
pl181_fifo_run(s);
|
|
|
|
}
|
|
|
|
/* The command has completed one way or the other. */
|
|
|
|
s->cmd &= ~PL181_CMD_ENABLE;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
case 0x24: /* DataTimer */
|
|
|
|
s->datatimer = value;
|
|
|
|
break;
|
|
|
|
case 0x28: /* DataLength */
|
|
|
|
s->datalength = value & 0xffff;
|
|
|
|
break;
|
|
|
|
case 0x2c: /* DataCtrl */
|
|
|
|
s->datactrl = value & 0xff;
|
|
|
|
if (value & PL181_DATA_ENABLE) {
|
|
|
|
s->datacnt = s->datalength;
|
|
|
|
pl181_fifo_run(s);
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
case 0x38: /* Clear */
|
|
|
|
s->status &= ~(value & 0x7ff);
|
|
|
|
break;
|
|
|
|
case 0x3c: /* Mask0 */
|
|
|
|
s->mask[0] = value;
|
|
|
|
break;
|
|
|
|
case 0x40: /* Mask1 */
|
|
|
|
s->mask[1] = value;
|
|
|
|
break;
|
|
|
|
case 0x80: case 0x84: case 0x88: case 0x8c: /* FifoData */
|
|
|
|
case 0x90: case 0x94: case 0x98: case 0x9c:
|
|
|
|
case 0xa0: case 0xa4: case 0xa8: case 0xac:
|
|
|
|
case 0xb0: case 0xb4: case 0xb8: case 0xbc:
|
2007-06-09 16:07:54 +02:00
|
|
|
if (s->datacnt == 0) {
|
2012-10-18 15:11:37 +02:00
|
|
|
qemu_log_mask(LOG_GUEST_ERROR, "pl181: Unexpected FIFO write\n");
|
2007-04-06 18:49:48 +02:00
|
|
|
} else {
|
|
|
|
pl181_fifo_push(s, value);
|
|
|
|
pl181_fifo_run(s);
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
default:
|
2012-10-18 15:11:37 +02:00
|
|
|
qemu_log_mask(LOG_GUEST_ERROR,
|
|
|
|
"pl181_write: Bad offset %x\n", (int)offset);
|
2007-04-06 18:49:48 +02:00
|
|
|
}
|
|
|
|
pl181_update(s);
|
|
|
|
}
|
|
|
|
|
2011-10-11 13:54:48 +02:00
|
|
|
static const MemoryRegionOps pl181_ops = {
|
|
|
|
.read = pl181_read,
|
|
|
|
.write = pl181_write,
|
|
|
|
.endianness = DEVICE_NATIVE_ENDIAN,
|
2007-04-06 18:49:48 +02:00
|
|
|
};
|
|
|
|
|
2018-01-23 04:58:35 +01:00
|
|
|
static void pl181_set_readonly(DeviceState *dev, bool level)
|
|
|
|
{
|
|
|
|
PL181State *s = (PL181State *)dev;
|
|
|
|
|
|
|
|
qemu_set_irq(s->card_readonly, level);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void pl181_set_inserted(DeviceState *dev, bool level)
|
|
|
|
{
|
|
|
|
PL181State *s = (PL181State *)dev;
|
|
|
|
|
|
|
|
qemu_set_irq(s->card_inserted, level);
|
|
|
|
}
|
|
|
|
|
2011-12-19 13:01:44 +01:00
|
|
|
static void pl181_reset(DeviceState *d)
|
2007-04-06 18:49:48 +02:00
|
|
|
{
|
2013-07-27 13:23:41 +02:00
|
|
|
PL181State *s = PL181(d);
|
2007-04-06 18:49:48 +02:00
|
|
|
|
|
|
|
s->power = 0;
|
|
|
|
s->cmdarg = 0;
|
|
|
|
s->cmd = 0;
|
|
|
|
s->datatimer = 0;
|
|
|
|
s->datalength = 0;
|
|
|
|
s->respcmd = 0;
|
|
|
|
s->response[0] = 0;
|
|
|
|
s->response[1] = 0;
|
|
|
|
s->response[2] = 0;
|
|
|
|
s->response[3] = 0;
|
|
|
|
s->datatimer = 0;
|
|
|
|
s->datalength = 0;
|
|
|
|
s->datactrl = 0;
|
|
|
|
s->datacnt = 0;
|
|
|
|
s->status = 0;
|
2007-06-09 16:07:54 +02:00
|
|
|
s->linux_hack = 0;
|
2007-04-06 18:49:48 +02:00
|
|
|
s->mask[0] = 0;
|
|
|
|
s->mask[1] = 0;
|
2011-02-21 21:57:49 +01:00
|
|
|
|
2018-01-23 04:58:35 +01:00
|
|
|
/* Reset other state based on current card insertion/readonly status */
|
|
|
|
pl181_set_inserted(DEVICE(s), sdbus_get_inserted(&s->sdbus));
|
|
|
|
pl181_set_readonly(DEVICE(s), sdbus_get_readonly(&s->sdbus));
|
2007-04-06 18:49:48 +02:00
|
|
|
}
|
|
|
|
|
2016-06-14 16:59:14 +02:00
|
|
|
static void pl181_init(Object *obj)
|
2007-04-06 18:49:48 +02:00
|
|
|
{
|
2016-06-14 16:59:14 +02:00
|
|
|
DeviceState *dev = DEVICE(obj);
|
|
|
|
PL181State *s = PL181(obj);
|
|
|
|
SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
|
2007-04-06 18:49:48 +02:00
|
|
|
|
2016-06-14 16:59:14 +02:00
|
|
|
memory_region_init_io(&s->iomem, obj, &pl181_ops, s, "pl181", 0x1000);
|
2013-07-27 13:23:41 +02:00
|
|
|
sysbus_init_mmio(sbd, &s->iomem);
|
|
|
|
sysbus_init_irq(sbd, &s->irq[0]);
|
|
|
|
sysbus_init_irq(sbd, &s->irq[1]);
|
2020-07-05 13:39:53 +02:00
|
|
|
qdev_init_gpio_out_named(dev, &s->card_readonly, "card-read-only", 1);
|
|
|
|
qdev_init_gpio_out_named(dev, &s->card_inserted, "card-inserted", 1);
|
2018-01-23 04:58:35 +01:00
|
|
|
|
|
|
|
qbus_create_inplace(&s->sdbus, sizeof(s->sdbus),
|
|
|
|
TYPE_PL181_BUS, dev, "sd-bus");
|
2016-06-14 16:59:14 +02:00
|
|
|
}
|
|
|
|
|
2012-01-24 20:12:29 +01:00
|
|
|
static void pl181_class_init(ObjectClass *klass, void *data)
|
|
|
|
{
|
2011-12-08 04:34:16 +01:00
|
|
|
DeviceClass *k = DEVICE_CLASS(klass);
|
2012-01-24 20:12:29 +01:00
|
|
|
|
2011-12-08 04:34:16 +01:00
|
|
|
k->vmsd = &vmstate_pl181;
|
|
|
|
k->reset = pl181_reset;
|
2020-07-05 14:24:24 +02:00
|
|
|
/* Reason: output IRQs should be wired up */
|
2017-05-03 22:35:44 +02:00
|
|
|
k->user_creatable = false;
|
2012-01-24 20:12:29 +01:00
|
|
|
}
|
|
|
|
|
2013-01-10 16:19:07 +01:00
|
|
|
static const TypeInfo pl181_info = {
|
2013-07-27 13:23:41 +02:00
|
|
|
.name = TYPE_PL181,
|
2011-12-08 04:34:16 +01:00
|
|
|
.parent = TYPE_SYS_BUS_DEVICE,
|
2013-07-27 13:20:09 +02:00
|
|
|
.instance_size = sizeof(PL181State),
|
2016-06-14 16:59:14 +02:00
|
|
|
.instance_init = pl181_init,
|
2011-12-08 04:34:16 +01:00
|
|
|
.class_init = pl181_class_init,
|
2011-12-19 13:01:44 +01:00
|
|
|
};
|
|
|
|
|
2018-01-23 04:58:35 +01:00
|
|
|
static void pl181_bus_class_init(ObjectClass *klass, void *data)
|
|
|
|
{
|
|
|
|
SDBusClass *sbc = SD_BUS_CLASS(klass);
|
|
|
|
|
|
|
|
sbc->set_inserted = pl181_set_inserted;
|
|
|
|
sbc->set_readonly = pl181_set_readonly;
|
|
|
|
}
|
|
|
|
|
|
|
|
static const TypeInfo pl181_bus_info = {
|
|
|
|
.name = TYPE_PL181_BUS,
|
|
|
|
.parent = TYPE_SD_BUS,
|
|
|
|
.instance_size = sizeof(SDBus),
|
|
|
|
.class_init = pl181_bus_class_init,
|
|
|
|
};
|
|
|
|
|
2012-02-09 15:20:55 +01:00
|
|
|
static void pl181_register_types(void)
|
2009-05-14 23:35:07 +02:00
|
|
|
{
|
2011-12-08 04:34:16 +01:00
|
|
|
type_register_static(&pl181_info);
|
2018-01-23 04:58:35 +01:00
|
|
|
type_register_static(&pl181_bus_info);
|
2009-05-14 23:35:07 +02:00
|
|
|
}
|
|
|
|
|
2012-02-09 15:20:55 +01:00
|
|
|
type_init(pl181_register_types)
|