2007-05-24 00:04:23 +02:00
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/*
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* WM8750 audio CODEC.
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*
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* Copyright (c) 2006 Openedhand Ltd.
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* Written by Andrzej Zaborowski <balrog@zabor.org>
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*
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* This file is licensed under GNU GPL.
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*/
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2007-11-17 18:14:51 +01:00
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#include "hw.h"
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#include "i2c.h"
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#include "audio/audio.h"
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2007-05-24 00:04:23 +02:00
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#define IN_PORT_N 3
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#define OUT_PORT_N 3
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#define CODEC "wm8750"
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2009-05-10 02:44:56 +02:00
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typedef struct {
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int adc;
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int adc_hz;
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int dac;
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int dac_hz;
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} WMRate;
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typedef struct {
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2011-12-05 03:28:27 +01:00
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I2CSlave i2c;
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2007-05-24 00:04:23 +02:00
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uint8_t i2c_data[2];
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int i2c_len;
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QEMUSoundCard card;
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SWVoiceIn *adc_voice[IN_PORT_N];
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SWVoiceOut *dac_voice[OUT_PORT_N];
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int enable;
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void (*data_req)(void *, int, int);
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void *opaque;
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uint8_t data_in[4096];
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uint8_t data_out[4096];
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int idx_in, req_in;
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int idx_out, req_out;
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SWVoiceOut **out[2];
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uint8_t outvol[7], outmute[2];
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SWVoiceIn **in[2];
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uint8_t invol[4], inmute[2];
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uint8_t diff[2], pol, ds, monomix[2], alc, mute;
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uint8_t path[4], mpath[2], power, format;
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2009-05-10 02:44:56 +02:00
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const WMRate *rate;
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2009-09-29 22:48:31 +02:00
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uint8_t rate_vmstate;
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2008-05-04 14:15:51 +02:00
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int adc_hz, dac_hz, ext_adc_hz, ext_dac_hz, master;
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2009-05-10 02:44:56 +02:00
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} WM8750State;
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2007-05-24 00:04:23 +02:00
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2008-05-04 12:55:25 +02:00
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/* pow(10.0, -i / 20.0) * 255, i = 0..42 */
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2008-05-04 12:21:03 +02:00
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static const uint8_t wm8750_vol_db_table[] = {
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255, 227, 203, 181, 161, 143, 128, 114, 102, 90, 81, 72, 64, 57, 51, 45,
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40, 36, 32, 29, 26, 23, 20, 18, 16, 14, 13, 11, 10, 9, 8, 7, 6, 6, 5, 5,
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4, 4, 3, 3, 3, 2, 2
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};
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2008-05-04 12:55:25 +02:00
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#define WM8750_OUTVOL_TRANSFORM(x) wm8750_vol_db_table[(0x7f - x) / 3]
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#define WM8750_INVOL_TRANSFORM(x) (x << 2)
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2008-05-04 12:21:03 +02:00
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2009-05-10 02:44:56 +02:00
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static inline void wm8750_in_load(WM8750State *s)
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2007-05-24 00:04:23 +02:00
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{
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if (s->idx_in + s->req_in <= sizeof(s->data_in))
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return;
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s->idx_in = audio_MAX(0, (int) sizeof(s->data_in) - s->req_in);
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2010-04-25 21:31:06 +02:00
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AUD_read(*s->in[0], s->data_in + s->idx_in,
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sizeof(s->data_in) - s->idx_in);
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2007-05-24 00:04:23 +02:00
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}
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2009-05-10 02:44:56 +02:00
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static inline void wm8750_out_flush(WM8750State *s)
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2007-05-24 00:04:23 +02:00
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{
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2008-04-24 23:01:40 +02:00
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int sent = 0;
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while (sent < s->idx_out)
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sent += AUD_write(*s->out[0], s->data_out + sent, s->idx_out - sent)
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?: s->idx_out;
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2007-05-24 00:04:23 +02:00
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s->idx_out = 0;
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}
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static void wm8750_audio_in_cb(void *opaque, int avail_b)
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{
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2009-05-10 02:44:56 +02:00
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WM8750State *s = (WM8750State *) opaque;
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2007-05-24 00:04:23 +02:00
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s->req_in = avail_b;
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s->data_req(s->opaque, s->req_out >> 2, avail_b >> 2);
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}
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static void wm8750_audio_out_cb(void *opaque, int free_b)
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{
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2009-05-10 02:44:56 +02:00
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WM8750State *s = (WM8750State *) opaque;
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2007-05-24 00:04:23 +02:00
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2008-04-24 23:01:40 +02:00
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if (s->idx_out >= free_b) {
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s->idx_out = free_b;
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s->req_out = 0;
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wm8750_out_flush(s);
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} else
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s->req_out = free_b - s->idx_out;
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s->data_req(s->opaque, s->req_out >> 2, s->req_in >> 2);
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2007-05-24 00:04:23 +02:00
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}
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2009-05-10 02:44:56 +02:00
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static const WMRate wm_rate_table[] = {
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2007-05-24 00:04:23 +02:00
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{ 256, 48000, 256, 48000 }, /* SR: 00000 */
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{ 384, 48000, 384, 48000 }, /* SR: 00001 */
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{ 256, 48000, 1536, 8000 }, /* SR: 00010 */
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{ 384, 48000, 2304, 8000 }, /* SR: 00011 */
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{ 1536, 8000, 256, 48000 }, /* SR: 00100 */
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{ 2304, 8000, 384, 48000 }, /* SR: 00101 */
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{ 1536, 8000, 1536, 8000 }, /* SR: 00110 */
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{ 2304, 8000, 2304, 8000 }, /* SR: 00111 */
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{ 1024, 12000, 1024, 12000 }, /* SR: 01000 */
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{ 1526, 12000, 1536, 12000 }, /* SR: 01001 */
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{ 768, 16000, 768, 16000 }, /* SR: 01010 */
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{ 1152, 16000, 1152, 16000 }, /* SR: 01011 */
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{ 384, 32000, 384, 32000 }, /* SR: 01100 */
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{ 576, 32000, 576, 32000 }, /* SR: 01101 */
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{ 128, 96000, 128, 96000 }, /* SR: 01110 */
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{ 192, 96000, 192, 96000 }, /* SR: 01111 */
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{ 256, 44100, 256, 44100 }, /* SR: 10000 */
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{ 384, 44100, 384, 44100 }, /* SR: 10001 */
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{ 256, 44100, 1408, 8018 }, /* SR: 10010 */
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{ 384, 44100, 2112, 8018 }, /* SR: 10011 */
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{ 1408, 8018, 256, 44100 }, /* SR: 10100 */
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{ 2112, 8018, 384, 44100 }, /* SR: 10101 */
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{ 1408, 8018, 1408, 8018 }, /* SR: 10110 */
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{ 2112, 8018, 2112, 8018 }, /* SR: 10111 */
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{ 1024, 11025, 1024, 11025 }, /* SR: 11000 */
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{ 1536, 11025, 1536, 11025 }, /* SR: 11001 */
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{ 512, 22050, 512, 22050 }, /* SR: 11010 */
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{ 768, 22050, 768, 22050 }, /* SR: 11011 */
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{ 512, 24000, 512, 24000 }, /* SR: 11100 */
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{ 768, 24000, 768, 24000 }, /* SR: 11101 */
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{ 128, 88200, 128, 88200 }, /* SR: 11110 */
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2008-04-24 23:01:40 +02:00
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{ 192, 88200, 192, 88200 }, /* SR: 11111 */
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2007-05-24 00:04:23 +02:00
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};
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2009-05-10 02:44:56 +02:00
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static void wm8750_vol_update(WM8750State *s)
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2008-05-04 12:21:03 +02:00
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{
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/* FIXME: multiply all volumes by s->invol[2], s->invol[3] */
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2008-05-04 12:55:25 +02:00
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AUD_set_volume_in(s->adc_voice[0], s->mute,
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s->inmute[0] ? 0 : WM8750_INVOL_TRANSFORM(s->invol[0]),
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s->inmute[1] ? 0 : WM8750_INVOL_TRANSFORM(s->invol[1]));
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AUD_set_volume_in(s->adc_voice[1], s->mute,
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s->inmute[0] ? 0 : WM8750_INVOL_TRANSFORM(s->invol[0]),
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s->inmute[1] ? 0 : WM8750_INVOL_TRANSFORM(s->invol[1]));
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AUD_set_volume_in(s->adc_voice[2], s->mute,
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s->inmute[0] ? 0 : WM8750_INVOL_TRANSFORM(s->invol[0]),
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s->inmute[1] ? 0 : WM8750_INVOL_TRANSFORM(s->invol[1]));
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2008-05-04 12:21:03 +02:00
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/* FIXME: multiply all volumes by s->outvol[0], s->outvol[1] */
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/* Speaker: LOUT2VOL ROUT2VOL */
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AUD_set_volume_out(s->dac_voice[0], s->mute,
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2008-05-04 12:55:25 +02:00
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s->outmute[0] ? 0 : WM8750_OUTVOL_TRANSFORM(s->outvol[4]),
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s->outmute[1] ? 0 : WM8750_OUTVOL_TRANSFORM(s->outvol[5]));
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2008-05-04 12:21:03 +02:00
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2008-05-04 12:55:25 +02:00
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/* Headphone: LOUT1VOL ROUT1VOL */
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2008-05-04 12:21:03 +02:00
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AUD_set_volume_out(s->dac_voice[1], s->mute,
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2008-05-04 12:55:25 +02:00
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s->outmute[0] ? 0 : WM8750_OUTVOL_TRANSFORM(s->outvol[2]),
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s->outmute[1] ? 0 : WM8750_OUTVOL_TRANSFORM(s->outvol[3]));
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2008-05-04 12:21:03 +02:00
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/* MONOOUT: MONOVOL MONOVOL */
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AUD_set_volume_out(s->dac_voice[2], s->mute,
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2008-05-04 12:55:25 +02:00
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s->outmute[0] ? 0 : WM8750_OUTVOL_TRANSFORM(s->outvol[6]),
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s->outmute[1] ? 0 : WM8750_OUTVOL_TRANSFORM(s->outvol[6]));
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2008-05-04 12:21:03 +02:00
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}
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2009-05-10 02:44:56 +02:00
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static void wm8750_set_format(WM8750State *s)
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2007-05-24 00:04:23 +02:00
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{
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int i;
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2008-12-03 23:48:44 +01:00
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struct audsettings in_fmt;
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struct audsettings out_fmt;
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2007-05-24 00:04:23 +02:00
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wm8750_out_flush(s);
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if (s->in[0] && *s->in[0])
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AUD_set_active_in(*s->in[0], 0);
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if (s->out[0] && *s->out[0])
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AUD_set_active_out(*s->out[0], 0);
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for (i = 0; i < IN_PORT_N; i ++)
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if (s->adc_voice[i]) {
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AUD_close_in(&s->card, s->adc_voice[i]);
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2009-03-07 16:32:56 +01:00
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s->adc_voice[i] = NULL;
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2007-05-24 00:04:23 +02:00
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}
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for (i = 0; i < OUT_PORT_N; i ++)
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if (s->dac_voice[i]) {
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AUD_close_out(&s->card, s->dac_voice[i]);
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2009-03-07 16:32:56 +01:00
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s->dac_voice[i] = NULL;
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2007-05-24 00:04:23 +02:00
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}
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if (!s->enable)
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return;
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/* Setup input */
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in_fmt.endianness = 0;
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in_fmt.nchannels = 2;
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2008-05-04 14:15:51 +02:00
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in_fmt.freq = s->adc_hz;
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2007-05-24 00:04:23 +02:00
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in_fmt.fmt = AUD_FMT_S16;
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s->adc_voice[0] = AUD_open_in(&s->card, s->adc_voice[0],
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CODEC ".input1", s, wm8750_audio_in_cb, &in_fmt);
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s->adc_voice[1] = AUD_open_in(&s->card, s->adc_voice[1],
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CODEC ".input2", s, wm8750_audio_in_cb, &in_fmt);
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s->adc_voice[2] = AUD_open_in(&s->card, s->adc_voice[2],
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CODEC ".input3", s, wm8750_audio_in_cb, &in_fmt);
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/* Setup output */
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out_fmt.endianness = 0;
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out_fmt.nchannels = 2;
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2008-05-04 14:15:51 +02:00
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out_fmt.freq = s->dac_hz;
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2007-05-24 00:04:23 +02:00
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out_fmt.fmt = AUD_FMT_S16;
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s->dac_voice[0] = AUD_open_out(&s->card, s->dac_voice[0],
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CODEC ".speaker", s, wm8750_audio_out_cb, &out_fmt);
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s->dac_voice[1] = AUD_open_out(&s->card, s->dac_voice[1],
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CODEC ".headphone", s, wm8750_audio_out_cb, &out_fmt);
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/* MONOMIX is also in stereo for simplicity */
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s->dac_voice[2] = AUD_open_out(&s->card, s->dac_voice[2],
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CODEC ".monomix", s, wm8750_audio_out_cb, &out_fmt);
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/* no sense emulating OUT3 which is a mix of other outputs */
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2008-05-04 12:21:03 +02:00
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wm8750_vol_update(s);
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2007-05-24 00:04:23 +02:00
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/* We should connect the left and right channels to their
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* respective inputs/outputs but we have completely no need
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* for mixing or combining paths to different ports, so we
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* connect both channels to where the left channel is routed. */
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if (s->in[0] && *s->in[0])
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AUD_set_active_in(*s->in[0], 1);
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if (s->out[0] && *s->out[0])
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AUD_set_active_out(*s->out[0], 1);
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}
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2009-05-10 02:44:56 +02:00
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static void wm8750_clk_update(WM8750State *s, int ext)
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2008-05-04 14:15:51 +02:00
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{
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if (s->master || !s->ext_dac_hz)
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s->dac_hz = s->rate->dac_hz;
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else
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s->dac_hz = s->ext_dac_hz;
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if (s->master || !s->ext_adc_hz)
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s->adc_hz = s->rate->adc_hz;
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else
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s->adc_hz = s->ext_adc_hz;
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if (s->master || (!s->ext_dac_hz && !s->ext_adc_hz)) {
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if (!ext)
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wm8750_set_format(s);
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} else {
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if (ext)
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wm8750_set_format(s);
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}
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}
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|
2011-12-05 03:28:27 +01:00
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static void wm8750_reset(I2CSlave *i2c)
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2007-05-24 00:04:23 +02:00
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{
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2009-05-10 02:44:56 +02:00
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WM8750State *s = (WM8750State *) i2c;
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2008-04-20 05:40:20 +02:00
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s->rate = &wm_rate_table[0];
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2007-05-24 00:04:23 +02:00
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s->enable = 0;
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2008-05-04 14:15:51 +02:00
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wm8750_clk_update(s, 1);
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2007-05-24 00:04:23 +02:00
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s->diff[0] = 0;
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s->diff[1] = 0;
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s->ds = 0;
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s->alc = 0;
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s->in[0] = &s->adc_voice[0];
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s->invol[0] = 0x17;
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s->invol[1] = 0x17;
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s->invol[2] = 0xc3;
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s->invol[3] = 0xc3;
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s->out[0] = &s->dac_voice[0];
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s->outvol[0] = 0xff;
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|
|
s->outvol[1] = 0xff;
|
|
|
|
s->outvol[2] = 0x79;
|
|
|
|
s->outvol[3] = 0x79;
|
|
|
|
s->outvol[4] = 0x79;
|
|
|
|
s->outvol[5] = 0x79;
|
2008-05-04 12:55:25 +02:00
|
|
|
s->outvol[6] = 0x79;
|
2007-05-24 00:04:23 +02:00
|
|
|
s->inmute[0] = 0;
|
|
|
|
s->inmute[1] = 0;
|
|
|
|
s->outmute[0] = 0;
|
|
|
|
s->outmute[1] = 0;
|
|
|
|
s->mute = 1;
|
|
|
|
s->path[0] = 0;
|
|
|
|
s->path[1] = 0;
|
|
|
|
s->path[2] = 0;
|
|
|
|
s->path[3] = 0;
|
|
|
|
s->mpath[0] = 0;
|
|
|
|
s->mpath[1] = 0;
|
|
|
|
s->format = 0x0a;
|
|
|
|
s->idx_in = sizeof(s->data_in);
|
|
|
|
s->req_in = 0;
|
|
|
|
s->idx_out = 0;
|
|
|
|
s->req_out = 0;
|
2008-05-04 12:21:03 +02:00
|
|
|
wm8750_vol_update(s);
|
2007-05-24 00:04:23 +02:00
|
|
|
s->i2c_len = 0;
|
|
|
|
}
|
|
|
|
|
2011-12-05 03:28:27 +01:00
|
|
|
static void wm8750_event(I2CSlave *i2c, enum i2c_event event)
|
2007-05-24 00:04:23 +02:00
|
|
|
{
|
2009-05-10 02:44:56 +02:00
|
|
|
WM8750State *s = (WM8750State *) i2c;
|
2007-05-24 00:04:23 +02:00
|
|
|
|
|
|
|
switch (event) {
|
|
|
|
case I2C_START_SEND:
|
|
|
|
s->i2c_len = 0;
|
|
|
|
break;
|
|
|
|
case I2C_FINISH:
|
|
|
|
#ifdef VERBOSE
|
|
|
|
if (s->i2c_len < 2)
|
|
|
|
printf("%s: message too short (%i bytes)\n",
|
|
|
|
__FUNCTION__, s->i2c_len);
|
|
|
|
#endif
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
#define WM8750_LINVOL 0x00
|
|
|
|
#define WM8750_RINVOL 0x01
|
|
|
|
#define WM8750_LOUT1V 0x02
|
|
|
|
#define WM8750_ROUT1V 0x03
|
|
|
|
#define WM8750_ADCDAC 0x05
|
|
|
|
#define WM8750_IFACE 0x07
|
|
|
|
#define WM8750_SRATE 0x08
|
|
|
|
#define WM8750_LDAC 0x0a
|
|
|
|
#define WM8750_RDAC 0x0b
|
|
|
|
#define WM8750_BASS 0x0c
|
|
|
|
#define WM8750_TREBLE 0x0d
|
|
|
|
#define WM8750_RESET 0x0f
|
|
|
|
#define WM8750_3D 0x10
|
|
|
|
#define WM8750_ALC1 0x11
|
|
|
|
#define WM8750_ALC2 0x12
|
|
|
|
#define WM8750_ALC3 0x13
|
|
|
|
#define WM8750_NGATE 0x14
|
|
|
|
#define WM8750_LADC 0x15
|
|
|
|
#define WM8750_RADC 0x16
|
|
|
|
#define WM8750_ADCTL1 0x17
|
|
|
|
#define WM8750_ADCTL2 0x18
|
|
|
|
#define WM8750_PWR1 0x19
|
|
|
|
#define WM8750_PWR2 0x1a
|
|
|
|
#define WM8750_ADCTL3 0x1b
|
|
|
|
#define WM8750_ADCIN 0x1f
|
|
|
|
#define WM8750_LADCIN 0x20
|
|
|
|
#define WM8750_RADCIN 0x21
|
|
|
|
#define WM8750_LOUTM1 0x22
|
|
|
|
#define WM8750_LOUTM2 0x23
|
|
|
|
#define WM8750_ROUTM1 0x24
|
|
|
|
#define WM8750_ROUTM2 0x25
|
|
|
|
#define WM8750_MOUTM1 0x26
|
|
|
|
#define WM8750_MOUTM2 0x27
|
|
|
|
#define WM8750_LOUT2V 0x28
|
|
|
|
#define WM8750_ROUT2V 0x29
|
|
|
|
#define WM8750_MOUTV 0x2a
|
|
|
|
|
2011-12-05 03:28:27 +01:00
|
|
|
static int wm8750_tx(I2CSlave *i2c, uint8_t data)
|
2007-05-24 00:04:23 +02:00
|
|
|
{
|
2009-05-10 02:44:56 +02:00
|
|
|
WM8750State *s = (WM8750State *) i2c;
|
2007-05-24 00:04:23 +02:00
|
|
|
uint8_t cmd;
|
|
|
|
uint16_t value;
|
|
|
|
|
|
|
|
if (s->i2c_len >= 2) {
|
|
|
|
printf("%s: long message (%i bytes)\n", __FUNCTION__, s->i2c_len);
|
|
|
|
#ifdef VERBOSE
|
|
|
|
return 1;
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
s->i2c_data[s->i2c_len ++] = data;
|
|
|
|
if (s->i2c_len != 2)
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
cmd = s->i2c_data[0] >> 1;
|
|
|
|
value = ((s->i2c_data[0] << 8) | s->i2c_data[1]) & 0x1ff;
|
|
|
|
|
|
|
|
switch (cmd) {
|
|
|
|
case WM8750_LADCIN: /* ADC Signal Path Control (Left) */
|
|
|
|
s->diff[0] = (((value >> 6) & 3) == 3); /* LINSEL */
|
|
|
|
if (s->diff[0])
|
|
|
|
s->in[0] = &s->adc_voice[0 + s->ds * 1];
|
|
|
|
else
|
|
|
|
s->in[0] = &s->adc_voice[((value >> 6) & 3) * 1 + 0];
|
|
|
|
break;
|
|
|
|
|
|
|
|
case WM8750_RADCIN: /* ADC Signal Path Control (Right) */
|
|
|
|
s->diff[1] = (((value >> 6) & 3) == 3); /* RINSEL */
|
|
|
|
if (s->diff[1])
|
|
|
|
s->in[1] = &s->adc_voice[0 + s->ds * 1];
|
|
|
|
else
|
|
|
|
s->in[1] = &s->adc_voice[((value >> 6) & 3) * 1 + 0];
|
|
|
|
break;
|
|
|
|
|
|
|
|
case WM8750_ADCIN: /* ADC Input Mode */
|
|
|
|
s->ds = (value >> 8) & 1; /* DS */
|
|
|
|
if (s->diff[0])
|
|
|
|
s->in[0] = &s->adc_voice[0 + s->ds * 1];
|
|
|
|
if (s->diff[1])
|
|
|
|
s->in[1] = &s->adc_voice[0 + s->ds * 1];
|
|
|
|
s->monomix[0] = (value >> 6) & 3; /* MONOMIX */
|
|
|
|
break;
|
|
|
|
|
|
|
|
case WM8750_ADCTL1: /* Additional Control (1) */
|
|
|
|
s->monomix[1] = (value >> 1) & 1; /* DMONOMIX */
|
|
|
|
break;
|
|
|
|
|
|
|
|
case WM8750_PWR1: /* Power Management (1) */
|
|
|
|
s->enable = ((value >> 6) & 7) == 3; /* VMIDSEL, VREF */
|
|
|
|
wm8750_set_format(s);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case WM8750_LINVOL: /* Left Channel PGA */
|
|
|
|
s->invol[0] = value & 0x3f; /* LINVOL */
|
|
|
|
s->inmute[0] = (value >> 7) & 1; /* LINMUTE */
|
2008-05-04 12:21:03 +02:00
|
|
|
wm8750_vol_update(s);
|
2007-05-24 00:04:23 +02:00
|
|
|
break;
|
|
|
|
|
|
|
|
case WM8750_RINVOL: /* Right Channel PGA */
|
|
|
|
s->invol[1] = value & 0x3f; /* RINVOL */
|
|
|
|
s->inmute[1] = (value >> 7) & 1; /* RINMUTE */
|
2008-05-04 12:21:03 +02:00
|
|
|
wm8750_vol_update(s);
|
2007-05-24 00:04:23 +02:00
|
|
|
break;
|
|
|
|
|
|
|
|
case WM8750_ADCDAC: /* ADC and DAC Control */
|
|
|
|
s->pol = (value >> 5) & 3; /* ADCPOL */
|
|
|
|
s->mute = (value >> 3) & 1; /* DACMU */
|
2008-05-04 12:21:03 +02:00
|
|
|
wm8750_vol_update(s);
|
2007-05-24 00:04:23 +02:00
|
|
|
break;
|
|
|
|
|
|
|
|
case WM8750_ADCTL3: /* Additional Control (3) */
|
|
|
|
break;
|
|
|
|
|
|
|
|
case WM8750_LADC: /* Left ADC Digital Volume */
|
|
|
|
s->invol[2] = value & 0xff; /* LADCVOL */
|
2008-05-04 12:55:25 +02:00
|
|
|
wm8750_vol_update(s);
|
2007-05-24 00:04:23 +02:00
|
|
|
break;
|
|
|
|
|
|
|
|
case WM8750_RADC: /* Right ADC Digital Volume */
|
|
|
|
s->invol[3] = value & 0xff; /* RADCVOL */
|
2008-05-04 12:55:25 +02:00
|
|
|
wm8750_vol_update(s);
|
2007-05-24 00:04:23 +02:00
|
|
|
break;
|
|
|
|
|
|
|
|
case WM8750_ALC1: /* ALC Control (1) */
|
|
|
|
s->alc = (value >> 7) & 3; /* ALCSEL */
|
|
|
|
break;
|
|
|
|
|
|
|
|
case WM8750_NGATE: /* Noise Gate Control */
|
|
|
|
case WM8750_3D: /* 3D enhance */
|
|
|
|
break;
|
|
|
|
|
|
|
|
case WM8750_LDAC: /* Left Channel Digital Volume */
|
|
|
|
s->outvol[0] = value & 0xff; /* LDACVOL */
|
2008-05-04 12:55:25 +02:00
|
|
|
wm8750_vol_update(s);
|
2007-05-24 00:04:23 +02:00
|
|
|
break;
|
|
|
|
|
|
|
|
case WM8750_RDAC: /* Right Channel Digital Volume */
|
|
|
|
s->outvol[1] = value & 0xff; /* RDACVOL */
|
2008-05-04 12:55:25 +02:00
|
|
|
wm8750_vol_update(s);
|
2007-05-24 00:04:23 +02:00
|
|
|
break;
|
|
|
|
|
|
|
|
case WM8750_BASS: /* Bass Control */
|
|
|
|
break;
|
|
|
|
|
|
|
|
case WM8750_LOUTM1: /* Left Mixer Control (1) */
|
|
|
|
s->path[0] = (value >> 8) & 1; /* LD2LO */
|
2008-05-04 12:55:25 +02:00
|
|
|
/* TODO: mute/unmute respective paths */
|
|
|
|
wm8750_vol_update(s);
|
2007-05-24 00:04:23 +02:00
|
|
|
break;
|
|
|
|
|
|
|
|
case WM8750_LOUTM2: /* Left Mixer Control (2) */
|
|
|
|
s->path[1] = (value >> 8) & 1; /* RD2LO */
|
2008-05-04 12:55:25 +02:00
|
|
|
/* TODO: mute/unmute respective paths */
|
|
|
|
wm8750_vol_update(s);
|
2007-05-24 00:04:23 +02:00
|
|
|
break;
|
|
|
|
|
|
|
|
case WM8750_ROUTM1: /* Right Mixer Control (1) */
|
|
|
|
s->path[2] = (value >> 8) & 1; /* LD2RO */
|
2008-05-04 12:55:25 +02:00
|
|
|
/* TODO: mute/unmute respective paths */
|
|
|
|
wm8750_vol_update(s);
|
2007-05-24 00:04:23 +02:00
|
|
|
break;
|
|
|
|
|
|
|
|
case WM8750_ROUTM2: /* Right Mixer Control (2) */
|
|
|
|
s->path[3] = (value >> 8) & 1; /* RD2RO */
|
2008-05-04 12:55:25 +02:00
|
|
|
/* TODO: mute/unmute respective paths */
|
|
|
|
wm8750_vol_update(s);
|
2007-05-24 00:04:23 +02:00
|
|
|
break;
|
|
|
|
|
|
|
|
case WM8750_MOUTM1: /* Mono Mixer Control (1) */
|
|
|
|
s->mpath[0] = (value >> 8) & 1; /* LD2MO */
|
2008-05-04 12:55:25 +02:00
|
|
|
/* TODO: mute/unmute respective paths */
|
|
|
|
wm8750_vol_update(s);
|
2007-05-24 00:04:23 +02:00
|
|
|
break;
|
|
|
|
|
|
|
|
case WM8750_MOUTM2: /* Mono Mixer Control (2) */
|
|
|
|
s->mpath[1] = (value >> 8) & 1; /* RD2MO */
|
2008-05-04 12:55:25 +02:00
|
|
|
/* TODO: mute/unmute respective paths */
|
|
|
|
wm8750_vol_update(s);
|
2007-05-24 00:04:23 +02:00
|
|
|
break;
|
|
|
|
|
|
|
|
case WM8750_LOUT1V: /* LOUT1 Volume */
|
2008-05-04 12:21:03 +02:00
|
|
|
s->outvol[2] = value & 0x7f; /* LOUT1VOL */
|
2008-05-04 12:55:25 +02:00
|
|
|
wm8750_vol_update(s);
|
2007-05-24 00:04:23 +02:00
|
|
|
break;
|
|
|
|
|
|
|
|
case WM8750_LOUT2V: /* LOUT2 Volume */
|
|
|
|
s->outvol[4] = value & 0x7f; /* LOUT2VOL */
|
2008-05-04 12:21:03 +02:00
|
|
|
wm8750_vol_update(s);
|
2007-05-24 00:04:23 +02:00
|
|
|
break;
|
|
|
|
|
|
|
|
case WM8750_ROUT1V: /* ROUT1 Volume */
|
2008-05-04 12:21:03 +02:00
|
|
|
s->outvol[3] = value & 0x7f; /* ROUT1VOL */
|
2008-05-04 12:55:25 +02:00
|
|
|
wm8750_vol_update(s);
|
2007-05-24 00:04:23 +02:00
|
|
|
break;
|
|
|
|
|
|
|
|
case WM8750_ROUT2V: /* ROUT2 Volume */
|
|
|
|
s->outvol[5] = value & 0x7f; /* ROUT2VOL */
|
2008-05-04 12:21:03 +02:00
|
|
|
wm8750_vol_update(s);
|
2007-05-24 00:04:23 +02:00
|
|
|
break;
|
|
|
|
|
|
|
|
case WM8750_MOUTV: /* MONOOUT Volume */
|
|
|
|
s->outvol[6] = value & 0x7f; /* MONOOUTVOL */
|
2008-05-04 12:55:25 +02:00
|
|
|
wm8750_vol_update(s);
|
2007-05-24 00:04:23 +02:00
|
|
|
break;
|
|
|
|
|
|
|
|
case WM8750_ADCTL2: /* Additional Control (2) */
|
|
|
|
break;
|
|
|
|
|
|
|
|
case WM8750_PWR2: /* Power Management (2) */
|
|
|
|
s->power = value & 0x7e;
|
2008-05-04 12:55:25 +02:00
|
|
|
/* TODO: mute/unmute respective paths */
|
|
|
|
wm8750_vol_update(s);
|
2007-05-24 00:04:23 +02:00
|
|
|
break;
|
|
|
|
|
|
|
|
case WM8750_IFACE: /* Digital Audio Interface Format */
|
|
|
|
s->format = value;
|
2008-05-04 14:15:51 +02:00
|
|
|
s->master = (value >> 6) & 1; /* MS */
|
|
|
|
wm8750_clk_update(s, s->master);
|
2007-05-24 00:04:23 +02:00
|
|
|
break;
|
|
|
|
|
|
|
|
case WM8750_SRATE: /* Clocking and Sample Rate Control */
|
|
|
|
s->rate = &wm_rate_table[(value >> 1) & 0x1f];
|
2008-05-04 14:15:51 +02:00
|
|
|
wm8750_clk_update(s, 0);
|
2007-05-24 00:04:23 +02:00
|
|
|
break;
|
|
|
|
|
|
|
|
case WM8750_RESET: /* Reset */
|
|
|
|
wm8750_reset(&s->i2c);
|
|
|
|
break;
|
|
|
|
|
|
|
|
#ifdef VERBOSE
|
|
|
|
default:
|
|
|
|
printf("%s: unknown register %02x\n", __FUNCTION__, cmd);
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2011-12-05 03:28:27 +01:00
|
|
|
static int wm8750_rx(I2CSlave *i2c)
|
2007-05-24 00:04:23 +02:00
|
|
|
{
|
|
|
|
return 0x00;
|
|
|
|
}
|
|
|
|
|
2009-09-29 22:48:31 +02:00
|
|
|
static void wm8750_pre_save(void *opaque)
|
2007-05-24 20:50:09 +02:00
|
|
|
{
|
2009-09-29 22:48:31 +02:00
|
|
|
WM8750State *s = opaque;
|
|
|
|
|
2012-01-09 19:32:04 +01:00
|
|
|
s->rate_vmstate = s->rate - wm_rate_table;
|
2007-05-24 20:50:09 +02:00
|
|
|
}
|
|
|
|
|
2009-09-29 22:48:31 +02:00
|
|
|
static int wm8750_post_load(void *opaque, int version_id)
|
2007-05-24 20:50:09 +02:00
|
|
|
{
|
2009-09-29 22:48:31 +02:00
|
|
|
WM8750State *s = opaque;
|
|
|
|
|
|
|
|
s->rate = &wm_rate_table[s->rate_vmstate & 0x1f];
|
2007-05-24 20:50:09 +02:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2009-09-29 22:48:31 +02:00
|
|
|
static const VMStateDescription vmstate_wm8750 = {
|
|
|
|
.name = CODEC,
|
|
|
|
.version_id = 0,
|
|
|
|
.minimum_version_id = 0,
|
|
|
|
.minimum_version_id_old = 0,
|
|
|
|
.pre_save = wm8750_pre_save,
|
|
|
|
.post_load = wm8750_post_load,
|
|
|
|
.fields = (VMStateField []) {
|
|
|
|
VMSTATE_UINT8_ARRAY(i2c_data, WM8750State, 2),
|
|
|
|
VMSTATE_INT32(i2c_len, WM8750State),
|
|
|
|
VMSTATE_INT32(enable, WM8750State),
|
|
|
|
VMSTATE_INT32(idx_in, WM8750State),
|
|
|
|
VMSTATE_INT32(req_in, WM8750State),
|
|
|
|
VMSTATE_INT32(idx_out, WM8750State),
|
|
|
|
VMSTATE_INT32(req_out, WM8750State),
|
|
|
|
VMSTATE_UINT8_ARRAY(outvol, WM8750State, 7),
|
|
|
|
VMSTATE_UINT8_ARRAY(outmute, WM8750State, 2),
|
|
|
|
VMSTATE_UINT8_ARRAY(invol, WM8750State, 4),
|
|
|
|
VMSTATE_UINT8_ARRAY(inmute, WM8750State, 2),
|
|
|
|
VMSTATE_UINT8_ARRAY(diff, WM8750State, 2),
|
|
|
|
VMSTATE_UINT8(pol, WM8750State),
|
|
|
|
VMSTATE_UINT8(ds, WM8750State),
|
|
|
|
VMSTATE_UINT8_ARRAY(monomix, WM8750State, 2),
|
|
|
|
VMSTATE_UINT8(alc, WM8750State),
|
|
|
|
VMSTATE_UINT8(mute, WM8750State),
|
|
|
|
VMSTATE_UINT8_ARRAY(path, WM8750State, 4),
|
|
|
|
VMSTATE_UINT8_ARRAY(mpath, WM8750State, 2),
|
|
|
|
VMSTATE_UINT8(format, WM8750State),
|
|
|
|
VMSTATE_UINT8(power, WM8750State),
|
|
|
|
VMSTATE_UINT8(rate_vmstate, WM8750State),
|
|
|
|
VMSTATE_I2C_SLAVE(i2c, WM8750State),
|
|
|
|
VMSTATE_END_OF_LIST()
|
|
|
|
}
|
|
|
|
};
|
|
|
|
|
2011-12-05 03:28:27 +01:00
|
|
|
static int wm8750_init(I2CSlave *i2c)
|
2007-05-24 00:04:23 +02:00
|
|
|
{
|
2009-05-14 23:35:08 +02:00
|
|
|
WM8750State *s = FROM_I2C_SLAVE(WM8750State, i2c);
|
2007-05-24 00:04:23 +02:00
|
|
|
|
2009-05-14 01:11:35 +02:00
|
|
|
AUD_register_card(CODEC, &s->card);
|
2007-05-24 00:04:23 +02:00
|
|
|
wm8750_reset(&s->i2c);
|
|
|
|
|
2009-08-14 10:36:05 +02:00
|
|
|
return 0;
|
2007-05-24 00:04:23 +02:00
|
|
|
}
|
|
|
|
|
2008-04-24 23:01:40 +02:00
|
|
|
#if 0
|
2011-12-05 03:28:27 +01:00
|
|
|
static void wm8750_fini(I2CSlave *i2c)
|
2007-05-24 00:04:23 +02:00
|
|
|
{
|
2009-05-10 02:44:56 +02:00
|
|
|
WM8750State *s = (WM8750State *) i2c;
|
2007-05-24 00:04:23 +02:00
|
|
|
wm8750_reset(&s->i2c);
|
|
|
|
AUD_remove_card(&s->card);
|
2011-08-21 05:09:37 +02:00
|
|
|
g_free(s);
|
2007-05-24 00:04:23 +02:00
|
|
|
}
|
2008-04-24 23:01:40 +02:00
|
|
|
#endif
|
2007-05-24 00:04:23 +02:00
|
|
|
|
2009-05-14 23:35:08 +02:00
|
|
|
void wm8750_data_req_set(DeviceState *dev,
|
2007-05-24 00:04:23 +02:00
|
|
|
void (*data_req)(void *, int, int), void *opaque)
|
|
|
|
{
|
2009-05-14 23:35:08 +02:00
|
|
|
WM8750State *s = FROM_I2C_SLAVE(WM8750State, I2C_SLAVE_FROM_QDEV(dev));
|
2007-05-24 00:04:23 +02:00
|
|
|
s->data_req = data_req;
|
|
|
|
s->opaque = opaque;
|
|
|
|
}
|
|
|
|
|
|
|
|
void wm8750_dac_dat(void *opaque, uint32_t sample)
|
|
|
|
{
|
2009-05-10 02:44:56 +02:00
|
|
|
WM8750State *s = (WM8750State *) opaque;
|
2008-05-04 14:15:51 +02:00
|
|
|
|
2008-05-04 12:21:03 +02:00
|
|
|
*(uint32_t *) &s->data_out[s->idx_out] = sample;
|
2007-05-24 00:04:23 +02:00
|
|
|
s->req_out -= 4;
|
|
|
|
s->idx_out += 4;
|
|
|
|
if (s->idx_out >= sizeof(s->data_out) || s->req_out <= 0)
|
|
|
|
wm8750_out_flush(s);
|
|
|
|
}
|
|
|
|
|
2008-04-26 14:00:18 +02:00
|
|
|
void *wm8750_dac_buffer(void *opaque, int samples)
|
|
|
|
{
|
2009-05-10 02:44:56 +02:00
|
|
|
WM8750State *s = (WM8750State *) opaque;
|
2008-04-26 14:00:18 +02:00
|
|
|
/* XXX: Should check if there are <i>samples</i> free samples available */
|
|
|
|
void *ret = s->data_out + s->idx_out;
|
|
|
|
|
|
|
|
s->idx_out += samples << 2;
|
|
|
|
s->req_out -= samples << 2;
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
void wm8750_dac_commit(void *opaque)
|
|
|
|
{
|
2009-05-10 02:44:56 +02:00
|
|
|
WM8750State *s = (WM8750State *) opaque;
|
2008-04-26 14:00:18 +02:00
|
|
|
|
2009-04-07 20:22:35 +02:00
|
|
|
wm8750_out_flush(s);
|
2008-04-26 14:00:18 +02:00
|
|
|
}
|
|
|
|
|
2007-05-24 00:04:23 +02:00
|
|
|
uint32_t wm8750_adc_dat(void *opaque)
|
|
|
|
{
|
2009-05-10 02:44:56 +02:00
|
|
|
WM8750State *s = (WM8750State *) opaque;
|
2007-05-24 00:04:23 +02:00
|
|
|
uint32_t *data;
|
2008-05-04 14:15:51 +02:00
|
|
|
|
2007-05-24 00:04:23 +02:00
|
|
|
if (s->idx_in >= sizeof(s->data_in))
|
|
|
|
wm8750_in_load(s);
|
2008-05-04 14:15:51 +02:00
|
|
|
|
2007-05-24 00:04:23 +02:00
|
|
|
data = (uint32_t *) &s->data_in[s->idx_in];
|
|
|
|
s->req_in -= 4;
|
|
|
|
s->idx_in += 4;
|
2008-05-04 12:21:03 +02:00
|
|
|
return *data;
|
2007-05-24 00:04:23 +02:00
|
|
|
}
|
2008-05-04 14:15:51 +02:00
|
|
|
|
2008-11-12 18:36:08 +01:00
|
|
|
void wm8750_set_bclk_in(void *opaque, int new_hz)
|
2008-05-04 14:15:51 +02:00
|
|
|
{
|
2009-05-10 02:44:56 +02:00
|
|
|
WM8750State *s = (WM8750State *) opaque;
|
2008-05-04 14:15:51 +02:00
|
|
|
|
2008-11-12 18:36:08 +01:00
|
|
|
s->ext_adc_hz = new_hz;
|
|
|
|
s->ext_dac_hz = new_hz;
|
2008-05-04 14:15:51 +02:00
|
|
|
wm8750_clk_update(s, 1);
|
|
|
|
}
|
2009-05-14 23:35:08 +02:00
|
|
|
|
2011-12-05 03:39:20 +01:00
|
|
|
static void wm8750_class_init(ObjectClass *klass, void *data)
|
|
|
|
{
|
|
|
|
I2CSlaveClass *sc = I2C_SLAVE_CLASS(klass);
|
|
|
|
|
|
|
|
sc->init = wm8750_init;
|
|
|
|
sc->event = wm8750_event;
|
|
|
|
sc->recv = wm8750_rx;
|
|
|
|
sc->send = wm8750_tx;
|
|
|
|
}
|
|
|
|
|
|
|
|
static DeviceInfo wm8750_info = {
|
|
|
|
.name = "wm8750",
|
|
|
|
.size = sizeof(WM8750State),
|
|
|
|
.vmsd = &vmstate_wm8750,
|
|
|
|
.class_init = wm8750_class_init,
|
2009-05-14 23:35:08 +02:00
|
|
|
};
|
|
|
|
|
|
|
|
static void wm8750_register_devices(void)
|
|
|
|
{
|
2009-06-10 09:41:42 +02:00
|
|
|
i2c_register_slave(&wm8750_info);
|
2009-05-14 23:35:08 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
device_init(wm8750_register_devices)
|