qemu-patch-raspberry4/target-xtensa/helpers.h

#include "def-helper.h"

DEF_HELPER_1(exception, void, i32)
DEF_HELPER_2(exception_cause, void, i32, i32)
DEF_HELPER_3(exception_cause_vaddr, void, i32, i32, i32)
DEF_HELPER_1(nsa, i32, i32)
DEF_HELPER_1(nsau, i32, i32)

#include "def-helper.h"
target-xtensa: implement disas_xtensa_insn Set up disas_xtensa_insn switch structure, mark required options on high level groups. Implement arithmetic/bit logic/jump/call0. Implement code generation loop with single step/breakpoint checking. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com> 2011-09-06 01:55:27 +02:00			`#include "def-helper.h"`

			`DEF_HELPER_1(exception, void, i32)`
target-xtensa: implement exceptions - mark privileged opcodes with ring check; - make debug exception on exception handler entry. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com> 2011-09-06 01:55:41 +02:00			`DEF_HELPER_2(exception_cause, void, i32, i32)`
			`DEF_HELPER_3(exception_cause_vaddr, void, i32, i32, i32)`
target-xtensa: implement shifts (ST1 and RST1 groups) - ST1: SAR (shift amount special register) manipulation, NSA(U); - RST1: shifts, 16-bit multiplication. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com> 2011-09-06 01:55:35 +02:00			`DEF_HELPER_1(nsa, i32, i32)`
			`DEF_HELPER_1(nsau, i32, i32)`
target-xtensa: implement disas_xtensa_insn Set up disas_xtensa_insn switch structure, mark required options on high level groups. Implement arithmetic/bit logic/jump/call0. Implement code generation loop with single step/breakpoint checking. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com> 2011-09-06 01:55:27 +02:00
			`#include "def-helper.h"`