2010-12-25 05:29:37 +01:00
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/*
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* QEMU Intel 82374 emulation (Enhanced DMA controller)
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*
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* Copyright (c) 2010 Hervé Poussineau
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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2016-01-26 19:17:30 +01:00
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#include "qemu/osdep.h"
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2013-02-05 17:06:20 +01:00
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#include "hw/isa/isa.h"
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2010-12-25 05:29:37 +01:00
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//#define DEBUG_I82374
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#ifdef DEBUG_I82374
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#define DPRINTF(fmt, ...) \
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do { fprintf(stderr, "i82374: " fmt , ## __VA_ARGS__); } while (0)
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#else
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#define DPRINTF(fmt, ...) \
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do {} while (0)
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#endif
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#define BADF(fmt, ...) \
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do { fprintf(stderr, "i82374 ERROR: " fmt , ## __VA_ARGS__); } while (0)
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typedef struct I82374State {
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uint8_t commands[8];
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2014-04-29 15:38:39 +02:00
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PortioList port_list;
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2010-12-25 05:29:37 +01:00
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} I82374State;
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static const VMStateDescription vmstate_i82374 = {
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.name = "i82374",
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.version_id = 0,
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.minimum_version_id = 0,
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.fields = (VMStateField[]) {
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VMSTATE_UINT8_ARRAY(commands, I82374State, 8),
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VMSTATE_END_OF_LIST()
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},
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};
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static uint32_t i82374_read_isr(void *opaque, uint32_t nport)
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{
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uint32_t val = 0;
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BADF("%s: %08x\n", __func__, nport);
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DPRINTF("%s: %08x=%08x\n", __func__, nport, val);
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return val;
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}
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static void i82374_write_command(void *opaque, uint32_t nport, uint32_t data)
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{
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DPRINTF("%s: %08x=%08x\n", __func__, nport, data);
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if (data != 0x42) {
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/* Not Stop S/G command */
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BADF("%s: %08x=%08x\n", __func__, nport, data);
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}
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}
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static uint32_t i82374_read_status(void *opaque, uint32_t nport)
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{
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uint32_t val = 0;
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BADF("%s: %08x\n", __func__, nport);
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DPRINTF("%s: %08x=%08x\n", __func__, nport, val);
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return val;
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}
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static void i82374_write_descriptor(void *opaque, uint32_t nport, uint32_t data)
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{
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DPRINTF("%s: %08x=%08x\n", __func__, nport, data);
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BADF("%s: %08x=%08x\n", __func__, nport, data);
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}
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static uint32_t i82374_read_descriptor(void *opaque, uint32_t nport)
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{
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uint32_t val = 0;
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BADF("%s: %08x\n", __func__, nport);
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DPRINTF("%s: %08x=%08x\n", __func__, nport, val);
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return val;
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}
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2012-11-25 02:37:14 +01:00
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static void i82374_realize(I82374State *s, Error **errp)
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2010-12-25 05:29:37 +01:00
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{
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2015-02-16 14:13:11 +01:00
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DMA_init(1);
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2010-12-25 05:29:37 +01:00
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memset(s->commands, 0, sizeof(s->commands));
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}
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2013-04-27 22:18:39 +02:00
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#define TYPE_I82374 "i82374"
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#define I82374(obj) OBJECT_CHECK(ISAi82374State, (obj), TYPE_I82374)
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2010-12-25 05:29:37 +01:00
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typedef struct ISAi82374State {
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2013-04-27 22:18:39 +02:00
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ISADevice parent_obj;
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2010-12-25 05:29:37 +01:00
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uint32_t iobase;
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I82374State state;
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} ISAi82374State;
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static const VMStateDescription vmstate_isa_i82374 = {
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.name = "isa-i82374",
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.version_id = 0,
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.minimum_version_id = 0,
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.fields = (VMStateField[]) {
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VMSTATE_STRUCT(state, ISAi82374State, 0, vmstate_i82374, I82374State),
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VMSTATE_END_OF_LIST()
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},
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};
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2013-06-22 08:06:57 +02:00
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static const MemoryRegionPortio i82374_portio_list[] = {
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{ 0x0A, 1, 1, .read = i82374_read_isr, },
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{ 0x10, 8, 1, .write = i82374_write_command, },
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{ 0x18, 8, 1, .read = i82374_read_status, },
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{ 0x20, 0x20, 1,
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.write = i82374_write_descriptor, .read = i82374_read_descriptor, },
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PORTIO_END_OF_LIST(),
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};
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2012-11-25 02:37:14 +01:00
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static void i82374_isa_realize(DeviceState *dev, Error **errp)
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2010-12-25 05:29:37 +01:00
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{
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2013-04-27 22:18:39 +02:00
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ISAi82374State *isa = I82374(dev);
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2010-12-25 05:29:37 +01:00
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I82374State *s = &isa->state;
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2014-04-29 15:38:39 +02:00
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portio_list_init(&s->port_list, OBJECT(isa), i82374_portio_list, s,
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"i82374");
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portio_list_add(&s->port_list, isa_address_space_io(&isa->parent_obj),
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2013-06-22 08:06:57 +02:00
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isa->iobase);
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2010-12-25 05:29:37 +01:00
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2012-11-25 02:37:14 +01:00
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i82374_realize(s, errp);
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2010-12-25 05:29:37 +01:00
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}
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2011-12-08 04:34:16 +01:00
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static Property i82374_properties[] = {
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2014-02-08 11:01:53 +01:00
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DEFINE_PROP_UINT32("iobase", ISAi82374State, iobase, 0x400),
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2011-12-08 04:34:16 +01:00
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DEFINE_PROP_END_OF_LIST()
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};
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2011-12-04 18:52:49 +01:00
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static void i82374_class_init(ObjectClass *klass, void *data)
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{
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2011-12-08 04:34:16 +01:00
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DeviceClass *dc = DEVICE_CLASS(klass);
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2011-12-04 18:52:49 +01:00
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2012-11-25 02:37:14 +01:00
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dc->realize = i82374_isa_realize;
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2011-12-08 04:34:16 +01:00
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dc->vmsd = &vmstate_isa_i82374;
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dc->props = i82374_properties;
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2011-12-04 18:52:49 +01:00
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}
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2013-01-10 16:19:07 +01:00
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static const TypeInfo i82374_isa_info = {
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2013-04-27 22:18:39 +02:00
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.name = TYPE_I82374,
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2011-12-08 04:34:16 +01:00
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.parent = TYPE_ISA_DEVICE,
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.instance_size = sizeof(ISAi82374State),
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2011-12-04 18:52:49 +01:00
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.class_init = i82374_class_init,
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2010-12-25 05:29:37 +01:00
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};
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2012-02-09 15:20:55 +01:00
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static void i82374_register_types(void)
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2010-12-25 05:29:37 +01:00
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{
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2011-12-08 04:34:16 +01:00
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type_register_static(&i82374_isa_info);
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2010-12-25 05:29:37 +01:00
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}
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2012-02-09 15:20:55 +01:00
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type_init(i82374_register_types)
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