2003-06-27 19:34:32 +02:00
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/*
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* gdb server stub
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2007-09-16 23:08:06 +02:00
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*
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2005-07-02 16:31:34 +02:00
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* Copyright (c) 2003-2005 Fabrice Bellard
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2003-06-27 19:34:32 +02:00
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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2006-06-17 20:30:42 +02:00
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#include "config.h"
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2008-10-11 19:55:29 +02:00
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#include "qemu-common.h"
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2005-04-17 21:16:13 +02:00
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#ifdef CONFIG_USER_ONLY
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#include <stdlib.h>
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#include <stdio.h>
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#include <stdarg.h>
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#include <string.h>
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#include <errno.h>
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#include <unistd.h>
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2006-06-17 20:30:42 +02:00
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#include <fcntl.h>
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2005-04-17 21:16:13 +02:00
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#include "qemu.h"
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#else
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2007-11-17 18:14:51 +01:00
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#include "qemu-char.h"
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#include "sysemu.h"
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#include "gdbstub.h"
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2005-04-17 21:16:13 +02:00
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#endif
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2004-04-01 01:37:16 +02:00
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2008-10-11 19:55:29 +02:00
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#define MAX_PACKET_LENGTH 4096
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2006-06-14 17:21:14 +02:00
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#include "qemu_socket.h"
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#ifdef _WIN32
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/* XXX: these constants may be independent of the host ones even for Unix */
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#ifndef SIGTRAP
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#define SIGTRAP 5
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#endif
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#ifndef SIGINT
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#define SIGINT 2
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#endif
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#else
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2003-06-27 19:34:32 +02:00
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#include <signal.h>
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2006-06-14 17:21:14 +02:00
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#endif
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2003-06-27 19:34:32 +02:00
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2003-07-26 20:01:58 +02:00
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//#define DEBUG_GDB
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2003-06-27 19:34:32 +02:00
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2008-10-11 19:55:29 +02:00
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typedef struct GDBRegisterState {
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int base_reg;
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int num_regs;
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gdb_reg_cb get_reg;
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gdb_reg_cb set_reg;
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const char *xml;
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struct GDBRegisterState *next;
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} GDBRegisterState;
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2004-03-31 20:52:07 +02:00
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enum RSState {
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RS_IDLE,
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RS_GETLINE,
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RS_CHKSUM1,
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RS_CHKSUM2,
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2007-01-28 04:10:55 +01:00
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RS_SYSCALL,
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2004-03-31 20:52:07 +02:00
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};
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typedef struct GDBState {
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2005-11-22 00:25:50 +01:00
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CPUState *env; /* current CPU */
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2005-04-24 12:07:11 +02:00
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enum RSState state; /* parsing state */
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2008-10-11 19:55:29 +02:00
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char line_buf[MAX_PACKET_LENGTH];
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2004-03-31 20:52:07 +02:00
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int line_buf_index;
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int line_csum;
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2008-10-11 19:55:29 +02:00
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uint8_t last_packet[MAX_PACKET_LENGTH + 4];
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2007-01-28 02:53:16 +01:00
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int last_packet_len;
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2008-05-18 00:20:53 +02:00
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int signal;
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2005-04-24 12:07:11 +02:00
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#ifdef CONFIG_USER_ONLY
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2007-01-28 02:53:16 +01:00
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int fd;
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2005-04-24 12:07:11 +02:00
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int running_state;
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2007-01-28 02:53:16 +01:00
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#else
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CharDriverState *chr;
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2005-04-24 12:07:11 +02:00
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#endif
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2004-03-31 20:52:07 +02:00
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} GDBState;
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2003-06-27 19:34:32 +02:00
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2008-05-09 10:25:14 +02:00
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/* By default use no IRQs and no timers while single stepping so as to
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* make single stepping like an ICE HW step.
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*/
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static int sstep_flags = SSTEP_ENABLE|SSTEP_NOIRQ|SSTEP_NOTIMER;
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2008-10-11 19:55:29 +02:00
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/* This is an ugly hack to cope with both new and old gdb.
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If gdb sends qXfer:features:read then assume we're talking to a newish
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gdb that understands target descriptions. */
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static int gdb_has_xml;
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2005-04-17 21:16:13 +02:00
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#ifdef CONFIG_USER_ONLY
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2007-01-28 02:53:16 +01:00
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/* XXX: This is not thread safe. Do we care? */
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static int gdbserver_fd = -1;
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2005-04-17 21:16:13 +02:00
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/* XXX: remove this hack. */
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static GDBState gdbserver_state;
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2004-03-31 20:52:07 +02:00
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static int get_char(GDBState *s)
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2003-06-27 19:34:32 +02:00
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{
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uint8_t ch;
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int ret;
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for(;;) {
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2006-06-14 17:21:14 +02:00
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ret = recv(s->fd, &ch, 1, 0);
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2003-06-27 19:34:32 +02:00
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if (ret < 0) {
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2008-05-18 00:20:53 +02:00
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if (errno == ECONNRESET)
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s->fd = -1;
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2003-06-27 19:34:32 +02:00
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if (errno != EINTR && errno != EAGAIN)
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return -1;
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} else if (ret == 0) {
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2008-05-18 00:20:53 +02:00
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close(s->fd);
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s->fd = -1;
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2003-06-27 19:34:32 +02:00
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return -1;
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} else {
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break;
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}
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}
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return ch;
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}
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2007-01-28 02:53:16 +01:00
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#endif
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2003-06-27 19:34:32 +02:00
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2007-01-28 04:10:55 +01:00
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/* GDB stub state for use by semihosting syscalls. */
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static GDBState *gdb_syscall_state;
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static gdb_syscall_complete_cb gdb_current_syscall_cb;
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enum {
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GDB_SYS_UNKNOWN,
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GDB_SYS_ENABLED,
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GDB_SYS_DISABLED,
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} gdb_syscall_mode;
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/* If gdb is connected when the first semihosting syscall occurs then use
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remote gdb syscalls. Otherwise use native file IO. */
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int use_gdb_syscalls(void)
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{
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if (gdb_syscall_mode == GDB_SYS_UNKNOWN) {
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gdb_syscall_mode = (gdb_syscall_state ? GDB_SYS_ENABLED
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: GDB_SYS_DISABLED);
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}
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return gdb_syscall_mode == GDB_SYS_ENABLED;
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}
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2008-03-14 07:10:42 +01:00
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/* Resume execution. */
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static inline void gdb_continue(GDBState *s)
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{
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#ifdef CONFIG_USER_ONLY
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s->running_state = 1;
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#else
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vm_start();
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#endif
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}
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2004-03-31 20:52:07 +02:00
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static void put_buffer(GDBState *s, const uint8_t *buf, int len)
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2003-06-27 19:34:32 +02:00
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{
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2007-01-28 02:53:16 +01:00
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#ifdef CONFIG_USER_ONLY
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2003-06-27 19:34:32 +02:00
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int ret;
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while (len > 0) {
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2006-06-14 17:21:14 +02:00
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ret = send(s->fd, buf, len, 0);
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2003-06-27 19:34:32 +02:00
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if (ret < 0) {
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if (errno != EINTR && errno != EAGAIN)
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return;
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} else {
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buf += ret;
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len -= ret;
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}
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}
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2007-01-28 02:53:16 +01:00
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#else
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qemu_chr_write(s->chr, buf, len);
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#endif
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2003-06-27 19:34:32 +02:00
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}
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static inline int fromhex(int v)
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{
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if (v >= '0' && v <= '9')
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return v - '0';
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else if (v >= 'A' && v <= 'F')
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return v - 'A' + 10;
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else if (v >= 'a' && v <= 'f')
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return v - 'a' + 10;
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else
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return 0;
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}
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static inline int tohex(int v)
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{
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if (v < 10)
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return v + '0';
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else
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return v - 10 + 'a';
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}
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static void memtohex(char *buf, const uint8_t *mem, int len)
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{
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int i, c;
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char *q;
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q = buf;
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for(i = 0; i < len; i++) {
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c = mem[i];
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*q++ = tohex(c >> 4);
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*q++ = tohex(c & 0xf);
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}
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*q = '\0';
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}
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static void hextomem(uint8_t *mem, const char *buf, int len)
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{
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int i;
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for(i = 0; i < len; i++) {
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mem[i] = (fromhex(buf[0]) << 4) | fromhex(buf[1]);
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buf += 2;
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}
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}
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/* return -1 if error, 0 if OK */
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2008-10-11 19:55:29 +02:00
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static int put_packet_binary(GDBState *s, const char *buf, int len)
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2003-06-27 19:34:32 +02:00
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{
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2008-10-11 19:55:29 +02:00
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int csum, i;
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2007-12-16 04:02:09 +01:00
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uint8_t *p;
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2003-06-27 19:34:32 +02:00
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for(;;) {
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2007-01-28 02:53:16 +01:00
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p = s->last_packet;
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*(p++) = '$';
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memcpy(p, buf, len);
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p += len;
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2003-06-27 19:34:32 +02:00
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csum = 0;
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for(i = 0; i < len; i++) {
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csum += buf[i];
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}
|
2007-01-28 02:53:16 +01:00
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*(p++) = '#';
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*(p++) = tohex((csum >> 4) & 0xf);
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*(p++) = tohex((csum) & 0xf);
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2003-06-27 19:34:32 +02:00
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2007-01-28 02:53:16 +01:00
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s->last_packet_len = p - s->last_packet;
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2007-12-16 04:16:05 +01:00
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put_buffer(s, (uint8_t *)s->last_packet, s->last_packet_len);
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2003-06-27 19:34:32 +02:00
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2007-01-28 02:53:16 +01:00
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#ifdef CONFIG_USER_ONLY
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i = get_char(s);
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if (i < 0)
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2003-06-27 19:34:32 +02:00
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return -1;
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2007-01-28 02:53:16 +01:00
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if (i == '+')
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2003-06-27 19:34:32 +02:00
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break;
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2007-01-28 02:53:16 +01:00
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#else
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break;
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#endif
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2003-06-27 19:34:32 +02:00
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}
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return 0;
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}
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2008-10-11 19:55:29 +02:00
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/* return -1 if error, 0 if OK */
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static int put_packet(GDBState *s, const char *buf)
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{
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#ifdef DEBUG_GDB
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printf("reply='%s'\n", buf);
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#endif
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2008-05-09 16:40:22 +02:00
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2008-10-11 19:55:29 +02:00
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return put_packet_binary(s, buf, strlen(buf));
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}
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/* The GDB remote protocol transfers values in target byte order. This means
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we can use the raw memory access routines to access the value buffer.
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Conveniently, these also handle the case where the buffer is mis-aligned.
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*/
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#define GET_REG8(val) do { \
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stb_p(mem_buf, val); \
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return 1; \
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} while(0)
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#define GET_REG16(val) do { \
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stw_p(mem_buf, val); \
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return 2; \
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} while(0)
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#define GET_REG32(val) do { \
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stl_p(mem_buf, val); \
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return 4; \
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} while(0)
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#define GET_REG64(val) do { \
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stq_p(mem_buf, val); \
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return 8; \
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} while(0)
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#if TARGET_LONG_BITS == 64
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#define GET_REGL(val) GET_REG64(val)
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#define ldtul_p(addr) ldq_p(addr)
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#else
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#define GET_REGL(val) GET_REG32(val)
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#define ldtul_p(addr) ldl_p(addr)
|
2008-05-09 16:40:22 +02:00
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#endif
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|
2008-10-11 19:55:29 +02:00
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|
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#if defined(TARGET_I386)
|
2007-10-31 01:21:35 +01:00
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#ifdef TARGET_X86_64
|
2008-10-11 19:55:29 +02:00
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static const int gpr_map[16] = {
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R_EAX, R_EBX, R_ECX, R_EDX, R_ESI, R_EDI, R_EBP, R_ESP,
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8, 9, 10, 11, 12, 13, 14, 15
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};
|
2008-05-09 16:40:22 +02:00
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#else
|
2008-10-11 19:55:29 +02:00
|
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|
static const int gpr_map[8] = {0, 1, 2, 3, 4, 5, 6, 7};
|
2008-05-09 16:40:22 +02:00
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#endif
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|
2008-10-11 19:55:29 +02:00
|
|
|
#define NUM_CORE_REGS (CPU_NB_REGS * 2 + 25)
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|
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|
static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
|
2008-05-09 16:40:22 +02:00
|
|
|
{
|
2008-10-11 19:55:29 +02:00
|
|
|
if (n < CPU_NB_REGS) {
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|
|
GET_REGL(env->regs[gpr_map[n]]);
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|
|
} else if (n >= CPU_NB_REGS + 8 && n < CPU_NB_REGS + 16) {
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|
|
|
/* FIXME: byteswap float values. */
|
|
|
|
#ifdef USE_X86LDOUBLE
|
|
|
|
memcpy(mem_buf, &env->fpregs[n - (CPU_NB_REGS + 8)], 10);
|
2008-05-09 16:40:22 +02:00
|
|
|
#else
|
2008-10-11 19:55:29 +02:00
|
|
|
memset(mem_buf, 0, 10);
|
2008-05-09 16:40:22 +02:00
|
|
|
#endif
|
2008-10-11 19:55:29 +02:00
|
|
|
return 10;
|
|
|
|
} else if (n >= CPU_NB_REGS + 24) {
|
|
|
|
n -= CPU_NB_REGS + 24;
|
|
|
|
if (n < CPU_NB_REGS) {
|
|
|
|
stq_p(mem_buf, env->xmm_regs[n].XMM_Q(0));
|
|
|
|
stq_p(mem_buf + 8, env->xmm_regs[n].XMM_Q(1));
|
|
|
|
return 16;
|
|
|
|
} else if (n == CPU_NB_REGS) {
|
|
|
|
GET_REG32(env->mxcsr);
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
n -= CPU_NB_REGS;
|
|
|
|
switch (n) {
|
|
|
|
case 0: GET_REGL(env->eip);
|
|
|
|
case 1: GET_REG32(env->eflags);
|
|
|
|
case 2: GET_REG32(env->segs[R_CS].selector);
|
|
|
|
case 3: GET_REG32(env->segs[R_SS].selector);
|
|
|
|
case 4: GET_REG32(env->segs[R_DS].selector);
|
|
|
|
case 5: GET_REG32(env->segs[R_ES].selector);
|
|
|
|
case 6: GET_REG32(env->segs[R_FS].selector);
|
|
|
|
case 7: GET_REG32(env->segs[R_GS].selector);
|
|
|
|
/* 8...15 x87 regs. */
|
|
|
|
case 16: GET_REG32(env->fpuc);
|
|
|
|
case 17: GET_REG32((env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11);
|
|
|
|
case 18: GET_REG32(0); /* ftag */
|
|
|
|
case 19: GET_REG32(0); /* fiseg */
|
|
|
|
case 20: GET_REG32(0); /* fioff */
|
|
|
|
case 21: GET_REG32(0); /* foseg */
|
|
|
|
case 22: GET_REG32(0); /* fooff */
|
|
|
|
case 23: GET_REG32(0); /* fop */
|
|
|
|
/* 24+ xmm regs. */
|
|
|
|
}
|
2008-05-09 16:40:22 +02:00
|
|
|
}
|
2008-10-11 19:55:29 +02:00
|
|
|
return 0;
|
2004-01-04 16:48:38 +01:00
|
|
|
}
|
|
|
|
|
2008-10-11 19:55:29 +02:00
|
|
|
static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int i)
|
2004-01-04 16:48:38 +01:00
|
|
|
{
|
2008-10-11 19:55:29 +02:00
|
|
|
uint32_t tmp;
|
2004-01-04 16:48:38 +01:00
|
|
|
|
2008-10-11 19:55:29 +02:00
|
|
|
if (i < CPU_NB_REGS) {
|
|
|
|
env->regs[gpr_map[i]] = ldtul_p(mem_buf);
|
|
|
|
return sizeof(target_ulong);
|
|
|
|
} else if (i >= CPU_NB_REGS + 8 && i < CPU_NB_REGS + 16) {
|
|
|
|
i -= CPU_NB_REGS + 8;
|
|
|
|
#ifdef USE_X86LDOUBLE
|
|
|
|
memcpy(&env->fpregs[i], mem_buf, 10);
|
2008-05-09 16:40:22 +02:00
|
|
|
#endif
|
2008-10-11 19:55:29 +02:00
|
|
|
return 10;
|
|
|
|
} else if (i >= CPU_NB_REGS + 24) {
|
|
|
|
i -= CPU_NB_REGS + 24;
|
|
|
|
if (i < CPU_NB_REGS) {
|
|
|
|
env->xmm_regs[i].XMM_Q(0) = ldq_p(mem_buf);
|
|
|
|
env->xmm_regs[i].XMM_Q(1) = ldq_p(mem_buf + 8);
|
|
|
|
return 16;
|
|
|
|
} else if (i == CPU_NB_REGS) {
|
|
|
|
env->mxcsr = ldl_p(mem_buf);
|
|
|
|
return 4;
|
2008-05-09 16:40:22 +02:00
|
|
|
}
|
2008-10-11 19:55:29 +02:00
|
|
|
} else {
|
|
|
|
i -= CPU_NB_REGS;
|
|
|
|
switch (i) {
|
|
|
|
case 0: env->eip = ldtul_p(mem_buf); return sizeof(target_ulong);
|
|
|
|
case 1: env->eflags = ldl_p(mem_buf); return 4;
|
|
|
|
#if defined(CONFIG_USER_ONLY)
|
|
|
|
#define LOAD_SEG(index, sreg)\
|
|
|
|
tmp = ldl_p(mem_buf);\
|
|
|
|
if (tmp != env->segs[sreg].selector)\
|
|
|
|
cpu_x86_load_seg(env, sreg, tmp);
|
|
|
|
#else
|
|
|
|
/* FIXME: Honor segment registers. Needs to avoid raising an exception
|
|
|
|
when the selector is invalid. */
|
|
|
|
#define LOAD_SEG(index, sreg) do {} while(0)
|
2004-01-04 16:48:38 +01:00
|
|
|
#endif
|
2008-10-11 19:55:29 +02:00
|
|
|
case 2: LOAD_SEG(10, R_CS); return 4;
|
|
|
|
case 3: LOAD_SEG(11, R_SS); return 4;
|
|
|
|
case 4: LOAD_SEG(12, R_DS); return 4;
|
|
|
|
case 5: LOAD_SEG(13, R_ES); return 4;
|
|
|
|
case 6: LOAD_SEG(14, R_FS); return 4;
|
|
|
|
case 7: LOAD_SEG(15, R_GS); return 4;
|
|
|
|
/* 8...15 x87 regs. */
|
|
|
|
case 16: env->fpuc = ldl_p(mem_buf); return 4;
|
|
|
|
case 17:
|
|
|
|
tmp = ldl_p(mem_buf);
|
|
|
|
env->fpstt = (tmp >> 11) & 7;
|
|
|
|
env->fpus = tmp & ~0x3800;
|
|
|
|
return 4;
|
|
|
|
case 18: /* ftag */ return 4;
|
|
|
|
case 19: /* fiseg */ return 4;
|
|
|
|
case 20: /* fioff */ return 4;
|
|
|
|
case 21: /* foseg */ return 4;
|
|
|
|
case 22: /* fooff */ return 4;
|
|
|
|
case 23: /* fop */ return 4;
|
|
|
|
/* 24+ xmm regs. */
|
2008-05-09 16:40:22 +02:00
|
|
|
}
|
|
|
|
}
|
2008-10-11 19:55:29 +02:00
|
|
|
/* Unrecognised register. */
|
|
|
|
return 0;
|
2004-01-04 16:48:38 +01:00
|
|
|
}
|
|
|
|
|
2004-01-05 23:49:06 +01:00
|
|
|
#elif defined (TARGET_PPC)
|
|
|
|
|
2008-10-11 19:55:29 +02:00
|
|
|
#define NUM_CORE_REGS 71
|
2004-01-05 23:49:06 +01:00
|
|
|
|
2008-10-11 19:55:29 +02:00
|
|
|
static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
|
2004-01-05 23:49:06 +01:00
|
|
|
{
|
2008-10-11 19:55:29 +02:00
|
|
|
if (n < 32) {
|
|
|
|
/* gprs */
|
|
|
|
GET_REGL(env->gpr[n]);
|
|
|
|
} else if (n < 64) {
|
|
|
|
/* fprs */
|
|
|
|
stfq_p(mem_buf, env->fpr[n]);
|
|
|
|
return 8;
|
|
|
|
} else {
|
|
|
|
switch (n) {
|
|
|
|
case 64: GET_REGL(env->nip);
|
|
|
|
case 65: GET_REGL(env->msr);
|
|
|
|
case 66:
|
|
|
|
{
|
|
|
|
uint32_t cr = 0;
|
|
|
|
int i;
|
|
|
|
for (i = 0; i < 8; i++)
|
|
|
|
cr |= env->crf[i] << (32 - ((i + 1) * 4));
|
|
|
|
GET_REG32(cr);
|
|
|
|
}
|
|
|
|
case 67: GET_REGL(env->lr);
|
|
|
|
case 68: GET_REGL(env->ctr);
|
|
|
|
case 69: GET_REG32(ppc_load_xer(env));
|
|
|
|
case 70: GET_REG32(0); /* fpscr */
|
|
|
|
}
|
|
|
|
}
|
|
|
|
return 0;
|
|
|
|
}
|
2004-01-05 23:49:06 +01:00
|
|
|
|
2008-10-11 19:55:29 +02:00
|
|
|
static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
|
|
|
|
{
|
|
|
|
if (n < 32) {
|
|
|
|
/* gprs */
|
|
|
|
env->gpr[n] = ldtul_p(mem_buf);
|
|
|
|
return sizeof(target_ulong);
|
|
|
|
} else if (n < 64) {
|
|
|
|
/* fprs */
|
|
|
|
env->fpr[n] = ldfq_p(mem_buf);
|
|
|
|
return 8;
|
|
|
|
} else {
|
|
|
|
switch (n) {
|
|
|
|
case 64:
|
|
|
|
env->nip = ldtul_p(mem_buf);
|
|
|
|
return sizeof(target_ulong);
|
|
|
|
case 65:
|
|
|
|
ppc_store_msr(env, ldtul_p(mem_buf));
|
|
|
|
return sizeof(target_ulong);
|
|
|
|
case 66:
|
|
|
|
{
|
|
|
|
uint32_t cr = ldl_p(mem_buf);
|
|
|
|
int i;
|
|
|
|
for (i = 0; i < 8; i++)
|
|
|
|
env->crf[i] = (cr >> (32 - ((i + 1) * 4))) & 0xF;
|
|
|
|
return 4;
|
|
|
|
}
|
|
|
|
case 67:
|
|
|
|
env->lr = ldtul_p(mem_buf);
|
|
|
|
return sizeof(target_ulong);
|
|
|
|
case 68:
|
|
|
|
env->ctr = ldtul_p(mem_buf);
|
|
|
|
return sizeof(target_ulong);
|
|
|
|
case 69:
|
|
|
|
ppc_store_xer(env, ldl_p(mem_buf));
|
|
|
|
return 4;
|
|
|
|
case 70:
|
|
|
|
/* fpscr */
|
|
|
|
return 4;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
return 0;
|
2004-10-01 00:22:08 +02:00
|
|
|
}
|
2008-10-11 19:55:29 +02:00
|
|
|
|
2004-10-01 00:22:08 +02:00
|
|
|
#elif defined (TARGET_SPARC)
|
2008-10-11 19:55:29 +02:00
|
|
|
|
|
|
|
#if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
|
|
|
|
#define NUM_CORE_REGS 86
|
2008-06-07 10:03:05 +02:00
|
|
|
#else
|
2008-10-11 19:55:29 +02:00
|
|
|
#define NUM_CORE_REGS 73
|
2008-06-07 10:03:05 +02:00
|
|
|
#endif
|
2008-10-11 19:55:29 +02:00
|
|
|
|
2008-06-07 10:03:05 +02:00
|
|
|
#ifdef TARGET_ABI32
|
2008-10-11 19:55:29 +02:00
|
|
|
#define GET_REGA(val) GET_REG32(val)
|
2008-06-07 10:03:05 +02:00
|
|
|
#else
|
2008-10-11 19:55:29 +02:00
|
|
|
#define GET_REGA(val) GET_REGL(val)
|
2008-06-07 10:03:05 +02:00
|
|
|
#endif
|
2004-10-01 00:22:08 +02:00
|
|
|
|
2008-10-11 19:55:29 +02:00
|
|
|
static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
|
|
|
|
{
|
|
|
|
if (n < 8) {
|
|
|
|
/* g0..g7 */
|
|
|
|
GET_REGA(env->gregs[n]);
|
2004-10-01 00:22:08 +02:00
|
|
|
}
|
2008-10-11 19:55:29 +02:00
|
|
|
if (n < 32) {
|
|
|
|
/* register window */
|
|
|
|
GET_REGA(env->regwptr[n - 8]);
|
2004-10-01 00:22:08 +02:00
|
|
|
}
|
2008-10-11 19:55:29 +02:00
|
|
|
#if defined(TARGET_ABI32) || !defined(TARGET_SPARC64)
|
|
|
|
if (n < 64) {
|
|
|
|
/* fprs */
|
|
|
|
GET_REG32(*((uint32_t *)&env->fpr[n - 32]));
|
2004-10-01 00:22:08 +02:00
|
|
|
}
|
|
|
|
/* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
|
2008-10-11 19:55:29 +02:00
|
|
|
switch (n) {
|
|
|
|
case 64: GET_REGA(env->y);
|
|
|
|
case 65: GET_REGA(GET_PSR(env));
|
|
|
|
case 66: GET_REGA(env->wim);
|
|
|
|
case 67: GET_REGA(env->tbr);
|
|
|
|
case 68: GET_REGA(env->pc);
|
|
|
|
case 69: GET_REGA(env->npc);
|
|
|
|
case 70: GET_REGA(env->fsr);
|
|
|
|
case 71: GET_REGA(0); /* csr */
|
|
|
|
case 72: GET_REGA(0);
|
|
|
|
}
|
2005-07-02 16:31:34 +02:00
|
|
|
#else
|
2008-10-11 19:55:29 +02:00
|
|
|
if (n < 64) {
|
|
|
|
/* f0-f31 */
|
|
|
|
GET_REG32(*((uint32_t *)&env->fpr[n - 32]));
|
|
|
|
}
|
|
|
|
if (n < 80) {
|
|
|
|
/* f32-f62 (double width, even numbers only) */
|
|
|
|
uint64_t val;
|
2006-06-25 17:32:37 +02:00
|
|
|
|
2008-10-11 19:55:29 +02:00
|
|
|
val = (uint64_t)*((uint32_t *)&env->fpr[(n - 64) * 2 + 32]) << 32;
|
|
|
|
val |= *((uint32_t *)&env->fpr[(n - 64) * 2 + 33]);
|
|
|
|
GET_REG64(val);
|
2005-07-02 16:31:34 +02:00
|
|
|
}
|
2008-10-11 19:55:29 +02:00
|
|
|
switch (n) {
|
|
|
|
case 80: GET_REGL(env->pc);
|
|
|
|
case 81: GET_REGL(env->npc);
|
|
|
|
case 82: GET_REGL(((uint64_t)GET_CCR(env) << 32) |
|
2007-07-07 22:53:22 +02:00
|
|
|
((env->asi & 0xff) << 24) |
|
|
|
|
((env->pstate & 0xfff) << 8) |
|
|
|
|
GET_CWP64(env));
|
2008-10-11 19:55:29 +02:00
|
|
|
case 83: GET_REGL(env->fsr);
|
|
|
|
case 84: GET_REGL(env->fprs);
|
|
|
|
case 85: GET_REGL(env->y);
|
|
|
|
}
|
2005-07-02 16:31:34 +02:00
|
|
|
#endif
|
2008-10-11 19:55:29 +02:00
|
|
|
return 0;
|
2004-10-01 00:22:08 +02:00
|
|
|
}
|
|
|
|
|
2008-10-11 19:55:29 +02:00
|
|
|
static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
|
2004-10-01 00:22:08 +02:00
|
|
|
{
|
2008-10-11 19:55:29 +02:00
|
|
|
#if defined(TARGET_ABI32)
|
|
|
|
abi_ulong tmp;
|
|
|
|
|
|
|
|
tmp = ldl_p(mem_buf);
|
2008-06-07 10:03:05 +02:00
|
|
|
#else
|
2008-10-11 19:55:29 +02:00
|
|
|
target_ulong tmp;
|
|
|
|
|
|
|
|
tmp = ldtul_p(mem_buf);
|
2008-06-07 10:03:05 +02:00
|
|
|
#endif
|
2004-10-01 00:22:08 +02:00
|
|
|
|
2008-10-11 19:55:29 +02:00
|
|
|
if (n < 8) {
|
|
|
|
/* g0..g7 */
|
|
|
|
env->gregs[n] = tmp;
|
|
|
|
} else if (n < 32) {
|
|
|
|
/* register window */
|
|
|
|
env->regwptr[n - 8] = tmp;
|
2004-10-01 00:22:08 +02:00
|
|
|
}
|
2008-10-11 19:55:29 +02:00
|
|
|
#if defined(TARGET_ABI32) || !defined(TARGET_SPARC64)
|
|
|
|
else if (n < 64) {
|
|
|
|
/* fprs */
|
|
|
|
*((uint32_t *)&env->fpr[n - 32]) = tmp;
|
|
|
|
} else {
|
|
|
|
/* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
|
|
|
|
switch (n) {
|
|
|
|
case 64: env->y = tmp; break;
|
|
|
|
case 65: PUT_PSR(env, tmp); break;
|
|
|
|
case 66: env->wim = tmp; break;
|
|
|
|
case 67: env->tbr = tmp; break;
|
|
|
|
case 68: env->pc = tmp; break;
|
|
|
|
case 69: env->npc = tmp; break;
|
|
|
|
case 70: env->fsr = tmp; break;
|
|
|
|
default: return 0;
|
|
|
|
}
|
2004-10-01 00:22:08 +02:00
|
|
|
}
|
2008-10-11 19:55:29 +02:00
|
|
|
return 4;
|
2005-07-02 16:31:34 +02:00
|
|
|
#else
|
2008-10-11 19:55:29 +02:00
|
|
|
else if (n < 64) {
|
|
|
|
/* f0-f31 */
|
|
|
|
uint32_t fpr;
|
|
|
|
|
|
|
|
env->fpr[n] = ldfl_p(mem_buf);
|
|
|
|
return 4;
|
|
|
|
} else if (n < 80) {
|
|
|
|
/* f32-f62 (double width, even numbers only) */
|
|
|
|
*((uint32_t *)&env->fpr[(n - 64) * 2 + 32]) = tmp >> 32;
|
|
|
|
*((uint32_t *)&env->fpr[(n - 64) * 2 + 33]) = tmp;
|
|
|
|
} else {
|
|
|
|
switch (n) {
|
|
|
|
case 80: env->pc = tmp; break;
|
|
|
|
case 81: env->npc = tmp; break;
|
|
|
|
case 82:
|
|
|
|
PUT_CCR(env, tmp >> 32);
|
|
|
|
env->asi = (tmp >> 24) & 0xff;
|
|
|
|
env->pstate = (tmp >> 8) & 0xfff;
|
|
|
|
PUT_CWP64(env, tmp & 0xff);
|
|
|
|
break;
|
|
|
|
case 83: env->fsr = tmp; break;
|
|
|
|
case 84: env->fprs = tmp; break;
|
|
|
|
case 85: env->y = tmp; break;
|
|
|
|
default: return 0;
|
|
|
|
}
|
2007-07-07 22:53:22 +02:00
|
|
|
}
|
2008-10-11 19:55:29 +02:00
|
|
|
return 8;
|
2005-07-02 16:31:34 +02:00
|
|
|
#endif
|
2004-01-05 23:49:06 +01:00
|
|
|
}
|
2005-04-17 21:16:13 +02:00
|
|
|
#elif defined (TARGET_ARM)
|
2004-01-04 16:48:38 +01:00
|
|
|
|
2008-10-11 19:55:29 +02:00
|
|
|
/* Old gdb always expect FPA registers. Newer (xml-aware) gdb only expect
|
|
|
|
whatever the target description contains. Due to a historical mishap
|
|
|
|
the FPA registers appear in between core integer regs and the CPSR.
|
|
|
|
We hack round this by giving the FPA regs zero size when talking to a
|
|
|
|
newer gdb. */
|
|
|
|
#define NUM_CORE_REGS 26
|
|
|
|
#define GDB_CORE_XML "arm-core.xml"
|
2006-10-22 02:18:54 +02:00
|
|
|
|
2008-10-11 19:55:29 +02:00
|
|
|
static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
|
2006-10-22 02:18:54 +02:00
|
|
|
{
|
2008-10-11 19:55:29 +02:00
|
|
|
if (n < 16) {
|
|
|
|
/* Core integer register. */
|
|
|
|
GET_REG32(env->regs[n]);
|
|
|
|
}
|
|
|
|
if (n < 24) {
|
|
|
|
/* FPA registers. */
|
|
|
|
if (gdb_has_xml)
|
|
|
|
return 0;
|
|
|
|
memset(mem_buf, 0, 12);
|
|
|
|
return 12;
|
|
|
|
}
|
|
|
|
switch (n) {
|
|
|
|
case 24:
|
|
|
|
/* FPA status register. */
|
|
|
|
if (gdb_has_xml)
|
|
|
|
return 0;
|
|
|
|
GET_REG32(0);
|
|
|
|
case 25:
|
|
|
|
/* CPSR */
|
|
|
|
GET_REG32(cpsr_read(env));
|
|
|
|
}
|
|
|
|
/* Unknown register. */
|
|
|
|
return 0;
|
2006-10-22 02:18:54 +02:00
|
|
|
}
|
2005-12-05 20:55:19 +01:00
|
|
|
|
2008-10-11 19:55:29 +02:00
|
|
|
static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
|
|
|
|
{
|
|
|
|
uint32_t tmp;
|
2005-12-05 20:55:19 +01:00
|
|
|
|
2008-10-11 19:55:29 +02:00
|
|
|
tmp = ldl_p(mem_buf);
|
2005-12-05 20:55:19 +01:00
|
|
|
|
2008-10-11 19:55:29 +02:00
|
|
|
/* Mask out low bit of PC to workaround gdb bugs. This will probably
|
|
|
|
cause problems if we ever implement the Jazelle DBX extensions. */
|
|
|
|
if (n == 15)
|
|
|
|
tmp &= ~1;
|
2005-12-05 20:55:19 +01:00
|
|
|
|
2008-10-11 19:55:29 +02:00
|
|
|
if (n < 16) {
|
|
|
|
/* Core integer register. */
|
|
|
|
env->regs[n] = tmp;
|
|
|
|
return 4;
|
|
|
|
}
|
|
|
|
if (n < 24) { /* 16-23 */
|
|
|
|
/* FPA registers (ignored). */
|
|
|
|
if (gdb_has_xml)
|
|
|
|
return 0;
|
|
|
|
return 12;
|
|
|
|
}
|
|
|
|
switch (n) {
|
|
|
|
case 24:
|
|
|
|
/* FPA status register (ignored). */
|
|
|
|
if (gdb_has_xml)
|
|
|
|
return 0;
|
|
|
|
return 4;
|
|
|
|
case 25:
|
|
|
|
/* CPSR */
|
|
|
|
cpsr_write (env, tmp, 0xffffffff);
|
|
|
|
return 4;
|
|
|
|
}
|
|
|
|
/* Unknown register. */
|
|
|
|
return 0;
|
|
|
|
}
|
2005-12-05 20:55:19 +01:00
|
|
|
|
2008-10-11 19:55:29 +02:00
|
|
|
#elif defined (TARGET_M68K)
|
2005-12-05 20:55:19 +01:00
|
|
|
|
2008-10-11 19:55:29 +02:00
|
|
|
#define NUM_CORE_REGS 18
|
2005-12-05 20:55:19 +01:00
|
|
|
|
2008-10-11 19:55:29 +02:00
|
|
|
#define GDB_CORE_XML "cf-core.xml"
|
2005-12-05 20:55:19 +01:00
|
|
|
|
2008-10-11 19:55:29 +02:00
|
|
|
static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
|
|
|
|
{
|
|
|
|
if (n < 8) {
|
|
|
|
/* D0-D7 */
|
|
|
|
GET_REG32(env->dregs[n]);
|
|
|
|
} else if (n < 16) {
|
|
|
|
/* A0-A7 */
|
|
|
|
GET_REG32(env->aregs[n - 8]);
|
|
|
|
} else {
|
|
|
|
switch (n) {
|
|
|
|
case 16: GET_REG32(env->sr);
|
|
|
|
case 17: GET_REG32(env->pc);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
/* FP registers not included here because they vary between
|
|
|
|
ColdFire and m68k. Use XML bits for these. */
|
|
|
|
return 0;
|
|
|
|
}
|
2006-12-11 20:22:27 +01:00
|
|
|
|
2008-10-11 19:55:29 +02:00
|
|
|
static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
|
|
|
|
{
|
|
|
|
uint32_t tmp;
|
2006-12-11 20:22:27 +01:00
|
|
|
|
2008-10-11 19:55:29 +02:00
|
|
|
tmp = ldl_p(mem_buf);
|
2006-12-11 20:22:27 +01:00
|
|
|
|
2008-10-11 19:55:29 +02:00
|
|
|
if (n < 8) {
|
|
|
|
/* D0-D7 */
|
|
|
|
env->dregs[n] = tmp;
|
|
|
|
} else if (n < 8) {
|
|
|
|
/* A0-A7 */
|
|
|
|
env->aregs[n - 8] = tmp;
|
|
|
|
} else {
|
|
|
|
switch (n) {
|
|
|
|
case 16: env->sr = tmp; break;
|
|
|
|
case 17: env->pc = tmp; break;
|
|
|
|
default: return 0;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
return 4;
|
|
|
|
}
|
|
|
|
#elif defined (TARGET_MIPS)
|
2007-10-25 23:30:37 +02:00
|
|
|
|
2008-10-11 19:55:29 +02:00
|
|
|
#define NUM_CORE_REGS 73
|
2007-10-25 23:30:37 +02:00
|
|
|
|
2008-10-11 19:55:29 +02:00
|
|
|
static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
|
|
|
|
{
|
|
|
|
if (n < 32) {
|
|
|
|
GET_REGL(env->active_tc.gpr[n]);
|
|
|
|
}
|
|
|
|
if (env->CP0_Config1 & (1 << CP0C1_FP)) {
|
|
|
|
if (n >= 38 && n < 70) {
|
|
|
|
if (env->CP0_Status & (1 << CP0St_FR))
|
|
|
|
GET_REGL(env->active_fpu.fpr[n - 38].d);
|
|
|
|
else
|
|
|
|
GET_REGL(env->active_fpu.fpr[n - 38].w[FP_ENDIAN_IDX]);
|
|
|
|
}
|
|
|
|
switch (n) {
|
|
|
|
case 70: GET_REGL((int32_t)env->active_fpu.fcr31);
|
|
|
|
case 71: GET_REGL((int32_t)env->active_fpu.fcr0);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
switch (n) {
|
|
|
|
case 32: GET_REGL((int32_t)env->CP0_Status);
|
|
|
|
case 33: GET_REGL(env->active_tc.LO[0]);
|
|
|
|
case 34: GET_REGL(env->active_tc.HI[0]);
|
|
|
|
case 35: GET_REGL(env->CP0_BadVAddr);
|
|
|
|
case 36: GET_REGL((int32_t)env->CP0_Cause);
|
|
|
|
case 37: GET_REGL(env->active_tc.PC);
|
|
|
|
case 72: GET_REGL(0); /* fp */
|
|
|
|
case 89: GET_REGL((int32_t)env->CP0_PRid);
|
|
|
|
}
|
|
|
|
if (n >= 73 && n <= 88) {
|
|
|
|
/* 16 embedded regs. */
|
|
|
|
GET_REGL(0);
|
|
|
|
}
|
2005-12-05 20:55:19 +01:00
|
|
|
|
2008-10-11 19:55:29 +02:00
|
|
|
return 0;
|
2005-12-05 20:55:19 +01:00
|
|
|
}
|
|
|
|
|
2006-12-11 20:22:27 +01:00
|
|
|
/* convert MIPS rounding mode in FCR31 to IEEE library */
|
|
|
|
static unsigned int ieee_rm[] =
|
|
|
|
{
|
|
|
|
float_round_nearest_even,
|
|
|
|
float_round_to_zero,
|
|
|
|
float_round_up,
|
|
|
|
float_round_down
|
|
|
|
};
|
|
|
|
#define RESTORE_ROUNDING_MODE \
|
2008-09-18 13:57:27 +02:00
|
|
|
set_float_rounding_mode(ieee_rm[env->active_fpu.fcr31 & 3], &env->active_fpu.fp_status)
|
2006-12-11 20:22:27 +01:00
|
|
|
|
2008-10-11 19:55:29 +02:00
|
|
|
static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
|
2005-12-05 20:55:19 +01:00
|
|
|
{
|
2008-10-11 19:55:29 +02:00
|
|
|
target_ulong tmp;
|
2005-12-05 20:55:19 +01:00
|
|
|
|
2008-10-11 19:55:29 +02:00
|
|
|
tmp = ldtul_p(mem_buf);
|
2005-12-05 20:55:19 +01:00
|
|
|
|
2008-10-11 19:55:29 +02:00
|
|
|
if (n < 32) {
|
|
|
|
env->active_tc.gpr[n] = tmp;
|
|
|
|
return sizeof(target_ulong);
|
|
|
|
}
|
|
|
|
if (env->CP0_Config1 & (1 << CP0C1_FP)
|
|
|
|
&& n >= 38 && n < 73) {
|
|
|
|
if (n < 70) {
|
2007-10-25 23:30:37 +02:00
|
|
|
if (env->CP0_Status & (1 << CP0St_FR))
|
2008-10-11 19:55:29 +02:00
|
|
|
env->active_fpu.fpr[n - 38].d = tmp;
|
2007-10-25 23:30:37 +02:00
|
|
|
else
|
2008-10-11 19:55:29 +02:00
|
|
|
env->active_fpu.fpr[n - 38].w[FP_ENDIAN_IDX] = tmp;
|
|
|
|
}
|
|
|
|
switch (n) {
|
|
|
|
case 70:
|
|
|
|
env->active_fpu.fcr31 = tmp & 0xFF83FFFF;
|
|
|
|
/* set rounding mode */
|
|
|
|
RESTORE_ROUNDING_MODE;
|
2006-12-11 20:22:27 +01:00
|
|
|
#ifndef CONFIG_SOFTFLOAT
|
2008-10-11 19:55:29 +02:00
|
|
|
/* no floating point exception for native float */
|
|
|
|
SET_FP_ENABLE(env->active_fpu.fcr31, 0);
|
2006-12-11 20:22:27 +01:00
|
|
|
#endif
|
2008-10-11 19:55:29 +02:00
|
|
|
break;
|
|
|
|
case 71: env->active_fpu.fcr0 = tmp; break;
|
|
|
|
}
|
|
|
|
return sizeof(target_ulong);
|
|
|
|
}
|
|
|
|
switch (n) {
|
|
|
|
case 32: env->CP0_Status = tmp; break;
|
|
|
|
case 33: env->active_tc.LO[0] = tmp; break;
|
|
|
|
case 34: env->active_tc.HI[0] = tmp; break;
|
|
|
|
case 35: env->CP0_BadVAddr = tmp; break;
|
|
|
|
case 36: env->CP0_Cause = tmp; break;
|
|
|
|
case 37: env->active_tc.PC = tmp; break;
|
|
|
|
case 72: /* fp, ignored */ break;
|
|
|
|
default:
|
|
|
|
if (n > 89)
|
|
|
|
return 0;
|
|
|
|
/* Other registers are readonly. Ignore writes. */
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
return sizeof(target_ulong);
|
2005-12-05 20:55:19 +01:00
|
|
|
}
|
2006-04-27 23:07:38 +02:00
|
|
|
#elif defined (TARGET_SH4)
|
2007-05-13 18:36:24 +02:00
|
|
|
|
|
|
|
/* Hint: Use "set architecture sh4" in GDB to see fpu registers */
|
2008-10-11 19:55:29 +02:00
|
|
|
/* FIXME: We should use XML for this. */
|
|
|
|
|
|
|
|
#define NUM_CORE_REGS 59
|
2007-05-13 18:36:24 +02:00
|
|
|
|
2008-10-11 19:55:29 +02:00
|
|
|
static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
|
2006-04-27 23:07:38 +02:00
|
|
|
{
|
2008-10-11 19:55:29 +02:00
|
|
|
if (n < 8) {
|
|
|
|
if ((env->sr & (SR_MD | SR_RB)) == (SR_MD | SR_RB)) {
|
|
|
|
GET_REGL(env->gregs[n + 16]);
|
|
|
|
} else {
|
|
|
|
GET_REGL(env->gregs[n]);
|
|
|
|
}
|
|
|
|
} else if (n < 16) {
|
|
|
|
GET_REGL(env->gregs[n - 8]);
|
|
|
|
} else if (n >= 25 && n < 41) {
|
|
|
|
GET_REGL(env->fregs[(n - 25) + ((env->fpscr & FPSCR_FR) ? 16 : 0)]);
|
|
|
|
} else if (n >= 43 && n < 51) {
|
|
|
|
GET_REGL(env->gregs[n - 43]);
|
|
|
|
} else if (n >= 51 && n < 59) {
|
|
|
|
GET_REGL(env->gregs[n - (51 - 16)]);
|
|
|
|
}
|
|
|
|
switch (n) {
|
|
|
|
case 16: GET_REGL(env->pc);
|
|
|
|
case 17: GET_REGL(env->pr);
|
|
|
|
case 18: GET_REGL(env->gbr);
|
|
|
|
case 19: GET_REGL(env->vbr);
|
|
|
|
case 20: GET_REGL(env->mach);
|
|
|
|
case 21: GET_REGL(env->macl);
|
|
|
|
case 22: GET_REGL(env->sr);
|
|
|
|
case 23: GET_REGL(env->fpul);
|
|
|
|
case 24: GET_REGL(env->fpscr);
|
|
|
|
case 41: GET_REGL(env->ssr);
|
|
|
|
case 42: GET_REGL(env->spc);
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
2006-04-27 23:07:38 +02:00
|
|
|
}
|
|
|
|
|
2008-10-11 19:55:29 +02:00
|
|
|
static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
|
2006-04-27 23:07:38 +02:00
|
|
|
{
|
2008-10-11 19:55:29 +02:00
|
|
|
uint32_t tmp;
|
|
|
|
|
|
|
|
tmp = ldl_p(mem_buf);
|
|
|
|
|
|
|
|
if (n < 8) {
|
|
|
|
if ((env->sr & (SR_MD | SR_RB)) == (SR_MD | SR_RB)) {
|
|
|
|
env->gregs[n + 16] = tmp;
|
|
|
|
} else {
|
|
|
|
env->gregs[n] = tmp;
|
|
|
|
}
|
|
|
|
return 4;
|
|
|
|
} else if (n < 16) {
|
|
|
|
env->gregs[n - 8] = tmp;
|
|
|
|
return 4;
|
|
|
|
} else if (n >= 25 && n < 41) {
|
|
|
|
env->fregs[(n - 25) + ((env->fpscr & FPSCR_FR) ? 16 : 0)] = tmp;
|
|
|
|
} else if (n >= 43 && n < 51) {
|
|
|
|
env->gregs[n - 43] = tmp;
|
|
|
|
return 4;
|
|
|
|
} else if (n >= 51 && n < 59) {
|
|
|
|
env->gregs[n - (51 - 16)] = tmp;
|
|
|
|
return 4;
|
|
|
|
}
|
|
|
|
switch (n) {
|
|
|
|
case 16: env->pc = tmp;
|
|
|
|
case 17: env->pr = tmp;
|
|
|
|
case 18: env->gbr = tmp;
|
|
|
|
case 19: env->vbr = tmp;
|
|
|
|
case 20: env->mach = tmp;
|
|
|
|
case 21: env->macl = tmp;
|
|
|
|
case 22: env->sr = tmp;
|
|
|
|
case 23: env->fpul = tmp;
|
|
|
|
case 24: env->fpscr = tmp;
|
|
|
|
case 41: env->ssr = tmp;
|
|
|
|
case 42: env->spc = tmp;
|
|
|
|
default: return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 4;
|
2006-04-27 23:07:38 +02:00
|
|
|
}
|
2007-10-08 15:16:14 +02:00
|
|
|
#elif defined (TARGET_CRIS)
|
|
|
|
|
2008-10-11 19:55:29 +02:00
|
|
|
#define NUM_CORE_REGS 49
|
|
|
|
|
|
|
|
static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
|
2007-10-08 15:16:14 +02:00
|
|
|
{
|
2008-10-11 19:55:29 +02:00
|
|
|
uint8_t srs;
|
|
|
|
|
|
|
|
srs = env->pregs[PR_SRS];
|
|
|
|
if (n < 16) {
|
|
|
|
GET_REG32(env->regs[n]);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (n >= 21 && n < 32) {
|
|
|
|
GET_REG32(env->pregs[n - 16]);
|
|
|
|
}
|
|
|
|
if (n >= 33 && n < 49) {
|
|
|
|
GET_REG32(env->sregs[srs][n - 33]);
|
|
|
|
}
|
|
|
|
switch (n) {
|
|
|
|
case 16: GET_REG8(env->pregs[0]);
|
|
|
|
case 17: GET_REG8(env->pregs[1]);
|
|
|
|
case 18: GET_REG32(env->pregs[2]);
|
|
|
|
case 19: GET_REG8(srs);
|
|
|
|
case 20: GET_REG16(env->pregs[4]);
|
|
|
|
case 32: GET_REG32(env->pc);
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
2007-10-08 15:16:14 +02:00
|
|
|
}
|
2008-10-11 19:55:29 +02:00
|
|
|
|
|
|
|
static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
|
2007-10-08 15:16:14 +02:00
|
|
|
{
|
2008-10-11 19:55:29 +02:00
|
|
|
uint32_t tmp;
|
|
|
|
|
|
|
|
if (n > 49)
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
tmp = ldl_p(mem_buf);
|
|
|
|
|
|
|
|
if (n < 16) {
|
|
|
|
env->regs[n] = tmp;
|
|
|
|
}
|
|
|
|
|
2008-10-11 21:32:21 +02:00
|
|
|
if (n >= 21 && n < 32) {
|
|
|
|
env->pregs[n - 16] = tmp;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* FIXME: Should support function regs be writable? */
|
2008-10-11 19:55:29 +02:00
|
|
|
switch (n) {
|
|
|
|
case 16: return 1;
|
|
|
|
case 17: return 1;
|
2008-10-11 21:32:21 +02:00
|
|
|
case 18: env->pregs[PR_PID] = tmp; break;
|
2008-10-11 19:55:29 +02:00
|
|
|
case 19: return 1;
|
|
|
|
case 20: return 2;
|
|
|
|
case 32: env->pc = tmp; break;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 4;
|
2007-10-08 15:16:14 +02:00
|
|
|
}
|
2008-10-11 19:55:29 +02:00
|
|
|
#else
|
|
|
|
|
|
|
|
#define NUM_CORE_REGS 0
|
|
|
|
|
|
|
|
static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
|
2007-10-08 15:16:14 +02:00
|
|
|
{
|
2008-10-11 19:55:29 +02:00
|
|
|
return 0;
|
2007-10-08 15:16:14 +02:00
|
|
|
}
|
|
|
|
|
2008-10-11 19:55:29 +02:00
|
|
|
static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
|
2007-10-08 15:16:14 +02:00
|
|
|
{
|
2008-10-11 19:55:29 +02:00
|
|
|
return 0;
|
|
|
|
}
|
2007-10-08 15:16:14 +02:00
|
|
|
|
2008-10-11 19:55:29 +02:00
|
|
|
#endif
|
2007-10-08 15:16:14 +02:00
|
|
|
|
2008-10-11 19:55:29 +02:00
|
|
|
static int num_g_regs = NUM_CORE_REGS;
|
2007-10-08 15:16:14 +02:00
|
|
|
|
2008-10-11 19:55:29 +02:00
|
|
|
#ifdef GDB_CORE_XML
|
|
|
|
/* Encode data using the encoding for 'x' packets. */
|
|
|
|
static int memtox(char *buf, const char *mem, int len)
|
|
|
|
{
|
|
|
|
char *p = buf;
|
|
|
|
char c;
|
|
|
|
|
|
|
|
while (len--) {
|
|
|
|
c = *(mem++);
|
|
|
|
switch (c) {
|
|
|
|
case '#': case '$': case '*': case '}':
|
|
|
|
*(p++) = '}';
|
|
|
|
*(p++) = c ^ 0x20;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
*(p++) = c;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
return p - buf;
|
|
|
|
}
|
2007-10-08 15:16:14 +02:00
|
|
|
|
2008-10-11 19:55:29 +02:00
|
|
|
const char *get_feature_xml(CPUState *env, const char *p, const char **newp)
|
|
|
|
{
|
|
|
|
extern const char *const xml_builtin[][2];
|
|
|
|
size_t len;
|
|
|
|
int i;
|
|
|
|
const char *name;
|
|
|
|
static char target_xml[1024];
|
|
|
|
|
|
|
|
len = 0;
|
|
|
|
while (p[len] && p[len] != ':')
|
|
|
|
len++;
|
|
|
|
*newp = p + len;
|
|
|
|
|
|
|
|
name = NULL;
|
|
|
|
if (strncmp(p, "target.xml", len) == 0) {
|
|
|
|
/* Generate the XML description for this CPU. */
|
|
|
|
if (!target_xml[0]) {
|
|
|
|
GDBRegisterState *r;
|
|
|
|
|
|
|
|
sprintf(target_xml,
|
|
|
|
"<?xml version=\"1.0\"?>"
|
|
|
|
"<!DOCTYPE target SYSTEM \"gdb-target.dtd\">"
|
|
|
|
"<target>"
|
|
|
|
"<xi:include href=\"%s\"/>",
|
|
|
|
GDB_CORE_XML);
|
|
|
|
|
|
|
|
for (r = env->gdb_regs; r; r = r->next) {
|
|
|
|
strcat(target_xml, "<xi:include href=\"");
|
|
|
|
strcat(target_xml, r->xml);
|
|
|
|
strcat(target_xml, "\"/>");
|
|
|
|
}
|
|
|
|
strcat(target_xml, "</target>");
|
|
|
|
}
|
|
|
|
return target_xml;
|
|
|
|
}
|
|
|
|
for (i = 0; ; i++) {
|
|
|
|
name = xml_builtin[i][0];
|
|
|
|
if (!name || (strncmp(name, p, len) == 0 && strlen(name) == len))
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
return name ? xml_builtin[i][1] : NULL;
|
|
|
|
}
|
|
|
|
#endif
|
2007-10-08 15:16:14 +02:00
|
|
|
|
2008-10-11 19:55:29 +02:00
|
|
|
static int gdb_read_register(CPUState *env, uint8_t *mem_buf, int reg)
|
|
|
|
{
|
|
|
|
GDBRegisterState *r;
|
2007-10-08 15:16:14 +02:00
|
|
|
|
2008-10-11 19:55:29 +02:00
|
|
|
if (reg < NUM_CORE_REGS)
|
|
|
|
return cpu_gdb_read_register(env, mem_buf, reg);
|
2007-10-08 15:16:14 +02:00
|
|
|
|
2008-10-11 19:55:29 +02:00
|
|
|
for (r = env->gdb_regs; r; r = r->next) {
|
|
|
|
if (r->base_reg <= reg && reg < r->base_reg + r->num_regs) {
|
|
|
|
return r->get_reg(env, mem_buf, reg - r->base_reg);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
return 0;
|
2007-10-08 15:16:14 +02:00
|
|
|
}
|
|
|
|
|
2008-10-11 19:55:29 +02:00
|
|
|
static int gdb_write_register(CPUState *env, uint8_t *mem_buf, int reg)
|
2007-10-08 15:16:14 +02:00
|
|
|
{
|
2008-10-11 19:55:29 +02:00
|
|
|
GDBRegisterState *r;
|
2007-10-08 15:16:14 +02:00
|
|
|
|
2008-10-11 19:55:29 +02:00
|
|
|
if (reg < NUM_CORE_REGS)
|
|
|
|
return cpu_gdb_write_register(env, mem_buf, reg);
|
|
|
|
|
|
|
|
for (r = env->gdb_regs; r; r = r->next) {
|
|
|
|
if (r->base_reg <= reg && reg < r->base_reg + r->num_regs) {
|
|
|
|
return r->set_reg(env, mem_buf, reg - r->base_reg);
|
|
|
|
}
|
|
|
|
}
|
2004-01-04 16:48:38 +01:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2008-10-11 19:55:29 +02:00
|
|
|
/* Register a supplemental set of CPU registers. If g_pos is nonzero it
|
|
|
|
specifies the first register number and these registers are included in
|
|
|
|
a standard "g" packet. Direction is relative to gdb, i.e. get_reg is
|
|
|
|
gdb reading a CPU register, and set_reg is gdb modifying a CPU register.
|
|
|
|
*/
|
|
|
|
|
|
|
|
void gdb_register_coprocessor(CPUState * env,
|
|
|
|
gdb_reg_cb get_reg, gdb_reg_cb set_reg,
|
|
|
|
int num_regs, const char *xml, int g_pos)
|
2004-01-04 16:48:38 +01:00
|
|
|
{
|
2008-10-11 19:55:29 +02:00
|
|
|
GDBRegisterState *s;
|
|
|
|
GDBRegisterState **p;
|
|
|
|
static int last_reg = NUM_CORE_REGS;
|
|
|
|
|
|
|
|
s = (GDBRegisterState *)qemu_mallocz(sizeof(GDBRegisterState));
|
|
|
|
s->base_reg = last_reg;
|
|
|
|
s->num_regs = num_regs;
|
|
|
|
s->get_reg = get_reg;
|
|
|
|
s->set_reg = set_reg;
|
|
|
|
s->xml = xml;
|
|
|
|
p = &env->gdb_regs;
|
|
|
|
while (*p) {
|
|
|
|
/* Check for duplicates. */
|
|
|
|
if (strcmp((*p)->xml, xml) == 0)
|
|
|
|
return;
|
|
|
|
p = &(*p)->next;
|
|
|
|
}
|
|
|
|
/* Add to end of list. */
|
|
|
|
last_reg += num_regs;
|
|
|
|
*p = s;
|
|
|
|
if (g_pos) {
|
|
|
|
if (g_pos != s->base_reg) {
|
|
|
|
fprintf(stderr, "Error: Bad gdb register numbering for '%s'\n"
|
|
|
|
"Expected %d got %d\n", xml, g_pos, s->base_reg);
|
|
|
|
} else {
|
|
|
|
num_g_regs = last_reg;
|
|
|
|
}
|
|
|
|
}
|
2004-01-04 16:48:38 +01:00
|
|
|
}
|
|
|
|
|
2005-04-17 21:16:13 +02:00
|
|
|
static int gdb_handle_packet(GDBState *s, CPUState *env, const char *line_buf)
|
2003-06-27 19:34:32 +02:00
|
|
|
{
|
|
|
|
const char *p;
|
2004-03-31 20:52:07 +02:00
|
|
|
int ch, reg_size, type;
|
2008-10-11 19:55:29 +02:00
|
|
|
char buf[MAX_PACKET_LENGTH];
|
|
|
|
uint8_t mem_buf[MAX_PACKET_LENGTH];
|
|
|
|
uint8_t *registers;
|
2006-06-25 17:32:37 +02:00
|
|
|
target_ulong addr, len;
|
2007-09-17 10:09:54 +02:00
|
|
|
|
2004-03-31 20:52:07 +02:00
|
|
|
#ifdef DEBUG_GDB
|
|
|
|
printf("command='%s'\n", line_buf);
|
|
|
|
#endif
|
|
|
|
p = line_buf;
|
|
|
|
ch = *p++;
|
|
|
|
switch(ch) {
|
|
|
|
case '?':
|
2005-04-17 21:16:13 +02:00
|
|
|
/* TODO: Make this return the correct value for user-mode. */
|
2004-03-31 20:52:07 +02:00
|
|
|
snprintf(buf, sizeof(buf), "S%02x", SIGTRAP);
|
|
|
|
put_packet(s, buf);
|
2008-05-17 20:58:29 +02:00
|
|
|
/* Remove all the breakpoints when this query is issued,
|
|
|
|
* because gdb is doing and initial connect and the state
|
|
|
|
* should be cleaned up.
|
|
|
|
*/
|
|
|
|
cpu_breakpoint_remove_all(env);
|
|
|
|
cpu_watchpoint_remove_all(env);
|
2004-03-31 20:52:07 +02:00
|
|
|
break;
|
|
|
|
case 'c':
|
|
|
|
if (*p != '\0') {
|
2006-06-25 17:32:37 +02:00
|
|
|
addr = strtoull(p, (char **)&p, 16);
|
2003-07-26 14:06:08 +02:00
|
|
|
#if defined(TARGET_I386)
|
2004-03-31 20:52:07 +02:00
|
|
|
env->eip = addr;
|
2004-01-05 00:51:58 +01:00
|
|
|
#elif defined (TARGET_PPC)
|
2004-03-31 20:52:07 +02:00
|
|
|
env->nip = addr;
|
2004-10-04 23:23:09 +02:00
|
|
|
#elif defined (TARGET_SPARC)
|
|
|
|
env->pc = addr;
|
|
|
|
env->npc = addr + 4;
|
2005-11-26 11:38:39 +01:00
|
|
|
#elif defined (TARGET_ARM)
|
|
|
|
env->regs[15] = addr;
|
2006-04-27 23:07:38 +02:00
|
|
|
#elif defined (TARGET_SH4)
|
2007-07-12 12:05:07 +02:00
|
|
|
env->pc = addr;
|
|
|
|
#elif defined (TARGET_MIPS)
|
2008-06-27 12:02:35 +02:00
|
|
|
env->active_tc.PC = addr;
|
2007-10-08 15:16:14 +02:00
|
|
|
#elif defined (TARGET_CRIS)
|
|
|
|
env->pc = addr;
|
2003-07-26 14:06:08 +02:00
|
|
|
#endif
|
2004-03-31 20:52:07 +02:00
|
|
|
}
|
2008-03-14 07:10:42 +01:00
|
|
|
gdb_continue(s);
|
2005-04-24 12:07:11 +02:00
|
|
|
return RS_IDLE;
|
2008-05-18 00:20:53 +02:00
|
|
|
case 'C':
|
|
|
|
s->signal = strtoul(p, (char **)&p, 16);
|
|
|
|
gdb_continue(s);
|
|
|
|
return RS_IDLE;
|
2008-05-17 20:58:29 +02:00
|
|
|
case 'k':
|
|
|
|
/* Kill the target */
|
|
|
|
fprintf(stderr, "\nQEMU: Terminated via GDBstub\n");
|
|
|
|
exit(0);
|
|
|
|
case 'D':
|
|
|
|
/* Detach packet */
|
|
|
|
cpu_breakpoint_remove_all(env);
|
|
|
|
cpu_watchpoint_remove_all(env);
|
|
|
|
gdb_continue(s);
|
|
|
|
put_packet(s, "OK");
|
|
|
|
break;
|
2004-03-31 20:52:07 +02:00
|
|
|
case 's':
|
|
|
|
if (*p != '\0') {
|
2007-07-12 12:05:07 +02:00
|
|
|
addr = strtoull(p, (char **)&p, 16);
|
2003-07-29 22:50:33 +02:00
|
|
|
#if defined(TARGET_I386)
|
2004-03-31 20:52:07 +02:00
|
|
|
env->eip = addr;
|
2004-01-05 00:51:58 +01:00
|
|
|
#elif defined (TARGET_PPC)
|
2004-03-31 20:52:07 +02:00
|
|
|
env->nip = addr;
|
2004-10-04 23:23:09 +02:00
|
|
|
#elif defined (TARGET_SPARC)
|
|
|
|
env->pc = addr;
|
|
|
|
env->npc = addr + 4;
|
2005-11-26 11:38:39 +01:00
|
|
|
#elif defined (TARGET_ARM)
|
|
|
|
env->regs[15] = addr;
|
2006-04-27 23:07:38 +02:00
|
|
|
#elif defined (TARGET_SH4)
|
2007-07-12 12:05:07 +02:00
|
|
|
env->pc = addr;
|
|
|
|
#elif defined (TARGET_MIPS)
|
2008-06-27 12:02:35 +02:00
|
|
|
env->active_tc.PC = addr;
|
2007-10-08 15:16:14 +02:00
|
|
|
#elif defined (TARGET_CRIS)
|
|
|
|
env->pc = addr;
|
2003-07-29 22:50:33 +02:00
|
|
|
#endif
|
2004-03-31 20:52:07 +02:00
|
|
|
}
|
2008-05-09 10:25:14 +02:00
|
|
|
cpu_single_step(env, sstep_flags);
|
2008-03-14 07:10:42 +01:00
|
|
|
gdb_continue(s);
|
2005-04-24 12:07:11 +02:00
|
|
|
return RS_IDLE;
|
2007-01-28 04:10:55 +01:00
|
|
|
case 'F':
|
|
|
|
{
|
|
|
|
target_ulong ret;
|
|
|
|
target_ulong err;
|
|
|
|
|
|
|
|
ret = strtoull(p, (char **)&p, 16);
|
|
|
|
if (*p == ',') {
|
|
|
|
p++;
|
|
|
|
err = strtoull(p, (char **)&p, 16);
|
|
|
|
} else {
|
|
|
|
err = 0;
|
|
|
|
}
|
|
|
|
if (*p == ',')
|
|
|
|
p++;
|
|
|
|
type = *p;
|
|
|
|
if (gdb_current_syscall_cb)
|
|
|
|
gdb_current_syscall_cb(s->env, ret, err);
|
|
|
|
if (type == 'C') {
|
|
|
|
put_packet(s, "T02");
|
|
|
|
} else {
|
2008-03-14 07:10:42 +01:00
|
|
|
gdb_continue(s);
|
2007-01-28 04:10:55 +01:00
|
|
|
}
|
|
|
|
}
|
|
|
|
break;
|
2004-03-31 20:52:07 +02:00
|
|
|
case 'g':
|
2008-10-11 19:55:29 +02:00
|
|
|
len = 0;
|
|
|
|
for (addr = 0; addr < num_g_regs; addr++) {
|
|
|
|
reg_size = gdb_read_register(env, mem_buf + len, addr);
|
|
|
|
len += reg_size;
|
|
|
|
}
|
|
|
|
memtohex(buf, mem_buf, len);
|
2004-03-31 20:52:07 +02:00
|
|
|
put_packet(s, buf);
|
|
|
|
break;
|
|
|
|
case 'G':
|
2008-10-11 19:55:29 +02:00
|
|
|
registers = mem_buf;
|
2004-03-31 20:52:07 +02:00
|
|
|
len = strlen(p) / 2;
|
|
|
|
hextomem((uint8_t *)registers, p, len);
|
2008-10-11 19:55:29 +02:00
|
|
|
for (addr = 0; addr < num_g_regs && len > 0; addr++) {
|
|
|
|
reg_size = gdb_write_register(env, registers, addr);
|
|
|
|
len -= reg_size;
|
|
|
|
registers += reg_size;
|
|
|
|
}
|
2004-03-31 20:52:07 +02:00
|
|
|
put_packet(s, "OK");
|
|
|
|
break;
|
|
|
|
case 'm':
|
2006-06-25 17:32:37 +02:00
|
|
|
addr = strtoull(p, (char **)&p, 16);
|
2004-03-31 20:52:07 +02:00
|
|
|
if (*p == ',')
|
|
|
|
p++;
|
2006-06-25 17:32:37 +02:00
|
|
|
len = strtoull(p, NULL, 16);
|
2005-12-05 20:55:19 +01:00
|
|
|
if (cpu_memory_rw_debug(env, addr, mem_buf, len, 0) != 0) {
|
|
|
|
put_packet (s, "E14");
|
|
|
|
} else {
|
|
|
|
memtohex(buf, mem_buf, len);
|
|
|
|
put_packet(s, buf);
|
|
|
|
}
|
2004-03-31 20:52:07 +02:00
|
|
|
break;
|
|
|
|
case 'M':
|
2006-06-25 17:32:37 +02:00
|
|
|
addr = strtoull(p, (char **)&p, 16);
|
2004-03-31 20:52:07 +02:00
|
|
|
if (*p == ',')
|
|
|
|
p++;
|
2006-06-25 17:32:37 +02:00
|
|
|
len = strtoull(p, (char **)&p, 16);
|
2005-01-17 23:03:16 +01:00
|
|
|
if (*p == ':')
|
2004-03-31 20:52:07 +02:00
|
|
|
p++;
|
|
|
|
hextomem(mem_buf, p, len);
|
|
|
|
if (cpu_memory_rw_debug(env, addr, mem_buf, len, 1) != 0)
|
2005-04-26 23:09:55 +02:00
|
|
|
put_packet(s, "E14");
|
2004-03-31 20:52:07 +02:00
|
|
|
else
|
|
|
|
put_packet(s, "OK");
|
|
|
|
break;
|
2008-10-11 19:55:29 +02:00
|
|
|
case 'p':
|
|
|
|
/* Older gdb are really dumb, and don't use 'g' if 'p' is avaialable.
|
|
|
|
This works, but can be very slow. Anything new enough to
|
|
|
|
understand XML also knows how to use this properly. */
|
|
|
|
if (!gdb_has_xml)
|
|
|
|
goto unknown_command;
|
|
|
|
addr = strtoull(p, (char **)&p, 16);
|
|
|
|
reg_size = gdb_read_register(env, mem_buf, addr);
|
|
|
|
if (reg_size) {
|
|
|
|
memtohex(buf, mem_buf, reg_size);
|
|
|
|
put_packet(s, buf);
|
|
|
|
} else {
|
|
|
|
put_packet(s, "E14");
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
case 'P':
|
|
|
|
if (!gdb_has_xml)
|
|
|
|
goto unknown_command;
|
|
|
|
addr = strtoull(p, (char **)&p, 16);
|
|
|
|
if (*p == '=')
|
|
|
|
p++;
|
|
|
|
reg_size = strlen(p) / 2;
|
|
|
|
hextomem(mem_buf, p, reg_size);
|
|
|
|
gdb_write_register(env, mem_buf, addr);
|
|
|
|
put_packet(s, "OK");
|
|
|
|
break;
|
2004-03-31 20:52:07 +02:00
|
|
|
case 'Z':
|
|
|
|
type = strtoul(p, (char **)&p, 16);
|
|
|
|
if (*p == ',')
|
|
|
|
p++;
|
2006-06-25 17:32:37 +02:00
|
|
|
addr = strtoull(p, (char **)&p, 16);
|
2004-03-31 20:52:07 +02:00
|
|
|
if (*p == ',')
|
|
|
|
p++;
|
2006-06-25 17:32:37 +02:00
|
|
|
len = strtoull(p, (char **)&p, 16);
|
2008-06-09 02:20:13 +02:00
|
|
|
switch (type) {
|
|
|
|
case 0:
|
|
|
|
case 1:
|
2004-03-31 20:52:07 +02:00
|
|
|
if (cpu_breakpoint_insert(env, addr) < 0)
|
|
|
|
goto breakpoint_error;
|
|
|
|
put_packet(s, "OK");
|
2008-06-09 02:20:13 +02:00
|
|
|
break;
|
2007-03-17 00:58:11 +01:00
|
|
|
#ifndef CONFIG_USER_ONLY
|
2008-06-09 02:20:13 +02:00
|
|
|
case 2:
|
|
|
|
type = PAGE_WRITE;
|
|
|
|
goto insert_watchpoint;
|
|
|
|
case 3:
|
|
|
|
type = PAGE_READ;
|
|
|
|
goto insert_watchpoint;
|
|
|
|
case 4:
|
|
|
|
type = PAGE_READ | PAGE_WRITE;
|
|
|
|
insert_watchpoint:
|
|
|
|
if (cpu_watchpoint_insert(env, addr, type) < 0)
|
2007-03-17 00:58:11 +01:00
|
|
|
goto breakpoint_error;
|
|
|
|
put_packet(s, "OK");
|
2008-06-09 02:20:13 +02:00
|
|
|
break;
|
2007-03-17 00:58:11 +01:00
|
|
|
#endif
|
2008-06-09 02:20:13 +02:00
|
|
|
default:
|
|
|
|
put_packet(s, "");
|
|
|
|
break;
|
2004-03-31 20:52:07 +02:00
|
|
|
}
|
|
|
|
break;
|
2008-06-09 02:20:13 +02:00
|
|
|
breakpoint_error:
|
|
|
|
put_packet(s, "E22");
|
|
|
|
break;
|
|
|
|
|
2004-03-31 20:52:07 +02:00
|
|
|
case 'z':
|
|
|
|
type = strtoul(p, (char **)&p, 16);
|
|
|
|
if (*p == ',')
|
|
|
|
p++;
|
2006-06-25 17:32:37 +02:00
|
|
|
addr = strtoull(p, (char **)&p, 16);
|
2004-03-31 20:52:07 +02:00
|
|
|
if (*p == ',')
|
|
|
|
p++;
|
2006-06-25 17:32:37 +02:00
|
|
|
len = strtoull(p, (char **)&p, 16);
|
2004-03-31 20:52:07 +02:00
|
|
|
if (type == 0 || type == 1) {
|
|
|
|
cpu_breakpoint_remove(env, addr);
|
|
|
|
put_packet(s, "OK");
|
2007-03-17 00:58:11 +01:00
|
|
|
#ifndef CONFIG_USER_ONLY
|
2008-06-09 02:20:13 +02:00
|
|
|
} else if (type >= 2 || type <= 4) {
|
2007-03-17 00:58:11 +01:00
|
|
|
cpu_watchpoint_remove(env, addr);
|
|
|
|
put_packet(s, "OK");
|
|
|
|
#endif
|
2004-03-31 20:52:07 +02:00
|
|
|
} else {
|
2008-06-09 02:20:13 +02:00
|
|
|
put_packet(s, "");
|
2004-03-31 20:52:07 +02:00
|
|
|
}
|
|
|
|
break;
|
2006-06-17 20:30:42 +02:00
|
|
|
case 'q':
|
2008-05-09 10:25:14 +02:00
|
|
|
case 'Q':
|
|
|
|
/* parse any 'q' packets here */
|
|
|
|
if (!strcmp(p,"qemu.sstepbits")) {
|
|
|
|
/* Query Breakpoint bit definitions */
|
2008-08-21 19:58:08 +02:00
|
|
|
snprintf(buf, sizeof(buf), "ENABLE=%x,NOIRQ=%x,NOTIMER=%x",
|
|
|
|
SSTEP_ENABLE,
|
|
|
|
SSTEP_NOIRQ,
|
|
|
|
SSTEP_NOTIMER);
|
2008-05-09 10:25:14 +02:00
|
|
|
put_packet(s, buf);
|
|
|
|
break;
|
|
|
|
} else if (strncmp(p,"qemu.sstep",10) == 0) {
|
|
|
|
/* Display or change the sstep_flags */
|
|
|
|
p += 10;
|
|
|
|
if (*p != '=') {
|
|
|
|
/* Display current setting */
|
2008-08-21 19:58:08 +02:00
|
|
|
snprintf(buf, sizeof(buf), "0x%x", sstep_flags);
|
2008-05-09 10:25:14 +02:00
|
|
|
put_packet(s, buf);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
p++;
|
|
|
|
type = strtoul(p, (char **)&p, 16);
|
|
|
|
sstep_flags = type;
|
|
|
|
put_packet(s, "OK");
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
#ifdef CONFIG_LINUX_USER
|
|
|
|
else if (strncmp(p, "Offsets", 7) == 0) {
|
2006-06-17 20:30:42 +02:00
|
|
|
TaskState *ts = env->opaque;
|
|
|
|
|
2008-08-21 19:58:08 +02:00
|
|
|
snprintf(buf, sizeof(buf),
|
|
|
|
"Text=" TARGET_ABI_FMT_lx ";Data=" TARGET_ABI_FMT_lx
|
|
|
|
";Bss=" TARGET_ABI_FMT_lx,
|
|
|
|
ts->info->code_offset,
|
|
|
|
ts->info->data_offset,
|
|
|
|
ts->info->data_offset);
|
2006-06-17 20:30:42 +02:00
|
|
|
put_packet(s, buf);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
#endif
|
2008-10-11 19:55:29 +02:00
|
|
|
if (strncmp(p, "Supported", 9) == 0) {
|
|
|
|
sprintf(buf, "PacketSize=%x", MAX_PACKET_LENGTH);
|
|
|
|
#ifdef GDB_CORE_XML
|
|
|
|
strcat(buf, ";qXfer:features:read+");
|
|
|
|
#endif
|
|
|
|
put_packet(s, buf);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
#ifdef GDB_CORE_XML
|
|
|
|
if (strncmp(p, "Xfer:features:read:", 19) == 0) {
|
|
|
|
const char *xml;
|
|
|
|
target_ulong total_len;
|
|
|
|
|
|
|
|
gdb_has_xml = 1;
|
|
|
|
p += 19;
|
|
|
|
xml = get_feature_xml(env, p, &p);
|
|
|
|
if (!xml) {
|
|
|
|
sprintf(buf, "E00");
|
|
|
|
put_packet(s, buf);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (*p == ':')
|
|
|
|
p++;
|
|
|
|
addr = strtoul(p, (char **)&p, 16);
|
|
|
|
if (*p == ',')
|
|
|
|
p++;
|
|
|
|
len = strtoul(p, (char **)&p, 16);
|
|
|
|
|
|
|
|
total_len = strlen(xml);
|
|
|
|
if (addr > total_len) {
|
|
|
|
sprintf(buf, "E00");
|
|
|
|
put_packet(s, buf);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
if (len > (MAX_PACKET_LENGTH - 5) / 2)
|
|
|
|
len = (MAX_PACKET_LENGTH - 5) / 2;
|
|
|
|
if (len < total_len - addr) {
|
|
|
|
buf[0] = 'm';
|
|
|
|
len = memtox(buf + 1, xml + addr, len);
|
|
|
|
} else {
|
|
|
|
buf[0] = 'l';
|
|
|
|
len = memtox(buf + 1, xml + addr, total_len - addr);
|
|
|
|
}
|
|
|
|
put_packet_binary(s, buf, len + 1);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
/* Unrecognised 'q' command. */
|
|
|
|
goto unknown_command;
|
|
|
|
|
2004-03-31 20:52:07 +02:00
|
|
|
default:
|
2008-10-11 19:55:29 +02:00
|
|
|
unknown_command:
|
2004-03-31 20:52:07 +02:00
|
|
|
/* put empty packet */
|
|
|
|
buf[0] = '\0';
|
|
|
|
put_packet(s, buf);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
return RS_IDLE;
|
|
|
|
}
|
|
|
|
|
2005-01-04 00:34:06 +01:00
|
|
|
extern void tb_flush(CPUState *env);
|
|
|
|
|
2005-04-17 21:16:13 +02:00
|
|
|
#ifndef CONFIG_USER_ONLY
|
2004-03-31 20:52:07 +02:00
|
|
|
static void gdb_vm_stopped(void *opaque, int reason)
|
|
|
|
{
|
|
|
|
GDBState *s = opaque;
|
|
|
|
char buf[256];
|
|
|
|
int ret;
|
|
|
|
|
2007-01-28 04:10:55 +01:00
|
|
|
if (s->state == RS_SYSCALL)
|
|
|
|
return;
|
|
|
|
|
2004-03-31 20:52:07 +02:00
|
|
|
/* disable single step if it was enable */
|
2005-11-22 00:25:50 +01:00
|
|
|
cpu_single_step(s->env, 0);
|
2004-03-31 20:52:07 +02:00
|
|
|
|
2004-12-20 00:18:01 +01:00
|
|
|
if (reason == EXCP_DEBUG) {
|
2007-03-17 00:58:11 +01:00
|
|
|
if (s->env->watchpoint_hit) {
|
2007-04-15 00:35:50 +02:00
|
|
|
snprintf(buf, sizeof(buf), "T%02xwatch:" TARGET_FMT_lx ";",
|
|
|
|
SIGTRAP,
|
2007-03-17 00:58:11 +01:00
|
|
|
s->env->watchpoint[s->env->watchpoint_hit - 1].vaddr);
|
|
|
|
put_packet(s, buf);
|
|
|
|
s->env->watchpoint_hit = 0;
|
|
|
|
return;
|
|
|
|
}
|
2005-11-22 00:25:50 +01:00
|
|
|
tb_flush(s->env);
|
2004-03-31 20:52:07 +02:00
|
|
|
ret = SIGTRAP;
|
2006-04-23 20:42:15 +02:00
|
|
|
} else if (reason == EXCP_INTERRUPT) {
|
|
|
|
ret = SIGINT;
|
|
|
|
} else {
|
2004-03-31 20:52:07 +02:00
|
|
|
ret = 0;
|
2006-04-23 20:42:15 +02:00
|
|
|
}
|
2004-03-31 20:52:07 +02:00
|
|
|
snprintf(buf, sizeof(buf), "S%02x", ret);
|
|
|
|
put_packet(s, buf);
|
|
|
|
}
|
2005-04-17 21:16:13 +02:00
|
|
|
#endif
|
2004-03-31 20:52:07 +02:00
|
|
|
|
2007-01-28 04:10:55 +01:00
|
|
|
/* Send a gdb syscall request.
|
|
|
|
This accepts limited printf-style format specifiers, specifically:
|
2007-05-26 17:09:38 +02:00
|
|
|
%x - target_ulong argument printed in hex.
|
|
|
|
%lx - 64-bit argument printed in hex.
|
|
|
|
%s - string pointer (target_ulong) and length (int) pair. */
|
2008-09-14 08:45:34 +02:00
|
|
|
void gdb_do_syscall(gdb_syscall_complete_cb cb, const char *fmt, ...)
|
2007-01-28 04:10:55 +01:00
|
|
|
{
|
|
|
|
va_list va;
|
|
|
|
char buf[256];
|
|
|
|
char *p;
|
|
|
|
target_ulong addr;
|
2007-05-26 17:09:38 +02:00
|
|
|
uint64_t i64;
|
2007-01-28 04:10:55 +01:00
|
|
|
GDBState *s;
|
|
|
|
|
|
|
|
s = gdb_syscall_state;
|
|
|
|
if (!s)
|
|
|
|
return;
|
|
|
|
gdb_current_syscall_cb = cb;
|
|
|
|
s->state = RS_SYSCALL;
|
|
|
|
#ifndef CONFIG_USER_ONLY
|
|
|
|
vm_stop(EXCP_DEBUG);
|
|
|
|
#endif
|
|
|
|
s->state = RS_IDLE;
|
|
|
|
va_start(va, fmt);
|
|
|
|
p = buf;
|
|
|
|
*(p++) = 'F';
|
|
|
|
while (*fmt) {
|
|
|
|
if (*fmt == '%') {
|
|
|
|
fmt++;
|
|
|
|
switch (*fmt++) {
|
|
|
|
case 'x':
|
|
|
|
addr = va_arg(va, target_ulong);
|
2008-08-21 19:58:08 +02:00
|
|
|
p += snprintf(p, &buf[sizeof(buf)] - p, TARGET_FMT_lx, addr);
|
2007-01-28 04:10:55 +01:00
|
|
|
break;
|
2007-05-26 17:09:38 +02:00
|
|
|
case 'l':
|
|
|
|
if (*(fmt++) != 'x')
|
|
|
|
goto bad_format;
|
|
|
|
i64 = va_arg(va, uint64_t);
|
2008-08-21 19:58:08 +02:00
|
|
|
p += snprintf(p, &buf[sizeof(buf)] - p, "%" PRIx64, i64);
|
2007-05-26 17:09:38 +02:00
|
|
|
break;
|
2007-01-28 04:10:55 +01:00
|
|
|
case 's':
|
|
|
|
addr = va_arg(va, target_ulong);
|
2008-08-21 19:58:08 +02:00
|
|
|
p += snprintf(p, &buf[sizeof(buf)] - p, TARGET_FMT_lx "/%x",
|
|
|
|
addr, va_arg(va, int));
|
2007-01-28 04:10:55 +01:00
|
|
|
break;
|
|
|
|
default:
|
2007-05-26 17:09:38 +02:00
|
|
|
bad_format:
|
2007-01-28 04:10:55 +01:00
|
|
|
fprintf(stderr, "gdbstub: Bad syscall format string '%s'\n",
|
|
|
|
fmt - 1);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
*(p++) = *(fmt++);
|
|
|
|
}
|
|
|
|
}
|
2007-08-06 15:19:15 +02:00
|
|
|
*p = 0;
|
2007-01-28 04:10:55 +01:00
|
|
|
va_end(va);
|
|
|
|
put_packet(s, buf);
|
|
|
|
#ifdef CONFIG_USER_ONLY
|
|
|
|
gdb_handlesig(s->env, 0);
|
|
|
|
#else
|
|
|
|
cpu_interrupt(s->env, CPU_INTERRUPT_EXIT);
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
2005-11-22 00:25:50 +01:00
|
|
|
static void gdb_read_byte(GDBState *s, int ch)
|
2004-03-31 20:52:07 +02:00
|
|
|
{
|
2005-11-22 00:25:50 +01:00
|
|
|
CPUState *env = s->env;
|
2004-03-31 20:52:07 +02:00
|
|
|
int i, csum;
|
2007-12-16 04:02:09 +01:00
|
|
|
uint8_t reply;
|
2004-03-31 20:52:07 +02:00
|
|
|
|
2005-04-17 21:16:13 +02:00
|
|
|
#ifndef CONFIG_USER_ONLY
|
2007-01-28 02:53:16 +01:00
|
|
|
if (s->last_packet_len) {
|
|
|
|
/* Waiting for a response to the last packet. If we see the start
|
|
|
|
of a new command then abandon the previous response. */
|
|
|
|
if (ch == '-') {
|
|
|
|
#ifdef DEBUG_GDB
|
|
|
|
printf("Got NACK, retransmitting\n");
|
|
|
|
#endif
|
2007-12-16 04:16:05 +01:00
|
|
|
put_buffer(s, (uint8_t *)s->last_packet, s->last_packet_len);
|
2007-01-28 02:53:16 +01:00
|
|
|
}
|
|
|
|
#ifdef DEBUG_GDB
|
|
|
|
else if (ch == '+')
|
|
|
|
printf("Got ACK\n");
|
|
|
|
else
|
|
|
|
printf("Got '%c' when expecting ACK/NACK\n", ch);
|
|
|
|
#endif
|
|
|
|
if (ch == '+' || ch == '$')
|
|
|
|
s->last_packet_len = 0;
|
|
|
|
if (ch != '$')
|
|
|
|
return;
|
|
|
|
}
|
2004-03-31 20:52:07 +02:00
|
|
|
if (vm_running) {
|
|
|
|
/* when the CPU is running, we cannot do anything except stop
|
|
|
|
it when receiving a char */
|
|
|
|
vm_stop(EXCP_INTERRUPT);
|
2007-09-16 23:08:06 +02:00
|
|
|
} else
|
2005-04-17 21:16:13 +02:00
|
|
|
#endif
|
2005-04-24 12:07:11 +02:00
|
|
|
{
|
2004-03-31 20:52:07 +02:00
|
|
|
switch(s->state) {
|
|
|
|
case RS_IDLE:
|
|
|
|
if (ch == '$') {
|
|
|
|
s->line_buf_index = 0;
|
|
|
|
s->state = RS_GETLINE;
|
2003-07-29 22:50:33 +02:00
|
|
|
}
|
2003-06-27 19:34:32 +02:00
|
|
|
break;
|
2004-03-31 20:52:07 +02:00
|
|
|
case RS_GETLINE:
|
|
|
|
if (ch == '#') {
|
|
|
|
s->state = RS_CHKSUM1;
|
|
|
|
} else if (s->line_buf_index >= sizeof(s->line_buf) - 1) {
|
|
|
|
s->state = RS_IDLE;
|
2003-07-26 14:06:08 +02:00
|
|
|
} else {
|
2004-03-31 20:52:07 +02:00
|
|
|
s->line_buf[s->line_buf_index++] = ch;
|
2003-07-26 14:06:08 +02:00
|
|
|
}
|
|
|
|
break;
|
2004-03-31 20:52:07 +02:00
|
|
|
case RS_CHKSUM1:
|
|
|
|
s->line_buf[s->line_buf_index] = '\0';
|
|
|
|
s->line_csum = fromhex(ch) << 4;
|
|
|
|
s->state = RS_CHKSUM2;
|
|
|
|
break;
|
|
|
|
case RS_CHKSUM2:
|
|
|
|
s->line_csum |= fromhex(ch);
|
|
|
|
csum = 0;
|
|
|
|
for(i = 0; i < s->line_buf_index; i++) {
|
|
|
|
csum += s->line_buf[i];
|
|
|
|
}
|
|
|
|
if (s->line_csum != (csum & 0xff)) {
|
2007-12-16 04:02:09 +01:00
|
|
|
reply = '-';
|
|
|
|
put_buffer(s, &reply, 1);
|
2004-03-31 20:52:07 +02:00
|
|
|
s->state = RS_IDLE;
|
2003-07-26 14:06:08 +02:00
|
|
|
} else {
|
2007-12-16 04:02:09 +01:00
|
|
|
reply = '+';
|
|
|
|
put_buffer(s, &reply, 1);
|
2005-04-17 21:16:13 +02:00
|
|
|
s->state = gdb_handle_packet(s, env, s->line_buf);
|
2003-07-26 14:06:08 +02:00
|
|
|
}
|
|
|
|
break;
|
2007-01-28 04:10:55 +01:00
|
|
|
default:
|
|
|
|
abort();
|
2004-03-31 20:52:07 +02:00
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2005-04-17 21:16:13 +02:00
|
|
|
#ifdef CONFIG_USER_ONLY
|
|
|
|
int
|
|
|
|
gdb_handlesig (CPUState *env, int sig)
|
|
|
|
{
|
|
|
|
GDBState *s;
|
|
|
|
char buf[256];
|
|
|
|
int n;
|
|
|
|
|
|
|
|
s = &gdbserver_state;
|
2008-05-18 00:20:53 +02:00
|
|
|
if (gdbserver_fd < 0 || s->fd < 0)
|
|
|
|
return sig;
|
2005-04-17 21:16:13 +02:00
|
|
|
|
|
|
|
/* disable single step if it was enabled */
|
|
|
|
cpu_single_step(env, 0);
|
|
|
|
tb_flush(env);
|
|
|
|
|
|
|
|
if (sig != 0)
|
|
|
|
{
|
|
|
|
snprintf(buf, sizeof(buf), "S%02x", sig);
|
|
|
|
put_packet(s, buf);
|
|
|
|
}
|
2008-05-18 00:20:53 +02:00
|
|
|
/* put_packet() might have detected that the peer terminated the
|
|
|
|
connection. */
|
|
|
|
if (s->fd < 0)
|
|
|
|
return sig;
|
2005-04-17 21:16:13 +02:00
|
|
|
|
|
|
|
sig = 0;
|
|
|
|
s->state = RS_IDLE;
|
2005-04-24 12:07:11 +02:00
|
|
|
s->running_state = 0;
|
|
|
|
while (s->running_state == 0) {
|
2005-04-17 21:16:13 +02:00
|
|
|
n = read (s->fd, buf, 256);
|
|
|
|
if (n > 0)
|
|
|
|
{
|
|
|
|
int i;
|
|
|
|
|
|
|
|
for (i = 0; i < n; i++)
|
2005-11-22 00:25:50 +01:00
|
|
|
gdb_read_byte (s, buf[i]);
|
2005-04-17 21:16:13 +02:00
|
|
|
}
|
|
|
|
else if (n == 0 || errno != EAGAIN)
|
|
|
|
{
|
|
|
|
/* XXX: Connection closed. Should probably wait for annother
|
|
|
|
connection before continuing. */
|
|
|
|
return sig;
|
|
|
|
}
|
2005-04-24 12:07:11 +02:00
|
|
|
}
|
2008-05-18 00:20:53 +02:00
|
|
|
sig = s->signal;
|
|
|
|
s->signal = 0;
|
2005-04-17 21:16:13 +02:00
|
|
|
return sig;
|
|
|
|
}
|
2005-04-26 22:42:36 +02:00
|
|
|
|
|
|
|
/* Tell the remote gdb that the process has exited. */
|
|
|
|
void gdb_exit(CPUState *env, int code)
|
|
|
|
{
|
|
|
|
GDBState *s;
|
|
|
|
char buf[4];
|
|
|
|
|
|
|
|
s = &gdbserver_state;
|
2008-05-18 00:20:53 +02:00
|
|
|
if (gdbserver_fd < 0 || s->fd < 0)
|
|
|
|
return;
|
2005-04-26 22:42:36 +02:00
|
|
|
|
|
|
|
snprintf(buf, sizeof(buf), "W%02x", code);
|
|
|
|
put_packet(s, buf);
|
|
|
|
}
|
|
|
|
|
2005-04-17 21:16:13 +02:00
|
|
|
|
2005-11-15 23:16:05 +01:00
|
|
|
static void gdb_accept(void *opaque)
|
2004-03-31 20:52:07 +02:00
|
|
|
{
|
|
|
|
GDBState *s;
|
|
|
|
struct sockaddr_in sockaddr;
|
|
|
|
socklen_t len;
|
|
|
|
int val, fd;
|
|
|
|
|
|
|
|
for(;;) {
|
|
|
|
len = sizeof(sockaddr);
|
|
|
|
fd = accept(gdbserver_fd, (struct sockaddr *)&sockaddr, &len);
|
|
|
|
if (fd < 0 && errno != EINTR) {
|
|
|
|
perror("accept");
|
|
|
|
return;
|
|
|
|
} else if (fd >= 0) {
|
2003-06-27 19:34:32 +02:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
2004-03-31 20:52:07 +02:00
|
|
|
|
|
|
|
/* set short latency */
|
|
|
|
val = 1;
|
2006-06-14 17:21:14 +02:00
|
|
|
setsockopt(fd, IPPROTO_TCP, TCP_NODELAY, (char *)&val, sizeof(val));
|
2007-09-17 10:09:54 +02:00
|
|
|
|
2005-04-17 21:16:13 +02:00
|
|
|
s = &gdbserver_state;
|
|
|
|
memset (s, 0, sizeof (GDBState));
|
2005-11-22 00:25:50 +01:00
|
|
|
s->env = first_cpu; /* XXX: allow to change CPU */
|
2004-03-31 20:52:07 +02:00
|
|
|
s->fd = fd;
|
2008-10-11 19:55:29 +02:00
|
|
|
gdb_has_xml = 0;
|
2004-03-31 20:52:07 +02:00
|
|
|
|
2007-01-28 04:10:55 +01:00
|
|
|
gdb_syscall_state = s;
|
|
|
|
|
2004-03-31 20:52:07 +02:00
|
|
|
fcntl(fd, F_SETFL, O_NONBLOCK);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int gdbserver_open(int port)
|
|
|
|
{
|
|
|
|
struct sockaddr_in sockaddr;
|
|
|
|
int fd, val, ret;
|
|
|
|
|
|
|
|
fd = socket(PF_INET, SOCK_STREAM, 0);
|
|
|
|
if (fd < 0) {
|
|
|
|
perror("socket");
|
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* allow fast reuse */
|
|
|
|
val = 1;
|
2006-06-14 17:21:14 +02:00
|
|
|
setsockopt(fd, SOL_SOCKET, SO_REUSEADDR, (char *)&val, sizeof(val));
|
2004-03-31 20:52:07 +02:00
|
|
|
|
|
|
|
sockaddr.sin_family = AF_INET;
|
|
|
|
sockaddr.sin_port = htons(port);
|
|
|
|
sockaddr.sin_addr.s_addr = 0;
|
|
|
|
ret = bind(fd, (struct sockaddr *)&sockaddr, sizeof(sockaddr));
|
|
|
|
if (ret < 0) {
|
|
|
|
perror("bind");
|
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
ret = listen(fd, 0);
|
|
|
|
if (ret < 0) {
|
|
|
|
perror("listen");
|
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
return fd;
|
|
|
|
}
|
|
|
|
|
|
|
|
int gdbserver_start(int port)
|
|
|
|
{
|
|
|
|
gdbserver_fd = gdbserver_open(port);
|
|
|
|
if (gdbserver_fd < 0)
|
|
|
|
return -1;
|
|
|
|
/* accept connections */
|
2005-11-15 23:16:05 +01:00
|
|
|
gdb_accept (NULL);
|
2007-01-28 02:53:16 +01:00
|
|
|
return 0;
|
|
|
|
}
|
2005-04-17 21:16:13 +02:00
|
|
|
#else
|
2007-07-12 00:48:58 +02:00
|
|
|
static int gdb_chr_can_receive(void *opaque)
|
2007-01-28 02:53:16 +01:00
|
|
|
{
|
2008-10-11 19:55:29 +02:00
|
|
|
/* We can handle an arbitrarily large amount of data.
|
|
|
|
Pick the maximum packet size, which is as good as anything. */
|
|
|
|
return MAX_PACKET_LENGTH;
|
2007-01-28 02:53:16 +01:00
|
|
|
}
|
|
|
|
|
2007-07-12 00:48:58 +02:00
|
|
|
static void gdb_chr_receive(void *opaque, const uint8_t *buf, int size)
|
2007-01-28 02:53:16 +01:00
|
|
|
{
|
|
|
|
GDBState *s = opaque;
|
|
|
|
int i;
|
|
|
|
|
|
|
|
for (i = 0; i < size; i++) {
|
|
|
|
gdb_read_byte(s, buf[i]);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static void gdb_chr_event(void *opaque, int event)
|
|
|
|
{
|
|
|
|
switch (event) {
|
|
|
|
case CHR_EVENT_RESET:
|
|
|
|
vm_stop(EXCP_INTERRUPT);
|
2007-01-28 04:10:55 +01:00
|
|
|
gdb_syscall_state = opaque;
|
2008-10-11 19:55:29 +02:00
|
|
|
gdb_has_xml = 0;
|
2007-01-28 02:53:16 +01:00
|
|
|
break;
|
|
|
|
default:
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2007-02-22 02:48:01 +01:00
|
|
|
int gdbserver_start(const char *port)
|
2007-01-28 02:53:16 +01:00
|
|
|
{
|
|
|
|
GDBState *s;
|
2007-02-22 02:48:01 +01:00
|
|
|
char gdbstub_port_name[128];
|
|
|
|
int port_num;
|
|
|
|
char *p;
|
|
|
|
CharDriverState *chr;
|
|
|
|
|
|
|
|
if (!port || !*port)
|
|
|
|
return -1;
|
2007-01-28 02:53:16 +01:00
|
|
|
|
2007-02-22 02:48:01 +01:00
|
|
|
port_num = strtol(port, &p, 10);
|
|
|
|
if (*p == 0) {
|
|
|
|
/* A numeric value is interpreted as a port number. */
|
|
|
|
snprintf(gdbstub_port_name, sizeof(gdbstub_port_name),
|
|
|
|
"tcp::%d,nowait,nodelay,server", port_num);
|
|
|
|
port = gdbstub_port_name;
|
|
|
|
}
|
|
|
|
|
|
|
|
chr = qemu_chr_open(port);
|
2007-01-28 02:53:16 +01:00
|
|
|
if (!chr)
|
|
|
|
return -1;
|
|
|
|
|
|
|
|
s = qemu_mallocz(sizeof(GDBState));
|
|
|
|
if (!s) {
|
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
s->env = first_cpu; /* XXX: allow to change CPU */
|
|
|
|
s->chr = chr;
|
2007-07-12 00:48:58 +02:00
|
|
|
qemu_chr_add_handlers(chr, gdb_chr_can_receive, gdb_chr_receive,
|
2007-01-28 02:53:16 +01:00
|
|
|
gdb_chr_event, s);
|
|
|
|
qemu_add_vm_stop_handler(gdb_vm_stopped, s);
|
2003-06-27 19:34:32 +02:00
|
|
|
return 0;
|
|
|
|
}
|
2007-01-28 02:53:16 +01:00
|
|
|
#endif
|