2012-02-11 17:26:17 +01:00
|
|
|
/*
|
|
|
|
* QEMU SuperH CPU
|
|
|
|
*
|
2012-04-13 02:16:02 +02:00
|
|
|
* Copyright (c) 2005 Samuel Tardieu
|
2012-02-11 17:26:17 +01:00
|
|
|
* Copyright (c) 2012 SUSE LINUX Products GmbH
|
|
|
|
*
|
|
|
|
* This library is free software; you can redistribute it and/or
|
|
|
|
* modify it under the terms of the GNU Lesser General Public
|
|
|
|
* License as published by the Free Software Foundation; either
|
|
|
|
* version 2.1 of the License, or (at your option) any later version.
|
|
|
|
*
|
|
|
|
* This library is distributed in the hope that it will be useful,
|
|
|
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
|
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
|
|
|
* Lesser General Public License for more details.
|
|
|
|
*
|
|
|
|
* You should have received a copy of the GNU Lesser General Public
|
|
|
|
* License along with this library; if not, see
|
|
|
|
* <http://www.gnu.org/licenses/lgpl-2.1.html>
|
|
|
|
*/
|
|
|
|
|
2016-01-26 19:17:20 +01:00
|
|
|
#include "qemu/osdep.h"
|
include/qemu/osdep.h: Don't include qapi/error.h
Commit 57cb38b included qapi/error.h into qemu/osdep.h to get the
Error typedef. Since then, we've moved to include qemu/osdep.h
everywhere. Its file comment explains: "To avoid getting into
possible circular include dependencies, this file should not include
any other QEMU headers, with the exceptions of config-host.h,
compiler.h, os-posix.h and os-win32.h, all of which are doing a
similar job to this file and are under similar constraints."
qapi/error.h doesn't do a similar job, and it doesn't adhere to
similar constraints: it includes qapi-types.h. That's in excess of
100KiB of crap most .c files don't actually need.
Add the typedef to qemu/typedefs.h, and include that instead of
qapi/error.h. Include qapi/error.h in .c files that need it and don't
get it now. Include qapi-types.h in qom/object.h for uint16List.
Update scripts/clean-includes accordingly. Update it further to match
reality: replace config.h by config-target.h, add sysemu/os-posix.h,
sysemu/os-win32.h. Update the list of includes in the qemu/osdep.h
comment quoted above similarly.
This reduces the number of objects depending on qapi/error.h from "all
of them" to less than a third. Unfortunately, the number depending on
qapi-types.h shrinks only a little. More work is needed for that one.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
[Fix compilation without the spice devel packages. - Paolo]
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2016-03-14 09:01:28 +01:00
|
|
|
#include "qapi/error.h"
|
2019-04-17 21:17:57 +02:00
|
|
|
#include "qemu/qemu-print.h"
|
2012-02-11 17:26:17 +01:00
|
|
|
#include "cpu.h"
|
2013-01-20 19:32:33 +01:00
|
|
|
#include "migration/vmstate.h"
|
2016-03-15 13:18:37 +01:00
|
|
|
#include "exec/exec-all.h"
|
2019-08-08 18:30:35 +02:00
|
|
|
#include "fpu/softfloat-helpers.h"
|
2012-02-11 17:26:17 +01:00
|
|
|
|
2013-06-21 19:09:18 +02:00
|
|
|
static void superh_cpu_set_pc(CPUState *cs, vaddr value)
|
|
|
|
{
|
|
|
|
SuperHCPU *cpu = SUPERH_CPU(cs);
|
|
|
|
|
|
|
|
cpu->env.pc = value;
|
|
|
|
}
|
|
|
|
|
2020-10-29 20:30:01 +01:00
|
|
|
static void superh_cpu_synchronize_from_tb(CPUState *cs,
|
|
|
|
const TranslationBlock *tb)
|
2013-06-28 19:31:32 +02:00
|
|
|
{
|
|
|
|
SuperHCPU *cpu = SUPERH_CPU(cs);
|
|
|
|
|
|
|
|
cpu->env.pc = tb->pc;
|
2017-07-18 22:02:29 +02:00
|
|
|
cpu->env.flags = tb->flags & TB_FLAG_ENVFLAGS_MASK;
|
2013-06-28 19:31:32 +02:00
|
|
|
}
|
|
|
|
|
2013-08-25 18:53:55 +02:00
|
|
|
static bool superh_cpu_has_work(CPUState *cs)
|
|
|
|
{
|
|
|
|
return cs->interrupt_request & CPU_INTERRUPT_HARD;
|
|
|
|
}
|
|
|
|
|
cpu: Use DeviceClass reset instead of a special CPUClass reset
The CPUClass has a 'reset' method. This is a legacy from when
TYPE_CPU used not to inherit from TYPE_DEVICE. We don't need it any
more, as we can simply use the TYPE_DEVICE reset. The 'cpu_reset()'
function is kept as the API which most places use to reset a CPU; it
is now a wrapper which calls device_cold_reset() and then the
tracepoint function.
This change should not cause CPU objects to be reset more often
than they are at the moment, because:
* nobody is directly calling device_cold_reset() or
qdev_reset_all() on CPU objects
* no CPU object is on a qbus, so they will not be reset either
by somebody calling qbus_reset_all()/bus_cold_reset(), or
by the main "reset sysbus and everything in the qbus tree"
reset that most devices are reset by
Note that this does not change the need for each machine or whatever
to use qemu_register_reset() to arrange to call cpu_reset() -- that
is necessary because CPU objects are not on any qbus, so they don't
get reset when the qbus tree rooted at the sysbus bus is reset, and
this isn't being changed here.
All the changes to the files under target/ were made using the
included Coccinelle script, except:
(1) the deletion of the now-inaccurate and not terribly useful
"CPUClass::reset" comments was done with a perl one-liner afterwards:
perl -n -i -e '/ CPUClass::reset/ or print' target/*/*.c
(2) this bit of the s390 change was done by hand, because the
Coccinelle script is not sophisticated enough to handle the
parent_reset call being inside another function:
| @@ -96,8 +96,9 @@ static void s390_cpu_reset(CPUState *s, cpu_reset_type type)
| S390CPU *cpu = S390_CPU(s);
| S390CPUClass *scc = S390_CPU_GET_CLASS(cpu);
| CPUS390XState *env = &cpu->env;
|+ DeviceState *dev = DEVICE(s);
|
|- scc->parent_reset(s);
|+ scc->parent_reset(dev);
| cpu->env.sigp_order = 0;
| s390_cpu_set_state(S390_CPU_STATE_STOPPED, cpu);
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <20200303100511.5498-1-peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2020-03-03 11:05:11 +01:00
|
|
|
static void superh_cpu_reset(DeviceState *dev)
|
2012-02-11 17:26:17 +01:00
|
|
|
{
|
cpu: Use DeviceClass reset instead of a special CPUClass reset
The CPUClass has a 'reset' method. This is a legacy from when
TYPE_CPU used not to inherit from TYPE_DEVICE. We don't need it any
more, as we can simply use the TYPE_DEVICE reset. The 'cpu_reset()'
function is kept as the API which most places use to reset a CPU; it
is now a wrapper which calls device_cold_reset() and then the
tracepoint function.
This change should not cause CPU objects to be reset more often
than they are at the moment, because:
* nobody is directly calling device_cold_reset() or
qdev_reset_all() on CPU objects
* no CPU object is on a qbus, so they will not be reset either
by somebody calling qbus_reset_all()/bus_cold_reset(), or
by the main "reset sysbus and everything in the qbus tree"
reset that most devices are reset by
Note that this does not change the need for each machine or whatever
to use qemu_register_reset() to arrange to call cpu_reset() -- that
is necessary because CPU objects are not on any qbus, so they don't
get reset when the qbus tree rooted at the sysbus bus is reset, and
this isn't being changed here.
All the changes to the files under target/ were made using the
included Coccinelle script, except:
(1) the deletion of the now-inaccurate and not terribly useful
"CPUClass::reset" comments was done with a perl one-liner afterwards:
perl -n -i -e '/ CPUClass::reset/ or print' target/*/*.c
(2) this bit of the s390 change was done by hand, because the
Coccinelle script is not sophisticated enough to handle the
parent_reset call being inside another function:
| @@ -96,8 +96,9 @@ static void s390_cpu_reset(CPUState *s, cpu_reset_type type)
| S390CPU *cpu = S390_CPU(s);
| S390CPUClass *scc = S390_CPU_GET_CLASS(cpu);
| CPUS390XState *env = &cpu->env;
|+ DeviceState *dev = DEVICE(s);
|
|- scc->parent_reset(s);
|+ scc->parent_reset(dev);
| cpu->env.sigp_order = 0;
| s390_cpu_set_state(S390_CPU_STATE_STOPPED, cpu);
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <20200303100511.5498-1-peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2020-03-03 11:05:11 +01:00
|
|
|
CPUState *s = CPU(dev);
|
2012-02-11 17:26:17 +01:00
|
|
|
SuperHCPU *cpu = SUPERH_CPU(s);
|
|
|
|
SuperHCPUClass *scc = SUPERH_CPU_GET_CLASS(cpu);
|
|
|
|
CPUSH4State *env = &cpu->env;
|
|
|
|
|
cpu: Use DeviceClass reset instead of a special CPUClass reset
The CPUClass has a 'reset' method. This is a legacy from when
TYPE_CPU used not to inherit from TYPE_DEVICE. We don't need it any
more, as we can simply use the TYPE_DEVICE reset. The 'cpu_reset()'
function is kept as the API which most places use to reset a CPU; it
is now a wrapper which calls device_cold_reset() and then the
tracepoint function.
This change should not cause CPU objects to be reset more often
than they are at the moment, because:
* nobody is directly calling device_cold_reset() or
qdev_reset_all() on CPU objects
* no CPU object is on a qbus, so they will not be reset either
by somebody calling qbus_reset_all()/bus_cold_reset(), or
by the main "reset sysbus and everything in the qbus tree"
reset that most devices are reset by
Note that this does not change the need for each machine or whatever
to use qemu_register_reset() to arrange to call cpu_reset() -- that
is necessary because CPU objects are not on any qbus, so they don't
get reset when the qbus tree rooted at the sysbus bus is reset, and
this isn't being changed here.
All the changes to the files under target/ were made using the
included Coccinelle script, except:
(1) the deletion of the now-inaccurate and not terribly useful
"CPUClass::reset" comments was done with a perl one-liner afterwards:
perl -n -i -e '/ CPUClass::reset/ or print' target/*/*.c
(2) this bit of the s390 change was done by hand, because the
Coccinelle script is not sophisticated enough to handle the
parent_reset call being inside another function:
| @@ -96,8 +96,9 @@ static void s390_cpu_reset(CPUState *s, cpu_reset_type type)
| S390CPU *cpu = S390_CPU(s);
| S390CPUClass *scc = S390_CPU_GET_CLASS(cpu);
| CPUS390XState *env = &cpu->env;
|+ DeviceState *dev = DEVICE(s);
|
|- scc->parent_reset(s);
|+ scc->parent_reset(dev);
| cpu->env.sigp_order = 0;
| s390_cpu_set_state(S390_CPU_STATE_STOPPED, cpu);
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <20200303100511.5498-1-peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2020-03-03 11:05:11 +01:00
|
|
|
scc->parent_reset(dev);
|
2012-02-11 17:26:17 +01:00
|
|
|
|
2016-11-14 15:19:17 +01:00
|
|
|
memset(env, 0, offsetof(CPUSH4State, end_reset_fields));
|
2012-04-13 02:16:02 +02:00
|
|
|
|
|
|
|
env->pc = 0xA0000000;
|
|
|
|
#if defined(CONFIG_USER_ONLY)
|
|
|
|
env->fpscr = FPSCR_PR; /* value for userspace according to the kernel */
|
|
|
|
set_float_rounding_mode(float_round_nearest_even, &env->fp_status); /* ?! */
|
|
|
|
#else
|
2015-05-25 01:28:56 +02:00
|
|
|
env->sr = (1u << SR_MD) | (1u << SR_RB) | (1u << SR_BL) |
|
|
|
|
(1u << SR_I3) | (1u << SR_I2) | (1u << SR_I1) | (1u << SR_I0);
|
2012-04-13 02:16:02 +02:00
|
|
|
env->fpscr = FPSCR_DN | FPSCR_RM_ZERO; /* CPU reset value according to SH4 manual */
|
|
|
|
set_float_rounding_mode(float_round_to_zero, &env->fp_status);
|
|
|
|
set_flush_to_zero(1, &env->fp_status);
|
|
|
|
#endif
|
|
|
|
set_default_nan_mode(1, &env->fp_status);
|
2012-02-11 17:26:17 +01:00
|
|
|
}
|
|
|
|
|
2015-07-12 04:00:03 +02:00
|
|
|
static void superh_cpu_disas_set_info(CPUState *cpu, disassemble_info *info)
|
|
|
|
{
|
|
|
|
info->mach = bfd_mach_sh4;
|
|
|
|
info->print_insn = print_insn_sh;
|
|
|
|
}
|
|
|
|
|
2012-11-19 02:42:18 +01:00
|
|
|
static void superh_cpu_list_entry(gpointer data, gpointer user_data)
|
|
|
|
{
|
2017-10-05 15:50:57 +02:00
|
|
|
const char *typename = object_class_get_name(OBJECT_CLASS(data));
|
|
|
|
int len = strlen(typename) - strlen(SUPERH_CPU_TYPE_SUFFIX);
|
2012-11-19 02:42:18 +01:00
|
|
|
|
2019-04-17 21:17:57 +02:00
|
|
|
qemu_printf("%.*s\n", len, typename);
|
2012-11-19 02:42:18 +01:00
|
|
|
}
|
|
|
|
|
2019-04-17 21:17:57 +02:00
|
|
|
void sh4_cpu_list(void)
|
2012-11-19 02:42:18 +01:00
|
|
|
{
|
|
|
|
GSList *list;
|
|
|
|
|
2018-03-03 08:33:10 +01:00
|
|
|
list = object_class_get_list_sorted(TYPE_SUPERH_CPU, false);
|
2019-04-17 21:17:57 +02:00
|
|
|
g_slist_foreach(list, superh_cpu_list_entry, NULL);
|
2012-11-19 02:42:18 +01:00
|
|
|
g_slist_free(list);
|
|
|
|
}
|
|
|
|
|
|
|
|
static ObjectClass *superh_cpu_class_by_name(const char *cpu_model)
|
|
|
|
{
|
|
|
|
ObjectClass *oc;
|
2017-10-05 15:50:56 +02:00
|
|
|
char *s, *typename = NULL;
|
2012-11-19 02:42:18 +01:00
|
|
|
|
2017-10-05 15:50:56 +02:00
|
|
|
s = g_ascii_strdown(cpu_model, -1);
|
|
|
|
if (strcmp(s, "any") == 0) {
|
|
|
|
oc = object_class_by_name(TYPE_SH7750R_CPU);
|
|
|
|
goto out;
|
2012-11-19 02:42:18 +01:00
|
|
|
}
|
|
|
|
|
2017-10-05 15:50:56 +02:00
|
|
|
typename = g_strdup_printf(SUPERH_CPU_TYPE_NAME("%s"), s);
|
|
|
|
oc = object_class_by_name(typename);
|
|
|
|
if (oc != NULL && object_class_is_abstract(oc)) {
|
|
|
|
oc = NULL;
|
2012-11-19 02:42:18 +01:00
|
|
|
}
|
|
|
|
|
2017-10-05 15:50:56 +02:00
|
|
|
out:
|
|
|
|
g_free(s);
|
|
|
|
g_free(typename);
|
2012-11-19 02:42:18 +01:00
|
|
|
return oc;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void sh7750r_cpu_initfn(Object *obj)
|
|
|
|
{
|
|
|
|
SuperHCPU *cpu = SUPERH_CPU(obj);
|
|
|
|
CPUSH4State *env = &cpu->env;
|
|
|
|
|
|
|
|
env->id = SH_CPU_SH7750R;
|
|
|
|
env->features = SH_FEATURE_BCR3_AND_BCR4;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void sh7750r_class_init(ObjectClass *oc, void *data)
|
|
|
|
{
|
|
|
|
SuperHCPUClass *scc = SUPERH_CPU_CLASS(oc);
|
|
|
|
|
2012-11-20 16:15:47 +01:00
|
|
|
scc->pvr = 0x00050000;
|
|
|
|
scc->prr = 0x00000100;
|
|
|
|
scc->cvr = 0x00110000;
|
2012-11-19 02:42:18 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
static void sh7751r_cpu_initfn(Object *obj)
|
|
|
|
{
|
|
|
|
SuperHCPU *cpu = SUPERH_CPU(obj);
|
|
|
|
CPUSH4State *env = &cpu->env;
|
|
|
|
|
|
|
|
env->id = SH_CPU_SH7751R;
|
|
|
|
env->features = SH_FEATURE_BCR3_AND_BCR4;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void sh7751r_class_init(ObjectClass *oc, void *data)
|
|
|
|
{
|
|
|
|
SuperHCPUClass *scc = SUPERH_CPU_CLASS(oc);
|
|
|
|
|
2012-11-20 16:15:47 +01:00
|
|
|
scc->pvr = 0x04050005;
|
|
|
|
scc->prr = 0x00000113;
|
|
|
|
scc->cvr = 0x00110000; /* Neutered caches, should be 0x20480000 */
|
2012-11-19 02:42:18 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
static void sh7785_cpu_initfn(Object *obj)
|
|
|
|
{
|
|
|
|
SuperHCPU *cpu = SUPERH_CPU(obj);
|
|
|
|
CPUSH4State *env = &cpu->env;
|
|
|
|
|
|
|
|
env->id = SH_CPU_SH7785;
|
|
|
|
env->features = SH_FEATURE_SH4A;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void sh7785_class_init(ObjectClass *oc, void *data)
|
|
|
|
{
|
|
|
|
SuperHCPUClass *scc = SUPERH_CPU_CLASS(oc);
|
|
|
|
|
2012-11-20 16:15:47 +01:00
|
|
|
scc->pvr = 0x10300700;
|
|
|
|
scc->prr = 0x00000200;
|
|
|
|
scc->cvr = 0x71440211;
|
2012-11-19 02:42:18 +01:00
|
|
|
}
|
|
|
|
|
2012-04-23 18:16:02 +02:00
|
|
|
static void superh_cpu_realizefn(DeviceState *dev, Error **errp)
|
|
|
|
{
|
2013-07-27 02:53:25 +02:00
|
|
|
CPUState *cs = CPU(dev);
|
2012-04-23 18:16:02 +02:00
|
|
|
SuperHCPUClass *scc = SUPERH_CPU_GET_CLASS(dev);
|
2016-10-20 13:26:03 +02:00
|
|
|
Error *local_err = NULL;
|
|
|
|
|
|
|
|
cpu_exec_realizefn(cs, &local_err);
|
|
|
|
if (local_err != NULL) {
|
|
|
|
error_propagate(errp, local_err);
|
|
|
|
return;
|
|
|
|
}
|
2012-04-23 18:16:02 +02:00
|
|
|
|
2013-07-27 02:53:25 +02:00
|
|
|
cpu_reset(cs);
|
|
|
|
qemu_init_vcpu(cs);
|
2012-04-23 18:16:02 +02:00
|
|
|
|
|
|
|
scc->parent_realize(dev, errp);
|
|
|
|
}
|
|
|
|
|
2012-04-13 02:32:12 +02:00
|
|
|
static void superh_cpu_initfn(Object *obj)
|
|
|
|
{
|
|
|
|
SuperHCPU *cpu = SUPERH_CPU(obj);
|
|
|
|
CPUSH4State *env = &cpu->env;
|
|
|
|
|
2019-03-28 22:26:22 +01:00
|
|
|
cpu_set_cpustate_pointers(cpu);
|
2012-04-13 02:32:12 +02:00
|
|
|
|
|
|
|
env->movcal_backup_tail = &(env->movcal_backup);
|
|
|
|
}
|
|
|
|
|
2013-01-20 19:32:33 +01:00
|
|
|
static const VMStateDescription vmstate_sh_cpu = {
|
|
|
|
.name = "cpu",
|
|
|
|
.unmigratable = 1,
|
|
|
|
};
|
|
|
|
|
2021-02-04 17:39:23 +01:00
|
|
|
#include "hw/core/tcg-cpu-ops.h"
|
|
|
|
|
|
|
|
static struct TCGCPUOps superh_tcg_ops = {
|
|
|
|
.initialize = sh4_translate_init,
|
|
|
|
.synchronize_from_tb = superh_cpu_synchronize_from_tb,
|
|
|
|
.cpu_exec_interrupt = superh_cpu_exec_interrupt,
|
|
|
|
.tlb_fill = superh_cpu_tlb_fill,
|
|
|
|
|
|
|
|
#ifndef CONFIG_USER_ONLY
|
|
|
|
.do_interrupt = superh_cpu_do_interrupt,
|
|
|
|
.do_unaligned_access = superh_cpu_do_unaligned_access,
|
|
|
|
#endif /* !CONFIG_USER_ONLY */
|
|
|
|
};
|
|
|
|
|
2012-02-11 17:26:17 +01:00
|
|
|
static void superh_cpu_class_init(ObjectClass *oc, void *data)
|
|
|
|
{
|
2013-01-20 19:32:33 +01:00
|
|
|
DeviceClass *dc = DEVICE_CLASS(oc);
|
2012-02-11 17:26:17 +01:00
|
|
|
CPUClass *cc = CPU_CLASS(oc);
|
|
|
|
SuperHCPUClass *scc = SUPERH_CPU_CLASS(oc);
|
|
|
|
|
2018-01-14 03:04:12 +01:00
|
|
|
device_class_set_parent_realize(dc, superh_cpu_realizefn,
|
|
|
|
&scc->parent_realize);
|
2012-04-23 18:16:02 +02:00
|
|
|
|
cpu: Use DeviceClass reset instead of a special CPUClass reset
The CPUClass has a 'reset' method. This is a legacy from when
TYPE_CPU used not to inherit from TYPE_DEVICE. We don't need it any
more, as we can simply use the TYPE_DEVICE reset. The 'cpu_reset()'
function is kept as the API which most places use to reset a CPU; it
is now a wrapper which calls device_cold_reset() and then the
tracepoint function.
This change should not cause CPU objects to be reset more often
than they are at the moment, because:
* nobody is directly calling device_cold_reset() or
qdev_reset_all() on CPU objects
* no CPU object is on a qbus, so they will not be reset either
by somebody calling qbus_reset_all()/bus_cold_reset(), or
by the main "reset sysbus and everything in the qbus tree"
reset that most devices are reset by
Note that this does not change the need for each machine or whatever
to use qemu_register_reset() to arrange to call cpu_reset() -- that
is necessary because CPU objects are not on any qbus, so they don't
get reset when the qbus tree rooted at the sysbus bus is reset, and
this isn't being changed here.
All the changes to the files under target/ were made using the
included Coccinelle script, except:
(1) the deletion of the now-inaccurate and not terribly useful
"CPUClass::reset" comments was done with a perl one-liner afterwards:
perl -n -i -e '/ CPUClass::reset/ or print' target/*/*.c
(2) this bit of the s390 change was done by hand, because the
Coccinelle script is not sophisticated enough to handle the
parent_reset call being inside another function:
| @@ -96,8 +96,9 @@ static void s390_cpu_reset(CPUState *s, cpu_reset_type type)
| S390CPU *cpu = S390_CPU(s);
| S390CPUClass *scc = S390_CPU_GET_CLASS(cpu);
| CPUS390XState *env = &cpu->env;
|+ DeviceState *dev = DEVICE(s);
|
|- scc->parent_reset(s);
|+ scc->parent_reset(dev);
| cpu->env.sigp_order = 0;
| s390_cpu_set_state(S390_CPU_STATE_STOPPED, cpu);
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <20200303100511.5498-1-peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2020-03-03 11:05:11 +01:00
|
|
|
device_class_set_parent_reset(dc, superh_cpu_reset, &scc->parent_reset);
|
2013-01-20 19:32:33 +01:00
|
|
|
|
2012-11-19 02:42:18 +01:00
|
|
|
cc->class_by_name = superh_cpu_class_by_name;
|
2013-08-25 18:53:55 +02:00
|
|
|
cc->has_work = superh_cpu_has_work;
|
2013-05-27 01:33:50 +02:00
|
|
|
cc->dump_state = superh_cpu_dump_state;
|
2013-06-21 19:09:18 +02:00
|
|
|
cc->set_pc = superh_cpu_set_pc;
|
2013-06-29 04:18:45 +02:00
|
|
|
cc->gdb_read_register = superh_cpu_gdb_read_register;
|
|
|
|
cc->gdb_write_register = superh_cpu_gdb_write_register;
|
2019-04-02 17:18:39 +02:00
|
|
|
#ifndef CONFIG_USER_ONLY
|
2013-06-29 18:55:54 +02:00
|
|
|
cc->get_phys_page_debug = superh_cpu_get_phys_page_debug;
|
|
|
|
#endif
|
2015-07-12 04:00:03 +02:00
|
|
|
cc->disas_set_info = superh_cpu_disas_set_info;
|
|
|
|
|
2013-06-28 23:18:47 +02:00
|
|
|
cc->gdb_num_core_regs = 59;
|
qdev: Protect device-list-properties against broken devices
Several devices don't survive object_unref(object_new(T)): they crash
or hang during cleanup, or they leave dangling pointers behind.
This breaks at least device-list-properties, because
qmp_device_list_properties() needs to create a device to find its
properties. Broken in commit f4eb32b "qmp: show QOM properties in
device-list-properties", v2.1. Example reproducer:
$ qemu-system-aarch64 -nodefaults -display none -machine none -S -qmp stdio
{"QMP": {"version": {"qemu": {"micro": 50, "minor": 4, "major": 2}, "package": ""}, "capabilities": []}}
{ "execute": "qmp_capabilities" }
{"return": {}}
{ "execute": "device-list-properties", "arguments": { "typename": "pxa2xx-pcmcia" } }
qemu-system-aarch64: /home/armbru/work/qemu/memory.c:1307: memory_region_finalize: Assertion `((&mr->subregions)->tqh_first == ((void *)0))' failed.
Aborted (core dumped)
[Exit 134 (SIGABRT)]
Unfortunately, I can't fix the problems in these devices right now.
Instead, add DeviceClass member cannot_destroy_with_object_finalize_yet
to mark them:
* Hang during cleanup (didn't debug, so I can't say why):
"realview_pci", "versatile_pci".
* Dangling pointer in cpus: most CPUs, plus "allwinner-a10", "digic",
"fsl,imx25", "fsl,imx31", "xlnx,zynqmp", because they create such
CPUs
* Assert kvm_enabled(): "host-x86_64-cpu", host-i386-cpu",
"host-powerpc64-cpu", "host-embedded-powerpc-cpu",
"host-powerpc-cpu" (the powerpc ones can't currently reach the
assertion, because the CPUs are only registered when KVM is enabled,
but the assertion is arguably in the wrong place all the same)
Make qmp_device_list_properties() fail cleanly when the device is so
marked. This improves device-list-properties from "crashes, hangs or
leaves dangling pointers behind" to "fails". Not a complete fix, just
a better-than-nothing work-around. In the above reproducer,
device-list-properties now fails with "Can't list properties of device
'pxa2xx-pcmcia'".
This also protects -device FOO,help, which uses the same machinery
since commit ef52358 "qdev-monitor: include QOM properties in -device
FOO, help output", v2.2. Example reproducer:
$ qemu-system-aarch64 -machine none -device pxa2xx-pcmcia,help
Before:
qemu-system-aarch64: .../memory.c:1307: memory_region_finalize: Assertion `((&mr->subregions)->tqh_first == ((void *)0))' failed.
After:
Can't list properties of device 'pxa2xx-pcmcia'
Cc: "Andreas Färber" <afaerber@suse.de>
Cc: "Edgar E. Iglesias" <edgar.iglesias@gmail.com>
Cc: Alexander Graf <agraf@suse.de>
Cc: Anthony Green <green@moxielogic.com>
Cc: Aurelien Jarno <aurelien@aurel32.net>
Cc: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Cc: Blue Swirl <blauwirbel@gmail.com>
Cc: Eduardo Habkost <ehabkost@redhat.com>
Cc: Guan Xuetao <gxt@mprc.pku.edu.cn>
Cc: Jia Liu <proljc@gmail.com>
Cc: Leon Alrae <leon.alrae@imgtec.com>
Cc: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Cc: Max Filippov <jcmvbkbc@gmail.com>
Cc: Michael Walle <michael@walle.cc>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Peter Maydell <peter.maydell@linaro.org>
Cc: Richard Henderson <rth@twiddle.net>
Cc: qemu-ppc@nongnu.org
Cc: qemu-stable@nongnu.org
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>
Message-Id: <1443689999-12182-10-git-send-email-armbru@redhat.com>
2015-10-01 10:59:58 +02:00
|
|
|
|
2015-07-12 04:00:03 +02:00
|
|
|
dc->vmsd = &vmstate_sh_cpu;
|
2021-02-04 17:39:23 +01:00
|
|
|
cc->tcg_ops = &superh_tcg_ops;
|
2012-02-11 17:26:17 +01:00
|
|
|
}
|
|
|
|
|
2017-10-05 15:50:55 +02:00
|
|
|
#define DEFINE_SUPERH_CPU_TYPE(type_name, cinit, initfn) \
|
|
|
|
{ \
|
|
|
|
.name = type_name, \
|
|
|
|
.parent = TYPE_SUPERH_CPU, \
|
|
|
|
.class_init = cinit, \
|
|
|
|
.instance_init = initfn, \
|
|
|
|
}
|
|
|
|
static const TypeInfo superh_cpu_type_infos[] = {
|
|
|
|
{
|
|
|
|
.name = TYPE_SUPERH_CPU,
|
|
|
|
.parent = TYPE_CPU,
|
|
|
|
.instance_size = sizeof(SuperHCPU),
|
|
|
|
.instance_init = superh_cpu_initfn,
|
|
|
|
.abstract = true,
|
|
|
|
.class_size = sizeof(SuperHCPUClass),
|
|
|
|
.class_init = superh_cpu_class_init,
|
|
|
|
},
|
|
|
|
DEFINE_SUPERH_CPU_TYPE(TYPE_SH7750R_CPU, sh7750r_class_init,
|
|
|
|
sh7750r_cpu_initfn),
|
|
|
|
DEFINE_SUPERH_CPU_TYPE(TYPE_SH7751R_CPU, sh7751r_class_init,
|
|
|
|
sh7751r_cpu_initfn),
|
|
|
|
DEFINE_SUPERH_CPU_TYPE(TYPE_SH7785_CPU, sh7785_class_init,
|
|
|
|
sh7785_cpu_initfn),
|
2012-02-11 17:26:17 +01:00
|
|
|
|
2017-10-05 15:50:55 +02:00
|
|
|
};
|
2012-02-11 17:26:17 +01:00
|
|
|
|
2017-10-05 15:50:55 +02:00
|
|
|
DEFINE_TYPES(superh_cpu_type_infos)
|