2007-11-17 12:50:55 +01:00
|
|
|
/*
|
|
|
|
* CFI parallel flash with Intel command set emulation
|
|
|
|
*
|
|
|
|
* Copyright (c) 2006 Thorsten Zitterell
|
|
|
|
* Copyright (c) 2005 Jocelyn Mayer
|
|
|
|
*
|
|
|
|
* This library is free software; you can redistribute it and/or
|
|
|
|
* modify it under the terms of the GNU Lesser General Public
|
|
|
|
* License as published by the Free Software Foundation; either
|
2020-10-23 14:30:34 +02:00
|
|
|
* version 2.1 of the License, or (at your option) any later version.
|
2007-11-17 12:50:55 +01:00
|
|
|
*
|
|
|
|
* This library is distributed in the hope that it will be useful,
|
|
|
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
|
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
|
|
|
* Lesser General Public License for more details.
|
|
|
|
*
|
|
|
|
* You should have received a copy of the GNU Lesser General Public
|
2009-07-16 22:47:01 +02:00
|
|
|
* License along with this library; if not, see <http://www.gnu.org/licenses/>.
|
2007-11-17 12:50:55 +01:00
|
|
|
*/
|
|
|
|
|
|
|
|
/*
|
|
|
|
* For now, this code can emulate flashes of 1, 2 or 4 bytes width.
|
|
|
|
* Supported commands/modes are:
|
|
|
|
* - flash read
|
|
|
|
* - flash write
|
|
|
|
* - flash ID read
|
|
|
|
* - sector erase
|
|
|
|
* - CFI queries
|
|
|
|
*
|
|
|
|
* It does not support timings
|
|
|
|
* It does not support flash interleaving
|
|
|
|
* It does not implement software data protection as found in many real chips
|
|
|
|
* It does not implement erase suspend/resume commands
|
|
|
|
* It does not implement multiple sectors erase
|
|
|
|
*
|
|
|
|
* It does not implement much more ...
|
|
|
|
*/
|
|
|
|
|
2016-01-18 19:01:42 +01:00
|
|
|
#include "qemu/osdep.h"
|
pflash: Require backend size to match device, improve errors
We reject undersized backends with a rather enigmatic "failed to read
the initial flash content" error. For instance:
$ qemu-system-ppc64 -S -display none -M sam460ex -drive if=pflash,format=raw,file=eins.img
qemu-system-ppc64: Initialization of device cfi.pflash02 failed: failed to read the initial flash content
We happily accept oversized images, ignoring their tail. Throwing
away parts of firmware that way is pretty much certain to end in an
even more enigmatic failure to boot.
Require the backend's size to match the device's size exactly. Report
mismatch like this:
qemu-system-ppc64: Initialization of device cfi.pflash01 failed: device requires 1048576 bytes, block backend provides 512 bytes
Improve the error for actual read failures to "can't read block
backend".
To avoid duplicating even more code between the two pflash device
models, do all that in new helper blk_check_size_and_read_all().
The error reporting can still be confusing. For instance:
qemu-system-ppc64 -S -display none -M taihu -drive if=pflash,format=raw,file=eins.img -drive if=pflash,unit=1,format=raw,file=zwei.img
qemu-system-ppc64: Initialization of device cfi.pflash02 failed: device requires 2097152 bytes, block backend provides 512 bytes
Leaves the user guessing which of the two -drive is wrong. Mention
the issue in a TODO comment.
Suggested-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <20190319163551.32499-2-armbru@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-03-19 17:35:50 +01:00
|
|
|
#include "hw/block/block.h"
|
2013-02-05 17:06:20 +01:00
|
|
|
#include "hw/block/flash.h"
|
2019-08-12 07:23:51 +02:00
|
|
|
#include "hw/qdev-properties.h"
|
2020-12-11 23:05:12 +01:00
|
|
|
#include "hw/qdev-properties-system.h"
|
2014-10-07 13:59:18 +02:00
|
|
|
#include "sysemu/block-backend.h"
|
include/qemu/osdep.h: Don't include qapi/error.h
Commit 57cb38b included qapi/error.h into qemu/osdep.h to get the
Error typedef. Since then, we've moved to include qemu/osdep.h
everywhere. Its file comment explains: "To avoid getting into
possible circular include dependencies, this file should not include
any other QEMU headers, with the exceptions of config-host.h,
compiler.h, os-posix.h and os-win32.h, all of which are doing a
similar job to this file and are under similar constraints."
qapi/error.h doesn't do a similar job, and it doesn't adhere to
similar constraints: it includes qapi-types.h. That's in excess of
100KiB of crap most .c files don't actually need.
Add the typedef to qemu/typedefs.h, and include that instead of
qapi/error.h. Include qapi/error.h in .c files that need it and don't
get it now. Include qapi-types.h in qom/object.h for uint16List.
Update scripts/clean-includes accordingly. Update it further to match
reality: replace config.h by config-target.h, add sysemu/os-posix.h,
sysemu/os-win32.h. Update the list of includes in the qemu/osdep.h
comment quoted above similarly.
This reduces the number of objects depending on qapi/error.h from "all
of them" to less than a third. Unfortunately, the number depending on
qapi-types.h shrinks only a little. More work is needed for that one.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
[Fix compilation without the spice devel packages. - Paolo]
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2016-03-14 09:01:28 +01:00
|
|
|
#include "qapi/error.h"
|
2020-04-08 02:35:52 +02:00
|
|
|
#include "qemu/error-report.h"
|
2013-12-17 20:42:26 +01:00
|
|
|
#include "qemu/bitops.h"
|
2019-05-07 13:55:02 +02:00
|
|
|
#include "qemu/error-report.h"
|
2012-12-17 18:20:00 +01:00
|
|
|
#include "qemu/host-utils.h"
|
2015-12-15 13:16:16 +01:00
|
|
|
#include "qemu/log.h"
|
2019-05-23 16:35:07 +02:00
|
|
|
#include "qemu/module.h"
|
2019-05-07 13:55:02 +02:00
|
|
|
#include "qemu/option.h"
|
2013-02-04 15:40:22 +01:00
|
|
|
#include "hw/sysbus.h"
|
2019-08-12 07:23:45 +02:00
|
|
|
#include "migration/vmstate.h"
|
2019-05-07 13:55:02 +02:00
|
|
|
#include "sysemu/blockdev.h"
|
2019-08-12 07:23:59 +02:00
|
|
|
#include "sysemu/runstate.h"
|
2018-06-21 19:12:57 +02:00
|
|
|
#include "trace.h"
|
2007-11-17 12:50:55 +01:00
|
|
|
|
|
|
|
/* #define PFLASH_DEBUG */
|
|
|
|
#ifdef PFLASH_DEBUG
|
2012-12-04 07:04:34 +01:00
|
|
|
#define DPRINTF(fmt, ...) \
|
|
|
|
do { \
|
|
|
|
fprintf(stderr, "PFLASH: " fmt , ## __VA_ARGS__); \
|
2007-11-17 12:50:55 +01:00
|
|
|
} while (0)
|
|
|
|
#else
|
2009-05-13 19:53:17 +02:00
|
|
|
#define DPRINTF(fmt, ...) do { } while (0)
|
2007-11-17 12:50:55 +01:00
|
|
|
#endif
|
|
|
|
|
2015-04-08 13:53:29 +02:00
|
|
|
#define PFLASH_BE 0
|
2015-04-08 14:09:43 +02:00
|
|
|
#define PFLASH_SECURE 1
|
2015-04-08 13:53:29 +02:00
|
|
|
|
2019-03-08 10:45:56 +01:00
|
|
|
struct PFlashCFI01 {
|
2013-07-01 12:18:26 +02:00
|
|
|
/*< private >*/
|
|
|
|
SysBusDevice parent_obj;
|
|
|
|
/*< public >*/
|
|
|
|
|
2014-10-07 13:59:18 +02:00
|
|
|
BlockBackend *blk;
|
2012-10-30 08:45:11 +01:00
|
|
|
uint32_t nb_blocs;
|
|
|
|
uint64_t sector_len;
|
2013-12-17 20:42:26 +01:00
|
|
|
uint8_t bank_width;
|
2013-12-17 20:42:26 +01:00
|
|
|
uint8_t device_width; /* If 0, device width not specified. */
|
2013-12-17 20:42:27 +01:00
|
|
|
uint8_t max_device_width; /* max device width in bytes */
|
2015-04-08 13:53:29 +02:00
|
|
|
uint32_t features;
|
2013-04-05 17:18:00 +02:00
|
|
|
uint8_t wcycle; /* if 0, the flash is read normally */
|
2007-11-17 12:50:55 +01:00
|
|
|
int ro;
|
|
|
|
uint8_t cmd;
|
|
|
|
uint8_t status;
|
2012-10-30 08:45:11 +01:00
|
|
|
uint16_t ident0;
|
|
|
|
uint16_t ident1;
|
|
|
|
uint16_t ident2;
|
|
|
|
uint16_t ident3;
|
2007-11-17 12:50:55 +01:00
|
|
|
uint8_t cfi_table[0x52];
|
2013-04-05 17:18:00 +02:00
|
|
|
uint64_t counter;
|
2010-01-24 20:38:29 +01:00
|
|
|
unsigned int writeblock_size;
|
2011-08-04 14:55:30 +02:00
|
|
|
MemoryRegion mem;
|
2012-10-30 08:45:11 +01:00
|
|
|
char *name;
|
2007-11-17 12:50:55 +01:00
|
|
|
void *storage;
|
2016-04-15 13:41:30 +02:00
|
|
|
VMChangeStateEntry *vmstate;
|
2017-01-27 16:20:22 +01:00
|
|
|
bool old_multiple_chip_handling;
|
2007-11-17 12:50:55 +01:00
|
|
|
};
|
|
|
|
|
pflash_cfi01: write flash contents to bdrv on incoming migration
A drive that backs a pflash device is special:
- it is very small,
- its entire contents are kept in a RAMBlock at all times, covering the
guest-phys address range that provides the guest's view of the emulated
flash chip.
The pflash device model keeps the drive (the host-side file) and the
guest-visible flash contents in sync. When migrating the guest, the
guest-visible flash contents (the RAMBlock) is migrated by default, but on
the target host, the drive (the host-side file) remains in full sync with
the RAMBlock only if:
- the source and target hosts share the storage underlying the pflash
drive,
- or the migration requests full or incremental block migration too, which
then covers all drives.
Due to the special nature of pflash drives, the following scenario makes
sense as well:
- no full nor incremental block migration, covering all drives, alongside
the base migration (justified eg. by shared storage for "normal" (big)
drives),
- non-shared storage for pflash drives.
In this case, currently only those portions of the flash drive are updated
on the target disk that the guest reprograms while running on the target
host.
In order to restore accord, dump the entire flash contents to the bdrv in
a post_load() callback.
- The read-only check follows the other call-sites of pflash_update();
- both "pfl->ro" and pflash_update() reflect / consider the case when
"pfl->bs" is NULL;
- the total size of the flash device is calculated as in
pflash_cfi01_realize().
When using shared storage, or requesting full or incremental block
migration along with the normal migration, the patch should incur a
harmless rewrite from the target side.
It is assumed that, on the target host, RAM is loaded ahead of the call to
pflash_post_load().
Suggested-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2014-08-23 12:19:07 +02:00
|
|
|
static int pflash_post_load(void *opaque, int version_id);
|
|
|
|
|
2013-04-05 17:18:00 +02:00
|
|
|
static const VMStateDescription vmstate_pflash = {
|
|
|
|
.name = "pflash_cfi01",
|
|
|
|
.version_id = 1,
|
|
|
|
.minimum_version_id = 1,
|
pflash_cfi01: write flash contents to bdrv on incoming migration
A drive that backs a pflash device is special:
- it is very small,
- its entire contents are kept in a RAMBlock at all times, covering the
guest-phys address range that provides the guest's view of the emulated
flash chip.
The pflash device model keeps the drive (the host-side file) and the
guest-visible flash contents in sync. When migrating the guest, the
guest-visible flash contents (the RAMBlock) is migrated by default, but on
the target host, the drive (the host-side file) remains in full sync with
the RAMBlock only if:
- the source and target hosts share the storage underlying the pflash
drive,
- or the migration requests full or incremental block migration too, which
then covers all drives.
Due to the special nature of pflash drives, the following scenario makes
sense as well:
- no full nor incremental block migration, covering all drives, alongside
the base migration (justified eg. by shared storage for "normal" (big)
drives),
- non-shared storage for pflash drives.
In this case, currently only those portions of the flash drive are updated
on the target disk that the guest reprograms while running on the target
host.
In order to restore accord, dump the entire flash contents to the bdrv in
a post_load() callback.
- The read-only check follows the other call-sites of pflash_update();
- both "pfl->ro" and pflash_update() reflect / consider the case when
"pfl->bs" is NULL;
- the total size of the flash device is calculated as in
pflash_cfi01_realize().
When using shared storage, or requesting full or incremental block
migration along with the normal migration, the patch should incur a
harmless rewrite from the target side.
It is assumed that, on the target host, RAM is loaded ahead of the call to
pflash_post_load().
Suggested-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2014-08-23 12:19:07 +02:00
|
|
|
.post_load = pflash_post_load,
|
2013-04-05 17:18:00 +02:00
|
|
|
.fields = (VMStateField[]) {
|
2019-03-08 10:45:56 +01:00
|
|
|
VMSTATE_UINT8(wcycle, PFlashCFI01),
|
|
|
|
VMSTATE_UINT8(cmd, PFlashCFI01),
|
|
|
|
VMSTATE_UINT8(status, PFlashCFI01),
|
|
|
|
VMSTATE_UINT64(counter, PFlashCFI01),
|
2013-04-05 17:18:00 +02:00
|
|
|
VMSTATE_END_OF_LIST()
|
|
|
|
}
|
|
|
|
};
|
|
|
|
|
2013-12-17 20:42:27 +01:00
|
|
|
/* Perform a CFI query based on the bank width of the flash.
|
|
|
|
* If this code is called we know we have a device_width set for
|
|
|
|
* this flash.
|
|
|
|
*/
|
2019-03-08 10:45:56 +01:00
|
|
|
static uint32_t pflash_cfi_query(PFlashCFI01 *pfl, hwaddr offset)
|
2013-12-17 20:42:27 +01:00
|
|
|
{
|
|
|
|
int i;
|
|
|
|
uint32_t resp = 0;
|
|
|
|
hwaddr boff;
|
|
|
|
|
|
|
|
/* Adjust incoming offset to match expected device-width
|
|
|
|
* addressing. CFI query addresses are always specified in terms of
|
|
|
|
* the maximum supported width of the device. This means that x8
|
|
|
|
* devices and x8/x16 devices in x8 mode behave differently. For
|
|
|
|
* devices that are not used at their max width, we will be
|
|
|
|
* provided with addresses that use higher address bits than
|
|
|
|
* expected (based on the max width), so we will shift them lower
|
|
|
|
* so that they will match the addresses used when
|
|
|
|
* device_width==max_device_width.
|
|
|
|
*/
|
|
|
|
boff = offset >> (ctz32(pfl->bank_width) +
|
|
|
|
ctz32(pfl->max_device_width) - ctz32(pfl->device_width));
|
|
|
|
|
2018-04-05 01:32:38 +02:00
|
|
|
if (boff >= sizeof(pfl->cfi_table)) {
|
2013-12-17 20:42:27 +01:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
/* Now we will construct the CFI response generated by a single
|
|
|
|
* device, then replicate that for all devices that make up the
|
|
|
|
* bus. For wide parts used in x8 mode, CFI query responses
|
|
|
|
* are different than native byte-wide parts.
|
|
|
|
*/
|
|
|
|
resp = pfl->cfi_table[boff];
|
|
|
|
if (pfl->device_width != pfl->max_device_width) {
|
|
|
|
/* The only case currently supported is x8 mode for a
|
|
|
|
* wider part.
|
|
|
|
*/
|
|
|
|
if (pfl->device_width != 1 || pfl->bank_width > 4) {
|
|
|
|
DPRINTF("%s: Unsupported device configuration: "
|
|
|
|
"device_width=%d, max_device_width=%d\n",
|
|
|
|
__func__, pfl->device_width,
|
|
|
|
pfl->max_device_width);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
/* CFI query data is repeated, rather than zero padded for
|
|
|
|
* wide devices used in x8 mode.
|
|
|
|
*/
|
|
|
|
for (i = 1; i < pfl->max_device_width; i++) {
|
|
|
|
resp = deposit32(resp, 8 * i, 8, pfl->cfi_table[boff]);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
/* Replicate responses for each device in bank. */
|
|
|
|
if (pfl->device_width < pfl->bank_width) {
|
|
|
|
for (i = pfl->device_width;
|
|
|
|
i < pfl->bank_width; i += pfl->device_width) {
|
|
|
|
resp = deposit32(resp, 8 * i, 8 * pfl->device_width, resp);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
return resp;
|
|
|
|
}
|
|
|
|
|
2013-12-17 20:42:27 +01:00
|
|
|
|
|
|
|
|
|
|
|
/* Perform a device id query based on the bank width of the flash. */
|
2019-03-08 10:45:56 +01:00
|
|
|
static uint32_t pflash_devid_query(PFlashCFI01 *pfl, hwaddr offset)
|
2013-12-17 20:42:27 +01:00
|
|
|
{
|
|
|
|
int i;
|
|
|
|
uint32_t resp;
|
|
|
|
hwaddr boff;
|
|
|
|
|
|
|
|
/* Adjust incoming offset to match expected device-width
|
|
|
|
* addressing. Device ID read addresses are always specified in
|
|
|
|
* terms of the maximum supported width of the device. This means
|
|
|
|
* that x8 devices and x8/x16 devices in x8 mode behave
|
|
|
|
* differently. For devices that are not used at their max width,
|
|
|
|
* we will be provided with addresses that use higher address bits
|
|
|
|
* than expected (based on the max width), so we will shift them
|
|
|
|
* lower so that they will match the addresses used when
|
|
|
|
* device_width==max_device_width.
|
|
|
|
*/
|
|
|
|
boff = offset >> (ctz32(pfl->bank_width) +
|
|
|
|
ctz32(pfl->max_device_width) - ctz32(pfl->device_width));
|
|
|
|
|
|
|
|
/* Mask off upper bits which may be used in to query block
|
|
|
|
* or sector lock status at other addresses.
|
|
|
|
* Offsets 2/3 are block lock status, is not emulated.
|
|
|
|
*/
|
|
|
|
switch (boff & 0xFF) {
|
|
|
|
case 0:
|
|
|
|
resp = pfl->ident0;
|
2018-06-21 19:12:57 +02:00
|
|
|
trace_pflash_manufacturer_id(resp);
|
2013-12-17 20:42:27 +01:00
|
|
|
break;
|
|
|
|
case 1:
|
|
|
|
resp = pfl->ident1;
|
2018-06-21 19:12:57 +02:00
|
|
|
trace_pflash_device_id(resp);
|
2013-12-17 20:42:27 +01:00
|
|
|
break;
|
|
|
|
default:
|
2018-06-21 19:12:57 +02:00
|
|
|
trace_pflash_device_info(offset);
|
2013-12-17 20:42:27 +01:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
/* Replicate responses for each device in bank. */
|
|
|
|
if (pfl->device_width < pfl->bank_width) {
|
|
|
|
for (i = pfl->device_width;
|
|
|
|
i < pfl->bank_width; i += pfl->device_width) {
|
|
|
|
resp = deposit32(resp, 8 * i, 8 * pfl->device_width, resp);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
return resp;
|
|
|
|
}
|
|
|
|
|
2019-03-08 10:45:56 +01:00
|
|
|
static uint32_t pflash_data_read(PFlashCFI01 *pfl, hwaddr offset,
|
2015-04-08 14:09:43 +02:00
|
|
|
int width, int be)
|
|
|
|
{
|
|
|
|
uint8_t *p;
|
|
|
|
uint32_t ret;
|
|
|
|
|
|
|
|
p = pfl->storage;
|
|
|
|
switch (width) {
|
|
|
|
case 1:
|
|
|
|
ret = p[offset];
|
|
|
|
break;
|
|
|
|
case 2:
|
|
|
|
if (be) {
|
|
|
|
ret = p[offset] << 8;
|
|
|
|
ret |= p[offset + 1];
|
|
|
|
} else {
|
|
|
|
ret = p[offset];
|
|
|
|
ret |= p[offset + 1] << 8;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
case 4:
|
|
|
|
if (be) {
|
|
|
|
ret = p[offset] << 24;
|
|
|
|
ret |= p[offset + 1] << 16;
|
|
|
|
ret |= p[offset + 2] << 8;
|
|
|
|
ret |= p[offset + 3];
|
|
|
|
} else {
|
|
|
|
ret = p[offset];
|
|
|
|
ret |= p[offset + 1] << 8;
|
|
|
|
ret |= p[offset + 2] << 16;
|
|
|
|
ret |= p[offset + 3] << 24;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
DPRINTF("BUG in %s\n", __func__);
|
|
|
|
abort();
|
|
|
|
}
|
2019-11-08 15:11:34 +01:00
|
|
|
trace_pflash_data_read(offset, width, ret);
|
2015-04-08 14:09:43 +02:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2019-03-08 10:45:56 +01:00
|
|
|
static uint32_t pflash_read(PFlashCFI01 *pfl, hwaddr offset,
|
|
|
|
int width, int be)
|
2007-11-17 12:50:55 +01:00
|
|
|
{
|
2012-10-23 12:30:10 +02:00
|
|
|
hwaddr boff;
|
2007-11-17 12:50:55 +01:00
|
|
|
uint32_t ret;
|
|
|
|
|
|
|
|
ret = -1;
|
|
|
|
switch (pfl->cmd) {
|
2013-02-28 19:23:12 +01:00
|
|
|
default:
|
|
|
|
/* This should never happen : reset state & treat it as a read */
|
|
|
|
DPRINTF("%s: unknown command state: %x\n", __func__, pfl->cmd);
|
|
|
|
pfl->wcycle = 0;
|
2019-07-16 19:06:56 +02:00
|
|
|
/*
|
|
|
|
* The command 0x00 is not assigned by the CFI open standard,
|
|
|
|
* but QEMU historically uses it for the READ_ARRAY command (0xff).
|
|
|
|
*/
|
|
|
|
pfl->cmd = 0x00;
|
2013-02-28 19:23:12 +01:00
|
|
|
/* fall through to read code */
|
2019-07-16 19:06:56 +02:00
|
|
|
case 0x00: /* This model reset value for READ_ARRAY (not CFI compliant) */
|
2007-11-17 12:50:55 +01:00
|
|
|
/* Flash area read */
|
2015-04-08 14:09:43 +02:00
|
|
|
ret = pflash_data_read(pfl, offset, width, be);
|
2007-11-17 12:50:55 +01:00
|
|
|
break;
|
2013-02-28 19:23:12 +01:00
|
|
|
case 0x10: /* Single byte program */
|
2007-11-17 12:50:55 +01:00
|
|
|
case 0x20: /* Block erase */
|
2013-02-28 19:23:12 +01:00
|
|
|
case 0x28: /* Block erase */
|
|
|
|
case 0x40: /* single byte program */
|
2007-11-17 12:50:55 +01:00
|
|
|
case 0x50: /* Clear status register */
|
|
|
|
case 0x60: /* Block /un)lock */
|
|
|
|
case 0x70: /* Status Register */
|
|
|
|
case 0xe8: /* Write block */
|
2013-12-17 20:42:26 +01:00
|
|
|
/* Status register read. Return status from each device in
|
|
|
|
* bank.
|
|
|
|
*/
|
2007-11-17 12:50:55 +01:00
|
|
|
ret = pfl->status;
|
2013-12-17 20:42:26 +01:00
|
|
|
if (pfl->device_width && width > pfl->device_width) {
|
|
|
|
int shift = pfl->device_width * 8;
|
|
|
|
while (shift + pfl->device_width * 8 <= width * 8) {
|
|
|
|
ret |= pfl->status << shift;
|
|
|
|
shift += pfl->device_width * 8;
|
|
|
|
}
|
|
|
|
} else if (!pfl->device_width && width > 2) {
|
|
|
|
/* Handle 32 bit flash cases where device width is not
|
|
|
|
* set. (Existing behavior before device width added.)
|
|
|
|
*/
|
2013-06-14 09:30:48 +02:00
|
|
|
ret |= pfl->status << 16;
|
|
|
|
}
|
2007-11-17 12:50:55 +01:00
|
|
|
DPRINTF("%s: status %x\n", __func__, ret);
|
|
|
|
break;
|
2010-05-01 19:34:06 +02:00
|
|
|
case 0x90:
|
2013-12-17 20:42:27 +01:00
|
|
|
if (!pfl->device_width) {
|
|
|
|
/* Preserve old behavior if device width not specified */
|
|
|
|
boff = offset & 0xFF;
|
|
|
|
if (pfl->bank_width == 2) {
|
|
|
|
boff = boff >> 1;
|
|
|
|
} else if (pfl->bank_width == 4) {
|
|
|
|
boff = boff >> 2;
|
|
|
|
}
|
2013-12-17 20:42:27 +01:00
|
|
|
|
2013-12-17 20:42:27 +01:00
|
|
|
switch (boff) {
|
|
|
|
case 0:
|
|
|
|
ret = pfl->ident0 << 8 | pfl->ident1;
|
2018-06-21 19:12:57 +02:00
|
|
|
trace_pflash_manufacturer_id(ret);
|
2013-12-17 20:42:27 +01:00
|
|
|
break;
|
|
|
|
case 1:
|
|
|
|
ret = pfl->ident2 << 8 | pfl->ident3;
|
2018-06-21 19:12:57 +02:00
|
|
|
trace_pflash_device_id(ret);
|
2013-12-17 20:42:27 +01:00
|
|
|
break;
|
|
|
|
default:
|
2018-06-21 19:12:57 +02:00
|
|
|
trace_pflash_device_info(boff);
|
2013-12-17 20:42:27 +01:00
|
|
|
ret = 0;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
/* If we have a read larger than the bank_width, combine multiple
|
|
|
|
* manufacturer/device ID queries into a single response.
|
|
|
|
*/
|
|
|
|
int i;
|
|
|
|
for (i = 0; i < width; i += pfl->bank_width) {
|
|
|
|
ret = deposit32(ret, i * 8, pfl->bank_width * 8,
|
|
|
|
pflash_devid_query(pfl,
|
|
|
|
offset + i * pfl->bank_width));
|
|
|
|
}
|
2010-05-01 19:34:06 +02:00
|
|
|
}
|
|
|
|
break;
|
2007-11-17 12:50:55 +01:00
|
|
|
case 0x98: /* Query mode */
|
2013-12-17 20:42:27 +01:00
|
|
|
if (!pfl->device_width) {
|
|
|
|
/* Preserve old behavior if device width not specified */
|
|
|
|
boff = offset & 0xFF;
|
|
|
|
if (pfl->bank_width == 2) {
|
|
|
|
boff = boff >> 1;
|
|
|
|
} else if (pfl->bank_width == 4) {
|
|
|
|
boff = boff >> 2;
|
|
|
|
}
|
|
|
|
|
2018-04-05 01:32:38 +02:00
|
|
|
if (boff < sizeof(pfl->cfi_table)) {
|
2013-12-17 20:42:27 +01:00
|
|
|
ret = pfl->cfi_table[boff];
|
2018-04-05 01:32:38 +02:00
|
|
|
} else {
|
|
|
|
ret = 0;
|
2013-12-17 20:42:27 +01:00
|
|
|
}
|
|
|
|
} else {
|
|
|
|
/* If we have a read larger than the bank_width, combine multiple
|
|
|
|
* CFI queries into a single response.
|
|
|
|
*/
|
|
|
|
int i;
|
|
|
|
for (i = 0; i < width; i += pfl->bank_width) {
|
|
|
|
ret = deposit32(ret, i * 8, pfl->bank_width * 8,
|
|
|
|
pflash_cfi_query(pfl,
|
|
|
|
offset + i * pfl->bank_width));
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2007-11-17 12:50:55 +01:00
|
|
|
break;
|
|
|
|
}
|
2019-11-08 15:11:34 +01:00
|
|
|
trace_pflash_io_read(offset, width, ret, pfl->cmd, pfl->wcycle);
|
2019-06-26 18:39:10 +02:00
|
|
|
|
2007-11-17 12:50:55 +01:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* update flash content on disk */
|
2019-03-08 10:45:56 +01:00
|
|
|
static void pflash_update(PFlashCFI01 *pfl, int offset,
|
2007-11-17 12:50:55 +01:00
|
|
|
int size)
|
|
|
|
{
|
|
|
|
int offset_end;
|
2020-04-08 02:35:52 +02:00
|
|
|
int ret;
|
2014-10-07 13:59:18 +02:00
|
|
|
if (pfl->blk) {
|
2007-11-17 12:50:55 +01:00
|
|
|
offset_end = offset + size;
|
2016-05-06 18:26:38 +02:00
|
|
|
/* widen to sector boundaries */
|
|
|
|
offset = QEMU_ALIGN_DOWN(offset, BDRV_SECTOR_SIZE);
|
|
|
|
offset_end = QEMU_ALIGN_UP(offset_end, BDRV_SECTOR_SIZE);
|
2020-04-08 02:35:52 +02:00
|
|
|
ret = blk_pwrite(pfl->blk, offset, pfl->storage + offset,
|
2016-05-06 18:26:38 +02:00
|
|
|
offset_end - offset, 0);
|
2020-04-08 02:35:52 +02:00
|
|
|
if (ret < 0) {
|
|
|
|
/* TODO set error bit in status */
|
|
|
|
error_report("Could not update PFLASH: %s", strerror(-ret));
|
|
|
|
}
|
2007-11-17 12:50:55 +01:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2019-03-08 10:45:56 +01:00
|
|
|
static inline void pflash_data_write(PFlashCFI01 *pfl, hwaddr offset,
|
2010-03-29 21:23:56 +02:00
|
|
|
uint32_t value, int width, int be)
|
2008-12-07 13:36:28 +01:00
|
|
|
{
|
|
|
|
uint8_t *p = pfl->storage;
|
|
|
|
|
2019-11-08 15:11:34 +01:00
|
|
|
trace_pflash_data_write(offset, width, value, pfl->counter);
|
2008-12-07 13:36:28 +01:00
|
|
|
switch (width) {
|
|
|
|
case 1:
|
|
|
|
p[offset] = value;
|
|
|
|
break;
|
|
|
|
case 2:
|
2010-03-29 21:23:56 +02:00
|
|
|
if (be) {
|
|
|
|
p[offset] = value >> 8;
|
|
|
|
p[offset + 1] = value;
|
|
|
|
} else {
|
|
|
|
p[offset] = value;
|
|
|
|
p[offset + 1] = value >> 8;
|
|
|
|
}
|
2008-12-07 13:36:28 +01:00
|
|
|
break;
|
|
|
|
case 4:
|
2010-03-29 21:23:56 +02:00
|
|
|
if (be) {
|
|
|
|
p[offset] = value >> 24;
|
|
|
|
p[offset + 1] = value >> 16;
|
|
|
|
p[offset + 2] = value >> 8;
|
|
|
|
p[offset + 3] = value;
|
|
|
|
} else {
|
|
|
|
p[offset] = value;
|
|
|
|
p[offset + 1] = value >> 8;
|
|
|
|
p[offset + 2] = value >> 16;
|
|
|
|
p[offset + 3] = value >> 24;
|
|
|
|
}
|
2008-12-07 13:36:28 +01:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
}
|
|
|
|
|
2019-03-08 10:45:56 +01:00
|
|
|
static void pflash_write(PFlashCFI01 *pfl, hwaddr offset,
|
2010-03-29 21:23:56 +02:00
|
|
|
uint32_t value, int width, int be)
|
2007-11-17 12:50:55 +01:00
|
|
|
{
|
|
|
|
uint8_t *p;
|
|
|
|
uint8_t cmd;
|
|
|
|
|
|
|
|
cmd = value;
|
|
|
|
|
2019-11-08 15:11:34 +01:00
|
|
|
trace_pflash_io_write(offset, width, value, pfl->wcycle);
|
2010-01-24 19:28:55 +01:00
|
|
|
if (!pfl->wcycle) {
|
|
|
|
/* Set the device in I/O access mode */
|
2013-05-07 19:04:25 +02:00
|
|
|
memory_region_rom_device_set_romd(&pfl->mem, false);
|
2010-01-24 19:28:55 +01:00
|
|
|
}
|
2007-11-17 12:50:55 +01:00
|
|
|
|
|
|
|
switch (pfl->wcycle) {
|
|
|
|
case 0:
|
|
|
|
/* read mode */
|
|
|
|
switch (cmd) {
|
2019-07-16 19:06:56 +02:00
|
|
|
case 0x00: /* This model reset value for READ_ARRAY (not CFI) */
|
2019-07-16 19:11:57 +02:00
|
|
|
goto mode_read_array;
|
2008-12-07 13:36:28 +01:00
|
|
|
case 0x10: /* Single Byte Program */
|
|
|
|
case 0x40: /* Single Byte Program */
|
2009-09-14 10:44:26 +02:00
|
|
|
DPRINTF("%s: Single Byte Program\n", __func__);
|
2008-12-07 13:36:28 +01:00
|
|
|
break;
|
2007-11-17 12:50:55 +01:00
|
|
|
case 0x20: /* Block erase */
|
|
|
|
p = pfl->storage;
|
|
|
|
offset &= ~(pfl->sector_len - 1);
|
|
|
|
|
2012-10-30 08:45:11 +01:00
|
|
|
DPRINTF("%s: block erase at " TARGET_FMT_plx " bytes %x\n",
|
|
|
|
__func__, offset, (unsigned)pfl->sector_len);
|
2007-11-17 12:50:55 +01:00
|
|
|
|
2012-02-22 08:18:49 +01:00
|
|
|
if (!pfl->ro) {
|
|
|
|
memset(p + offset, 0xff, pfl->sector_len);
|
|
|
|
pflash_update(pfl, offset, pfl->sector_len);
|
|
|
|
} else {
|
|
|
|
pfl->status |= 0x20; /* Block erase error */
|
|
|
|
}
|
2007-11-17 12:50:55 +01:00
|
|
|
pfl->status |= 0x80; /* Ready! */
|
|
|
|
break;
|
|
|
|
case 0x50: /* Clear status bits */
|
|
|
|
DPRINTF("%s: Clear status bits\n", __func__);
|
|
|
|
pfl->status = 0x0;
|
2019-07-16 19:11:57 +02:00
|
|
|
goto mode_read_array;
|
2007-11-17 12:50:55 +01:00
|
|
|
case 0x60: /* Block (un)lock */
|
|
|
|
DPRINTF("%s: Block unlock\n", __func__);
|
|
|
|
break;
|
|
|
|
case 0x70: /* Status Register */
|
|
|
|
DPRINTF("%s: Read status register\n", __func__);
|
|
|
|
pfl->cmd = cmd;
|
|
|
|
return;
|
2010-05-01 19:34:06 +02:00
|
|
|
case 0x90: /* Read Device ID */
|
|
|
|
DPRINTF("%s: Read Device information\n", __func__);
|
|
|
|
pfl->cmd = cmd;
|
|
|
|
return;
|
2007-11-17 12:50:55 +01:00
|
|
|
case 0x98: /* CFI query */
|
|
|
|
DPRINTF("%s: CFI query\n", __func__);
|
|
|
|
break;
|
|
|
|
case 0xe8: /* Write to buffer */
|
|
|
|
DPRINTF("%s: Write to buffer\n", __func__);
|
2019-03-08 10:45:58 +01:00
|
|
|
/* FIXME should save @offset, @width for case 1+ */
|
|
|
|
qemu_log_mask(LOG_UNIMP,
|
|
|
|
"%s: Write to buffer emulation is flawed\n",
|
|
|
|
__func__);
|
2007-11-17 12:50:55 +01:00
|
|
|
pfl->status |= 0x80; /* Ready! */
|
|
|
|
break;
|
2012-11-24 23:03:13 +01:00
|
|
|
case 0xf0: /* Probe for AMD flash */
|
|
|
|
DPRINTF("%s: Probe for AMD flash\n", __func__);
|
2019-07-16 19:11:57 +02:00
|
|
|
goto mode_read_array;
|
|
|
|
case 0xff: /* Read Array */
|
2007-11-17 12:50:55 +01:00
|
|
|
DPRINTF("%s: Read array mode\n", __func__);
|
2019-07-16 19:11:57 +02:00
|
|
|
goto mode_read_array;
|
2007-11-17 12:50:55 +01:00
|
|
|
default:
|
|
|
|
goto error_flash;
|
|
|
|
}
|
|
|
|
pfl->wcycle++;
|
|
|
|
pfl->cmd = cmd;
|
2012-09-01 13:00:48 +02:00
|
|
|
break;
|
2007-11-17 12:50:55 +01:00
|
|
|
case 1:
|
|
|
|
switch (pfl->cmd) {
|
2008-12-07 13:36:28 +01:00
|
|
|
case 0x10: /* Single Byte Program */
|
|
|
|
case 0x40: /* Single Byte Program */
|
|
|
|
DPRINTF("%s: Single Byte Program\n", __func__);
|
2012-02-22 08:18:49 +01:00
|
|
|
if (!pfl->ro) {
|
|
|
|
pflash_data_write(pfl, offset, value, width, be);
|
|
|
|
pflash_update(pfl, offset, width);
|
|
|
|
} else {
|
|
|
|
pfl->status |= 0x10; /* Programming error */
|
|
|
|
}
|
2008-12-07 13:36:28 +01:00
|
|
|
pfl->status |= 0x80; /* Ready! */
|
|
|
|
pfl->wcycle = 0;
|
|
|
|
break;
|
2007-11-17 12:50:55 +01:00
|
|
|
case 0x20: /* Block erase */
|
|
|
|
case 0x28:
|
|
|
|
if (cmd == 0xd0) { /* confirm */
|
2008-10-04 01:00:09 +02:00
|
|
|
pfl->wcycle = 0;
|
2007-11-17 12:50:55 +01:00
|
|
|
pfl->status |= 0x80;
|
2019-07-16 19:11:57 +02:00
|
|
|
} else if (cmd == 0xff) { /* Read Array */
|
|
|
|
goto mode_read_array;
|
2007-11-17 12:50:55 +01:00
|
|
|
} else
|
|
|
|
goto error_flash;
|
|
|
|
|
|
|
|
break;
|
|
|
|
case 0xe8:
|
2013-12-17 20:42:26 +01:00
|
|
|
/* Mask writeblock size based on device width, or bank width if
|
|
|
|
* device width not specified.
|
|
|
|
*/
|
2019-03-08 10:45:58 +01:00
|
|
|
/* FIXME check @offset, @width */
|
2013-12-17 20:42:26 +01:00
|
|
|
if (pfl->device_width) {
|
|
|
|
value = extract32(value, 0, pfl->device_width * 8);
|
|
|
|
} else {
|
|
|
|
value = extract32(value, 0, pfl->bank_width * 8);
|
|
|
|
}
|
2008-10-11 11:19:57 +02:00
|
|
|
DPRINTF("%s: block write of %x bytes\n", __func__, value);
|
|
|
|
pfl->counter = value;
|
2007-11-17 12:50:55 +01:00
|
|
|
pfl->wcycle++;
|
|
|
|
break;
|
|
|
|
case 0x60:
|
|
|
|
if (cmd == 0xd0) {
|
|
|
|
pfl->wcycle = 0;
|
|
|
|
pfl->status |= 0x80;
|
|
|
|
} else if (cmd == 0x01) {
|
|
|
|
pfl->wcycle = 0;
|
|
|
|
pfl->status |= 0x80;
|
2019-07-16 19:11:57 +02:00
|
|
|
} else if (cmd == 0xff) { /* Read Array */
|
|
|
|
goto mode_read_array;
|
2007-11-17 12:50:55 +01:00
|
|
|
} else {
|
|
|
|
DPRINTF("%s: Unknown (un)locking command\n", __func__);
|
2019-07-16 19:11:57 +02:00
|
|
|
goto mode_read_array;
|
2007-11-17 12:50:55 +01:00
|
|
|
}
|
|
|
|
break;
|
|
|
|
case 0x98:
|
2019-07-16 19:11:57 +02:00
|
|
|
if (cmd == 0xff) { /* Read Array */
|
|
|
|
goto mode_read_array;
|
2007-11-17 12:50:55 +01:00
|
|
|
} else {
|
|
|
|
DPRINTF("%s: leaving query mode\n", __func__);
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
goto error_flash;
|
|
|
|
}
|
2012-09-01 13:00:48 +02:00
|
|
|
break;
|
2007-11-17 12:50:55 +01:00
|
|
|
case 2:
|
|
|
|
switch (pfl->cmd) {
|
|
|
|
case 0xe8: /* Block write */
|
2019-03-08 10:45:58 +01:00
|
|
|
/* FIXME check @offset, @width */
|
2012-02-22 08:18:49 +01:00
|
|
|
if (!pfl->ro) {
|
2019-03-08 10:45:58 +01:00
|
|
|
/*
|
|
|
|
* FIXME writing straight to memory is *wrong*. We
|
|
|
|
* should write to a buffer, and flush it to memory
|
|
|
|
* only on confirm command (see below).
|
|
|
|
*/
|
2012-02-22 08:18:49 +01:00
|
|
|
pflash_data_write(pfl, offset, value, width, be);
|
|
|
|
} else {
|
|
|
|
pfl->status |= 0x10; /* Programming error */
|
|
|
|
}
|
2007-11-17 12:50:55 +01:00
|
|
|
|
|
|
|
pfl->status |= 0x80;
|
|
|
|
|
|
|
|
if (!pfl->counter) {
|
2012-10-23 12:30:10 +02:00
|
|
|
hwaddr mask = pfl->writeblock_size - 1;
|
2010-01-24 20:38:29 +01:00
|
|
|
mask = ~mask;
|
|
|
|
|
2007-11-17 12:50:55 +01:00
|
|
|
DPRINTF("%s: block write finished\n", __func__);
|
|
|
|
pfl->wcycle++;
|
2012-02-22 08:18:49 +01:00
|
|
|
if (!pfl->ro) {
|
|
|
|
/* Flush the entire write buffer onto backing storage. */
|
2019-03-08 10:45:58 +01:00
|
|
|
/* FIXME premature! */
|
2012-02-22 08:18:49 +01:00
|
|
|
pflash_update(pfl, offset & mask, pfl->writeblock_size);
|
|
|
|
} else {
|
|
|
|
pfl->status |= 0x10; /* Programming error */
|
|
|
|
}
|
2007-11-17 12:50:55 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
pfl->counter--;
|
|
|
|
break;
|
2007-11-18 03:09:36 +01:00
|
|
|
default:
|
|
|
|
goto error_flash;
|
2007-11-17 12:50:55 +01:00
|
|
|
}
|
2012-09-01 13:00:48 +02:00
|
|
|
break;
|
2007-11-17 12:50:55 +01:00
|
|
|
case 3: /* Confirm mode */
|
|
|
|
switch (pfl->cmd) {
|
|
|
|
case 0xe8: /* Block write */
|
|
|
|
if (cmd == 0xd0) {
|
2019-03-08 10:45:58 +01:00
|
|
|
/* FIXME this is where we should write out the buffer */
|
2007-11-17 12:50:55 +01:00
|
|
|
pfl->wcycle = 0;
|
|
|
|
pfl->status |= 0x80;
|
|
|
|
} else {
|
2019-03-08 10:45:57 +01:00
|
|
|
qemu_log_mask(LOG_UNIMP,
|
|
|
|
"%s: Aborting write to buffer not implemented,"
|
|
|
|
" the data is already written to storage!\n"
|
|
|
|
"Flash device reset into READ mode.\n",
|
|
|
|
__func__);
|
2019-07-16 19:11:57 +02:00
|
|
|
goto mode_read_array;
|
2007-11-17 12:50:55 +01:00
|
|
|
}
|
2007-11-18 03:09:36 +01:00
|
|
|
break;
|
|
|
|
default:
|
|
|
|
goto error_flash;
|
2007-11-17 12:50:55 +01:00
|
|
|
}
|
2012-09-01 13:00:48 +02:00
|
|
|
break;
|
2007-11-17 12:50:55 +01:00
|
|
|
default:
|
|
|
|
/* Should never happen */
|
|
|
|
DPRINTF("%s: invalid write state\n", __func__);
|
2019-07-16 19:11:57 +02:00
|
|
|
goto mode_read_array;
|
2007-11-17 12:50:55 +01:00
|
|
|
}
|
|
|
|
return;
|
|
|
|
|
|
|
|
error_flash:
|
2012-12-04 07:04:33 +01:00
|
|
|
qemu_log_mask(LOG_UNIMP, "%s: Unimplemented flash cmd sequence "
|
|
|
|
"(offset " TARGET_FMT_plx ", wcycle 0x%x cmd 0x%x value 0x%x)"
|
|
|
|
"\n", __func__, offset, pfl->wcycle, pfl->cmd, value);
|
2007-11-17 12:50:55 +01:00
|
|
|
|
2019-07-16 19:11:57 +02:00
|
|
|
mode_read_array:
|
2018-06-21 19:12:57 +02:00
|
|
|
trace_pflash_reset();
|
2013-05-07 19:04:25 +02:00
|
|
|
memory_region_rom_device_set_romd(&pfl->mem, true);
|
2007-11-17 12:50:55 +01:00
|
|
|
pfl->wcycle = 0;
|
2019-07-16 19:06:56 +02:00
|
|
|
pfl->cmd = 0x00; /* This model reset value for READ_ARRAY (not CFI) */
|
2007-11-17 12:50:55 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
|
2015-04-08 14:09:43 +02:00
|
|
|
static MemTxResult pflash_mem_read_with_attrs(void *opaque, hwaddr addr, uint64_t *value,
|
|
|
|
unsigned len, MemTxAttrs attrs)
|
2010-03-29 21:23:56 +02:00
|
|
|
{
|
2019-03-08 10:45:56 +01:00
|
|
|
PFlashCFI01 *pfl = opaque;
|
2015-04-08 14:00:53 +02:00
|
|
|
bool be = !!(pfl->features & (1 << PFLASH_BE));
|
2010-03-29 21:23:56 +02:00
|
|
|
|
2015-04-08 14:09:43 +02:00
|
|
|
if ((pfl->features & (1 << PFLASH_SECURE)) && !attrs.secure) {
|
|
|
|
*value = pflash_data_read(opaque, addr, len, be);
|
|
|
|
} else {
|
|
|
|
*value = pflash_read(opaque, addr, len, be);
|
|
|
|
}
|
|
|
|
return MEMTX_OK;
|
2010-03-29 21:23:56 +02:00
|
|
|
}
|
|
|
|
|
2015-04-08 14:09:43 +02:00
|
|
|
static MemTxResult pflash_mem_write_with_attrs(void *opaque, hwaddr addr, uint64_t value,
|
|
|
|
unsigned len, MemTxAttrs attrs)
|
2007-11-17 12:50:55 +01:00
|
|
|
{
|
2019-03-08 10:45:56 +01:00
|
|
|
PFlashCFI01 *pfl = opaque;
|
2015-04-08 14:00:53 +02:00
|
|
|
bool be = !!(pfl->features & (1 << PFLASH_BE));
|
2010-03-29 21:23:56 +02:00
|
|
|
|
2015-04-08 14:09:43 +02:00
|
|
|
if ((pfl->features & (1 << PFLASH_SECURE)) && !attrs.secure) {
|
|
|
|
return MEMTX_ERROR;
|
|
|
|
} else {
|
|
|
|
pflash_write(opaque, addr, value, len, be);
|
|
|
|
return MEMTX_OK;
|
|
|
|
}
|
2007-11-17 12:50:55 +01:00
|
|
|
}
|
|
|
|
|
2015-04-08 14:00:53 +02:00
|
|
|
static const MemoryRegionOps pflash_cfi01_ops = {
|
2015-04-08 14:09:43 +02:00
|
|
|
.read_with_attrs = pflash_mem_read_with_attrs,
|
|
|
|
.write_with_attrs = pflash_mem_write_with_attrs,
|
2011-08-04 14:55:30 +02:00
|
|
|
.endianness = DEVICE_NATIVE_ENDIAN,
|
2007-11-17 12:50:55 +01:00
|
|
|
};
|
|
|
|
|
2013-07-01 12:18:27 +02:00
|
|
|
static void pflash_cfi01_realize(DeviceState *dev, Error **errp)
|
2007-11-17 12:50:55 +01:00
|
|
|
{
|
2020-07-07 18:50:33 +02:00
|
|
|
ERRP_GUARD();
|
2019-03-08 10:45:59 +01:00
|
|
|
PFlashCFI01 *pfl = PFLASH_CFI01(dev);
|
2012-10-30 08:45:11 +01:00
|
|
|
uint64_t total_len;
|
2009-08-21 06:57:38 +02:00
|
|
|
int ret;
|
2017-01-27 16:20:22 +01:00
|
|
|
uint64_t blocks_per_device, sector_len_per_device, device_len;
|
2014-06-19 19:06:25 +02:00
|
|
|
int num_devices;
|
2007-11-17 12:50:55 +01:00
|
|
|
|
hw/block/pflash_cfi*.c: fix confusing assert fail message
The patch is to fix the confusing assert fail message caused by
un-initialized device structure (from bite sized tasks).
The bug can be reproduced by
./qemu-system-x86_64 -nographic -device cfi.pflash01
The CFI hardware is dynamically loaded by QOM realizing mechanism,
however the realizing function in pflash_cfi01_realize function
requires the device being initialized manually before calling, like
./qemu-system-x86_64 -nographic
-device cfi.pflash01,num-blocks=1024,sector-length=4096,name=testcard
Once the initializing parameters are left off in the command, it will
leave the device structure not initialized, which makes
pflash_cfi01_realize try to realize a zero-volume card, causing
/mnt/EXT_volume/projects/qemu/qemu-dev/exec.c:1378:
find_ram_offset: Assertion `size != 0\' failed.
Through my test, at least the flash device's block-number, sector-length
and its name is needed for pflash_cfi01_realize to behave correctly. So
I think the new asserts are needed to hint the QEMU user to specify
the device's parameters correctly.
Signed-off-by: Ziyue Yang <skiver.cloud.yzy@gmail.com>
Message-Id: <1481810693-13733-1-git-send-email-skiver.cloud.yzy@gmail.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Ziyue Yang <yzylivezh@hotmail.com>
2016-12-15 15:04:53 +01:00
|
|
|
if (pfl->sector_len == 0) {
|
|
|
|
error_setg(errp, "attribute \"sector-length\" not specified or zero.");
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
if (pfl->nb_blocs == 0) {
|
|
|
|
error_setg(errp, "attribute \"num-blocks\" not specified or zero.");
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
if (pfl->name == NULL) {
|
|
|
|
error_setg(errp, "attribute \"name\" not specified.");
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2012-10-30 08:45:11 +01:00
|
|
|
total_len = pfl->sector_len * pfl->nb_blocs;
|
2007-11-17 12:50:55 +01:00
|
|
|
|
2014-06-19 19:06:25 +02:00
|
|
|
/* These are only used to expose the parameters of each device
|
|
|
|
* in the cfi_table[].
|
|
|
|
*/
|
|
|
|
num_devices = pfl->device_width ? (pfl->bank_width / pfl->device_width) : 1;
|
2017-01-27 16:20:22 +01:00
|
|
|
if (pfl->old_multiple_chip_handling) {
|
|
|
|
blocks_per_device = pfl->nb_blocs / num_devices;
|
|
|
|
sector_len_per_device = pfl->sector_len;
|
|
|
|
} else {
|
|
|
|
blocks_per_device = pfl->nb_blocs;
|
|
|
|
sector_len_per_device = pfl->sector_len / num_devices;
|
|
|
|
}
|
|
|
|
device_len = sector_len_per_device * blocks_per_device;
|
2014-06-19 19:06:25 +02:00
|
|
|
|
2017-07-07 16:42:54 +02:00
|
|
|
memory_region_init_rom_device(
|
2013-06-07 03:25:08 +02:00
|
|
|
&pfl->mem, OBJECT(dev),
|
2015-04-08 14:00:53 +02:00
|
|
|
&pflash_cfi01_ops,
|
2015-04-08 13:53:29 +02:00
|
|
|
pfl,
|
2020-07-07 18:50:33 +02:00
|
|
|
pfl->name, total_len, errp);
|
|
|
|
if (*errp) {
|
2014-09-09 07:27:57 +02:00
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2011-08-04 14:55:30 +02:00
|
|
|
pfl->storage = memory_region_get_ram_ptr(&pfl->mem);
|
2013-07-01 12:18:27 +02:00
|
|
|
sysbus_init_mmio(SYS_BUS_DEVICE(dev), &pfl->mem);
|
2007-11-17 12:50:55 +01:00
|
|
|
|
2017-01-24 13:43:31 +01:00
|
|
|
if (pfl->blk) {
|
|
|
|
uint64_t perm;
|
|
|
|
pfl->ro = blk_is_read_only(pfl->blk);
|
|
|
|
perm = BLK_PERM_CONSISTENT_READ | (pfl->ro ? 0 : BLK_PERM_WRITE);
|
|
|
|
ret = blk_set_perm(pfl->blk, perm, BLK_PERM_ALL, errp);
|
|
|
|
if (ret < 0) {
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
pfl->ro = 0;
|
|
|
|
}
|
|
|
|
|
2014-10-07 13:59:18 +02:00
|
|
|
if (pfl->blk) {
|
pflash: Require backend size to match device, improve errors
We reject undersized backends with a rather enigmatic "failed to read
the initial flash content" error. For instance:
$ qemu-system-ppc64 -S -display none -M sam460ex -drive if=pflash,format=raw,file=eins.img
qemu-system-ppc64: Initialization of device cfi.pflash02 failed: failed to read the initial flash content
We happily accept oversized images, ignoring their tail. Throwing
away parts of firmware that way is pretty much certain to end in an
even more enigmatic failure to boot.
Require the backend's size to match the device's size exactly. Report
mismatch like this:
qemu-system-ppc64: Initialization of device cfi.pflash01 failed: device requires 1048576 bytes, block backend provides 512 bytes
Improve the error for actual read failures to "can't read block
backend".
To avoid duplicating even more code between the two pflash device
models, do all that in new helper blk_check_size_and_read_all().
The error reporting can still be confusing. For instance:
qemu-system-ppc64 -S -display none -M taihu -drive if=pflash,format=raw,file=eins.img -drive if=pflash,unit=1,format=raw,file=zwei.img
qemu-system-ppc64: Initialization of device cfi.pflash02 failed: device requires 2097152 bytes, block backend provides 512 bytes
Leaves the user guessing which of the two -drive is wrong. Mention
the issue in a TODO comment.
Suggested-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <20190319163551.32499-2-armbru@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-03-19 17:35:50 +01:00
|
|
|
if (!blk_check_size_and_read_all(pfl->blk, pfl->storage, total_len,
|
|
|
|
errp)) {
|
2012-10-30 08:45:11 +01:00
|
|
|
vmstate_unregister_ram(&pfl->mem, DEVICE(pfl));
|
2013-07-01 12:18:27 +02:00
|
|
|
return;
|
2009-08-21 06:57:38 +02:00
|
|
|
}
|
2007-11-17 12:50:55 +01:00
|
|
|
}
|
2012-02-22 08:18:49 +01:00
|
|
|
|
2013-12-17 20:42:27 +01:00
|
|
|
/* Default to devices being used at their maximum device width. This was
|
|
|
|
* assumed before the device_width support was added.
|
|
|
|
*/
|
|
|
|
if (!pfl->max_device_width) {
|
|
|
|
pfl->max_device_width = pfl->device_width;
|
|
|
|
}
|
|
|
|
|
2007-11-17 12:50:55 +01:00
|
|
|
pfl->wcycle = 0;
|
2019-07-16 19:06:56 +02:00
|
|
|
/*
|
|
|
|
* The command 0x00 is not assigned by the CFI open standard,
|
|
|
|
* but QEMU historically uses it for the READ_ARRAY command (0xff).
|
|
|
|
*/
|
|
|
|
pfl->cmd = 0x00;
|
2019-07-16 17:49:55 +02:00
|
|
|
pfl->status = 0x80; /* WSM ready */
|
2007-11-17 12:50:55 +01:00
|
|
|
/* Hardcoded CFI table */
|
|
|
|
/* Standard "QRY" string */
|
|
|
|
pfl->cfi_table[0x10] = 'Q';
|
|
|
|
pfl->cfi_table[0x11] = 'R';
|
|
|
|
pfl->cfi_table[0x12] = 'Y';
|
|
|
|
/* Command set (Intel) */
|
|
|
|
pfl->cfi_table[0x13] = 0x01;
|
|
|
|
pfl->cfi_table[0x14] = 0x00;
|
|
|
|
/* Primary extended table address (none) */
|
|
|
|
pfl->cfi_table[0x15] = 0x31;
|
|
|
|
pfl->cfi_table[0x16] = 0x00;
|
|
|
|
/* Alternate command set (none) */
|
|
|
|
pfl->cfi_table[0x17] = 0x00;
|
|
|
|
pfl->cfi_table[0x18] = 0x00;
|
|
|
|
/* Alternate extended table (none) */
|
|
|
|
pfl->cfi_table[0x19] = 0x00;
|
|
|
|
pfl->cfi_table[0x1A] = 0x00;
|
|
|
|
/* Vcc min */
|
|
|
|
pfl->cfi_table[0x1B] = 0x45;
|
|
|
|
/* Vcc max */
|
|
|
|
pfl->cfi_table[0x1C] = 0x55;
|
|
|
|
/* Vpp min (no Vpp pin) */
|
|
|
|
pfl->cfi_table[0x1D] = 0x00;
|
|
|
|
/* Vpp max (no Vpp pin) */
|
|
|
|
pfl->cfi_table[0x1E] = 0x00;
|
|
|
|
/* Reserved */
|
|
|
|
pfl->cfi_table[0x1F] = 0x07;
|
|
|
|
/* Timeout for min size buffer write */
|
|
|
|
pfl->cfi_table[0x20] = 0x07;
|
|
|
|
/* Typical timeout for block erase */
|
|
|
|
pfl->cfi_table[0x21] = 0x0a;
|
|
|
|
/* Typical timeout for full chip erase (4096 ms) */
|
|
|
|
pfl->cfi_table[0x22] = 0x00;
|
|
|
|
/* Reserved */
|
|
|
|
pfl->cfi_table[0x23] = 0x04;
|
|
|
|
/* Max timeout for buffer write */
|
|
|
|
pfl->cfi_table[0x24] = 0x04;
|
|
|
|
/* Max timeout for block erase */
|
|
|
|
pfl->cfi_table[0x25] = 0x04;
|
|
|
|
/* Max timeout for chip erase */
|
|
|
|
pfl->cfi_table[0x26] = 0x00;
|
|
|
|
/* Device size */
|
2014-06-19 19:06:25 +02:00
|
|
|
pfl->cfi_table[0x27] = ctz32(device_len); /* + 1; */
|
2007-11-17 12:50:55 +01:00
|
|
|
/* Flash device interface (8 & 16 bits) */
|
|
|
|
pfl->cfi_table[0x28] = 0x02;
|
|
|
|
pfl->cfi_table[0x29] = 0x00;
|
|
|
|
/* Max number of bytes in multi-bytes write */
|
2013-12-17 20:42:26 +01:00
|
|
|
if (pfl->bank_width == 1) {
|
2010-01-24 18:39:51 +01:00
|
|
|
pfl->cfi_table[0x2A] = 0x08;
|
|
|
|
} else {
|
|
|
|
pfl->cfi_table[0x2A] = 0x0B;
|
|
|
|
}
|
2010-01-24 20:38:29 +01:00
|
|
|
pfl->writeblock_size = 1 << pfl->cfi_table[0x2A];
|
2017-01-27 16:20:22 +01:00
|
|
|
if (!pfl->old_multiple_chip_handling && num_devices > 1) {
|
|
|
|
pfl->writeblock_size *= num_devices;
|
|
|
|
}
|
2010-01-24 20:38:29 +01:00
|
|
|
|
2007-11-17 12:50:55 +01:00
|
|
|
pfl->cfi_table[0x2B] = 0x00;
|
|
|
|
/* Number of erase block regions (uniform) */
|
|
|
|
pfl->cfi_table[0x2C] = 0x01;
|
|
|
|
/* Erase block region 1 */
|
2014-06-19 19:06:25 +02:00
|
|
|
pfl->cfi_table[0x2D] = blocks_per_device - 1;
|
|
|
|
pfl->cfi_table[0x2E] = (blocks_per_device - 1) >> 8;
|
2017-01-27 16:20:22 +01:00
|
|
|
pfl->cfi_table[0x2F] = sector_len_per_device >> 8;
|
|
|
|
pfl->cfi_table[0x30] = sector_len_per_device >> 16;
|
2007-11-17 12:50:55 +01:00
|
|
|
|
|
|
|
/* Extended */
|
|
|
|
pfl->cfi_table[0x31] = 'P';
|
|
|
|
pfl->cfi_table[0x32] = 'R';
|
|
|
|
pfl->cfi_table[0x33] = 'I';
|
|
|
|
|
|
|
|
pfl->cfi_table[0x34] = '1';
|
2012-09-03 22:47:03 +02:00
|
|
|
pfl->cfi_table[0x35] = '0';
|
2007-11-17 12:50:55 +01:00
|
|
|
|
|
|
|
pfl->cfi_table[0x36] = 0x00;
|
|
|
|
pfl->cfi_table[0x37] = 0x00;
|
|
|
|
pfl->cfi_table[0x38] = 0x00;
|
|
|
|
pfl->cfi_table[0x39] = 0x00;
|
|
|
|
|
|
|
|
pfl->cfi_table[0x3a] = 0x00;
|
|
|
|
|
|
|
|
pfl->cfi_table[0x3b] = 0x00;
|
|
|
|
pfl->cfi_table[0x3c] = 0x00;
|
|
|
|
|
2012-09-03 22:47:03 +02:00
|
|
|
pfl->cfi_table[0x3f] = 0x01; /* Number of protection fields */
|
2012-10-30 08:45:11 +01:00
|
|
|
}
|
|
|
|
|
2019-07-02 00:38:38 +02:00
|
|
|
static void pflash_cfi01_system_reset(DeviceState *dev)
|
|
|
|
{
|
|
|
|
PFlashCFI01 *pfl = PFLASH_CFI01(dev);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* The command 0x00 is not assigned by the CFI open standard,
|
|
|
|
* but QEMU historically uses it for the READ_ARRAY command (0xff).
|
|
|
|
*/
|
|
|
|
pfl->cmd = 0x00;
|
|
|
|
pfl->wcycle = 0;
|
|
|
|
memory_region_rom_device_set_romd(&pfl->mem, true);
|
|
|
|
/*
|
|
|
|
* The WSM ready timer occurs at most 150ns after system reset.
|
|
|
|
* This model deliberately ignores this delay.
|
|
|
|
*/
|
|
|
|
pfl->status = 0x80;
|
|
|
|
}
|
|
|
|
|
2012-10-30 08:45:11 +01:00
|
|
|
static Property pflash_cfi01_properties[] = {
|
2019-03-08 10:45:56 +01:00
|
|
|
DEFINE_PROP_DRIVE("drive", PFlashCFI01, blk),
|
2014-06-19 19:06:25 +02:00
|
|
|
/* num-blocks is the number of blocks actually visible to the guest,
|
|
|
|
* ie the total size of the device divided by the sector length.
|
|
|
|
* If we're emulating flash devices wired in parallel the actual
|
|
|
|
* number of blocks per indvidual device will differ.
|
|
|
|
*/
|
2019-03-08 10:45:56 +01:00
|
|
|
DEFINE_PROP_UINT32("num-blocks", PFlashCFI01, nb_blocs, 0),
|
|
|
|
DEFINE_PROP_UINT64("sector-length", PFlashCFI01, sector_len, 0),
|
2013-12-17 20:42:27 +01:00
|
|
|
/* width here is the overall width of this QEMU device in bytes.
|
|
|
|
* The QEMU device may be emulating a number of flash devices
|
|
|
|
* wired up in parallel; the width of each individual flash
|
|
|
|
* device should be specified via device-width. If the individual
|
|
|
|
* devices have a maximum width which is greater than the width
|
|
|
|
* they are being used for, this maximum width should be set via
|
|
|
|
* max-device-width (which otherwise defaults to device-width).
|
|
|
|
* So for instance a 32-bit wide QEMU flash device made from four
|
|
|
|
* 16-bit flash devices used in 8-bit wide mode would be configured
|
|
|
|
* with width = 4, device-width = 1, max-device-width = 2.
|
|
|
|
*
|
|
|
|
* If device-width is not specified we default to backwards
|
|
|
|
* compatible behaviour which is a bad emulation of two
|
|
|
|
* 16 bit devices making up a 32 bit wide QEMU device. This
|
|
|
|
* is deprecated for new uses of this device.
|
|
|
|
*/
|
2019-03-08 10:45:56 +01:00
|
|
|
DEFINE_PROP_UINT8("width", PFlashCFI01, bank_width, 0),
|
|
|
|
DEFINE_PROP_UINT8("device-width", PFlashCFI01, device_width, 0),
|
|
|
|
DEFINE_PROP_UINT8("max-device-width", PFlashCFI01, max_device_width, 0),
|
|
|
|
DEFINE_PROP_BIT("big-endian", PFlashCFI01, features, PFLASH_BE, 0),
|
|
|
|
DEFINE_PROP_BIT("secure", PFlashCFI01, features, PFLASH_SECURE, 0),
|
|
|
|
DEFINE_PROP_UINT16("id0", PFlashCFI01, ident0, 0),
|
|
|
|
DEFINE_PROP_UINT16("id1", PFlashCFI01, ident1, 0),
|
|
|
|
DEFINE_PROP_UINT16("id2", PFlashCFI01, ident2, 0),
|
|
|
|
DEFINE_PROP_UINT16("id3", PFlashCFI01, ident3, 0),
|
|
|
|
DEFINE_PROP_STRING("name", PFlashCFI01, name),
|
|
|
|
DEFINE_PROP_BOOL("old-multiple-chip-handling", PFlashCFI01,
|
2017-01-27 16:20:22 +01:00
|
|
|
old_multiple_chip_handling, false),
|
2012-10-30 08:45:11 +01:00
|
|
|
DEFINE_PROP_END_OF_LIST(),
|
|
|
|
};
|
|
|
|
|
|
|
|
static void pflash_cfi01_class_init(ObjectClass *klass, void *data)
|
|
|
|
{
|
|
|
|
DeviceClass *dc = DEVICE_CLASS(klass);
|
|
|
|
|
2019-07-02 00:38:38 +02:00
|
|
|
dc->reset = pflash_cfi01_system_reset;
|
2013-07-01 12:18:27 +02:00
|
|
|
dc->realize = pflash_cfi01_realize;
|
2020-01-10 16:30:32 +01:00
|
|
|
device_class_set_props(dc, pflash_cfi01_properties);
|
2013-04-05 17:18:00 +02:00
|
|
|
dc->vmsd = &vmstate_pflash;
|
2013-07-29 16:17:45 +02:00
|
|
|
set_bit(DEVICE_CATEGORY_STORAGE, dc->categories);
|
2012-10-30 08:45:11 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
static const TypeInfo pflash_cfi01_info = {
|
2019-03-08 10:45:59 +01:00
|
|
|
.name = TYPE_PFLASH_CFI01,
|
2012-10-30 08:45:11 +01:00
|
|
|
.parent = TYPE_SYS_BUS_DEVICE,
|
2019-03-08 10:45:56 +01:00
|
|
|
.instance_size = sizeof(PFlashCFI01),
|
2012-10-30 08:45:11 +01:00
|
|
|
.class_init = pflash_cfi01_class_init,
|
|
|
|
};
|
|
|
|
|
|
|
|
static void pflash_cfi01_register_types(void)
|
|
|
|
{
|
|
|
|
type_register_static(&pflash_cfi01_info);
|
|
|
|
}
|
|
|
|
|
|
|
|
type_init(pflash_cfi01_register_types)
|
|
|
|
|
2019-03-08 10:45:56 +01:00
|
|
|
PFlashCFI01 *pflash_cfi01_register(hwaddr base,
|
2019-03-08 10:46:09 +01:00
|
|
|
const char *name,
|
2019-03-08 10:45:56 +01:00
|
|
|
hwaddr size,
|
|
|
|
BlockBackend *blk,
|
2019-03-08 10:46:10 +01:00
|
|
|
uint32_t sector_len,
|
2019-03-08 10:45:56 +01:00
|
|
|
int bank_width,
|
|
|
|
uint16_t id0, uint16_t id1,
|
|
|
|
uint16_t id2, uint16_t id3,
|
|
|
|
int be)
|
2012-10-30 08:45:11 +01:00
|
|
|
{
|
qdev: Convert uses of qdev_create() with Coccinelle
This is the transformation explained in the commit before previous.
Takes care of just one pattern that needs conversion. More to come in
this series.
Coccinelle script:
@ depends on !(file in "hw/arm/highbank.c")@
expression bus, type_name, dev, expr;
@@
- dev = qdev_create(bus, type_name);
+ dev = qdev_new(type_name);
... when != dev = expr
- qdev_init_nofail(dev);
+ qdev_realize_and_unref(dev, bus, &error_fatal);
@@
expression bus, type_name, dev, expr;
identifier DOWN;
@@
- dev = DOWN(qdev_create(bus, type_name));
+ dev = DOWN(qdev_new(type_name));
... when != dev = expr
- qdev_init_nofail(DEVICE(dev));
+ qdev_realize_and_unref(DEVICE(dev), bus, &error_fatal);
@@
expression bus, type_name, expr;
identifier dev;
@@
- DeviceState *dev = qdev_create(bus, type_name);
+ DeviceState *dev = qdev_new(type_name);
... when != dev = expr
- qdev_init_nofail(dev);
+ qdev_realize_and_unref(dev, bus, &error_fatal);
@@
expression bus, type_name, dev, expr, errp;
symbol true;
@@
- dev = qdev_create(bus, type_name);
+ dev = qdev_new(type_name);
... when != dev = expr
- object_property_set_bool(OBJECT(dev), true, "realized", errp);
+ qdev_realize_and_unref(dev, bus, errp);
@@
expression bus, type_name, expr, errp;
identifier dev;
symbol true;
@@
- DeviceState *dev = qdev_create(bus, type_name);
+ DeviceState *dev = qdev_new(type_name);
... when != dev = expr
- object_property_set_bool(OBJECT(dev), true, "realized", errp);
+ qdev_realize_and_unref(dev, bus, errp);
The first rule exempts hw/arm/highbank.c, because it matches along two
control flow paths there, with different @type_name. Covered by the
next commit's manual conversions.
Missing #include "qapi/error.h" added manually.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <20200610053247.1583243-10-armbru@redhat.com>
[Conflicts in hw/misc/empty_slot.c and hw/sparc/leon3.c resolved]
2020-06-10 07:31:58 +02:00
|
|
|
DeviceState *dev = qdev_new(TYPE_PFLASH_CFI01);
|
2012-10-30 08:45:11 +01:00
|
|
|
|
2015-03-09 19:17:26 +01:00
|
|
|
if (blk) {
|
qdev: Make qdev_prop_set_drive() match the other helpers
qdev_prop_set_drive() can fail. None of the other qdev_prop_set_FOO()
can; they abort on error.
To clean up this inconsistency, rename qdev_prop_set_drive() to
qdev_prop_set_drive_err(), and create a qdev_prop_set_drive() that
aborts on error.
Coccinelle script to update callers:
@ depends on !(file in "hw/core/qdev-properties-system.c")@
expression dev, name, value;
symbol error_abort;
@@
- qdev_prop_set_drive(dev, name, value, &error_abort);
+ qdev_prop_set_drive(dev, name, value);
@@
expression dev, name, value, errp;
@@
- qdev_prop_set_drive(dev, name, value, errp);
+ qdev_prop_set_drive_err(dev, name, value, errp);
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-Id: <20200622094227.1271650-14-armbru@redhat.com>
2020-06-22 11:42:24 +02:00
|
|
|
qdev_prop_set_drive(dev, "drive", blk);
|
2012-10-30 08:45:11 +01:00
|
|
|
}
|
2020-05-11 22:52:46 +02:00
|
|
|
assert(QEMU_IS_ALIGNED(size, sector_len));
|
2019-03-08 10:46:10 +01:00
|
|
|
qdev_prop_set_uint32(dev, "num-blocks", size / sector_len);
|
2012-10-30 08:45:11 +01:00
|
|
|
qdev_prop_set_uint64(dev, "sector-length", sector_len);
|
2013-12-17 20:42:26 +01:00
|
|
|
qdev_prop_set_uint8(dev, "width", bank_width);
|
2015-04-08 13:53:29 +02:00
|
|
|
qdev_prop_set_bit(dev, "big-endian", !!be);
|
2012-10-30 08:45:11 +01:00
|
|
|
qdev_prop_set_uint16(dev, "id0", id0);
|
|
|
|
qdev_prop_set_uint16(dev, "id1", id1);
|
|
|
|
qdev_prop_set_uint16(dev, "id2", id2);
|
|
|
|
qdev_prop_set_uint16(dev, "id3", id3);
|
|
|
|
qdev_prop_set_string(dev, "name", name);
|
sysbus: Convert to sysbus_realize() etc. with Coccinelle
Convert from qdev_realize(), qdev_realize_and_unref() with null @bus
argument to sysbus_realize(), sysbus_realize_and_unref().
Coccinelle script:
@@
expression dev, errp;
@@
- qdev_realize(DEVICE(dev), NULL, errp);
+ sysbus_realize(SYS_BUS_DEVICE(dev), errp);
@@
expression sysbus_dev, dev, errp;
@@
+ sysbus_dev = SYS_BUS_DEVICE(dev);
- qdev_realize_and_unref(dev, NULL, errp);
+ sysbus_realize_and_unref(sysbus_dev, errp);
- sysbus_dev = SYS_BUS_DEVICE(dev);
@@
expression sysbus_dev, dev, errp;
expression expr;
@@
sysbus_dev = SYS_BUS_DEVICE(dev);
... when != dev = expr;
- qdev_realize_and_unref(dev, NULL, errp);
+ sysbus_realize_and_unref(sysbus_dev, errp);
@@
expression dev, errp;
@@
- qdev_realize_and_unref(DEVICE(dev), NULL, errp);
+ sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), errp);
@@
expression dev, errp;
@@
- qdev_realize_and_unref(dev, NULL, errp);
+ sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), errp);
Whitespace changes minimized manually.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <20200610053247.1583243-46-armbru@redhat.com>
[Conflicts in hw/misc/empty_slot.c and hw/sparc/leon3.c resolved]
2020-06-10 07:32:34 +02:00
|
|
|
sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
|
2012-10-30 08:45:11 +01:00
|
|
|
|
2013-07-01 12:18:26 +02:00
|
|
|
sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
|
2019-03-08 10:45:59 +01:00
|
|
|
return PFLASH_CFI01(dev);
|
2007-11-17 12:50:55 +01:00
|
|
|
}
|
2011-08-04 14:55:30 +02:00
|
|
|
|
2019-03-08 14:14:41 +01:00
|
|
|
BlockBackend *pflash_cfi01_get_blk(PFlashCFI01 *fl)
|
|
|
|
{
|
|
|
|
return fl->blk;
|
|
|
|
}
|
|
|
|
|
2019-03-08 10:45:56 +01:00
|
|
|
MemoryRegion *pflash_cfi01_get_memory(PFlashCFI01 *fl)
|
2011-08-04 14:55:30 +02:00
|
|
|
{
|
|
|
|
return &fl->mem;
|
|
|
|
}
|
pflash_cfi01: write flash contents to bdrv on incoming migration
A drive that backs a pflash device is special:
- it is very small,
- its entire contents are kept in a RAMBlock at all times, covering the
guest-phys address range that provides the guest's view of the emulated
flash chip.
The pflash device model keeps the drive (the host-side file) and the
guest-visible flash contents in sync. When migrating the guest, the
guest-visible flash contents (the RAMBlock) is migrated by default, but on
the target host, the drive (the host-side file) remains in full sync with
the RAMBlock only if:
- the source and target hosts share the storage underlying the pflash
drive,
- or the migration requests full or incremental block migration too, which
then covers all drives.
Due to the special nature of pflash drives, the following scenario makes
sense as well:
- no full nor incremental block migration, covering all drives, alongside
the base migration (justified eg. by shared storage for "normal" (big)
drives),
- non-shared storage for pflash drives.
In this case, currently only those portions of the flash drive are updated
on the target disk that the guest reprograms while running on the target
host.
In order to restore accord, dump the entire flash contents to the bdrv in
a post_load() callback.
- The read-only check follows the other call-sites of pflash_update();
- both "pfl->ro" and pflash_update() reflect / consider the case when
"pfl->bs" is NULL;
- the total size of the flash device is calculated as in
pflash_cfi01_realize().
When using shared storage, or requesting full or incremental block
migration along with the normal migration, the patch should incur a
harmless rewrite from the target side.
It is assumed that, on the target host, RAM is loaded ahead of the call to
pflash_post_load().
Suggested-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2014-08-23 12:19:07 +02:00
|
|
|
|
2019-05-07 13:55:02 +02:00
|
|
|
/*
|
|
|
|
* Handle -drive if=pflash for machines that use properties.
|
|
|
|
* If @dinfo is null, do nothing.
|
|
|
|
* Else if @fl's property "drive" is already set, fatal error.
|
|
|
|
* Else set it to the BlockBackend with @dinfo.
|
|
|
|
*/
|
|
|
|
void pflash_cfi01_legacy_drive(PFlashCFI01 *fl, DriveInfo *dinfo)
|
|
|
|
{
|
|
|
|
Location loc;
|
|
|
|
|
|
|
|
if (!dinfo) {
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
loc_push_none(&loc);
|
|
|
|
qemu_opts_loc_restore(dinfo->opts);
|
|
|
|
if (fl->blk) {
|
|
|
|
error_report("clashes with -machine");
|
|
|
|
exit(1);
|
|
|
|
}
|
qdev: Make qdev_prop_set_drive() match the other helpers
qdev_prop_set_drive() can fail. None of the other qdev_prop_set_FOO()
can; they abort on error.
To clean up this inconsistency, rename qdev_prop_set_drive() to
qdev_prop_set_drive_err(), and create a qdev_prop_set_drive() that
aborts on error.
Coccinelle script to update callers:
@ depends on !(file in "hw/core/qdev-properties-system.c")@
expression dev, name, value;
symbol error_abort;
@@
- qdev_prop_set_drive(dev, name, value, &error_abort);
+ qdev_prop_set_drive(dev, name, value);
@@
expression dev, name, value, errp;
@@
- qdev_prop_set_drive(dev, name, value, errp);
+ qdev_prop_set_drive_err(dev, name, value, errp);
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-Id: <20200622094227.1271650-14-armbru@redhat.com>
2020-06-22 11:42:24 +02:00
|
|
|
qdev_prop_set_drive_err(DEVICE(fl), "drive", blk_by_legacy_dinfo(dinfo),
|
|
|
|
&error_fatal);
|
2019-05-07 13:55:02 +02:00
|
|
|
loc_pop(&loc);
|
|
|
|
}
|
|
|
|
|
2016-04-15 13:41:30 +02:00
|
|
|
static void postload_update_cb(void *opaque, int running, RunState state)
|
|
|
|
{
|
2019-03-08 10:45:56 +01:00
|
|
|
PFlashCFI01 *pfl = opaque;
|
2016-04-15 13:41:30 +02:00
|
|
|
|
|
|
|
/* This is called after bdrv_invalidate_cache_all. */
|
|
|
|
qemu_del_vm_change_state_handler(pfl->vmstate);
|
|
|
|
pfl->vmstate = NULL;
|
|
|
|
|
|
|
|
DPRINTF("%s: updating bdrv for %s\n", __func__, pfl->name);
|
|
|
|
pflash_update(pfl, 0, pfl->sector_len * pfl->nb_blocs);
|
|
|
|
}
|
|
|
|
|
pflash_cfi01: write flash contents to bdrv on incoming migration
A drive that backs a pflash device is special:
- it is very small,
- its entire contents are kept in a RAMBlock at all times, covering the
guest-phys address range that provides the guest's view of the emulated
flash chip.
The pflash device model keeps the drive (the host-side file) and the
guest-visible flash contents in sync. When migrating the guest, the
guest-visible flash contents (the RAMBlock) is migrated by default, but on
the target host, the drive (the host-side file) remains in full sync with
the RAMBlock only if:
- the source and target hosts share the storage underlying the pflash
drive,
- or the migration requests full or incremental block migration too, which
then covers all drives.
Due to the special nature of pflash drives, the following scenario makes
sense as well:
- no full nor incremental block migration, covering all drives, alongside
the base migration (justified eg. by shared storage for "normal" (big)
drives),
- non-shared storage for pflash drives.
In this case, currently only those portions of the flash drive are updated
on the target disk that the guest reprograms while running on the target
host.
In order to restore accord, dump the entire flash contents to the bdrv in
a post_load() callback.
- The read-only check follows the other call-sites of pflash_update();
- both "pfl->ro" and pflash_update() reflect / consider the case when
"pfl->bs" is NULL;
- the total size of the flash device is calculated as in
pflash_cfi01_realize().
When using shared storage, or requesting full or incremental block
migration along with the normal migration, the patch should incur a
harmless rewrite from the target side.
It is assumed that, on the target host, RAM is loaded ahead of the call to
pflash_post_load().
Suggested-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2014-08-23 12:19:07 +02:00
|
|
|
static int pflash_post_load(void *opaque, int version_id)
|
|
|
|
{
|
2019-03-08 10:45:56 +01:00
|
|
|
PFlashCFI01 *pfl = opaque;
|
pflash_cfi01: write flash contents to bdrv on incoming migration
A drive that backs a pflash device is special:
- it is very small,
- its entire contents are kept in a RAMBlock at all times, covering the
guest-phys address range that provides the guest's view of the emulated
flash chip.
The pflash device model keeps the drive (the host-side file) and the
guest-visible flash contents in sync. When migrating the guest, the
guest-visible flash contents (the RAMBlock) is migrated by default, but on
the target host, the drive (the host-side file) remains in full sync with
the RAMBlock only if:
- the source and target hosts share the storage underlying the pflash
drive,
- or the migration requests full or incremental block migration too, which
then covers all drives.
Due to the special nature of pflash drives, the following scenario makes
sense as well:
- no full nor incremental block migration, covering all drives, alongside
the base migration (justified eg. by shared storage for "normal" (big)
drives),
- non-shared storage for pflash drives.
In this case, currently only those portions of the flash drive are updated
on the target disk that the guest reprograms while running on the target
host.
In order to restore accord, dump the entire flash contents to the bdrv in
a post_load() callback.
- The read-only check follows the other call-sites of pflash_update();
- both "pfl->ro" and pflash_update() reflect / consider the case when
"pfl->bs" is NULL;
- the total size of the flash device is calculated as in
pflash_cfi01_realize().
When using shared storage, or requesting full or incremental block
migration along with the normal migration, the patch should incur a
harmless rewrite from the target side.
It is assumed that, on the target host, RAM is loaded ahead of the call to
pflash_post_load().
Suggested-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2014-08-23 12:19:07 +02:00
|
|
|
|
|
|
|
if (!pfl->ro) {
|
2016-04-15 13:41:30 +02:00
|
|
|
pfl->vmstate = qemu_add_vm_change_state_handler(postload_update_cb,
|
|
|
|
pfl);
|
pflash_cfi01: write flash contents to bdrv on incoming migration
A drive that backs a pflash device is special:
- it is very small,
- its entire contents are kept in a RAMBlock at all times, covering the
guest-phys address range that provides the guest's view of the emulated
flash chip.
The pflash device model keeps the drive (the host-side file) and the
guest-visible flash contents in sync. When migrating the guest, the
guest-visible flash contents (the RAMBlock) is migrated by default, but on
the target host, the drive (the host-side file) remains in full sync with
the RAMBlock only if:
- the source and target hosts share the storage underlying the pflash
drive,
- or the migration requests full or incremental block migration too, which
then covers all drives.
Due to the special nature of pflash drives, the following scenario makes
sense as well:
- no full nor incremental block migration, covering all drives, alongside
the base migration (justified eg. by shared storage for "normal" (big)
drives),
- non-shared storage for pflash drives.
In this case, currently only those portions of the flash drive are updated
on the target disk that the guest reprograms while running on the target
host.
In order to restore accord, dump the entire flash contents to the bdrv in
a post_load() callback.
- The read-only check follows the other call-sites of pflash_update();
- both "pfl->ro" and pflash_update() reflect / consider the case when
"pfl->bs" is NULL;
- the total size of the flash device is calculated as in
pflash_cfi01_realize().
When using shared storage, or requesting full or incremental block
migration along with the normal migration, the patch should incur a
harmless rewrite from the target side.
It is assumed that, on the target host, RAM is loaded ahead of the call to
pflash_post_load().
Suggested-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2014-08-23 12:19:07 +02:00
|
|
|
}
|
|
|
|
return 0;
|
|
|
|
}
|