2003-02-18 23:55:36 +01:00
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/*
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2003-09-30 22:57:29 +02:00
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* qemu user main
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2007-09-16 23:08:06 +02:00
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*
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2008-01-06 18:21:48 +01:00
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* Copyright (c) 2003-2008 Fabrice Bellard
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2003-02-18 23:55:36 +01:00
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
|
2009-07-16 22:47:01 +02:00
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* along with this program; if not, see <http://www.gnu.org/licenses/>.
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2003-02-18 23:55:36 +01:00
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*/
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2016-01-26 19:17:02 +01:00
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#include "qemu/osdep.h"
|
2016-06-01 11:44:21 +02:00
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#include "qemu-version.h"
|
2009-04-07 08:57:11 +02:00
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#include <sys/syscall.h>
|
2010-03-19 22:21:13 +01:00
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#include <sys/resource.h>
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2003-02-18 23:55:36 +01:00
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2016-06-15 19:27:16 +02:00
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#include "qapi/error.h"
|
2003-03-23 21:17:16 +01:00
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|
#include "qemu.h"
|
2016-03-20 18:16:19 +01:00
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|
#include "qemu/path.h"
|
2016-07-15 19:08:38 +02:00
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|
#include "qemu/config-file.h"
|
2016-03-20 18:16:19 +01:00
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#include "qemu/cutils.h"
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#include "qemu/help_option.h"
|
2011-06-19 22:38:22 +02:00
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|
#include "cpu.h"
|
2016-03-15 13:18:37 +01:00
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|
|
#include "exec/exec-all.h"
|
2010-05-06 17:50:41 +02:00
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|
|
#include "tcg.h"
|
2012-12-17 18:20:00 +01:00
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|
|
#include "qemu/timer.h"
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|
|
|
#include "qemu/envlist.h"
|
2012-03-30 19:02:50 +02:00
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|
|
#include "elf.h"
|
2016-07-15 19:08:38 +02:00
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|
#include "trace/control.h"
|
2018-02-20 18:33:04 +01:00
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|
#include "target_elf.h"
|
2018-04-11 20:56:33 +02:00
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#include "cpu_loop-common.h"
|
2009-01-30 20:59:17 +01:00
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|
2009-01-30 21:09:01 +01:00
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char *exec_path;
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|
2009-04-05 22:08:59 +02:00
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int singlestep;
|
2015-08-29 09:29:52 +02:00
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|
static const char *filename;
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static const char *argv0;
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static int gdbstub_port;
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|
static envlist_t *envlist;
|
2013-07-02 18:26:11 +02:00
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|
static const char *cpu_model;
|
2018-02-07 11:40:26 +01:00
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static const char *cpu_type;
|
2009-07-17 13:48:08 +02:00
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|
unsigned long mmap_min_addr;
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|
unsigned long guest_base;
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int have_guest_base;
|
2015-11-13 13:20:35 +01:00
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|
2011-12-14 00:33:28 +01:00
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|
/*
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|
* When running 32-on-64 we should make sure we can fit all of the possible
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* guest address space into a contiguous chunk of virtual host memory.
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*
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* This way we will never overlap with our own libraries or binaries or stack
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* or anything else that QEMU maps.
|
2017-10-05 16:36:00 +02:00
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|
*
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|
* Many cpus reserve the high bit (or more than one for some 64-bit cpus)
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* of the address for the kernel. Some cpus rely on this and user space
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* uses the high bit(s) for pointer tagging and the like. For them, we
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* must preserve the expected address space.
|
2011-12-14 00:33:28 +01:00
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|
*/
|
2017-10-05 16:36:00 +02:00
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|
#ifndef MAX_RESERVED_VA
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# if HOST_LONG_BITS > TARGET_VIRT_ADDR_SPACE_BITS
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# if TARGET_VIRT_ADDR_SPACE_BITS == 32 && \
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|
|
(TARGET_LONG_BITS == 32 || defined(TARGET_ABI32))
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|
|
/* There are a number of places where we assign reserved_va to a variable
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|
of type abi_ulong and expect it to fit. Avoid the last page. */
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# define MAX_RESERVED_VA (0xfffffffful & TARGET_PAGE_MASK)
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|
# else
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# define MAX_RESERVED_VA (1ul << TARGET_VIRT_ADDR_SPACE_BITS)
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|
# endif
|
2013-01-03 14:17:18 +01:00
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|
|
# else
|
2017-10-05 16:36:00 +02:00
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|
|
# define MAX_RESERVED_VA 0
|
2013-01-03 14:17:18 +01:00
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|
# endif
|
2017-10-05 16:36:00 +02:00
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|
#endif
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|
/* That said, reserving *too* much vm space via mmap can run into problems
|
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|
with rlimits, oom due to page table creation, etc. We will still try it,
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|
|
if directed by the command-line option, but not by default. */
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|
|
#if HOST_LONG_BITS == 64 && TARGET_VIRT_ADDR_SPACE_BITS <= 32
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|
|
unsigned long reserved_va = MAX_RESERVED_VA;
|
2011-12-14 00:33:28 +01:00
|
|
|
#else
|
2010-05-29 03:27:35 +02:00
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|
|
unsigned long reserved_va;
|
2009-07-17 13:48:08 +02:00
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|
#endif
|
2009-04-05 22:08:59 +02:00
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|
|
|
2015-07-06 20:03:38 +02:00
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|
static void usage(int exitcode);
|
2011-08-06 08:54:12 +02:00
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|
2010-05-26 16:08:22 +02:00
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|
static const char *interp_prefix = CONFIG_QEMU_INTERP_PREFIX;
|
2014-03-04 03:28:43 +01:00
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|
const char *qemu_uname_release;
|
2003-03-03 16:02:29 +01:00
|
|
|
|
2003-03-23 17:49:39 +01:00
|
|
|
/* XXX: on x86 MAP_GROWSDOWN only works if ESP <= address + 32, so
|
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|
|
we allocate a bigger stack. Need a better solution, for example
|
|
|
|
by remapping the process stack directly at the right place */
|
2010-03-19 22:21:13 +01:00
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|
unsigned long guest_stack_size = 8 * 1024 * 1024UL;
|
2003-02-18 23:55:36 +01:00
|
|
|
|
|
|
|
void gemu_log(const char *fmt, ...)
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|
|
|
{
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|
|
|
va_list ap;
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|
|
|
|
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|
|
va_start(ap, fmt);
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|
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|
vfprintf(stderr, fmt, ap);
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|
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|
va_end(ap);
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|
|
|
}
|
|
|
|
|
2008-08-17 22:26:25 +02:00
|
|
|
#if defined(TARGET_I386)
|
2012-02-25 03:37:53 +01:00
|
|
|
int cpu_get_pic_interrupt(CPUX86State *env)
|
2003-06-24 15:30:31 +02:00
|
|
|
{
|
|
|
|
return -1;
|
|
|
|
}
|
2008-08-17 22:26:25 +02:00
|
|
|
#endif
|
2003-06-24 15:30:31 +02:00
|
|
|
|
2008-06-07 22:50:51 +02:00
|
|
|
/***********************************************************/
|
|
|
|
/* Helper routines for implementing atomic operations. */
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|
|
|
|
|
|
|
/* Make sure everything is in a consistent state for calling fork(). */
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|
|
|
void fork_start(void)
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|
|
|
{
|
2017-12-07 13:41:21 +01:00
|
|
|
start_exclusive();
|
2009-12-04 14:16:31 +01:00
|
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|
mmap_fork_start();
|
2017-12-04 15:22:11 +01:00
|
|
|
qemu_mutex_lock(&tb_ctx.tb_lock);
|
|
|
|
cpu_list_lock();
|
2008-06-07 22:50:51 +02:00
|
|
|
}
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|
void fork_end(int child)
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|
{
|
2009-12-04 14:16:31 +01:00
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|
mmap_fork_end(child);
|
2008-06-07 22:50:51 +02:00
|
|
|
if (child) {
|
2013-06-24 23:50:24 +02:00
|
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CPUState *cpu, *next_cpu;
|
2008-06-07 22:50:51 +02:00
|
|
|
/* Child processes created by fork() only have a single thread.
|
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|
Discard information about the parent threads. */
|
2013-06-24 23:50:24 +02:00
|
|
|
CPU_FOREACH_SAFE(cpu, next_cpu) {
|
|
|
|
if (cpu != thread_cpu) {
|
2016-06-07 18:31:04 +02:00
|
|
|
QTAILQ_REMOVE(&cpus, cpu, node);
|
2013-06-24 23:50:24 +02:00
|
|
|
}
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|
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|
}
|
2017-06-24 02:04:43 +02:00
|
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|
qemu_mutex_init(&tb_ctx.tb_lock);
|
2016-08-28 03:45:14 +02:00
|
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|
qemu_init_cpu_list();
|
2015-06-24 04:31:16 +02:00
|
|
|
gdbserver_fork(thread_cpu);
|
2017-12-07 13:41:21 +01:00
|
|
|
/* qemu_init_cpu_list() takes care of reinitializing the
|
|
|
|
* exclusive state, so we don't need to end_exclusive() here.
|
|
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|
*/
|
2008-06-07 22:50:51 +02:00
|
|
|
} else {
|
2017-06-24 02:04:43 +02:00
|
|
|
qemu_mutex_unlock(&tb_ctx.tb_lock);
|
2016-08-28 03:45:14 +02:00
|
|
|
cpu_list_unlock();
|
2017-12-07 13:41:21 +01:00
|
|
|
end_exclusive();
|
2008-06-07 22:50:51 +02:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2007-10-08 15:36:46 +02:00
|
|
|
#ifdef TARGET_CRIS
|
2012-02-25 03:37:53 +01:00
|
|
|
void cpu_loop(CPUCRISState *env)
|
2007-10-08 15:36:46 +02:00
|
|
|
{
|
2013-05-27 01:33:50 +02:00
|
|
|
CPUState *cs = CPU(cris_env_get_cpu(env));
|
2007-10-08 15:36:46 +02:00
|
|
|
int trapnr, ret;
|
2009-10-01 23:12:16 +02:00
|
|
|
target_siginfo_t info;
|
2007-10-08 15:36:46 +02:00
|
|
|
|
|
|
|
while (1) {
|
2015-01-08 13:19:46 +01:00
|
|
|
cpu_exec_start(cs);
|
2015-07-18 11:40:28 +02:00
|
|
|
trapnr = cpu_exec(cs);
|
2015-01-08 13:19:46 +01:00
|
|
|
cpu_exec_end(cs);
|
2016-08-29 09:51:00 +02:00
|
|
|
process_queued_cpu_work(cs);
|
|
|
|
|
2007-10-08 15:36:46 +02:00
|
|
|
switch (trapnr) {
|
|
|
|
case 0xaa:
|
|
|
|
{
|
2015-01-25 12:35:58 +01:00
|
|
|
info.si_signo = TARGET_SIGSEGV;
|
2007-10-08 15:36:46 +02:00
|
|
|
info.si_errno = 0;
|
|
|
|
/* XXX: check env->error_code */
|
|
|
|
info.si_code = TARGET_SEGV_MAPERR;
|
2008-05-27 23:12:09 +02:00
|
|
|
info._sifields._sigfault._addr = env->pregs[PR_EDA];
|
2016-07-28 17:44:46 +02:00
|
|
|
queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
|
2007-10-08 15:36:46 +02:00
|
|
|
}
|
|
|
|
break;
|
2008-02-28 12:29:27 +01:00
|
|
|
case EXCP_INTERRUPT:
|
|
|
|
/* just indicate that signals should be handled asap */
|
|
|
|
break;
|
2007-10-08 15:36:46 +02:00
|
|
|
case EXCP_BREAK:
|
|
|
|
ret = do_syscall(env,
|
|
|
|
env->regs[9],
|
|
|
|
env->regs[10],
|
|
|
|
env->regs[11],
|
|
|
|
env->regs[12],
|
|
|
|
env->regs[13],
|
|
|
|
env->pregs[7],
|
2011-06-16 18:37:13 +02:00
|
|
|
env->pregs[11],
|
|
|
|
0, 0);
|
2016-05-12 19:47:41 +02:00
|
|
|
if (ret == -TARGET_ERESTARTSYS) {
|
|
|
|
env->pc -= 2;
|
|
|
|
} else if (ret != -TARGET_QEMU_ESIGRETURN) {
|
|
|
|
env->regs[10] = ret;
|
|
|
|
}
|
2007-10-08 15:36:46 +02:00
|
|
|
break;
|
|
|
|
case EXCP_DEBUG:
|
|
|
|
{
|
|
|
|
int sig;
|
|
|
|
|
2013-06-27 19:49:31 +02:00
|
|
|
sig = gdb_handlesig(cs, TARGET_SIGTRAP);
|
2007-10-08 15:36:46 +02:00
|
|
|
if (sig)
|
|
|
|
{
|
|
|
|
info.si_signo = sig;
|
|
|
|
info.si_errno = 0;
|
|
|
|
info.si_code = TARGET_TRAP_BRKPT;
|
2016-07-28 17:44:46 +02:00
|
|
|
queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
|
2007-10-08 15:36:46 +02:00
|
|
|
}
|
|
|
|
}
|
|
|
|
break;
|
2016-06-30 07:12:55 +02:00
|
|
|
case EXCP_ATOMIC:
|
|
|
|
cpu_exec_step_atomic(cs);
|
|
|
|
break;
|
2007-10-08 15:36:46 +02:00
|
|
|
default:
|
|
|
|
printf ("Unhandled trap: 0x%x\n", trapnr);
|
2013-05-27 01:33:50 +02:00
|
|
|
cpu_dump_state(cs, stderr, fprintf, 0);
|
2015-09-28 15:12:16 +02:00
|
|
|
exit(EXIT_FAILURE);
|
2007-10-08 15:36:46 +02:00
|
|
|
}
|
|
|
|
process_pending_signals (env);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
2009-05-20 21:31:33 +02:00
|
|
|
#ifdef TARGET_MICROBLAZE
|
2012-02-25 03:37:53 +01:00
|
|
|
void cpu_loop(CPUMBState *env)
|
2009-05-20 21:31:33 +02:00
|
|
|
{
|
2013-05-27 01:33:50 +02:00
|
|
|
CPUState *cs = CPU(mb_env_get_cpu(env));
|
2009-05-20 21:31:33 +02:00
|
|
|
int trapnr, ret;
|
2009-10-01 23:12:16 +02:00
|
|
|
target_siginfo_t info;
|
2009-05-20 21:31:33 +02:00
|
|
|
|
|
|
|
while (1) {
|
2015-01-08 13:19:46 +01:00
|
|
|
cpu_exec_start(cs);
|
2015-07-18 11:40:28 +02:00
|
|
|
trapnr = cpu_exec(cs);
|
2015-01-08 13:19:46 +01:00
|
|
|
cpu_exec_end(cs);
|
2016-08-29 09:51:00 +02:00
|
|
|
process_queued_cpu_work(cs);
|
|
|
|
|
2009-05-20 21:31:33 +02:00
|
|
|
switch (trapnr) {
|
|
|
|
case 0xaa:
|
|
|
|
{
|
2015-01-25 12:35:58 +01:00
|
|
|
info.si_signo = TARGET_SIGSEGV;
|
2009-05-20 21:31:33 +02:00
|
|
|
info.si_errno = 0;
|
|
|
|
/* XXX: check env->error_code */
|
|
|
|
info.si_code = TARGET_SEGV_MAPERR;
|
|
|
|
info._sifields._sigfault._addr = 0;
|
2016-07-28 17:44:46 +02:00
|
|
|
queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
|
2009-05-20 21:31:33 +02:00
|
|
|
}
|
|
|
|
break;
|
|
|
|
case EXCP_INTERRUPT:
|
|
|
|
/* just indicate that signals should be handled asap */
|
|
|
|
break;
|
|
|
|
case EXCP_BREAK:
|
|
|
|
/* Return address is 4 bytes after the call. */
|
|
|
|
env->regs[14] += 4;
|
2012-04-26 14:18:25 +02:00
|
|
|
env->sregs[SR_PC] = env->regs[14];
|
2009-05-20 21:31:33 +02:00
|
|
|
ret = do_syscall(env,
|
|
|
|
env->regs[12],
|
|
|
|
env->regs[5],
|
|
|
|
env->regs[6],
|
|
|
|
env->regs[7],
|
|
|
|
env->regs[8],
|
|
|
|
env->regs[9],
|
2011-06-16 18:37:13 +02:00
|
|
|
env->regs[10],
|
|
|
|
0, 0);
|
2016-05-12 19:47:44 +02:00
|
|
|
if (ret == -TARGET_ERESTARTSYS) {
|
|
|
|
/* Wind back to before the syscall. */
|
|
|
|
env->sregs[SR_PC] -= 4;
|
|
|
|
} else if (ret != -TARGET_QEMU_ESIGRETURN) {
|
|
|
|
env->regs[3] = ret;
|
|
|
|
}
|
2016-05-12 19:47:43 +02:00
|
|
|
/* All syscall exits result in guest r14 being equal to the
|
|
|
|
* PC we return to, because the kernel syscall exit "rtbd" does
|
|
|
|
* this. (This is true even for sigreturn(); note that r14 is
|
|
|
|
* not a userspace-usable register, as the kernel may clobber it
|
|
|
|
* at any point.)
|
|
|
|
*/
|
|
|
|
env->regs[14] = env->sregs[SR_PC];
|
2009-05-20 21:31:33 +02:00
|
|
|
break;
|
2010-09-09 10:24:01 +02:00
|
|
|
case EXCP_HW_EXCP:
|
|
|
|
env->regs[17] = env->sregs[SR_PC] + 4;
|
|
|
|
if (env->iflags & D_FLAG) {
|
|
|
|
env->sregs[SR_ESR] |= 1 << 12;
|
|
|
|
env->sregs[SR_PC] -= 4;
|
2011-11-22 11:06:17 +01:00
|
|
|
/* FIXME: if branch was immed, replay the imm as well. */
|
2010-09-09 10:24:01 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
env->iflags &= ~(IMM_FLAG | D_FLAG);
|
|
|
|
|
|
|
|
switch (env->sregs[SR_ESR] & 31) {
|
2011-08-22 18:42:54 +02:00
|
|
|
case ESR_EC_DIVZERO:
|
2015-01-25 12:35:58 +01:00
|
|
|
info.si_signo = TARGET_SIGFPE;
|
2011-08-22 18:42:54 +02:00
|
|
|
info.si_errno = 0;
|
|
|
|
info.si_code = TARGET_FPE_FLTDIV;
|
|
|
|
info._sifields._sigfault._addr = 0;
|
2016-07-28 17:44:46 +02:00
|
|
|
queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
|
2011-08-22 18:42:54 +02:00
|
|
|
break;
|
2010-09-09 10:24:01 +02:00
|
|
|
case ESR_EC_FPU:
|
2015-01-25 12:35:58 +01:00
|
|
|
info.si_signo = TARGET_SIGFPE;
|
2010-09-09 10:24:01 +02:00
|
|
|
info.si_errno = 0;
|
|
|
|
if (env->sregs[SR_FSR] & FSR_IO) {
|
|
|
|
info.si_code = TARGET_FPE_FLTINV;
|
|
|
|
}
|
|
|
|
if (env->sregs[SR_FSR] & FSR_DZ) {
|
|
|
|
info.si_code = TARGET_FPE_FLTDIV;
|
|
|
|
}
|
|
|
|
info._sifields._sigfault._addr = 0;
|
2016-07-28 17:44:46 +02:00
|
|
|
queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
|
2010-09-09 10:24:01 +02:00
|
|
|
break;
|
|
|
|
default:
|
|
|
|
printf ("Unhandled hw-exception: 0x%x\n",
|
2011-04-11 23:57:07 +02:00
|
|
|
env->sregs[SR_ESR] & ESR_EC_MASK);
|
2013-05-27 01:33:50 +02:00
|
|
|
cpu_dump_state(cs, stderr, fprintf, 0);
|
2015-09-28 15:12:16 +02:00
|
|
|
exit(EXIT_FAILURE);
|
2010-09-09 10:24:01 +02:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
break;
|
2009-05-20 21:31:33 +02:00
|
|
|
case EXCP_DEBUG:
|
|
|
|
{
|
|
|
|
int sig;
|
|
|
|
|
2013-06-27 19:49:31 +02:00
|
|
|
sig = gdb_handlesig(cs, TARGET_SIGTRAP);
|
2009-05-20 21:31:33 +02:00
|
|
|
if (sig)
|
|
|
|
{
|
|
|
|
info.si_signo = sig;
|
|
|
|
info.si_errno = 0;
|
|
|
|
info.si_code = TARGET_TRAP_BRKPT;
|
2016-07-28 17:44:46 +02:00
|
|
|
queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
|
2009-05-20 21:31:33 +02:00
|
|
|
}
|
|
|
|
}
|
|
|
|
break;
|
2016-06-30 07:12:55 +02:00
|
|
|
case EXCP_ATOMIC:
|
|
|
|
cpu_exec_step_atomic(cs);
|
|
|
|
break;
|
2009-05-20 21:31:33 +02:00
|
|
|
default:
|
|
|
|
printf ("Unhandled trap: 0x%x\n", trapnr);
|
2013-05-27 01:33:50 +02:00
|
|
|
cpu_dump_state(cs, stderr, fprintf, 0);
|
2015-09-28 15:12:16 +02:00
|
|
|
exit(EXIT_FAILURE);
|
2009-05-20 21:31:33 +02:00
|
|
|
}
|
|
|
|
process_pending_signals (env);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
2006-10-22 02:18:54 +02:00
|
|
|
#ifdef TARGET_M68K
|
|
|
|
|
|
|
|
void cpu_loop(CPUM68KState *env)
|
|
|
|
{
|
2013-05-27 01:33:50 +02:00
|
|
|
CPUState *cs = CPU(m68k_env_get_cpu(env));
|
2006-10-22 02:18:54 +02:00
|
|
|
int trapnr;
|
|
|
|
unsigned int n;
|
2009-10-01 23:12:16 +02:00
|
|
|
target_siginfo_t info;
|
2013-08-26 18:14:44 +02:00
|
|
|
TaskState *ts = cs->opaque;
|
2007-09-17 10:09:54 +02:00
|
|
|
|
2006-10-22 02:18:54 +02:00
|
|
|
for(;;) {
|
2015-01-08 13:19:46 +01:00
|
|
|
cpu_exec_start(cs);
|
2015-07-18 11:40:28 +02:00
|
|
|
trapnr = cpu_exec(cs);
|
2015-01-08 13:19:46 +01:00
|
|
|
cpu_exec_end(cs);
|
2016-08-29 09:51:00 +02:00
|
|
|
process_queued_cpu_work(cs);
|
|
|
|
|
2006-10-22 02:18:54 +02:00
|
|
|
switch(trapnr) {
|
|
|
|
case EXCP_ILLEGAL:
|
|
|
|
{
|
|
|
|
if (ts->sim_syscalls) {
|
|
|
|
uint16_t nr;
|
2015-01-20 16:19:33 +01:00
|
|
|
get_user_u16(nr, env->pc + 2);
|
2006-10-22 02:18:54 +02:00
|
|
|
env->pc += 4;
|
|
|
|
do_m68k_simcall(env, nr);
|
|
|
|
} else {
|
|
|
|
goto do_sigill;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
break;
|
2007-05-26 17:09:38 +02:00
|
|
|
case EXCP_HALT_INSN:
|
2006-10-22 02:18:54 +02:00
|
|
|
/* Semihosing syscall. */
|
2007-05-26 17:09:38 +02:00
|
|
|
env->pc += 4;
|
2006-10-22 02:18:54 +02:00
|
|
|
do_m68k_semihosting(env, env->dregs[0]);
|
|
|
|
break;
|
|
|
|
case EXCP_LINEA:
|
|
|
|
case EXCP_LINEF:
|
|
|
|
case EXCP_UNSUPPORTED:
|
|
|
|
do_sigill:
|
2015-01-25 12:35:58 +01:00
|
|
|
info.si_signo = TARGET_SIGILL;
|
2006-10-22 02:18:54 +02:00
|
|
|
info.si_errno = 0;
|
|
|
|
info.si_code = TARGET_ILL_ILLOPN;
|
|
|
|
info._sifields._sigfault._addr = env->pc;
|
2016-10-28 20:42:23 +02:00
|
|
|
queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
|
|
|
|
break;
|
2018-01-04 02:29:03 +01:00
|
|
|
case EXCP_CHK:
|
|
|
|
info.si_signo = TARGET_SIGFPE;
|
|
|
|
info.si_errno = 0;
|
|
|
|
info.si_code = TARGET_FPE_INTOVF;
|
|
|
|
info._sifields._sigfault._addr = env->pc;
|
|
|
|
queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
|
|
|
|
break;
|
2016-10-28 20:42:23 +02:00
|
|
|
case EXCP_DIV0:
|
|
|
|
info.si_signo = TARGET_SIGFPE;
|
|
|
|
info.si_errno = 0;
|
|
|
|
info.si_code = TARGET_FPE_INTDIV;
|
|
|
|
info._sifields._sigfault._addr = env->pc;
|
2016-07-28 17:44:46 +02:00
|
|
|
queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
|
2006-10-22 02:18:54 +02:00
|
|
|
break;
|
|
|
|
case EXCP_TRAP0:
|
|
|
|
{
|
2016-05-12 19:47:39 +02:00
|
|
|
abi_long ret;
|
2006-10-22 02:18:54 +02:00
|
|
|
ts->sim_syscalls = 0;
|
|
|
|
n = env->dregs[0];
|
|
|
|
env->pc += 2;
|
2016-05-12 19:47:39 +02:00
|
|
|
ret = do_syscall(env,
|
|
|
|
n,
|
|
|
|
env->dregs[1],
|
|
|
|
env->dregs[2],
|
|
|
|
env->dregs[3],
|
|
|
|
env->dregs[4],
|
|
|
|
env->dregs[5],
|
|
|
|
env->aregs[0],
|
|
|
|
0, 0);
|
|
|
|
if (ret == -TARGET_ERESTARTSYS) {
|
|
|
|
env->pc -= 2;
|
|
|
|
} else if (ret != -TARGET_QEMU_ESIGRETURN) {
|
|
|
|
env->dregs[0] = ret;
|
|
|
|
}
|
2006-10-22 02:18:54 +02:00
|
|
|
}
|
|
|
|
break;
|
|
|
|
case EXCP_INTERRUPT:
|
|
|
|
/* just indicate that signals should be handled asap */
|
|
|
|
break;
|
|
|
|
case EXCP_ACCESS:
|
|
|
|
{
|
2015-01-25 12:35:58 +01:00
|
|
|
info.si_signo = TARGET_SIGSEGV;
|
2006-10-22 02:18:54 +02:00
|
|
|
info.si_errno = 0;
|
|
|
|
/* XXX: check env->error_code */
|
|
|
|
info.si_code = TARGET_SEGV_MAPERR;
|
|
|
|
info._sifields._sigfault._addr = env->mmu.ar;
|
2016-07-28 17:44:46 +02:00
|
|
|
queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
|
2006-10-22 02:18:54 +02:00
|
|
|
}
|
|
|
|
break;
|
|
|
|
case EXCP_DEBUG:
|
|
|
|
{
|
|
|
|
int sig;
|
|
|
|
|
2013-06-27 19:49:31 +02:00
|
|
|
sig = gdb_handlesig(cs, TARGET_SIGTRAP);
|
2006-10-22 02:18:54 +02:00
|
|
|
if (sig)
|
|
|
|
{
|
|
|
|
info.si_signo = sig;
|
|
|
|
info.si_errno = 0;
|
|
|
|
info.si_code = TARGET_TRAP_BRKPT;
|
2016-07-28 17:44:46 +02:00
|
|
|
queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
|
2006-10-22 02:18:54 +02:00
|
|
|
}
|
|
|
|
}
|
|
|
|
break;
|
2016-06-30 07:12:55 +02:00
|
|
|
case EXCP_ATOMIC:
|
|
|
|
cpu_exec_step_atomic(cs);
|
|
|
|
break;
|
2006-10-22 02:18:54 +02:00
|
|
|
default:
|
2015-11-13 13:20:35 +01:00
|
|
|
EXCP_DUMP(env, "qemu: unhandled CPU exception 0x%x - aborting\n", trapnr);
|
2006-10-22 02:18:54 +02:00
|
|
|
abort();
|
|
|
|
}
|
|
|
|
process_pending_signals(env);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
#endif /* TARGET_M68K */
|
|
|
|
|
2007-04-05 09:13:51 +02:00
|
|
|
#ifdef TARGET_ALPHA
|
2012-02-25 03:37:53 +01:00
|
|
|
void cpu_loop(CPUAlphaState *env)
|
2007-04-05 09:13:51 +02:00
|
|
|
{
|
2013-05-27 01:33:50 +02:00
|
|
|
CPUState *cs = CPU(alpha_env_get_cpu(env));
|
2007-04-14 14:17:09 +02:00
|
|
|
int trapnr;
|
2009-10-01 23:12:16 +02:00
|
|
|
target_siginfo_t info;
|
2009-12-28 03:30:03 +01:00
|
|
|
abi_long sysret;
|
2007-09-17 10:09:54 +02:00
|
|
|
|
2007-04-05 09:13:51 +02:00
|
|
|
while (1) {
|
2017-07-06 21:45:07 +02:00
|
|
|
bool arch_interrupt = true;
|
|
|
|
|
2015-01-08 13:19:46 +01:00
|
|
|
cpu_exec_start(cs);
|
2015-07-18 11:40:28 +02:00
|
|
|
trapnr = cpu_exec(cs);
|
2015-01-08 13:19:46 +01:00
|
|
|
cpu_exec_end(cs);
|
2016-08-29 09:51:00 +02:00
|
|
|
process_queued_cpu_work(cs);
|
2007-09-17 10:09:54 +02:00
|
|
|
|
2007-04-05 09:13:51 +02:00
|
|
|
switch (trapnr) {
|
|
|
|
case EXCP_RESET:
|
|
|
|
fprintf(stderr, "Reset requested. Exit\n");
|
2015-09-28 15:12:16 +02:00
|
|
|
exit(EXIT_FAILURE);
|
2007-04-05 09:13:51 +02:00
|
|
|
break;
|
|
|
|
case EXCP_MCHK:
|
|
|
|
fprintf(stderr, "Machine check exception. Exit\n");
|
2015-09-28 15:12:16 +02:00
|
|
|
exit(EXIT_FAILURE);
|
2007-04-05 09:13:51 +02:00
|
|
|
break;
|
2011-05-20 23:04:57 +02:00
|
|
|
case EXCP_SMP_INTERRUPT:
|
|
|
|
case EXCP_CLK_INTERRUPT:
|
|
|
|
case EXCP_DEV_INTERRUPT:
|
2007-09-16 23:08:06 +02:00
|
|
|
fprintf(stderr, "External interrupt. Exit\n");
|
2015-09-28 15:12:16 +02:00
|
|
|
exit(EXIT_FAILURE);
|
2007-04-05 09:13:51 +02:00
|
|
|
break;
|
2011-05-20 23:04:57 +02:00
|
|
|
case EXCP_MMFAULT:
|
2009-12-28 03:30:03 +01:00
|
|
|
info.si_signo = TARGET_SIGSEGV;
|
|
|
|
info.si_errno = 0;
|
2011-05-20 22:30:00 +02:00
|
|
|
info.si_code = (page_get_flags(env->trap_arg0) & PAGE_VALID
|
2010-05-21 19:03:33 +02:00
|
|
|
? TARGET_SEGV_ACCERR : TARGET_SEGV_MAPERR);
|
2011-05-20 22:30:00 +02:00
|
|
|
info._sifields._sigfault._addr = env->trap_arg0;
|
2016-07-28 17:44:46 +02:00
|
|
|
queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
|
2007-04-05 09:13:51 +02:00
|
|
|
break;
|
|
|
|
case EXCP_UNALIGN:
|
2009-12-28 03:30:03 +01:00
|
|
|
info.si_signo = TARGET_SIGBUS;
|
|
|
|
info.si_errno = 0;
|
|
|
|
info.si_code = TARGET_BUS_ADRALN;
|
2011-05-20 22:30:00 +02:00
|
|
|
info._sifields._sigfault._addr = env->trap_arg0;
|
2016-07-28 17:44:46 +02:00
|
|
|
queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
|
2007-04-05 09:13:51 +02:00
|
|
|
break;
|
|
|
|
case EXCP_OPCDEC:
|
2009-12-28 03:30:03 +01:00
|
|
|
do_sigill:
|
|
|
|
info.si_signo = TARGET_SIGILL;
|
|
|
|
info.si_errno = 0;
|
|
|
|
info.si_code = TARGET_ILL_ILLOPC;
|
|
|
|
info._sifields._sigfault._addr = env->pc;
|
2016-07-28 17:44:46 +02:00
|
|
|
queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
|
2007-04-05 09:13:51 +02:00
|
|
|
break;
|
2011-05-20 23:04:57 +02:00
|
|
|
case EXCP_ARITH:
|
|
|
|
info.si_signo = TARGET_SIGFPE;
|
|
|
|
info.si_errno = 0;
|
|
|
|
info.si_code = TARGET_FPE_FLTINV;
|
|
|
|
info._sifields._sigfault._addr = env->pc;
|
2016-07-28 17:44:46 +02:00
|
|
|
queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
|
2011-05-20 23:04:57 +02:00
|
|
|
break;
|
2007-04-05 09:13:51 +02:00
|
|
|
case EXCP_FEN:
|
2009-12-28 03:30:03 +01:00
|
|
|
/* No-op. Linux simply re-enables the FPU. */
|
2007-04-05 09:13:51 +02:00
|
|
|
break;
|
2011-05-20 23:04:57 +02:00
|
|
|
case EXCP_CALL_PAL:
|
|
|
|
switch (env->error_code) {
|
2009-12-28 03:30:03 +01:00
|
|
|
case 0x80:
|
|
|
|
/* BPT */
|
|
|
|
info.si_signo = TARGET_SIGTRAP;
|
|
|
|
info.si_errno = 0;
|
|
|
|
info.si_code = TARGET_TRAP_BRKPT;
|
|
|
|
info._sifields._sigfault._addr = env->pc;
|
2016-07-28 17:44:46 +02:00
|
|
|
queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
|
2009-12-28 03:30:03 +01:00
|
|
|
break;
|
|
|
|
case 0x81:
|
|
|
|
/* BUGCHK */
|
|
|
|
info.si_signo = TARGET_SIGTRAP;
|
|
|
|
info.si_errno = 0;
|
|
|
|
info.si_code = 0;
|
|
|
|
info._sifields._sigfault._addr = env->pc;
|
2016-07-28 17:44:46 +02:00
|
|
|
queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
|
2009-12-28 03:30:03 +01:00
|
|
|
break;
|
|
|
|
case 0x83:
|
|
|
|
/* CALLSYS */
|
|
|
|
trapnr = env->ir[IR_V0];
|
|
|
|
sysret = do_syscall(env, trapnr,
|
|
|
|
env->ir[IR_A0], env->ir[IR_A1],
|
|
|
|
env->ir[IR_A2], env->ir[IR_A3],
|
2011-06-16 18:37:13 +02:00
|
|
|
env->ir[IR_A4], env->ir[IR_A5],
|
|
|
|
0, 0);
|
2016-05-12 19:47:36 +02:00
|
|
|
if (sysret == -TARGET_ERESTARTSYS) {
|
|
|
|
env->pc -= 4;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
if (sysret == -TARGET_QEMU_ESIGRETURN) {
|
2010-05-03 19:07:55 +02:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
/* Syscall writes 0 to V0 to bypass error check, similar
|
2012-06-07 23:47:41 +02:00
|
|
|
to how this is handled internal to Linux kernel.
|
|
|
|
(Ab)use trapnr temporarily as boolean indicating error. */
|
|
|
|
trapnr = (env->ir[IR_V0] != 0 && sysret < 0);
|
|
|
|
env->ir[IR_V0] = (trapnr ? -sysret : sysret);
|
|
|
|
env->ir[IR_A3] = trapnr;
|
2009-12-28 03:30:03 +01:00
|
|
|
break;
|
|
|
|
case 0x86:
|
|
|
|
/* IMB */
|
|
|
|
/* ??? We can probably elide the code using page_unprotect
|
|
|
|
that is checking for self-modifying code. Instead we
|
|
|
|
could simply call tb_flush here. Until we work out the
|
|
|
|
changes required to turn off the extra write protection,
|
|
|
|
this can be a no-op. */
|
|
|
|
break;
|
|
|
|
case 0x9E:
|
|
|
|
/* RDUNIQUE */
|
|
|
|
/* Handled in the translator for usermode. */
|
|
|
|
abort();
|
|
|
|
case 0x9F:
|
|
|
|
/* WRUNIQUE */
|
|
|
|
/* Handled in the translator for usermode. */
|
|
|
|
abort();
|
|
|
|
case 0xAA:
|
|
|
|
/* GENTRAP */
|
|
|
|
info.si_signo = TARGET_SIGFPE;
|
|
|
|
switch (env->ir[IR_A0]) {
|
|
|
|
case TARGET_GEN_INTOVF:
|
|
|
|
info.si_code = TARGET_FPE_INTOVF;
|
|
|
|
break;
|
|
|
|
case TARGET_GEN_INTDIV:
|
|
|
|
info.si_code = TARGET_FPE_INTDIV;
|
|
|
|
break;
|
|
|
|
case TARGET_GEN_FLTOVF:
|
|
|
|
info.si_code = TARGET_FPE_FLTOVF;
|
|
|
|
break;
|
|
|
|
case TARGET_GEN_FLTUND:
|
|
|
|
info.si_code = TARGET_FPE_FLTUND;
|
|
|
|
break;
|
|
|
|
case TARGET_GEN_FLTINV:
|
|
|
|
info.si_code = TARGET_FPE_FLTINV;
|
|
|
|
break;
|
|
|
|
case TARGET_GEN_FLTINE:
|
|
|
|
info.si_code = TARGET_FPE_FLTRES;
|
|
|
|
break;
|
|
|
|
case TARGET_GEN_ROPRAND:
|
|
|
|
info.si_code = 0;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
info.si_signo = TARGET_SIGTRAP;
|
|
|
|
info.si_code = 0;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
info.si_errno = 0;
|
|
|
|
info._sifields._sigfault._addr = env->pc;
|
2016-07-28 17:44:46 +02:00
|
|
|
queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
|
2009-12-28 03:30:03 +01:00
|
|
|
break;
|
|
|
|
default:
|
|
|
|
goto do_sigill;
|
|
|
|
}
|
2007-04-05 09:13:51 +02:00
|
|
|
break;
|
|
|
|
case EXCP_DEBUG:
|
2013-06-27 19:49:31 +02:00
|
|
|
info.si_signo = gdb_handlesig(cs, TARGET_SIGTRAP);
|
2009-12-28 03:30:03 +01:00
|
|
|
if (info.si_signo) {
|
|
|
|
info.si_errno = 0;
|
|
|
|
info.si_code = TARGET_TRAP_BRKPT;
|
2016-07-28 17:44:46 +02:00
|
|
|
queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
|
2017-07-06 21:45:07 +02:00
|
|
|
} else {
|
|
|
|
arch_interrupt = false;
|
2007-04-05 09:13:51 +02:00
|
|
|
}
|
|
|
|
break;
|
2012-05-31 21:05:23 +02:00
|
|
|
case EXCP_INTERRUPT:
|
|
|
|
/* Just indicate that signals should be handled asap. */
|
|
|
|
break;
|
2016-06-30 07:12:55 +02:00
|
|
|
case EXCP_ATOMIC:
|
|
|
|
cpu_exec_step_atomic(cs);
|
2017-07-06 21:45:07 +02:00
|
|
|
arch_interrupt = false;
|
2016-06-30 07:12:55 +02:00
|
|
|
break;
|
2007-04-05 09:13:51 +02:00
|
|
|
default:
|
|
|
|
printf ("Unhandled trap: 0x%x\n", trapnr);
|
2013-05-27 01:33:50 +02:00
|
|
|
cpu_dump_state(cs, stderr, fprintf, 0);
|
2015-09-28 15:12:16 +02:00
|
|
|
exit(EXIT_FAILURE);
|
2007-04-05 09:13:51 +02:00
|
|
|
}
|
|
|
|
process_pending_signals (env);
|
2017-07-06 21:45:07 +02:00
|
|
|
|
|
|
|
/* Most of the traps imply a transition through PALcode, which
|
|
|
|
implies an REI instruction has been executed. Which means
|
|
|
|
that RX and LOCK_ADDR should be cleared. But there are a
|
|
|
|
few exceptions for traps internal to QEMU. */
|
|
|
|
if (arch_interrupt) {
|
|
|
|
env->flags &= ~ENV_FLAG_RX_FLAG;
|
|
|
|
env->lock_addr = -1;
|
|
|
|
}
|
2007-04-05 09:13:51 +02:00
|
|
|
}
|
|
|
|
}
|
|
|
|
#endif /* TARGET_ALPHA */
|
|
|
|
|
2009-07-24 16:57:31 +02:00
|
|
|
#ifdef TARGET_S390X
|
2017-11-06 19:33:23 +01:00
|
|
|
|
|
|
|
/* s390x masks the fault address it reports in si_addr for SIGSEGV and SIGBUS */
|
|
|
|
#define S390X_FAIL_ADDR_MASK -4096LL
|
|
|
|
|
2009-07-24 16:57:31 +02:00
|
|
|
void cpu_loop(CPUS390XState *env)
|
|
|
|
{
|
2013-05-27 01:33:50 +02:00
|
|
|
CPUState *cs = CPU(s390_env_get_cpu(env));
|
2012-09-15 04:31:57 +02:00
|
|
|
int trapnr, n, sig;
|
2009-07-24 16:57:31 +02:00
|
|
|
target_siginfo_t info;
|
2012-09-15 04:31:57 +02:00
|
|
|
target_ulong addr;
|
2016-05-12 19:47:40 +02:00
|
|
|
abi_long ret;
|
2009-07-24 16:57:31 +02:00
|
|
|
|
|
|
|
while (1) {
|
2015-01-08 13:19:46 +01:00
|
|
|
cpu_exec_start(cs);
|
2015-07-18 11:40:28 +02:00
|
|
|
trapnr = cpu_exec(cs);
|
2015-01-08 13:19:46 +01:00
|
|
|
cpu_exec_end(cs);
|
2016-08-29 09:51:00 +02:00
|
|
|
process_queued_cpu_work(cs);
|
|
|
|
|
2009-07-24 16:57:31 +02:00
|
|
|
switch (trapnr) {
|
|
|
|
case EXCP_INTERRUPT:
|
2012-09-15 04:31:57 +02:00
|
|
|
/* Just indicate that signals should be handled asap. */
|
2009-07-24 16:57:31 +02:00
|
|
|
break;
|
|
|
|
|
2012-09-15 04:31:57 +02:00
|
|
|
case EXCP_SVC:
|
|
|
|
n = env->int_svc_code;
|
|
|
|
if (!n) {
|
|
|
|
/* syscalls > 255 */
|
|
|
|
n = env->regs[1];
|
2009-07-24 16:57:31 +02:00
|
|
|
}
|
2012-09-15 04:31:57 +02:00
|
|
|
env->psw.addr += env->int_svc_ilen;
|
2016-05-12 19:47:40 +02:00
|
|
|
ret = do_syscall(env, n, env->regs[2], env->regs[3],
|
|
|
|
env->regs[4], env->regs[5],
|
|
|
|
env->regs[6], env->regs[7], 0, 0);
|
|
|
|
if (ret == -TARGET_ERESTARTSYS) {
|
|
|
|
env->psw.addr -= env->int_svc_ilen;
|
|
|
|
} else if (ret != -TARGET_QEMU_ESIGRETURN) {
|
|
|
|
env->regs[2] = ret;
|
|
|
|
}
|
2009-07-24 16:57:31 +02:00
|
|
|
break;
|
2012-09-15 04:31:57 +02:00
|
|
|
|
|
|
|
case EXCP_DEBUG:
|
2013-06-27 19:49:31 +02:00
|
|
|
sig = gdb_handlesig(cs, TARGET_SIGTRAP);
|
2012-09-15 04:31:57 +02:00
|
|
|
if (sig) {
|
|
|
|
n = TARGET_TRAP_BRKPT;
|
|
|
|
goto do_signal_pc;
|
2009-07-24 16:57:31 +02:00
|
|
|
}
|
|
|
|
break;
|
2012-09-15 04:31:57 +02:00
|
|
|
case EXCP_PGM:
|
|
|
|
n = env->int_pgm_code;
|
|
|
|
switch (n) {
|
|
|
|
case PGM_OPERATION:
|
|
|
|
case PGM_PRIVILEGED:
|
2015-01-25 12:35:58 +01:00
|
|
|
sig = TARGET_SIGILL;
|
2012-09-15 04:31:57 +02:00
|
|
|
n = TARGET_ILL_ILLOPC;
|
|
|
|
goto do_signal_pc;
|
|
|
|
case PGM_PROTECTION:
|
|
|
|
case PGM_ADDRESSING:
|
2015-01-25 12:35:58 +01:00
|
|
|
sig = TARGET_SIGSEGV;
|
2009-07-24 16:57:31 +02:00
|
|
|
/* XXX: check env->error_code */
|
2012-09-15 04:31:57 +02:00
|
|
|
n = TARGET_SEGV_MAPERR;
|
2017-11-06 19:33:23 +01:00
|
|
|
addr = env->__excp_addr & S390X_FAIL_ADDR_MASK;
|
2012-09-15 04:31:57 +02:00
|
|
|
goto do_signal;
|
|
|
|
case PGM_EXECUTE:
|
|
|
|
case PGM_SPECIFICATION:
|
|
|
|
case PGM_SPECIAL_OP:
|
|
|
|
case PGM_OPERAND:
|
|
|
|
do_sigill_opn:
|
2015-01-25 12:35:58 +01:00
|
|
|
sig = TARGET_SIGILL;
|
2012-09-15 04:31:57 +02:00
|
|
|
n = TARGET_ILL_ILLOPN;
|
|
|
|
goto do_signal_pc;
|
|
|
|
|
|
|
|
case PGM_FIXPT_OVERFLOW:
|
2015-01-25 12:35:58 +01:00
|
|
|
sig = TARGET_SIGFPE;
|
2012-09-15 04:31:57 +02:00
|
|
|
n = TARGET_FPE_INTOVF;
|
|
|
|
goto do_signal_pc;
|
|
|
|
case PGM_FIXPT_DIVIDE:
|
2015-01-25 12:35:58 +01:00
|
|
|
sig = TARGET_SIGFPE;
|
2012-09-15 04:31:57 +02:00
|
|
|
n = TARGET_FPE_INTDIV;
|
|
|
|
goto do_signal_pc;
|
|
|
|
|
|
|
|
case PGM_DATA:
|
|
|
|
n = (env->fpc >> 8) & 0xff;
|
|
|
|
if (n == 0xff) {
|
|
|
|
/* compare-and-trap */
|
|
|
|
goto do_sigill_opn;
|
|
|
|
} else {
|
|
|
|
/* An IEEE exception, simulated or otherwise. */
|
|
|
|
if (n & 0x80) {
|
|
|
|
n = TARGET_FPE_FLTINV;
|
|
|
|
} else if (n & 0x40) {
|
|
|
|
n = TARGET_FPE_FLTDIV;
|
|
|
|
} else if (n & 0x20) {
|
|
|
|
n = TARGET_FPE_FLTOVF;
|
|
|
|
} else if (n & 0x10) {
|
|
|
|
n = TARGET_FPE_FLTUND;
|
|
|
|
} else if (n & 0x08) {
|
|
|
|
n = TARGET_FPE_FLTRES;
|
|
|
|
} else {
|
|
|
|
/* ??? Quantum exception; BFP, DFP error. */
|
|
|
|
goto do_sigill_opn;
|
|
|
|
}
|
2015-01-25 12:35:58 +01:00
|
|
|
sig = TARGET_SIGFPE;
|
2012-09-15 04:31:57 +02:00
|
|
|
goto do_signal_pc;
|
|
|
|
}
|
|
|
|
|
|
|
|
default:
|
|
|
|
fprintf(stderr, "Unhandled program exception: %#x\n", n);
|
2013-05-27 01:33:50 +02:00
|
|
|
cpu_dump_state(cs, stderr, fprintf, 0);
|
2015-09-28 15:12:16 +02:00
|
|
|
exit(EXIT_FAILURE);
|
2009-07-24 16:57:31 +02:00
|
|
|
}
|
|
|
|
break;
|
2012-09-15 04:31:57 +02:00
|
|
|
|
|
|
|
do_signal_pc:
|
|
|
|
addr = env->psw.addr;
|
|
|
|
do_signal:
|
|
|
|
info.si_signo = sig;
|
|
|
|
info.si_errno = 0;
|
|
|
|
info.si_code = n;
|
|
|
|
info._sifields._sigfault._addr = addr;
|
2016-07-28 17:44:46 +02:00
|
|
|
queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
|
2009-07-24 16:57:31 +02:00
|
|
|
break;
|
2012-09-15 04:31:57 +02:00
|
|
|
|
2016-06-30 07:12:55 +02:00
|
|
|
case EXCP_ATOMIC:
|
|
|
|
cpu_exec_step_atomic(cs);
|
|
|
|
break;
|
2009-07-24 16:57:31 +02:00
|
|
|
default:
|
2012-09-15 04:31:57 +02:00
|
|
|
fprintf(stderr, "Unhandled trap: 0x%x\n", trapnr);
|
2013-05-27 01:33:50 +02:00
|
|
|
cpu_dump_state(cs, stderr, fprintf, 0);
|
2015-09-28 15:12:16 +02:00
|
|
|
exit(EXIT_FAILURE);
|
2009-07-24 16:57:31 +02:00
|
|
|
}
|
|
|
|
process_pending_signals (env);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
#endif /* TARGET_S390X */
|
|
|
|
|
2015-08-20 23:36:37 +02:00
|
|
|
#ifdef TARGET_TILEGX
|
|
|
|
|
|
|
|
static void gen_sigill_reg(CPUTLGState *env)
|
|
|
|
{
|
|
|
|
target_siginfo_t info;
|
|
|
|
|
|
|
|
info.si_signo = TARGET_SIGILL;
|
|
|
|
info.si_errno = 0;
|
|
|
|
info.si_code = TARGET_ILL_PRVREG;
|
|
|
|
info._sifields._sigfault._addr = env->pc;
|
2016-07-28 17:44:46 +02:00
|
|
|
queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
|
2015-08-20 23:36:37 +02:00
|
|
|
}
|
|
|
|
|
2015-09-27 23:26:04 +02:00
|
|
|
static void do_signal(CPUTLGState *env, int signo, int sigcode)
|
2015-09-26 07:00:35 +02:00
|
|
|
{
|
|
|
|
target_siginfo_t info;
|
|
|
|
|
2015-09-27 23:26:04 +02:00
|
|
|
info.si_signo = signo;
|
2015-09-26 07:00:35 +02:00
|
|
|
info.si_errno = 0;
|
|
|
|
info._sifields._sigfault._addr = env->pc;
|
2015-09-27 23:26:04 +02:00
|
|
|
|
|
|
|
if (signo == TARGET_SIGSEGV) {
|
|
|
|
/* The passed in sigcode is a dummy; check for a page mapping
|
|
|
|
and pass either MAPERR or ACCERR. */
|
|
|
|
target_ulong addr = env->excaddr;
|
|
|
|
info._sifields._sigfault._addr = addr;
|
|
|
|
if (page_check_range(addr, 1, PAGE_VALID) < 0) {
|
|
|
|
sigcode = TARGET_SEGV_MAPERR;
|
|
|
|
} else {
|
|
|
|
sigcode = TARGET_SEGV_ACCERR;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
info.si_code = sigcode;
|
|
|
|
|
2016-07-28 17:44:46 +02:00
|
|
|
queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
|
2015-09-26 07:00:35 +02:00
|
|
|
}
|
|
|
|
|
2015-09-27 23:26:04 +02:00
|
|
|
static void gen_sigsegv_maperr(CPUTLGState *env, target_ulong addr)
|
|
|
|
{
|
|
|
|
env->excaddr = addr;
|
|
|
|
do_signal(env, TARGET_SIGSEGV, 0);
|
|
|
|
}
|
|
|
|
|
2015-08-24 16:55:47 +02:00
|
|
|
static void set_regval(CPUTLGState *env, uint8_t reg, uint64_t val)
|
|
|
|
{
|
|
|
|
if (unlikely(reg >= TILEGX_R_COUNT)) {
|
|
|
|
switch (reg) {
|
|
|
|
case TILEGX_R_SN:
|
|
|
|
case TILEGX_R_ZERO:
|
|
|
|
return;
|
|
|
|
case TILEGX_R_IDN0:
|
|
|
|
case TILEGX_R_IDN1:
|
|
|
|
case TILEGX_R_UDN0:
|
|
|
|
case TILEGX_R_UDN1:
|
|
|
|
case TILEGX_R_UDN2:
|
|
|
|
case TILEGX_R_UDN3:
|
|
|
|
gen_sigill_reg(env);
|
|
|
|
return;
|
|
|
|
default:
|
|
|
|
g_assert_not_reached();
|
|
|
|
}
|
|
|
|
}
|
|
|
|
env->regs[reg] = val;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Compare the 8-byte contents of the CmpValue SPR with the 8-byte value in
|
|
|
|
* memory at the address held in the first source register. If the values are
|
|
|
|
* not equal, then no memory operation is performed. If the values are equal,
|
|
|
|
* the 8-byte quantity from the second source register is written into memory
|
|
|
|
* at the address held in the first source register. In either case, the result
|
|
|
|
* of the instruction is the value read from memory. The compare and write to
|
|
|
|
* memory are atomic and thus can be used for synchronization purposes. This
|
|
|
|
* instruction only operates for addresses aligned to a 8-byte boundary.
|
|
|
|
* Unaligned memory access causes an Unaligned Data Reference interrupt.
|
|
|
|
*
|
|
|
|
* Functional Description (64-bit)
|
|
|
|
* uint64_t memVal = memoryReadDoubleWord (rf[SrcA]);
|
|
|
|
* rf[Dest] = memVal;
|
|
|
|
* if (memVal == SPR[CmpValueSPR])
|
|
|
|
* memoryWriteDoubleWord (rf[SrcA], rf[SrcB]);
|
|
|
|
*
|
|
|
|
* Functional Description (32-bit)
|
|
|
|
* uint64_t memVal = signExtend32 (memoryReadWord (rf[SrcA]));
|
|
|
|
* rf[Dest] = memVal;
|
|
|
|
* if (memVal == signExtend32 (SPR[CmpValueSPR]))
|
|
|
|
* memoryWriteWord (rf[SrcA], rf[SrcB]);
|
|
|
|
*
|
|
|
|
*
|
|
|
|
* This function also processes exch and exch4 which need not process SPR.
|
|
|
|
*/
|
|
|
|
static void do_exch(CPUTLGState *env, bool quad, bool cmp)
|
|
|
|
{
|
|
|
|
target_ulong addr;
|
|
|
|
target_long val, sprval;
|
|
|
|
|
|
|
|
start_exclusive();
|
|
|
|
|
|
|
|
addr = env->atomic_srca;
|
|
|
|
if (quad ? get_user_s64(val, addr) : get_user_s32(val, addr)) {
|
|
|
|
goto sigsegv_maperr;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (cmp) {
|
|
|
|
if (quad) {
|
|
|
|
sprval = env->spregs[TILEGX_SPR_CMPEXCH];
|
|
|
|
} else {
|
|
|
|
sprval = sextract64(env->spregs[TILEGX_SPR_CMPEXCH], 0, 32);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
if (!cmp || val == sprval) {
|
|
|
|
target_long valb = env->atomic_srcb;
|
|
|
|
if (quad ? put_user_u64(valb, addr) : put_user_u32(valb, addr)) {
|
|
|
|
goto sigsegv_maperr;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
set_regval(env, env->atomic_dstr, val);
|
|
|
|
end_exclusive();
|
|
|
|
return;
|
|
|
|
|
|
|
|
sigsegv_maperr:
|
|
|
|
end_exclusive();
|
|
|
|
gen_sigsegv_maperr(env, addr);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void do_fetch(CPUTLGState *env, int trapnr, bool quad)
|
|
|
|
{
|
|
|
|
int8_t write = 1;
|
|
|
|
target_ulong addr;
|
|
|
|
target_long val, valb;
|
|
|
|
|
|
|
|
start_exclusive();
|
|
|
|
|
|
|
|
addr = env->atomic_srca;
|
|
|
|
valb = env->atomic_srcb;
|
|
|
|
if (quad ? get_user_s64(val, addr) : get_user_s32(val, addr)) {
|
|
|
|
goto sigsegv_maperr;
|
|
|
|
}
|
|
|
|
|
|
|
|
switch (trapnr) {
|
|
|
|
case TILEGX_EXCP_OPCODE_FETCHADD:
|
|
|
|
case TILEGX_EXCP_OPCODE_FETCHADD4:
|
|
|
|
valb += val;
|
|
|
|
break;
|
|
|
|
case TILEGX_EXCP_OPCODE_FETCHADDGEZ:
|
|
|
|
valb += val;
|
|
|
|
if (valb < 0) {
|
|
|
|
write = 0;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
case TILEGX_EXCP_OPCODE_FETCHADDGEZ4:
|
|
|
|
valb += val;
|
|
|
|
if ((int32_t)valb < 0) {
|
|
|
|
write = 0;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
case TILEGX_EXCP_OPCODE_FETCHAND:
|
|
|
|
case TILEGX_EXCP_OPCODE_FETCHAND4:
|
|
|
|
valb &= val;
|
|
|
|
break;
|
|
|
|
case TILEGX_EXCP_OPCODE_FETCHOR:
|
|
|
|
case TILEGX_EXCP_OPCODE_FETCHOR4:
|
|
|
|
valb |= val;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
g_assert_not_reached();
|
|
|
|
}
|
|
|
|
|
|
|
|
if (write) {
|
|
|
|
if (quad ? put_user_u64(valb, addr) : put_user_u32(valb, addr)) {
|
|
|
|
goto sigsegv_maperr;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
set_regval(env, env->atomic_dstr, val);
|
|
|
|
end_exclusive();
|
|
|
|
return;
|
|
|
|
|
|
|
|
sigsegv_maperr:
|
|
|
|
end_exclusive();
|
|
|
|
gen_sigsegv_maperr(env, addr);
|
|
|
|
}
|
|
|
|
|
2015-08-20 23:36:37 +02:00
|
|
|
void cpu_loop(CPUTLGState *env)
|
|
|
|
{
|
|
|
|
CPUState *cs = CPU(tilegx_env_get_cpu(env));
|
|
|
|
int trapnr;
|
|
|
|
|
|
|
|
while (1) {
|
|
|
|
cpu_exec_start(cs);
|
2015-07-18 11:40:28 +02:00
|
|
|
trapnr = cpu_exec(cs);
|
2015-08-20 23:36:37 +02:00
|
|
|
cpu_exec_end(cs);
|
2016-08-29 09:51:00 +02:00
|
|
|
process_queued_cpu_work(cs);
|
|
|
|
|
2015-08-20 23:36:37 +02:00
|
|
|
switch (trapnr) {
|
|
|
|
case TILEGX_EXCP_SYSCALL:
|
2016-05-12 19:47:42 +02:00
|
|
|
{
|
|
|
|
abi_ulong ret = do_syscall(env, env->regs[TILEGX_R_NR],
|
|
|
|
env->regs[0], env->regs[1],
|
|
|
|
env->regs[2], env->regs[3],
|
|
|
|
env->regs[4], env->regs[5],
|
|
|
|
env->regs[6], env->regs[7]);
|
|
|
|
if (ret == -TARGET_ERESTARTSYS) {
|
|
|
|
env->pc -= 8;
|
|
|
|
} else if (ret != -TARGET_QEMU_ESIGRETURN) {
|
|
|
|
env->regs[TILEGX_R_RE] = ret;
|
|
|
|
env->regs[TILEGX_R_ERR] = TILEGX_IS_ERRNO(ret) ? -ret : 0;
|
|
|
|
}
|
2015-08-20 23:36:37 +02:00
|
|
|
break;
|
2016-05-12 19:47:42 +02:00
|
|
|
}
|
2015-08-24 16:55:47 +02:00
|
|
|
case TILEGX_EXCP_OPCODE_EXCH:
|
|
|
|
do_exch(env, true, false);
|
|
|
|
break;
|
|
|
|
case TILEGX_EXCP_OPCODE_EXCH4:
|
|
|
|
do_exch(env, false, false);
|
|
|
|
break;
|
|
|
|
case TILEGX_EXCP_OPCODE_CMPEXCH:
|
|
|
|
do_exch(env, true, true);
|
|
|
|
break;
|
|
|
|
case TILEGX_EXCP_OPCODE_CMPEXCH4:
|
|
|
|
do_exch(env, false, true);
|
|
|
|
break;
|
|
|
|
case TILEGX_EXCP_OPCODE_FETCHADD:
|
|
|
|
case TILEGX_EXCP_OPCODE_FETCHADDGEZ:
|
|
|
|
case TILEGX_EXCP_OPCODE_FETCHAND:
|
|
|
|
case TILEGX_EXCP_OPCODE_FETCHOR:
|
|
|
|
do_fetch(env, trapnr, true);
|
|
|
|
break;
|
|
|
|
case TILEGX_EXCP_OPCODE_FETCHADD4:
|
|
|
|
case TILEGX_EXCP_OPCODE_FETCHADDGEZ4:
|
|
|
|
case TILEGX_EXCP_OPCODE_FETCHAND4:
|
|
|
|
case TILEGX_EXCP_OPCODE_FETCHOR4:
|
|
|
|
do_fetch(env, trapnr, false);
|
|
|
|
break;
|
2015-09-26 07:00:35 +02:00
|
|
|
case TILEGX_EXCP_SIGNAL:
|
2015-09-27 23:26:04 +02:00
|
|
|
do_signal(env, env->signo, env->sigcode);
|
2015-09-26 07:00:35 +02:00
|
|
|
break;
|
2015-08-20 23:36:37 +02:00
|
|
|
case TILEGX_EXCP_REG_IDN_ACCESS:
|
|
|
|
case TILEGX_EXCP_REG_UDN_ACCESS:
|
|
|
|
gen_sigill_reg(env);
|
|
|
|
break;
|
2016-06-30 07:12:55 +02:00
|
|
|
case EXCP_ATOMIC:
|
|
|
|
cpu_exec_step_atomic(cs);
|
|
|
|
break;
|
2015-08-20 23:36:37 +02:00
|
|
|
default:
|
|
|
|
fprintf(stderr, "trapnr is %d[0x%x].\n", trapnr, trapnr);
|
|
|
|
g_assert_not_reached();
|
|
|
|
}
|
|
|
|
process_pending_signals(env);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
#endif
|
|
|
|
|
2018-03-02 13:31:11 +01:00
|
|
|
#ifdef TARGET_RISCV
|
|
|
|
|
|
|
|
void cpu_loop(CPURISCVState *env)
|
|
|
|
{
|
|
|
|
CPUState *cs = CPU(riscv_env_get_cpu(env));
|
|
|
|
int trapnr, signum, sigcode;
|
|
|
|
target_ulong sigaddr;
|
|
|
|
target_ulong ret;
|
|
|
|
|
|
|
|
for (;;) {
|
|
|
|
cpu_exec_start(cs);
|
|
|
|
trapnr = cpu_exec(cs);
|
|
|
|
cpu_exec_end(cs);
|
|
|
|
process_queued_cpu_work(cs);
|
|
|
|
|
|
|
|
signum = 0;
|
|
|
|
sigcode = 0;
|
|
|
|
sigaddr = 0;
|
|
|
|
|
|
|
|
switch (trapnr) {
|
|
|
|
case EXCP_INTERRUPT:
|
|
|
|
/* just indicate that signals should be handled asap */
|
|
|
|
break;
|
|
|
|
case EXCP_ATOMIC:
|
|
|
|
cpu_exec_step_atomic(cs);
|
|
|
|
break;
|
|
|
|
case RISCV_EXCP_U_ECALL:
|
|
|
|
env->pc += 4;
|
|
|
|
if (env->gpr[xA7] == TARGET_NR_arch_specific_syscall + 15) {
|
|
|
|
/* riscv_flush_icache_syscall is a no-op in QEMU as
|
|
|
|
self-modifying code is automatically detected */
|
|
|
|
ret = 0;
|
|
|
|
} else {
|
|
|
|
ret = do_syscall(env,
|
|
|
|
env->gpr[xA7],
|
|
|
|
env->gpr[xA0],
|
|
|
|
env->gpr[xA1],
|
|
|
|
env->gpr[xA2],
|
|
|
|
env->gpr[xA3],
|
|
|
|
env->gpr[xA4],
|
|
|
|
env->gpr[xA5],
|
|
|
|
0, 0);
|
|
|
|
}
|
|
|
|
if (ret == -TARGET_ERESTARTSYS) {
|
|
|
|
env->pc -= 4;
|
|
|
|
} else if (ret != -TARGET_QEMU_ESIGRETURN) {
|
|
|
|
env->gpr[xA0] = ret;
|
|
|
|
}
|
|
|
|
if (cs->singlestep_enabled) {
|
|
|
|
goto gdbstep;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
case RISCV_EXCP_ILLEGAL_INST:
|
|
|
|
signum = TARGET_SIGILL;
|
|
|
|
sigcode = TARGET_ILL_ILLOPC;
|
|
|
|
break;
|
|
|
|
case RISCV_EXCP_BREAKPOINT:
|
|
|
|
signum = TARGET_SIGTRAP;
|
|
|
|
sigcode = TARGET_TRAP_BRKPT;
|
|
|
|
sigaddr = env->pc;
|
|
|
|
break;
|
|
|
|
case RISCV_EXCP_INST_PAGE_FAULT:
|
|
|
|
case RISCV_EXCP_LOAD_PAGE_FAULT:
|
|
|
|
case RISCV_EXCP_STORE_PAGE_FAULT:
|
|
|
|
signum = TARGET_SIGSEGV;
|
|
|
|
sigcode = TARGET_SEGV_MAPERR;
|
|
|
|
break;
|
|
|
|
case EXCP_DEBUG:
|
|
|
|
gdbstep:
|
|
|
|
signum = gdb_handlesig(cs, TARGET_SIGTRAP);
|
|
|
|
sigcode = TARGET_TRAP_BRKPT;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
EXCP_DUMP(env, "\nqemu: unhandled CPU exception %#x - aborting\n",
|
|
|
|
trapnr);
|
|
|
|
exit(EXIT_FAILURE);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (signum) {
|
|
|
|
target_siginfo_t info = {
|
|
|
|
.si_signo = signum,
|
|
|
|
.si_errno = 0,
|
|
|
|
.si_code = sigcode,
|
|
|
|
._sifields._sigfault._addr = sigaddr
|
|
|
|
};
|
|
|
|
queue_signal(env, info.si_signo, QEMU_SI_KILL, &info);
|
|
|
|
}
|
|
|
|
|
|
|
|
process_pending_signals(env);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
#endif /* TARGET_RISCV */
|
|
|
|
|
2016-12-15 19:01:00 +01:00
|
|
|
#ifdef TARGET_HPPA
|
|
|
|
|
|
|
|
static abi_ulong hppa_lws(CPUHPPAState *env)
|
|
|
|
{
|
|
|
|
uint32_t which = env->gr[20];
|
|
|
|
abi_ulong addr = env->gr[26];
|
|
|
|
abi_ulong old = env->gr[25];
|
|
|
|
abi_ulong new = env->gr[24];
|
|
|
|
abi_ulong size, ret;
|
|
|
|
|
|
|
|
switch (which) {
|
|
|
|
default:
|
|
|
|
return -TARGET_ENOSYS;
|
|
|
|
|
|
|
|
case 0: /* elf32 atomic 32bit cmpxchg */
|
|
|
|
if ((addr & 3) || !access_ok(VERIFY_WRITE, addr, 4)) {
|
|
|
|
return -TARGET_EFAULT;
|
|
|
|
}
|
|
|
|
old = tswap32(old);
|
|
|
|
new = tswap32(new);
|
|
|
|
ret = atomic_cmpxchg((uint32_t *)g2h(addr), old, new);
|
|
|
|
ret = tswap32(ret);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case 2: /* elf32 atomic "new" cmpxchg */
|
|
|
|
size = env->gr[23];
|
|
|
|
if (size >= 4) {
|
|
|
|
return -TARGET_ENOSYS;
|
|
|
|
}
|
|
|
|
if (((addr | old | new) & ((1 << size) - 1))
|
|
|
|
|| !access_ok(VERIFY_WRITE, addr, 1 << size)
|
|
|
|
|| !access_ok(VERIFY_READ, old, 1 << size)
|
|
|
|
|| !access_ok(VERIFY_READ, new, 1 << size)) {
|
|
|
|
return -TARGET_EFAULT;
|
|
|
|
}
|
|
|
|
/* Note that below we use host-endian loads so that the cmpxchg
|
|
|
|
can be host-endian as well. */
|
|
|
|
switch (size) {
|
|
|
|
case 0:
|
|
|
|
old = *(uint8_t *)g2h(old);
|
|
|
|
new = *(uint8_t *)g2h(new);
|
|
|
|
ret = atomic_cmpxchg((uint8_t *)g2h(addr), old, new);
|
|
|
|
ret = ret != old;
|
|
|
|
break;
|
|
|
|
case 1:
|
|
|
|
old = *(uint16_t *)g2h(old);
|
|
|
|
new = *(uint16_t *)g2h(new);
|
|
|
|
ret = atomic_cmpxchg((uint16_t *)g2h(addr), old, new);
|
|
|
|
ret = ret != old;
|
|
|
|
break;
|
|
|
|
case 2:
|
|
|
|
old = *(uint32_t *)g2h(old);
|
|
|
|
new = *(uint32_t *)g2h(new);
|
|
|
|
ret = atomic_cmpxchg((uint32_t *)g2h(addr), old, new);
|
|
|
|
ret = ret != old;
|
|
|
|
break;
|
|
|
|
case 3:
|
|
|
|
{
|
|
|
|
uint64_t o64, n64, r64;
|
|
|
|
o64 = *(uint64_t *)g2h(old);
|
|
|
|
n64 = *(uint64_t *)g2h(new);
|
|
|
|
#ifdef CONFIG_ATOMIC64
|
|
|
|
r64 = atomic_cmpxchg__nocheck((uint64_t *)g2h(addr), o64, n64);
|
|
|
|
ret = r64 != o64;
|
|
|
|
#else
|
|
|
|
start_exclusive();
|
|
|
|
r64 = *(uint64_t *)g2h(addr);
|
|
|
|
ret = 1;
|
|
|
|
if (r64 == o64) {
|
|
|
|
*(uint64_t *)g2h(addr) = n64;
|
|
|
|
ret = 0;
|
|
|
|
}
|
|
|
|
end_exclusive();
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
env->gr[28] = ret;
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
void cpu_loop(CPUHPPAState *env)
|
|
|
|
{
|
|
|
|
CPUState *cs = CPU(hppa_env_get_cpu(env));
|
|
|
|
target_siginfo_t info;
|
|
|
|
abi_ulong ret;
|
|
|
|
int trapnr;
|
|
|
|
|
|
|
|
while (1) {
|
|
|
|
cpu_exec_start(cs);
|
|
|
|
trapnr = cpu_exec(cs);
|
|
|
|
cpu_exec_end(cs);
|
|
|
|
process_queued_cpu_work(cs);
|
|
|
|
|
|
|
|
switch (trapnr) {
|
|
|
|
case EXCP_SYSCALL:
|
|
|
|
ret = do_syscall(env, env->gr[20],
|
|
|
|
env->gr[26], env->gr[25],
|
|
|
|
env->gr[24], env->gr[23],
|
|
|
|
env->gr[22], env->gr[21], 0, 0);
|
|
|
|
switch (ret) {
|
|
|
|
default:
|
|
|
|
env->gr[28] = ret;
|
|
|
|
/* We arrived here by faking the gateway page. Return. */
|
|
|
|
env->iaoq_f = env->gr[31];
|
|
|
|
env->iaoq_b = env->gr[31] + 4;
|
|
|
|
break;
|
|
|
|
case -TARGET_ERESTARTSYS:
|
|
|
|
case -TARGET_QEMU_ESIGRETURN:
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
case EXCP_SYSCALL_LWS:
|
|
|
|
env->gr[21] = hppa_lws(env);
|
|
|
|
/* We arrived here by faking the gateway page. Return. */
|
|
|
|
env->iaoq_f = env->gr[31];
|
|
|
|
env->iaoq_b = env->gr[31] + 4;
|
|
|
|
break;
|
2017-10-11 19:03:02 +02:00
|
|
|
case EXCP_ITLB_MISS:
|
|
|
|
case EXCP_DTLB_MISS:
|
|
|
|
case EXCP_NA_ITLB_MISS:
|
|
|
|
case EXCP_NA_DTLB_MISS:
|
|
|
|
case EXCP_IMP:
|
|
|
|
case EXCP_DMP:
|
|
|
|
case EXCP_DMB:
|
|
|
|
case EXCP_PAGE_REF:
|
|
|
|
case EXCP_DMAR:
|
|
|
|
case EXCP_DMPI:
|
2016-12-15 19:01:00 +01:00
|
|
|
info.si_signo = TARGET_SIGSEGV;
|
|
|
|
info.si_errno = 0;
|
|
|
|
info.si_code = TARGET_SEGV_ACCERR;
|
2017-10-11 06:19:34 +02:00
|
|
|
info._sifields._sigfault._addr = env->cr[CR_IOR];
|
2016-12-15 19:01:00 +01:00
|
|
|
queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
|
|
|
|
break;
|
2017-10-11 19:03:02 +02:00
|
|
|
case EXCP_UNALIGN:
|
|
|
|
info.si_signo = TARGET_SIGBUS;
|
|
|
|
info.si_errno = 0;
|
|
|
|
info.si_code = 0;
|
2017-10-11 06:19:34 +02:00
|
|
|
info._sifields._sigfault._addr = env->cr[CR_IOR];
|
2017-10-11 19:03:02 +02:00
|
|
|
queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
|
|
|
|
break;
|
|
|
|
case EXCP_ILL:
|
|
|
|
case EXCP_PRIV_OPR:
|
|
|
|
case EXCP_PRIV_REG:
|
2016-12-15 19:01:00 +01:00
|
|
|
info.si_signo = TARGET_SIGILL;
|
|
|
|
info.si_errno = 0;
|
|
|
|
info.si_code = TARGET_ILL_ILLOPN;
|
|
|
|
info._sifields._sigfault._addr = env->iaoq_f;
|
|
|
|
queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
|
|
|
|
break;
|
2017-10-11 19:03:02 +02:00
|
|
|
case EXCP_OVERFLOW:
|
|
|
|
case EXCP_COND:
|
|
|
|
case EXCP_ASSIST:
|
2016-12-15 19:01:00 +01:00
|
|
|
info.si_signo = TARGET_SIGFPE;
|
|
|
|
info.si_errno = 0;
|
|
|
|
info.si_code = 0;
|
|
|
|
info._sifields._sigfault._addr = env->iaoq_f;
|
|
|
|
queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
|
|
|
|
break;
|
|
|
|
case EXCP_DEBUG:
|
|
|
|
trapnr = gdb_handlesig(cs, TARGET_SIGTRAP);
|
|
|
|
if (trapnr) {
|
|
|
|
info.si_signo = trapnr;
|
|
|
|
info.si_errno = 0;
|
|
|
|
info.si_code = TARGET_TRAP_BRKPT;
|
|
|
|
queue_signal(env, trapnr, QEMU_SI_FAULT, &info);
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
case EXCP_INTERRUPT:
|
|
|
|
/* just indicate that signals should be handled asap */
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
g_assert_not_reached();
|
|
|
|
}
|
|
|
|
process_pending_signals(env);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
#endif /* TARGET_HPPA */
|
|
|
|
|
2017-01-25 19:54:11 +01:00
|
|
|
#ifdef TARGET_XTENSA
|
|
|
|
|
|
|
|
static void xtensa_rfw(CPUXtensaState *env)
|
|
|
|
{
|
|
|
|
xtensa_restore_owb(env);
|
|
|
|
env->pc = env->sregs[EPC1];
|
|
|
|
}
|
|
|
|
|
|
|
|
static void xtensa_rfwu(CPUXtensaState *env)
|
|
|
|
{
|
|
|
|
env->sregs[WINDOW_START] |= (1 << env->sregs[WINDOW_BASE]);
|
|
|
|
xtensa_rfw(env);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void xtensa_rfwo(CPUXtensaState *env)
|
|
|
|
{
|
|
|
|
env->sregs[WINDOW_START] &= ~(1 << env->sregs[WINDOW_BASE]);
|
|
|
|
xtensa_rfw(env);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void xtensa_overflow4(CPUXtensaState *env)
|
|
|
|
{
|
|
|
|
put_user_ual(env->regs[0], env->regs[5] - 16);
|
|
|
|
put_user_ual(env->regs[1], env->regs[5] - 12);
|
|
|
|
put_user_ual(env->regs[2], env->regs[5] - 8);
|
|
|
|
put_user_ual(env->regs[3], env->regs[5] - 4);
|
|
|
|
xtensa_rfwo(env);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void xtensa_underflow4(CPUXtensaState *env)
|
|
|
|
{
|
|
|
|
get_user_ual(env->regs[0], env->regs[5] - 16);
|
|
|
|
get_user_ual(env->regs[1], env->regs[5] - 12);
|
|
|
|
get_user_ual(env->regs[2], env->regs[5] - 8);
|
|
|
|
get_user_ual(env->regs[3], env->regs[5] - 4);
|
|
|
|
xtensa_rfwu(env);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void xtensa_overflow8(CPUXtensaState *env)
|
|
|
|
{
|
|
|
|
put_user_ual(env->regs[0], env->regs[9] - 16);
|
|
|
|
get_user_ual(env->regs[0], env->regs[1] - 12);
|
|
|
|
put_user_ual(env->regs[1], env->regs[9] - 12);
|
|
|
|
put_user_ual(env->regs[2], env->regs[9] - 8);
|
|
|
|
put_user_ual(env->regs[3], env->regs[9] - 4);
|
|
|
|
put_user_ual(env->regs[4], env->regs[0] - 32);
|
|
|
|
put_user_ual(env->regs[5], env->regs[0] - 28);
|
|
|
|
put_user_ual(env->regs[6], env->regs[0] - 24);
|
|
|
|
put_user_ual(env->regs[7], env->regs[0] - 20);
|
|
|
|
xtensa_rfwo(env);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void xtensa_underflow8(CPUXtensaState *env)
|
|
|
|
{
|
|
|
|
get_user_ual(env->regs[0], env->regs[9] - 16);
|
|
|
|
get_user_ual(env->regs[1], env->regs[9] - 12);
|
|
|
|
get_user_ual(env->regs[2], env->regs[9] - 8);
|
|
|
|
get_user_ual(env->regs[7], env->regs[1] - 12);
|
|
|
|
get_user_ual(env->regs[3], env->regs[9] - 4);
|
|
|
|
get_user_ual(env->regs[4], env->regs[7] - 32);
|
|
|
|
get_user_ual(env->regs[5], env->regs[7] - 28);
|
|
|
|
get_user_ual(env->regs[6], env->regs[7] - 24);
|
|
|
|
get_user_ual(env->regs[7], env->regs[7] - 20);
|
|
|
|
xtensa_rfwu(env);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void xtensa_overflow12(CPUXtensaState *env)
|
|
|
|
{
|
|
|
|
put_user_ual(env->regs[0], env->regs[13] - 16);
|
|
|
|
get_user_ual(env->regs[0], env->regs[1] - 12);
|
|
|
|
put_user_ual(env->regs[1], env->regs[13] - 12);
|
|
|
|
put_user_ual(env->regs[2], env->regs[13] - 8);
|
|
|
|
put_user_ual(env->regs[3], env->regs[13] - 4);
|
|
|
|
put_user_ual(env->regs[4], env->regs[0] - 48);
|
|
|
|
put_user_ual(env->regs[5], env->regs[0] - 44);
|
|
|
|
put_user_ual(env->regs[6], env->regs[0] - 40);
|
|
|
|
put_user_ual(env->regs[7], env->regs[0] - 36);
|
|
|
|
put_user_ual(env->regs[8], env->regs[0] - 32);
|
|
|
|
put_user_ual(env->regs[9], env->regs[0] - 28);
|
|
|
|
put_user_ual(env->regs[10], env->regs[0] - 24);
|
|
|
|
put_user_ual(env->regs[11], env->regs[0] - 20);
|
|
|
|
xtensa_rfwo(env);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void xtensa_underflow12(CPUXtensaState *env)
|
|
|
|
{
|
|
|
|
get_user_ual(env->regs[0], env->regs[13] - 16);
|
|
|
|
get_user_ual(env->regs[1], env->regs[13] - 12);
|
|
|
|
get_user_ual(env->regs[2], env->regs[13] - 8);
|
|
|
|
get_user_ual(env->regs[11], env->regs[1] - 12);
|
|
|
|
get_user_ual(env->regs[3], env->regs[13] - 4);
|
|
|
|
get_user_ual(env->regs[4], env->regs[11] - 48);
|
|
|
|
get_user_ual(env->regs[5], env->regs[11] - 44);
|
|
|
|
get_user_ual(env->regs[6], env->regs[11] - 40);
|
|
|
|
get_user_ual(env->regs[7], env->regs[11] - 36);
|
|
|
|
get_user_ual(env->regs[8], env->regs[11] - 32);
|
|
|
|
get_user_ual(env->regs[9], env->regs[11] - 28);
|
|
|
|
get_user_ual(env->regs[10], env->regs[11] - 24);
|
|
|
|
get_user_ual(env->regs[11], env->regs[11] - 20);
|
|
|
|
xtensa_rfwu(env);
|
|
|
|
}
|
|
|
|
|
|
|
|
void cpu_loop(CPUXtensaState *env)
|
|
|
|
{
|
|
|
|
CPUState *cs = CPU(xtensa_env_get_cpu(env));
|
|
|
|
target_siginfo_t info;
|
|
|
|
abi_ulong ret;
|
|
|
|
int trapnr;
|
|
|
|
|
|
|
|
while (1) {
|
|
|
|
cpu_exec_start(cs);
|
|
|
|
trapnr = cpu_exec(cs);
|
|
|
|
cpu_exec_end(cs);
|
|
|
|
process_queued_cpu_work(cs);
|
|
|
|
|
|
|
|
env->sregs[PS] &= ~PS_EXCM;
|
|
|
|
switch (trapnr) {
|
|
|
|
case EXCP_INTERRUPT:
|
|
|
|
break;
|
|
|
|
|
|
|
|
case EXC_WINDOW_OVERFLOW4:
|
|
|
|
xtensa_overflow4(env);
|
|
|
|
break;
|
|
|
|
case EXC_WINDOW_UNDERFLOW4:
|
|
|
|
xtensa_underflow4(env);
|
|
|
|
break;
|
|
|
|
case EXC_WINDOW_OVERFLOW8:
|
|
|
|
xtensa_overflow8(env);
|
|
|
|
break;
|
|
|
|
case EXC_WINDOW_UNDERFLOW8:
|
|
|
|
xtensa_underflow8(env);
|
|
|
|
break;
|
|
|
|
case EXC_WINDOW_OVERFLOW12:
|
|
|
|
xtensa_overflow12(env);
|
|
|
|
break;
|
|
|
|
case EXC_WINDOW_UNDERFLOW12:
|
|
|
|
xtensa_underflow12(env);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case EXC_USER:
|
|
|
|
switch (env->sregs[EXCCAUSE]) {
|
|
|
|
case ILLEGAL_INSTRUCTION_CAUSE:
|
|
|
|
case PRIVILEGED_CAUSE:
|
|
|
|
info.si_signo = TARGET_SIGILL;
|
|
|
|
info.si_errno = 0;
|
|
|
|
info.si_code =
|
|
|
|
env->sregs[EXCCAUSE] == ILLEGAL_INSTRUCTION_CAUSE ?
|
|
|
|
TARGET_ILL_ILLOPC : TARGET_ILL_PRVOPC;
|
|
|
|
info._sifields._sigfault._addr = env->sregs[EPC1];
|
|
|
|
queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case SYSCALL_CAUSE:
|
|
|
|
env->pc += 3;
|
|
|
|
ret = do_syscall(env, env->regs[2],
|
|
|
|
env->regs[6], env->regs[3],
|
|
|
|
env->regs[4], env->regs[5],
|
|
|
|
env->regs[8], env->regs[9], 0, 0);
|
|
|
|
switch (ret) {
|
|
|
|
default:
|
|
|
|
env->regs[2] = ret;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case -TARGET_ERESTARTSYS:
|
2018-03-28 10:08:36 +02:00
|
|
|
env->pc -= 3;
|
|
|
|
break;
|
|
|
|
|
2017-01-25 19:54:11 +01:00
|
|
|
case -TARGET_QEMU_ESIGRETURN:
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
|
|
|
|
case ALLOCA_CAUSE:
|
|
|
|
env->sregs[PS] = deposit32(env->sregs[PS],
|
|
|
|
PS_OWB_SHIFT,
|
|
|
|
PS_OWB_LEN,
|
|
|
|
env->sregs[WINDOW_BASE]);
|
|
|
|
|
|
|
|
switch (env->regs[0] & 0xc0000000) {
|
|
|
|
case 0x00000000:
|
|
|
|
case 0x40000000:
|
|
|
|
xtensa_rotate_window(env, -1);
|
|
|
|
xtensa_underflow4(env);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case 0x80000000:
|
|
|
|
xtensa_rotate_window(env, -2);
|
|
|
|
xtensa_underflow8(env);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case 0xc0000000:
|
|
|
|
xtensa_rotate_window(env, -3);
|
|
|
|
xtensa_underflow12(env);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
|
|
|
|
case INTEGER_DIVIDE_BY_ZERO_CAUSE:
|
|
|
|
info.si_signo = TARGET_SIGFPE;
|
|
|
|
info.si_errno = 0;
|
|
|
|
info.si_code = TARGET_FPE_INTDIV;
|
|
|
|
info._sifields._sigfault._addr = env->sregs[EPC1];
|
|
|
|
queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case LOAD_PROHIBITED_CAUSE:
|
|
|
|
case STORE_PROHIBITED_CAUSE:
|
|
|
|
info.si_signo = TARGET_SIGSEGV;
|
|
|
|
info.si_errno = 0;
|
|
|
|
info.si_code = TARGET_SEGV_ACCERR;
|
|
|
|
info._sifields._sigfault._addr = env->sregs[EXCVADDR];
|
|
|
|
queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
|
|
|
|
break;
|
|
|
|
|
|
|
|
default:
|
|
|
|
fprintf(stderr, "exccause = %d\n", env->sregs[EXCCAUSE]);
|
|
|
|
g_assert_not_reached();
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
case EXCP_DEBUG:
|
|
|
|
trapnr = gdb_handlesig(cs, TARGET_SIGTRAP);
|
|
|
|
if (trapnr) {
|
|
|
|
info.si_signo = trapnr;
|
|
|
|
info.si_errno = 0;
|
|
|
|
info.si_code = TARGET_TRAP_BRKPT;
|
|
|
|
queue_signal(env, trapnr, QEMU_SI_FAULT, &info);
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
case EXC_DEBUG:
|
|
|
|
default:
|
|
|
|
fprintf(stderr, "trapnr = %d\n", trapnr);
|
|
|
|
g_assert_not_reached();
|
|
|
|
}
|
|
|
|
process_pending_signals(env);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
#endif /* TARGET_XTENSA */
|
|
|
|
|
2018-02-13 14:22:46 +01:00
|
|
|
__thread CPUState *thread_cpu;
|
2003-06-25 18:18:50 +02:00
|
|
|
|
2016-08-02 19:27:39 +02:00
|
|
|
bool qemu_cpu_is_self(CPUState *cpu)
|
|
|
|
{
|
|
|
|
return thread_cpu == cpu;
|
|
|
|
}
|
|
|
|
|
|
|
|
void qemu_cpu_kick(CPUState *cpu)
|
|
|
|
{
|
|
|
|
cpu_exit(cpu);
|
|
|
|
}
|
|
|
|
|
2009-04-07 08:57:11 +02:00
|
|
|
void task_settid(TaskState *ts)
|
|
|
|
{
|
|
|
|
if (ts->ts_tid == 0) {
|
|
|
|
ts->ts_tid = (pid_t)syscall(SYS_gettid);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
void stop_all_tasks(void)
|
|
|
|
{
|
|
|
|
/*
|
|
|
|
* We trust that when using NPTL, start_exclusive()
|
|
|
|
* handles thread stopping correctly.
|
|
|
|
*/
|
|
|
|
start_exclusive();
|
|
|
|
}
|
|
|
|
|
2008-06-09 16:02:50 +02:00
|
|
|
/* Assumes contents are already zeroed. */
|
2008-05-31 18:11:38 +02:00
|
|
|
void init_task_state(TaskState *ts)
|
|
|
|
{
|
|
|
|
ts->used = 1;
|
|
|
|
}
|
2011-08-06 08:54:12 +02:00
|
|
|
|
2013-07-02 17:43:21 +02:00
|
|
|
CPUArchState *cpu_copy(CPUArchState *env)
|
|
|
|
{
|
2013-08-26 18:23:18 +02:00
|
|
|
CPUState *cpu = ENV_GET_CPU(env);
|
2018-02-07 11:40:26 +01:00
|
|
|
CPUState *new_cpu = cpu_create(cpu_type);
|
2015-03-23 13:55:52 +01:00
|
|
|
CPUArchState *new_env = new_cpu->env_ptr;
|
2013-07-02 17:43:21 +02:00
|
|
|
CPUBreakpoint *bp;
|
|
|
|
CPUWatchpoint *wp;
|
|
|
|
|
|
|
|
/* Reset non arch specific state */
|
2013-09-02 16:57:02 +02:00
|
|
|
cpu_reset(new_cpu);
|
2013-07-02 17:43:21 +02:00
|
|
|
|
|
|
|
memcpy(new_env, env, sizeof(CPUArchState));
|
|
|
|
|
|
|
|
/* Clone all break/watchpoints.
|
|
|
|
Note: Once we support ptrace with hw-debug register access, make sure
|
|
|
|
BP_CPU break/watchpoints are handled correctly on clone. */
|
2015-06-12 11:24:10 +02:00
|
|
|
QTAILQ_INIT(&new_cpu->breakpoints);
|
|
|
|
QTAILQ_INIT(&new_cpu->watchpoints);
|
2013-08-26 21:22:53 +02:00
|
|
|
QTAILQ_FOREACH(bp, &cpu->breakpoints, entry) {
|
2013-09-02 17:26:20 +02:00
|
|
|
cpu_breakpoint_insert(new_cpu, bp->pc, bp->flags, NULL);
|
2013-07-02 17:43:21 +02:00
|
|
|
}
|
2013-08-26 18:23:18 +02:00
|
|
|
QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) {
|
2014-09-12 15:06:48 +02:00
|
|
|
cpu_watchpoint_insert(new_cpu, wp->vaddr, wp->len, wp->flags, NULL);
|
2013-07-02 17:43:21 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
return new_env;
|
|
|
|
}
|
|
|
|
|
2011-08-06 08:54:12 +02:00
|
|
|
static void handle_arg_help(const char *arg)
|
|
|
|
{
|
2015-09-28 15:12:16 +02:00
|
|
|
usage(EXIT_SUCCESS);
|
2011-08-06 08:54:12 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
static void handle_arg_log(const char *arg)
|
|
|
|
{
|
|
|
|
int mask;
|
|
|
|
|
2013-02-11 17:41:22 +01:00
|
|
|
mask = qemu_str_to_log_mask(arg);
|
2011-08-06 08:54:12 +02:00
|
|
|
if (!mask) {
|
2013-02-11 17:41:21 +01:00
|
|
|
qemu_print_log_usage(stdout);
|
2015-09-28 15:12:16 +02:00
|
|
|
exit(EXIT_FAILURE);
|
2011-08-06 08:54:12 +02:00
|
|
|
}
|
2015-12-04 13:12:57 +01:00
|
|
|
qemu_log_needs_buffers();
|
2013-02-11 17:41:23 +01:00
|
|
|
qemu_set_log(mask);
|
2011-08-06 08:54:12 +02:00
|
|
|
}
|
|
|
|
|
2017-10-17 12:35:14 +02:00
|
|
|
static void handle_arg_dfilter(const char *arg)
|
|
|
|
{
|
|
|
|
qemu_set_dfilter_ranges(arg, NULL);
|
|
|
|
}
|
|
|
|
|
2011-11-08 10:46:44 +01:00
|
|
|
static void handle_arg_log_filename(const char *arg)
|
|
|
|
{
|
2016-06-15 19:27:16 +02:00
|
|
|
qemu_set_log_filename(arg, &error_fatal);
|
2011-11-08 10:46:44 +01:00
|
|
|
}
|
|
|
|
|
2011-08-06 08:54:12 +02:00
|
|
|
static void handle_arg_set_env(const char *arg)
|
|
|
|
{
|
|
|
|
char *r, *p, *token;
|
|
|
|
r = p = strdup(arg);
|
|
|
|
while ((token = strsep(&p, ",")) != NULL) {
|
|
|
|
if (envlist_setenv(envlist, token) != 0) {
|
2015-09-28 15:12:16 +02:00
|
|
|
usage(EXIT_FAILURE);
|
2011-08-06 08:54:12 +02:00
|
|
|
}
|
|
|
|
}
|
|
|
|
free(r);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void handle_arg_unset_env(const char *arg)
|
|
|
|
{
|
|
|
|
char *r, *p, *token;
|
|
|
|
r = p = strdup(arg);
|
|
|
|
while ((token = strsep(&p, ",")) != NULL) {
|
|
|
|
if (envlist_unsetenv(envlist, token) != 0) {
|
2015-09-28 15:12:16 +02:00
|
|
|
usage(EXIT_FAILURE);
|
2011-08-06 08:54:12 +02:00
|
|
|
}
|
|
|
|
}
|
|
|
|
free(r);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void handle_arg_argv0(const char *arg)
|
|
|
|
{
|
|
|
|
argv0 = strdup(arg);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void handle_arg_stack_size(const char *arg)
|
|
|
|
{
|
|
|
|
char *p;
|
|
|
|
guest_stack_size = strtoul(arg, &p, 0);
|
|
|
|
if (guest_stack_size == 0) {
|
2015-09-28 15:12:16 +02:00
|
|
|
usage(EXIT_FAILURE);
|
2011-08-06 08:54:12 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
if (*p == 'M') {
|
|
|
|
guest_stack_size *= 1024 * 1024;
|
|
|
|
} else if (*p == 'k' || *p == 'K') {
|
|
|
|
guest_stack_size *= 1024;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static void handle_arg_ld_prefix(const char *arg)
|
|
|
|
{
|
|
|
|
interp_prefix = strdup(arg);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void handle_arg_pagesize(const char *arg)
|
|
|
|
{
|
|
|
|
qemu_host_page_size = atoi(arg);
|
|
|
|
if (qemu_host_page_size == 0 ||
|
|
|
|
(qemu_host_page_size & (qemu_host_page_size - 1)) != 0) {
|
|
|
|
fprintf(stderr, "page size must be a power of two\n");
|
2015-09-28 15:12:16 +02:00
|
|
|
exit(EXIT_FAILURE);
|
2011-08-06 08:54:12 +02:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2014-10-14 17:18:17 +02:00
|
|
|
static void handle_arg_randseed(const char *arg)
|
|
|
|
{
|
|
|
|
unsigned long long seed;
|
|
|
|
|
|
|
|
if (parse_uint_full(arg, &seed, 0) != 0 || seed > UINT_MAX) {
|
|
|
|
fprintf(stderr, "Invalid seed number: %s\n", arg);
|
2015-09-28 15:12:16 +02:00
|
|
|
exit(EXIT_FAILURE);
|
2014-10-14 17:18:17 +02:00
|
|
|
}
|
|
|
|
srand(seed);
|
|
|
|
}
|
|
|
|
|
2011-08-06 08:54:12 +02:00
|
|
|
static void handle_arg_gdb(const char *arg)
|
|
|
|
{
|
|
|
|
gdbstub_port = atoi(arg);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void handle_arg_uname(const char *arg)
|
|
|
|
{
|
|
|
|
qemu_uname_release = strdup(arg);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void handle_arg_cpu(const char *arg)
|
|
|
|
{
|
|
|
|
cpu_model = strdup(arg);
|
2012-08-02 14:45:54 +02:00
|
|
|
if (cpu_model == NULL || is_help_option(cpu_model)) {
|
2011-08-06 08:54:12 +02:00
|
|
|
/* XXX: implement xxx_cpu_list for targets that still miss it */
|
2012-09-05 22:41:08 +02:00
|
|
|
#if defined(cpu_list)
|
|
|
|
cpu_list(stdout, &fprintf);
|
2011-08-06 08:54:12 +02:00
|
|
|
#endif
|
2015-09-28 15:12:16 +02:00
|
|
|
exit(EXIT_FAILURE);
|
2011-08-06 08:54:12 +02:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static void handle_arg_guest_base(const char *arg)
|
|
|
|
{
|
|
|
|
guest_base = strtol(arg, NULL, 0);
|
|
|
|
have_guest_base = 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void handle_arg_reserved_va(const char *arg)
|
|
|
|
{
|
|
|
|
char *p;
|
|
|
|
int shift = 0;
|
|
|
|
reserved_va = strtoul(arg, &p, 0);
|
|
|
|
switch (*p) {
|
|
|
|
case 'k':
|
|
|
|
case 'K':
|
|
|
|
shift = 10;
|
|
|
|
break;
|
|
|
|
case 'M':
|
|
|
|
shift = 20;
|
|
|
|
break;
|
|
|
|
case 'G':
|
|
|
|
shift = 30;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
if (shift) {
|
|
|
|
unsigned long unshifted = reserved_va;
|
|
|
|
p++;
|
|
|
|
reserved_va <<= shift;
|
2017-10-05 16:36:00 +02:00
|
|
|
if (reserved_va >> shift != unshifted
|
|
|
|
|| (MAX_RESERVED_VA && reserved_va > MAX_RESERVED_VA)) {
|
2011-08-06 08:54:12 +02:00
|
|
|
fprintf(stderr, "Reserved virtual address too big\n");
|
2015-09-28 15:12:16 +02:00
|
|
|
exit(EXIT_FAILURE);
|
2011-08-06 08:54:12 +02:00
|
|
|
}
|
|
|
|
}
|
|
|
|
if (*p) {
|
|
|
|
fprintf(stderr, "Unrecognised -R size suffix '%s'\n", p);
|
2015-09-28 15:12:16 +02:00
|
|
|
exit(EXIT_FAILURE);
|
2011-08-06 08:54:12 +02:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static void handle_arg_singlestep(const char *arg)
|
|
|
|
{
|
|
|
|
singlestep = 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void handle_arg_strace(const char *arg)
|
|
|
|
{
|
|
|
|
do_strace = 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void handle_arg_version(const char *arg)
|
|
|
|
{
|
2018-02-15 12:06:47 +01:00
|
|
|
printf("qemu-" TARGET_NAME " version " QEMU_FULL_VERSION
|
2016-10-05 11:54:44 +02:00
|
|
|
"\n" QEMU_COPYRIGHT "\n");
|
2015-09-28 15:12:16 +02:00
|
|
|
exit(EXIT_SUCCESS);
|
2011-08-06 08:54:12 +02:00
|
|
|
}
|
|
|
|
|
2016-07-15 19:08:38 +02:00
|
|
|
static char *trace_file;
|
|
|
|
static void handle_arg_trace(const char *arg)
|
|
|
|
{
|
|
|
|
g_free(trace_file);
|
|
|
|
trace_file = trace_opt_parse(arg);
|
|
|
|
}
|
|
|
|
|
2011-08-06 08:54:12 +02:00
|
|
|
struct qemu_argument {
|
|
|
|
const char *argv;
|
|
|
|
const char *env;
|
|
|
|
bool has_arg;
|
|
|
|
void (*handle_opt)(const char *arg);
|
|
|
|
const char *example;
|
|
|
|
const char *help;
|
|
|
|
};
|
|
|
|
|
2012-05-21 21:56:19 +02:00
|
|
|
static const struct qemu_argument arg_table[] = {
|
2011-08-06 08:54:12 +02:00
|
|
|
{"h", "", false, handle_arg_help,
|
|
|
|
"", "print this help"},
|
2015-07-06 20:03:39 +02:00
|
|
|
{"help", "", false, handle_arg_help,
|
|
|
|
"", ""},
|
2011-08-06 08:54:12 +02:00
|
|
|
{"g", "QEMU_GDB", true, handle_arg_gdb,
|
|
|
|
"port", "wait gdb connection to 'port'"},
|
|
|
|
{"L", "QEMU_LD_PREFIX", true, handle_arg_ld_prefix,
|
|
|
|
"path", "set the elf interpreter prefix to 'path'"},
|
|
|
|
{"s", "QEMU_STACK_SIZE", true, handle_arg_stack_size,
|
|
|
|
"size", "set the stack size to 'size' bytes"},
|
|
|
|
{"cpu", "QEMU_CPU", true, handle_arg_cpu,
|
2012-08-02 14:45:54 +02:00
|
|
|
"model", "select CPU (-cpu help for list)"},
|
2011-08-06 08:54:12 +02:00
|
|
|
{"E", "QEMU_SET_ENV", true, handle_arg_set_env,
|
|
|
|
"var=value", "sets targets environment variable (see below)"},
|
|
|
|
{"U", "QEMU_UNSET_ENV", true, handle_arg_unset_env,
|
|
|
|
"var", "unsets targets environment variable (see below)"},
|
|
|
|
{"0", "QEMU_ARGV0", true, handle_arg_argv0,
|
|
|
|
"argv0", "forces target process argv[0] to be 'argv0'"},
|
|
|
|
{"r", "QEMU_UNAME", true, handle_arg_uname,
|
|
|
|
"uname", "set qemu uname release string to 'uname'"},
|
|
|
|
{"B", "QEMU_GUEST_BASE", true, handle_arg_guest_base,
|
|
|
|
"address", "set guest_base address to 'address'"},
|
|
|
|
{"R", "QEMU_RESERVED_VA", true, handle_arg_reserved_va,
|
|
|
|
"size", "reserve 'size' bytes for guest virtual address space"},
|
|
|
|
{"d", "QEMU_LOG", true, handle_arg_log,
|
2013-02-26 18:52:40 +01:00
|
|
|
"item[,...]", "enable logging of specified items "
|
|
|
|
"(use '-d help' for a list of items)"},
|
2017-10-17 12:35:14 +02:00
|
|
|
{"dfilter", "QEMU_DFILTER", true, handle_arg_dfilter,
|
|
|
|
"range[,...]","filter logging based on address range"},
|
2011-11-08 10:46:44 +01:00
|
|
|
{"D", "QEMU_LOG_FILENAME", true, handle_arg_log_filename,
|
2013-02-26 18:52:40 +01:00
|
|
|
"logfile", "write logs to 'logfile' (default stderr)"},
|
2011-08-06 08:54:12 +02:00
|
|
|
{"p", "QEMU_PAGESIZE", true, handle_arg_pagesize,
|
|
|
|
"pagesize", "set the host page size to 'pagesize'"},
|
|
|
|
{"singlestep", "QEMU_SINGLESTEP", false, handle_arg_singlestep,
|
|
|
|
"", "run in singlestep mode"},
|
|
|
|
{"strace", "QEMU_STRACE", false, handle_arg_strace,
|
|
|
|
"", "log system calls"},
|
2014-10-14 17:18:17 +02:00
|
|
|
{"seed", "QEMU_RAND_SEED", true, handle_arg_randseed,
|
|
|
|
"", "Seed for pseudo-random number generator"},
|
2016-07-15 19:08:38 +02:00
|
|
|
{"trace", "QEMU_TRACE", true, handle_arg_trace,
|
|
|
|
"", "[[enable=]<pattern>][,events=<file>][,file=<file>]"},
|
2011-08-06 08:54:12 +02:00
|
|
|
{"version", "QEMU_VERSION", false, handle_arg_version,
|
2011-09-29 16:48:12 +02:00
|
|
|
"", "display version information and exit"},
|
2011-08-06 08:54:12 +02:00
|
|
|
{NULL, NULL, false, NULL, NULL, NULL}
|
|
|
|
};
|
|
|
|
|
2015-07-06 20:03:38 +02:00
|
|
|
static void usage(int exitcode)
|
2011-08-06 08:54:12 +02:00
|
|
|
{
|
2012-05-21 21:56:19 +02:00
|
|
|
const struct qemu_argument *arginfo;
|
2011-08-06 08:54:12 +02:00
|
|
|
int maxarglen;
|
|
|
|
int maxenvlen;
|
|
|
|
|
2013-06-04 14:45:27 +02:00
|
|
|
printf("usage: qemu-" TARGET_NAME " [options] program [arguments...]\n"
|
|
|
|
"Linux CPU emulator (compiled for " TARGET_NAME " emulation)\n"
|
2011-08-06 08:54:12 +02:00
|
|
|
"\n"
|
|
|
|
"Options and associated environment variables:\n"
|
|
|
|
"\n");
|
|
|
|
|
2013-02-14 09:46:43 +01:00
|
|
|
/* Calculate column widths. We must always have at least enough space
|
|
|
|
* for the column header.
|
|
|
|
*/
|
|
|
|
maxarglen = strlen("Argument");
|
|
|
|
maxenvlen = strlen("Env-variable");
|
2011-08-06 08:54:12 +02:00
|
|
|
|
|
|
|
for (arginfo = arg_table; arginfo->handle_opt != NULL; arginfo++) {
|
2013-02-14 09:46:43 +01:00
|
|
|
int arglen = strlen(arginfo->argv);
|
|
|
|
if (arginfo->has_arg) {
|
|
|
|
arglen += strlen(arginfo->example) + 1;
|
|
|
|
}
|
2011-08-06 08:54:12 +02:00
|
|
|
if (strlen(arginfo->env) > maxenvlen) {
|
|
|
|
maxenvlen = strlen(arginfo->env);
|
|
|
|
}
|
2013-02-14 09:46:43 +01:00
|
|
|
if (arglen > maxarglen) {
|
|
|
|
maxarglen = arglen;
|
2011-08-06 08:54:12 +02:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2013-02-14 09:46:43 +01:00
|
|
|
printf("%-*s %-*s Description\n", maxarglen+1, "Argument",
|
|
|
|
maxenvlen, "Env-variable");
|
2011-08-06 08:54:12 +02:00
|
|
|
|
|
|
|
for (arginfo = arg_table; arginfo->handle_opt != NULL; arginfo++) {
|
|
|
|
if (arginfo->has_arg) {
|
|
|
|
printf("-%s %-*s %-*s %s\n", arginfo->argv,
|
2013-02-14 09:46:43 +01:00
|
|
|
(int)(maxarglen - strlen(arginfo->argv) - 1),
|
|
|
|
arginfo->example, maxenvlen, arginfo->env, arginfo->help);
|
2011-08-06 08:54:12 +02:00
|
|
|
} else {
|
2013-02-14 09:46:43 +01:00
|
|
|
printf("-%-*s %-*s %s\n", maxarglen, arginfo->argv,
|
2011-08-06 08:54:12 +02:00
|
|
|
maxenvlen, arginfo->env,
|
|
|
|
arginfo->help);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
printf("\n"
|
|
|
|
"Defaults:\n"
|
|
|
|
"QEMU_LD_PREFIX = %s\n"
|
2013-02-26 18:52:40 +01:00
|
|
|
"QEMU_STACK_SIZE = %ld byte\n",
|
2011-08-06 08:54:12 +02:00
|
|
|
interp_prefix,
|
2013-02-26 18:52:40 +01:00
|
|
|
guest_stack_size);
|
2011-08-06 08:54:12 +02:00
|
|
|
|
|
|
|
printf("\n"
|
|
|
|
"You can use -E and -U options or the QEMU_SET_ENV and\n"
|
|
|
|
"QEMU_UNSET_ENV environment variables to set and unset\n"
|
|
|
|
"environment variables for the target process.\n"
|
|
|
|
"It is possible to provide several variables by separating them\n"
|
|
|
|
"by commas in getsubopt(3) style. Additionally it is possible to\n"
|
|
|
|
"provide the -E and -U options multiple times.\n"
|
|
|
|
"The following lines are equivalent:\n"
|
|
|
|
" -E var1=val2 -E var2=val2 -U LD_PRELOAD -U LD_DEBUG\n"
|
|
|
|
" -E var1=val2,var2=val2 -U LD_PRELOAD,LD_DEBUG\n"
|
|
|
|
" QEMU_SET_ENV=var1=val2,var2=val2 QEMU_UNSET_ENV=LD_PRELOAD,LD_DEBUG\n"
|
|
|
|
"Note that if you provide several changes to a single variable\n"
|
2017-08-03 18:33:53 +02:00
|
|
|
"the last change will stay in effect.\n"
|
|
|
|
"\n"
|
|
|
|
QEMU_HELP_BOTTOM "\n");
|
2011-08-06 08:54:12 +02:00
|
|
|
|
2015-07-06 20:03:38 +02:00
|
|
|
exit(exitcode);
|
2011-08-06 08:54:12 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
static int parse_args(int argc, char **argv)
|
|
|
|
{
|
|
|
|
const char *r;
|
|
|
|
int optind;
|
2012-05-21 21:56:19 +02:00
|
|
|
const struct qemu_argument *arginfo;
|
2011-08-06 08:54:12 +02:00
|
|
|
|
|
|
|
for (arginfo = arg_table; arginfo->handle_opt != NULL; arginfo++) {
|
|
|
|
if (arginfo->env == NULL) {
|
|
|
|
continue;
|
|
|
|
}
|
|
|
|
|
|
|
|
r = getenv(arginfo->env);
|
|
|
|
if (r != NULL) {
|
|
|
|
arginfo->handle_opt(r);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
optind = 1;
|
|
|
|
for (;;) {
|
|
|
|
if (optind >= argc) {
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
r = argv[optind];
|
|
|
|
if (r[0] != '-') {
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
optind++;
|
|
|
|
r++;
|
|
|
|
if (!strcmp(r, "-")) {
|
|
|
|
break;
|
|
|
|
}
|
2015-07-06 20:03:41 +02:00
|
|
|
/* Treat --foo the same as -foo. */
|
|
|
|
if (r[0] == '-') {
|
|
|
|
r++;
|
|
|
|
}
|
2011-08-06 08:54:12 +02:00
|
|
|
|
|
|
|
for (arginfo = arg_table; arginfo->handle_opt != NULL; arginfo++) {
|
|
|
|
if (!strcmp(r, arginfo->argv)) {
|
|
|
|
if (arginfo->has_arg) {
|
2011-09-29 16:48:12 +02:00
|
|
|
if (optind >= argc) {
|
2015-07-06 20:03:40 +02:00
|
|
|
(void) fprintf(stderr,
|
|
|
|
"qemu: missing argument for option '%s'\n", r);
|
2015-09-28 15:12:16 +02:00
|
|
|
exit(EXIT_FAILURE);
|
2011-09-29 16:48:12 +02:00
|
|
|
}
|
|
|
|
arginfo->handle_opt(argv[optind]);
|
2011-08-06 08:54:12 +02:00
|
|
|
optind++;
|
2011-09-29 16:48:12 +02:00
|
|
|
} else {
|
|
|
|
arginfo->handle_opt(NULL);
|
2011-08-06 08:54:12 +02:00
|
|
|
}
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/* no option matched the current argv */
|
|
|
|
if (arginfo->handle_opt == NULL) {
|
2015-07-06 20:03:40 +02:00
|
|
|
(void) fprintf(stderr, "qemu: unknown option '%s'\n", r);
|
2015-09-28 15:12:16 +02:00
|
|
|
exit(EXIT_FAILURE);
|
2011-08-06 08:54:12 +02:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
if (optind >= argc) {
|
2015-07-06 20:03:40 +02:00
|
|
|
(void) fprintf(stderr, "qemu: no user program specified\n");
|
2015-09-28 15:12:16 +02:00
|
|
|
exit(EXIT_FAILURE);
|
2011-08-06 08:54:12 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
filename = argv[optind];
|
|
|
|
exec_path = argv[optind];
|
|
|
|
|
|
|
|
return optind;
|
|
|
|
}
|
|
|
|
|
2008-12-10 20:18:40 +01:00
|
|
|
int main(int argc, char **argv, char **envp)
|
2003-02-18 23:55:36 +01:00
|
|
|
{
|
2003-02-19 00:00:51 +01:00
|
|
|
struct target_pt_regs regs1, *regs = ®s1;
|
2003-02-18 23:55:36 +01:00
|
|
|
struct image_info info1, *info = &info1;
|
2009-04-07 08:57:11 +02:00
|
|
|
struct linux_binprm bprm;
|
linux-user: fix memory leaks with NPTL emulation
Running programs that create large numbers of threads, such as this
snippet from libstdc++'s pthread7-rope.cc:
const int max_thread_count = 4;
const int max_loop_count = 10000;
...
for (int j = 0; j < max_loop_count; j++)
{
...
for (int i = 0; i < max_thread_count; i++)
pthread_create (&tid[i], NULL, thread_main, 0);
for (int i = 0; i < max_thread_count; i++)
pthread_join (tid[i], NULL);
}
in user-mode emulation will quickly run out of memory. This is caused
by a failure to free memory in do_syscall prior to thread exit:
/* TODO: Free CPU state. */
pthread_exit(NULL);
The first step in fixing this is to make all TaskStates used by QEMU
dynamically allocated. The TaskState used by the initial thread was
not, as it was allocated on main's stack. So fix that, free the
cpu_env, free the TaskState, and we're home free, right?
Not exactly. When we create a thread, we do:
ts = qemu_mallocz(sizeof(TaskState) + NEW_STACK_SIZE);
...
new_stack = ts->stack;
...
ret = pthread_attr_setstack(&attr, new_stack, NEW_STACK_SIZE);
If we blindly free the TaskState, then, we yank the current (host)
thread's stack out from underneath it while it still has things to do,
like calling pthread_exit. That causes problems, as you might expect.
The solution adopted here is to let the C library allocate the thread's
stack (so the C library can properly clean it up at pthread_exit) and
provide a hint that we want NEW_STACK_SIZE bytes of stack.
With those two changes, we're done, right? Well, almost. You see,
we're creating all these host threads and their parent threads never
bother to check that their children are finished. There's no good place
for the parent threads to do so. Therefore, we need to create the
threads in a detached state so the parent thread doesn't have to call
pthread_join on the child to release the child's resources; the child
does so automatically.
With those three major changes, we can comfortably run programs like the
above without exhausting memory. We do need to delete 'stack' from the
TaskState structure.
Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Riku Voipio <riku.voipio@nokia.com>
2010-10-29 16:48:57 +02:00
|
|
|
TaskState *ts;
|
2012-03-14 01:38:32 +01:00
|
|
|
CPUArchState *env;
|
2013-06-27 19:49:31 +02:00
|
|
|
CPUState *cpu;
|
2003-03-03 16:02:29 +01:00
|
|
|
int optind;
|
2009-01-30 20:59:17 +01:00
|
|
|
char **target_environ, **wrk;
|
2009-04-15 18:11:52 +02:00
|
|
|
char **target_argv;
|
|
|
|
int target_argc;
|
|
|
|
int i;
|
2009-06-19 09:39:36 +02:00
|
|
|
int ret;
|
2013-08-30 01:46:44 +02:00
|
|
|
int execfd;
|
2007-06-17 18:38:39 +02:00
|
|
|
|
2016-10-04 15:35:52 +02:00
|
|
|
module_call_init(MODULE_INIT_TRACE);
|
2016-08-28 03:45:14 +02:00
|
|
|
qemu_init_cpu_list();
|
2012-03-04 21:32:36 +01:00
|
|
|
module_call_init(MODULE_INIT_QOM);
|
|
|
|
|
2017-03-20 18:38:28 +01:00
|
|
|
envlist = envlist_create();
|
2009-01-30 20:59:17 +01:00
|
|
|
|
|
|
|
/* add current environment into the list */
|
|
|
|
for (wrk = environ; *wrk != NULL; wrk++) {
|
|
|
|
(void) envlist_setenv(envlist, *wrk);
|
|
|
|
}
|
|
|
|
|
2010-03-19 22:21:13 +01:00
|
|
|
/* Read the stack limit from the kernel. If it's "unlimited",
|
|
|
|
then we can do little else besides use the default. */
|
|
|
|
{
|
|
|
|
struct rlimit lim;
|
|
|
|
if (getrlimit(RLIMIT_STACK, &lim) == 0
|
2010-04-11 21:07:35 +02:00
|
|
|
&& lim.rlim_cur != RLIM_INFINITY
|
|
|
|
&& lim.rlim_cur == (target_long)lim.rlim_cur) {
|
2010-03-19 22:21:13 +01:00
|
|
|
guest_stack_size = lim.rlim_cur;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2007-03-19 09:08:28 +01:00
|
|
|
cpu_model = NULL;
|
2010-02-20 18:14:59 +01:00
|
|
|
|
2014-10-14 17:18:17 +02:00
|
|
|
srand(time(NULL));
|
|
|
|
|
2016-07-15 19:08:38 +02:00
|
|
|
qemu_add_opts(&qemu_trace_opts);
|
|
|
|
|
2011-08-06 08:54:12 +02:00
|
|
|
optind = parse_args(argc, argv);
|
2003-03-03 16:02:29 +01:00
|
|
|
|
2016-07-15 19:08:38 +02:00
|
|
|
if (!trace_init_backends()) {
|
|
|
|
exit(1);
|
|
|
|
}
|
|
|
|
trace_init_file(trace_file);
|
|
|
|
|
2003-02-18 23:55:36 +01:00
|
|
|
/* Zero out regs */
|
2003-02-19 00:00:51 +01:00
|
|
|
memset(regs, 0, sizeof(struct target_pt_regs));
|
2003-02-18 23:55:36 +01:00
|
|
|
|
|
|
|
/* Zero out image_info */
|
|
|
|
memset(info, 0, sizeof(struct image_info));
|
|
|
|
|
2009-04-07 08:57:11 +02:00
|
|
|
memset(&bprm, 0, sizeof (bprm));
|
|
|
|
|
2003-04-11 02:13:41 +02:00
|
|
|
/* Scan interp_prefix dir for replacement files. */
|
|
|
|
init_paths(interp_prefix);
|
|
|
|
|
2013-09-03 21:12:20 +02:00
|
|
|
init_qemu_uname_release();
|
|
|
|
|
2018-02-20 18:33:05 +01:00
|
|
|
execfd = qemu_getauxval(AT_EXECFD);
|
|
|
|
if (execfd == 0) {
|
|
|
|
execfd = open(filename, O_RDONLY);
|
|
|
|
if (execfd < 0) {
|
|
|
|
printf("Error while loading %s: %s\n", filename, strerror(errno));
|
|
|
|
_exit(EXIT_FAILURE);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2007-11-08 14:56:19 +01:00
|
|
|
if (cpu_model == NULL) {
|
2018-02-20 18:33:05 +01:00
|
|
|
cpu_model = cpu_get_model(get_elf_eflags(execfd));
|
2007-11-10 16:15:54 +01:00
|
|
|
}
|
2018-02-07 11:40:26 +01:00
|
|
|
cpu_type = parse_cpu_model(cpu_model);
|
|
|
|
|
2011-08-02 16:10:21 +02:00
|
|
|
tcg_exec_init(0);
|
2004-07-05 23:25:26 +02:00
|
|
|
/* NOTE: we need to init the CPU at this stage to get
|
|
|
|
qemu_host_page_size */
|
2018-02-07 11:40:26 +01:00
|
|
|
|
|
|
|
cpu = cpu_create(cpu_type);
|
2015-02-26 21:37:49 +01:00
|
|
|
env = cpu->env_ptr;
|
2013-07-26 16:42:25 +02:00
|
|
|
cpu_reset(cpu);
|
2009-11-07 11:37:06 +01:00
|
|
|
|
2013-06-27 19:49:31 +02:00
|
|
|
thread_cpu = cpu;
|
2007-09-17 10:09:54 +02:00
|
|
|
|
2007-11-11 15:46:06 +01:00
|
|
|
if (getenv("QEMU_STRACE")) {
|
|
|
|
do_strace = 1;
|
2007-11-01 01:07:38 +01:00
|
|
|
}
|
|
|
|
|
2014-10-14 17:18:17 +02:00
|
|
|
if (getenv("QEMU_RAND_SEED")) {
|
|
|
|
handle_arg_randseed(getenv("QEMU_RAND_SEED"));
|
|
|
|
}
|
|
|
|
|
2009-01-30 20:59:17 +01:00
|
|
|
target_environ = envlist_to_environ(envlist, NULL);
|
|
|
|
envlist_free(envlist);
|
2007-06-17 18:38:39 +02:00
|
|
|
|
2009-07-17 13:48:08 +02:00
|
|
|
/*
|
|
|
|
* Now that page sizes are configured in cpu_init() we can do
|
|
|
|
* proper page alignment for guest_base.
|
|
|
|
*/
|
|
|
|
guest_base = HOST_PAGE_ALIGN(guest_base);
|
2010-05-29 03:27:35 +02:00
|
|
|
|
2012-07-26 18:50:02 +02:00
|
|
|
if (reserved_va || have_guest_base) {
|
|
|
|
guest_base = init_guest_space(guest_base, reserved_va, 0,
|
|
|
|
have_guest_base);
|
|
|
|
if (guest_base == (unsigned long)-1) {
|
2012-08-20 12:36:32 +02:00
|
|
|
fprintf(stderr, "Unable to reserve 0x%lx bytes of virtual address "
|
|
|
|
"space for use as guest address space (check your virtual "
|
|
|
|
"memory ulimit setting or reserve less using -R option)\n",
|
|
|
|
reserved_va);
|
2015-09-28 15:12:16 +02:00
|
|
|
exit(EXIT_FAILURE);
|
2010-05-29 03:27:35 +02:00
|
|
|
}
|
2011-08-31 18:24:34 +02:00
|
|
|
|
2012-07-26 18:50:02 +02:00
|
|
|
if (reserved_va) {
|
|
|
|
mmap_next_start = reserved_va;
|
2011-08-31 18:24:34 +02:00
|
|
|
}
|
|
|
|
}
|
2009-07-17 13:48:08 +02:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Read in mmap_min_addr kernel parameter. This value is used
|
|
|
|
* When loading the ELF image to determine whether guest_base
|
2010-03-11 00:39:07 +01:00
|
|
|
* is needed. It is also used in mmap_find_vma.
|
2009-07-17 13:48:08 +02:00
|
|
|
*/
|
2010-03-11 00:39:07 +01:00
|
|
|
{
|
2009-07-17 13:48:08 +02:00
|
|
|
FILE *fp;
|
|
|
|
|
|
|
|
if ((fp = fopen("/proc/sys/vm/mmap_min_addr", "r")) != NULL) {
|
|
|
|
unsigned long tmp;
|
|
|
|
if (fscanf(fp, "%lu", &tmp) == 1) {
|
|
|
|
mmap_min_addr = tmp;
|
2015-11-13 12:32:19 +01:00
|
|
|
qemu_log_mask(CPU_LOG_PAGE, "host mmap_min_addr=0x%lx\n", mmap_min_addr);
|
2009-07-17 13:48:08 +02:00
|
|
|
}
|
|
|
|
fclose(fp);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2009-04-15 18:11:52 +02:00
|
|
|
/*
|
|
|
|
* Prepare copy of argv vector for target.
|
|
|
|
*/
|
|
|
|
target_argc = argc - optind;
|
|
|
|
target_argv = calloc(target_argc + 1, sizeof (char *));
|
|
|
|
if (target_argv == NULL) {
|
|
|
|
(void) fprintf(stderr, "Unable to allocate memory for target_argv\n");
|
2015-09-28 15:12:16 +02:00
|
|
|
exit(EXIT_FAILURE);
|
2009-04-15 18:11:52 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* If argv0 is specified (using '-0' switch) we replace
|
|
|
|
* argv[0] pointer with the given one.
|
|
|
|
*/
|
|
|
|
i = 0;
|
|
|
|
if (argv0 != NULL) {
|
|
|
|
target_argv[i++] = strdup(argv0);
|
|
|
|
}
|
|
|
|
for (; i < target_argc; i++) {
|
|
|
|
target_argv[i] = strdup(argv[optind + i]);
|
|
|
|
}
|
|
|
|
target_argv[target_argc] = NULL;
|
|
|
|
|
2015-09-14 13:53:03 +02:00
|
|
|
ts = g_new0(TaskState, 1);
|
2009-04-07 08:57:11 +02:00
|
|
|
init_task_state(ts);
|
|
|
|
/* build Task State */
|
|
|
|
ts->info = info;
|
|
|
|
ts->bprm = &bprm;
|
2013-08-26 18:14:44 +02:00
|
|
|
cpu->opaque = ts;
|
2009-04-07 08:57:11 +02:00
|
|
|
task_settid(ts);
|
|
|
|
|
2013-08-30 01:46:44 +02:00
|
|
|
ret = loader_exec(execfd, filename, target_argv, target_environ, regs,
|
2009-06-19 09:39:36 +02:00
|
|
|
info, &bprm);
|
|
|
|
if (ret != 0) {
|
2012-08-24 08:55:53 +02:00
|
|
|
printf("Error while loading %s: %s\n", filename, strerror(-ret));
|
2015-09-28 15:12:16 +02:00
|
|
|
_exit(EXIT_FAILURE);
|
2007-06-17 18:38:39 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
for (wrk = target_environ; *wrk; wrk++) {
|
2017-03-20 18:38:28 +01:00
|
|
|
g_free(*wrk);
|
2003-02-18 23:55:36 +01:00
|
|
|
}
|
2007-09-17 10:09:54 +02:00
|
|
|
|
2017-03-20 18:38:28 +01:00
|
|
|
g_free(target_environ);
|
2007-06-17 18:38:39 +02:00
|
|
|
|
2015-11-13 12:32:19 +01:00
|
|
|
if (qemu_loglevel_mask(CPU_LOG_PAGE)) {
|
2009-07-17 13:48:08 +02:00
|
|
|
qemu_log("guest_base 0x%lx\n", guest_base);
|
2009-01-20 17:57:34 +01:00
|
|
|
log_page_dump();
|
|
|
|
|
|
|
|
qemu_log("start_brk 0x" TARGET_ABI_FMT_lx "\n", info->start_brk);
|
|
|
|
qemu_log("end_code 0x" TARGET_ABI_FMT_lx "\n", info->end_code);
|
2016-12-15 18:38:11 +01:00
|
|
|
qemu_log("start_code 0x" TARGET_ABI_FMT_lx "\n", info->start_code);
|
|
|
|
qemu_log("start_data 0x" TARGET_ABI_FMT_lx "\n", info->start_data);
|
2009-01-20 17:57:34 +01:00
|
|
|
qemu_log("end_data 0x" TARGET_ABI_FMT_lx "\n", info->end_data);
|
2016-12-15 18:38:11 +01:00
|
|
|
qemu_log("start_stack 0x" TARGET_ABI_FMT_lx "\n", info->start_stack);
|
2009-01-20 17:57:34 +01:00
|
|
|
qemu_log("brk 0x" TARGET_ABI_FMT_lx "\n", info->brk);
|
|
|
|
qemu_log("entry 0x" TARGET_ABI_FMT_lx "\n", info->entry);
|
2016-12-15 18:38:11 +01:00
|
|
|
qemu_log("argv_start 0x" TARGET_ABI_FMT_lx "\n", info->arg_start);
|
|
|
|
qemu_log("env_start 0x" TARGET_ABI_FMT_lx "\n",
|
|
|
|
info->arg_end + (abi_ulong)sizeof(abi_ulong));
|
|
|
|
qemu_log("auxv_start 0x" TARGET_ABI_FMT_lx "\n", info->saved_auxv);
|
2009-01-20 17:57:34 +01:00
|
|
|
}
|
2003-02-18 23:55:36 +01:00
|
|
|
|
2006-03-25 20:31:22 +01:00
|
|
|
target_set_brk(info->brk);
|
2003-02-18 23:55:36 +01:00
|
|
|
syscall_init();
|
2003-03-23 02:06:05 +01:00
|
|
|
signal_init();
|
2003-02-18 23:55:36 +01:00
|
|
|
|
2010-05-06 17:50:41 +02:00
|
|
|
/* Now that we've loaded the binary, GUEST_BASE is fixed. Delay
|
|
|
|
generating the prologue until now so that the prologue can take
|
|
|
|
the real value of GUEST_BASE into account. */
|
2017-07-12 23:15:52 +02:00
|
|
|
tcg_prologue_init(tcg_ctx);
|
tcg: introduce regions to split code_gen_buffer
This is groundwork for supporting multiple TCG contexts.
The naive solution here is to split code_gen_buffer statically
among the TCG threads; this however results in poor utilization
if translation needs are different across TCG threads.
What we do here is to add an extra layer of indirection, assigning
regions that act just like pages do in virtual memory allocation.
(BTW if you are wondering about the chosen naming, I did not want
to use blocks or pages because those are already heavily used in QEMU).
We use a global lock to serialize allocations as well as statistics
reporting (we now export the size of the used code_gen_buffer with
tcg_code_size()). Note that for the allocator we could just use
a counter and atomic_inc; however, that would complicate the gathering
of tcg_code_size()-like stats. So given that the region operations are
not a fast path, a lock seems the most reasonable choice.
The effectiveness of this approach is clear after seeing some numbers.
I used the bootup+shutdown of debian-arm with '-tb-size 80' as a benchmark.
Note that I'm evaluating this after enabling per-thread TCG (which
is done by a subsequent commit).
* -smp 1, 1 region (entire buffer):
qemu: flush code_size=83885014 nb_tbs=154739 avg_tb_size=357
qemu: flush code_size=83884902 nb_tbs=153136 avg_tb_size=363
qemu: flush code_size=83885014 nb_tbs=152777 avg_tb_size=364
qemu: flush code_size=83884950 nb_tbs=150057 avg_tb_size=373
qemu: flush code_size=83884998 nb_tbs=150234 avg_tb_size=373
qemu: flush code_size=83885014 nb_tbs=154009 avg_tb_size=360
qemu: flush code_size=83885014 nb_tbs=151007 avg_tb_size=370
qemu: flush code_size=83885014 nb_tbs=151816 avg_tb_size=367
That is, 8 flushes.
* -smp 8, 32 regions (80/32 MB per region) [i.e. this patch]:
qemu: flush code_size=76328008 nb_tbs=141040 avg_tb_size=356
qemu: flush code_size=75366534 nb_tbs=138000 avg_tb_size=361
qemu: flush code_size=76864546 nb_tbs=140653 avg_tb_size=361
qemu: flush code_size=76309084 nb_tbs=135945 avg_tb_size=375
qemu: flush code_size=74581856 nb_tbs=132909 avg_tb_size=375
qemu: flush code_size=73927256 nb_tbs=135616 avg_tb_size=360
qemu: flush code_size=78629426 nb_tbs=142896 avg_tb_size=365
qemu: flush code_size=76667052 nb_tbs=138508 avg_tb_size=368
Again, 8 flushes. Note how buffer utilization is not 100%, but it
is close. Smaller region sizes would yield higher utilization,
but we want region allocation to be rare (it acquires a lock), so
we do not want to go too small.
* -smp 8, static partitioning of 8 regions (10 MB per region):
qemu: flush code_size=21936504 nb_tbs=40570 avg_tb_size=354
qemu: flush code_size=11472174 nb_tbs=20633 avg_tb_size=370
qemu: flush code_size=11603976 nb_tbs=21059 avg_tb_size=365
qemu: flush code_size=23254872 nb_tbs=41243 avg_tb_size=377
qemu: flush code_size=28289496 nb_tbs=52057 avg_tb_size=358
qemu: flush code_size=43605160 nb_tbs=78896 avg_tb_size=367
qemu: flush code_size=45166552 nb_tbs=82158 avg_tb_size=364
qemu: flush code_size=63289640 nb_tbs=116494 avg_tb_size=358
qemu: flush code_size=51389960 nb_tbs=93937 avg_tb_size=362
qemu: flush code_size=59665928 nb_tbs=107063 avg_tb_size=372
qemu: flush code_size=38380824 nb_tbs=68597 avg_tb_size=374
qemu: flush code_size=44884568 nb_tbs=79901 avg_tb_size=376
qemu: flush code_size=50782632 nb_tbs=90681 avg_tb_size=374
qemu: flush code_size=39848888 nb_tbs=71433 avg_tb_size=372
qemu: flush code_size=64708840 nb_tbs=119052 avg_tb_size=359
qemu: flush code_size=49830008 nb_tbs=90992 avg_tb_size=362
qemu: flush code_size=68372408 nb_tbs=123442 avg_tb_size=368
qemu: flush code_size=33555560 nb_tbs=59514 avg_tb_size=378
qemu: flush code_size=44748344 nb_tbs=80974 avg_tb_size=367
qemu: flush code_size=37104248 nb_tbs=67609 avg_tb_size=364
That is, 20 flushes. Note how a static partitioning approach uses
the code buffer poorly, leading to many unnecessary flushes.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Emilio G. Cota <cota@braap.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2017-07-08 01:24:20 +02:00
|
|
|
tcg_region_init();
|
2010-05-06 17:50:41 +02:00
|
|
|
|
2018-04-11 20:56:33 +02:00
|
|
|
target_cpu_copy_regs(env, regs);
|
|
|
|
|
2018-04-11 20:56:38 +02:00
|
|
|
#if defined(TARGET_M68K)
|
2006-10-22 02:18:54 +02:00
|
|
|
{
|
|
|
|
env->pc = regs->pc;
|
|
|
|
env->dregs[0] = regs->d0;
|
|
|
|
env->dregs[1] = regs->d1;
|
|
|
|
env->dregs[2] = regs->d2;
|
|
|
|
env->dregs[3] = regs->d3;
|
|
|
|
env->dregs[4] = regs->d4;
|
|
|
|
env->dregs[5] = regs->d5;
|
|
|
|
env->dregs[6] = regs->d6;
|
|
|
|
env->dregs[7] = regs->d7;
|
|
|
|
env->aregs[0] = regs->a0;
|
|
|
|
env->aregs[1] = regs->a1;
|
|
|
|
env->aregs[2] = regs->a2;
|
|
|
|
env->aregs[3] = regs->a3;
|
|
|
|
env->aregs[4] = regs->a4;
|
|
|
|
env->aregs[5] = regs->a5;
|
|
|
|
env->aregs[6] = regs->a6;
|
|
|
|
env->aregs[7] = regs->usp;
|
|
|
|
env->sr = regs->sr;
|
|
|
|
ts->sim_syscalls = 1;
|
|
|
|
}
|
2009-05-20 21:31:33 +02:00
|
|
|
#elif defined(TARGET_MICROBLAZE)
|
|
|
|
{
|
|
|
|
env->regs[0] = regs->r0;
|
|
|
|
env->regs[1] = regs->r1;
|
|
|
|
env->regs[2] = regs->r2;
|
|
|
|
env->regs[3] = regs->r3;
|
|
|
|
env->regs[4] = regs->r4;
|
|
|
|
env->regs[5] = regs->r5;
|
|
|
|
env->regs[6] = regs->r6;
|
|
|
|
env->regs[7] = regs->r7;
|
|
|
|
env->regs[8] = regs->r8;
|
|
|
|
env->regs[9] = regs->r9;
|
|
|
|
env->regs[10] = regs->r10;
|
|
|
|
env->regs[11] = regs->r11;
|
|
|
|
env->regs[12] = regs->r12;
|
|
|
|
env->regs[13] = regs->r13;
|
|
|
|
env->regs[14] = regs->r14;
|
|
|
|
env->regs[15] = regs->r15;
|
|
|
|
env->regs[16] = regs->r16;
|
|
|
|
env->regs[17] = regs->r17;
|
|
|
|
env->regs[18] = regs->r18;
|
|
|
|
env->regs[19] = regs->r19;
|
|
|
|
env->regs[20] = regs->r20;
|
|
|
|
env->regs[21] = regs->r21;
|
|
|
|
env->regs[22] = regs->r22;
|
|
|
|
env->regs[23] = regs->r23;
|
|
|
|
env->regs[24] = regs->r24;
|
|
|
|
env->regs[25] = regs->r25;
|
|
|
|
env->regs[26] = regs->r26;
|
|
|
|
env->regs[27] = regs->r27;
|
|
|
|
env->regs[28] = regs->r28;
|
|
|
|
env->regs[29] = regs->r29;
|
|
|
|
env->regs[30] = regs->r30;
|
|
|
|
env->regs[31] = regs->r31;
|
|
|
|
env->sregs[SR_PC] = regs->pc;
|
|
|
|
}
|
2018-03-02 13:31:11 +01:00
|
|
|
#elif defined(TARGET_RISCV)
|
|
|
|
{
|
|
|
|
env->pc = regs->sepc;
|
|
|
|
env->gpr[xSP] = regs->sp;
|
|
|
|
}
|
2007-04-05 09:13:51 +02:00
|
|
|
#elif defined(TARGET_ALPHA)
|
|
|
|
{
|
|
|
|
int i;
|
|
|
|
|
|
|
|
for(i = 0; i < 28; i++) {
|
2007-10-14 18:27:31 +02:00
|
|
|
env->ir[i] = ((abi_ulong *)regs)[i];
|
2007-04-05 09:13:51 +02:00
|
|
|
}
|
2010-01-04 20:19:14 +01:00
|
|
|
env->ir[IR_SP] = regs->usp;
|
2007-04-05 09:13:51 +02:00
|
|
|
env->pc = regs->pc;
|
|
|
|
}
|
2007-10-08 15:36:46 +02:00
|
|
|
#elif defined(TARGET_CRIS)
|
|
|
|
{
|
|
|
|
env->regs[0] = regs->r0;
|
|
|
|
env->regs[1] = regs->r1;
|
|
|
|
env->regs[2] = regs->r2;
|
|
|
|
env->regs[3] = regs->r3;
|
|
|
|
env->regs[4] = regs->r4;
|
|
|
|
env->regs[5] = regs->r5;
|
|
|
|
env->regs[6] = regs->r6;
|
|
|
|
env->regs[7] = regs->r7;
|
|
|
|
env->regs[8] = regs->r8;
|
|
|
|
env->regs[9] = regs->r9;
|
|
|
|
env->regs[10] = regs->r10;
|
|
|
|
env->regs[11] = regs->r11;
|
|
|
|
env->regs[12] = regs->r12;
|
|
|
|
env->regs[13] = regs->r13;
|
|
|
|
env->regs[14] = info->start_stack;
|
|
|
|
env->regs[15] = regs->acr;
|
|
|
|
env->pc = regs->erp;
|
|
|
|
}
|
2009-07-24 16:57:31 +02:00
|
|
|
#elif defined(TARGET_S390X)
|
|
|
|
{
|
|
|
|
int i;
|
|
|
|
for (i = 0; i < 16; i++) {
|
|
|
|
env->regs[i] = regs->gprs[i];
|
|
|
|
}
|
|
|
|
env->psw.mask = regs->psw.mask;
|
|
|
|
env->psw.addr = regs->psw.addr;
|
|
|
|
}
|
2015-08-20 23:36:37 +02:00
|
|
|
#elif defined(TARGET_TILEGX)
|
|
|
|
{
|
|
|
|
int i;
|
|
|
|
for (i = 0; i < TILEGX_R_COUNT; i++) {
|
|
|
|
env->regs[i] = regs->regs[i];
|
|
|
|
}
|
|
|
|
for (i = 0; i < TILEGX_SPR_COUNT; i++) {
|
|
|
|
env->spregs[i] = 0;
|
|
|
|
}
|
|
|
|
env->pc = regs->pc;
|
|
|
|
}
|
2016-12-15 19:01:00 +01:00
|
|
|
#elif defined(TARGET_HPPA)
|
|
|
|
{
|
|
|
|
int i;
|
|
|
|
for (i = 1; i < 32; i++) {
|
|
|
|
env->gr[i] = regs->gr[i];
|
|
|
|
}
|
|
|
|
env->iaoq_f = regs->iaoq[0];
|
|
|
|
env->iaoq_b = regs->iaoq[1];
|
|
|
|
}
|
2017-01-25 19:54:11 +01:00
|
|
|
#elif defined(TARGET_XTENSA)
|
|
|
|
{
|
|
|
|
int i;
|
|
|
|
for (i = 0; i < 16; ++i) {
|
|
|
|
env->regs[i] = regs->areg[i];
|
|
|
|
}
|
|
|
|
env->sregs[WINDOW_START] = regs->windowstart;
|
|
|
|
env->pc = regs->pc;
|
|
|
|
}
|
2003-06-15 22:05:50 +02:00
|
|
|
#endif
|
2003-02-18 23:55:36 +01:00
|
|
|
|
2018-04-11 20:56:36 +02:00
|
|
|
#if defined(TARGET_M68K)
|
2007-05-26 17:09:38 +02:00
|
|
|
ts->stack_base = info->start_stack;
|
|
|
|
ts->heap_base = info->brk;
|
|
|
|
/* This will be filled in on the first SYS_HEAPINFO call. */
|
|
|
|
ts->heap_limit = 0;
|
|
|
|
#endif
|
|
|
|
|
2005-10-30 22:01:05 +01:00
|
|
|
if (gdbstub_port) {
|
2011-09-06 15:15:50 +02:00
|
|
|
if (gdbserver_start(gdbstub_port) < 0) {
|
|
|
|
fprintf(stderr, "qemu: could not open gdbserver on port %d\n",
|
|
|
|
gdbstub_port);
|
2015-09-28 15:12:16 +02:00
|
|
|
exit(EXIT_FAILURE);
|
2011-09-06 15:15:50 +02:00
|
|
|
}
|
2013-06-27 19:49:31 +02:00
|
|
|
gdb_handlesig(cpu, 0);
|
2005-04-17 21:16:13 +02:00
|
|
|
}
|
2003-03-22 18:31:38 +01:00
|
|
|
cpu_loop(env);
|
|
|
|
/* never exits */
|
2003-02-18 23:55:36 +01:00
|
|
|
return 0;
|
|
|
|
}
|