2010-05-14 09:29:02 +02:00
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|
|
/*
|
|
|
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* ACPI implementation
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*
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* Copyright (c) 2006 Fabrice Bellard
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License version 2 as published by the Free Software Foundation.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see <http://www.gnu.org/licenses/>
|
2012-01-13 17:44:23 +01:00
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*
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* Contributions after 2012-01-13 are licensed under the terms of the
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* GNU GPL, version 2 or (at your option) any later version.
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2010-05-14 09:29:02 +02:00
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*/
|
2019-08-12 07:23:38 +02:00
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|
2016-01-26 19:17:03 +01:00
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|
#include "qemu/osdep.h"
|
2013-02-05 17:06:20 +01:00
|
|
|
#include "hw/i386/pc.h"
|
2019-08-12 07:23:42 +02:00
|
|
|
#include "hw/irq.h"
|
2013-02-05 17:06:20 +01:00
|
|
|
#include "hw/isa/apm.h"
|
|
|
|
#include "hw/i2c/pm_smbus.h"
|
2013-02-04 15:40:22 +01:00
|
|
|
#include "hw/pci/pci.h"
|
2013-02-05 17:06:20 +01:00
|
|
|
#include "hw/acpi/acpi.h"
|
2019-08-12 07:23:38 +02:00
|
|
|
#include "sysemu/reset.h"
|
2012-12-17 18:20:04 +01:00
|
|
|
#include "sysemu/sysemu.h"
|
include/qemu/osdep.h: Don't include qapi/error.h
Commit 57cb38b included qapi/error.h into qemu/osdep.h to get the
Error typedef. Since then, we've moved to include qemu/osdep.h
everywhere. Its file comment explains: "To avoid getting into
possible circular include dependencies, this file should not include
any other QEMU headers, with the exceptions of config-host.h,
compiler.h, os-posix.h and os-win32.h, all of which are doing a
similar job to this file and are under similar constraints."
qapi/error.h doesn't do a similar job, and it doesn't adhere to
similar constraints: it includes qapi-types.h. That's in excess of
100KiB of crap most .c files don't actually need.
Add the typedef to qemu/typedefs.h, and include that instead of
qapi/error.h. Include qapi/error.h in .c files that need it and don't
get it now. Include qapi-types.h in qom/object.h for uint16List.
Update scripts/clean-includes accordingly. Update it further to match
reality: replace config.h by config-target.h, add sysemu/os-posix.h,
sysemu/os-win32.h. Update the list of includes in the qemu/osdep.h
comment quoted above similarly.
This reduces the number of objects depending on qapi/error.h from "all
of them" to less than a third. Unfortunately, the number depending on
qapi-types.h shrinks only a little. More work is needed for that one.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
[Fix compilation without the spice devel packages. - Paolo]
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2016-03-14 09:01:28 +01:00
|
|
|
#include "qapi/error.h"
|
2012-12-17 18:20:00 +01:00
|
|
|
#include "qemu/range.h"
|
2012-12-17 18:19:49 +01:00
|
|
|
#include "exec/address-spaces.h"
|
2013-07-24 17:56:11 +02:00
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|
|
#include "hw/acpi/piix4.h"
|
2013-10-14 17:01:20 +02:00
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|
#include "hw/acpi/pcihp.h"
|
2014-01-09 17:36:31 +01:00
|
|
|
#include "hw/acpi/cpu_hotplug.h"
|
2016-06-14 16:02:06 +02:00
|
|
|
#include "hw/acpi/cpu.h"
|
2014-02-05 16:36:49 +01:00
|
|
|
#include "hw/hotplug.h"
|
2014-06-02 15:25:20 +02:00
|
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|
#include "hw/mem/pc-dimm.h"
|
|
|
|
#include "hw/acpi/memory_hotplug.h"
|
2014-06-16 19:12:27 +02:00
|
|
|
#include "hw/acpi/acpi_dev_interface.h"
|
2014-11-14 12:11:44 +01:00
|
|
|
#include "hw/xen/xen.h"
|
2019-08-12 07:23:39 +02:00
|
|
|
#include "migration/qemu-file-types.h"
|
2019-08-12 07:23:45 +02:00
|
|
|
#include "migration/vmstate.h"
|
2015-12-04 11:10:07 +01:00
|
|
|
#include "qom/cpu.h"
|
2019-04-02 18:18:58 +02:00
|
|
|
#include "trace.h"
|
2010-05-14 09:29:22 +02:00
|
|
|
|
2010-05-14 09:29:20 +02:00
|
|
|
#define GPE_BASE 0xafe0
|
2011-03-25 11:54:41 +01:00
|
|
|
#define GPE_LEN 4
|
2012-11-23 16:03:19 +01:00
|
|
|
|
2010-05-14 09:29:20 +02:00
|
|
|
struct pci_status {
|
acpi_piix4: Fix PCI hotplug race
As Michael Tsirkin demonstrated, current PCI hotplug is vulnerable
to a few races. The first is a race with other hotplug operations
because we clear the up & down registers at each event. If a new
event comes before the last is processed, up/down is cleared and
the event is lost.
To fix this for the down register, we create a life cycle for
the event request that starts with the hot unplug request in
piix4_device_hotplug() and ends when the device is ejected.
This allows us to mask and clear individual bits, preserving them
against races. For the up register, we have no clear end point
for when the event is finished. We could modify the BIOS to
acknowledge the bit and clear it, but this creates BIOS compatibiliy
issues without offering a complete solution. Instead we note that
gratuitous ACPI device checks are not harmful, which allows us to
issue a device check for every slot. We know which slots are present
and we know which slots are hotpluggable, so we can easily reduce
this to a more manageable set for the guest.
The other race Michael noted was that an unplug request followed
by reset may also lose the eject notification, which may also
result in the eject request being lost which a subsequent add
or remove. Once we're in reset, the device is unused and we can
flush the queue of device removals ourselves. Previously if a
device_del was issued to a guest without ACPI PCI hotplug support,
it was necessary to shutdown the guest to recover the device.
With this, a guest reboot is sufficient.
Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2012-04-05 19:07:15 +02:00
|
|
|
uint32_t up; /* deprecated, maintained for migration compatibility */
|
2010-05-14 09:29:20 +02:00
|
|
|
uint32_t down;
|
|
|
|
};
|
|
|
|
|
2010-05-14 09:29:02 +02:00
|
|
|
typedef struct PIIX4PMState {
|
2013-06-30 14:40:37 +02:00
|
|
|
/*< private >*/
|
|
|
|
PCIDevice parent_obj;
|
|
|
|
/*< public >*/
|
2012-12-11 09:40:45 +01:00
|
|
|
|
2012-11-22 11:34:44 +01:00
|
|
|
MemoryRegion io;
|
2013-07-24 17:56:11 +02:00
|
|
|
uint32_t io_base;
|
|
|
|
|
2012-11-23 15:35:13 +01:00
|
|
|
MemoryRegion io_gpe;
|
2012-02-23 13:45:16 +01:00
|
|
|
ACPIREGS ar;
|
2010-05-14 09:29:02 +02:00
|
|
|
|
|
|
|
APMState apm;
|
|
|
|
|
|
|
|
PMSMBus smb;
|
2010-05-14 09:29:18 +02:00
|
|
|
uint32_t smb_io_base;
|
2010-05-14 09:29:02 +02:00
|
|
|
|
|
|
|
qemu_irq irq;
|
|
|
|
qemu_irq smi_irq;
|
2015-06-18 18:30:17 +02:00
|
|
|
int smm_enabled;
|
2011-07-15 17:10:15 +02:00
|
|
|
Notifier machine_ready;
|
2012-09-05 23:06:22 +02:00
|
|
|
Notifier powerdown_notifier;
|
2010-05-14 09:29:20 +02:00
|
|
|
|
2013-10-14 17:01:20 +02:00
|
|
|
AcpiPciHpState acpi_pci_hotplug;
|
|
|
|
bool use_acpi_pci_hotplug;
|
|
|
|
|
2012-06-04 13:31:55 +02:00
|
|
|
uint8_t disable_s3;
|
|
|
|
uint8_t disable_s4;
|
|
|
|
uint8_t s4_val;
|
2013-04-25 16:05:25 +02:00
|
|
|
|
2016-04-11 17:25:54 +02:00
|
|
|
bool cpu_hotplug_legacy;
|
2014-01-09 17:36:31 +01:00
|
|
|
AcpiCpuHotplug gpe_cpu;
|
2016-06-14 16:02:06 +02:00
|
|
|
CPUHotplugState cpuhp_state;
|
2014-06-02 15:25:20 +02:00
|
|
|
|
|
|
|
MemHotplugState acpi_memory_hotplug;
|
2010-05-14 09:29:02 +02:00
|
|
|
} PIIX4PMState;
|
|
|
|
|
2013-06-24 08:57:14 +02:00
|
|
|
#define PIIX4_PM(obj) \
|
|
|
|
OBJECT_CHECK(PIIX4PMState, (obj), TYPE_PIIX4_PM)
|
|
|
|
|
2012-12-11 09:40:45 +01:00
|
|
|
static void piix4_acpi_system_hot_add_init(MemoryRegion *parent,
|
|
|
|
PCIBus *bus, PIIX4PMState *s);
|
2010-05-14 09:29:20 +02:00
|
|
|
|
2010-05-14 09:29:02 +02:00
|
|
|
#define ACPI_ENABLE 0xf1
|
|
|
|
#define ACPI_DISABLE 0xf0
|
|
|
|
|
2012-02-23 13:45:16 +01:00
|
|
|
static void pm_tmr_timer(ACPIREGS *ar)
|
2010-05-14 09:29:02 +02:00
|
|
|
{
|
2012-02-23 13:45:16 +01:00
|
|
|
PIIX4PMState *s = container_of(ar, PIIX4PMState, ar);
|
2013-12-13 17:22:07 +01:00
|
|
|
acpi_update_sci(&s->ar, s->irq);
|
2010-05-14 09:29:02 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
static void apm_ctrl_changed(uint32_t val, void *arg)
|
|
|
|
{
|
|
|
|
PIIX4PMState *s = arg;
|
2013-06-30 14:40:37 +02:00
|
|
|
PCIDevice *d = PCI_DEVICE(s);
|
2010-05-14 09:29:02 +02:00
|
|
|
|
|
|
|
/* ACPI specs 3.0, 4.7.2.5 */
|
2012-02-23 13:45:16 +01:00
|
|
|
acpi_pm1_cnt_update(&s->ar, val == ACPI_ENABLE, val == ACPI_DISABLE);
|
2015-06-18 18:28:41 +02:00
|
|
|
if (val == ACPI_ENABLE || val == ACPI_DISABLE) {
|
|
|
|
return;
|
|
|
|
}
|
2010-05-14 09:29:02 +02:00
|
|
|
|
2013-06-30 14:40:37 +02:00
|
|
|
if (d->config[0x5b] & (1 << 1)) {
|
2010-05-14 09:29:02 +02:00
|
|
|
if (s->smi_irq) {
|
|
|
|
qemu_irq_raise(s->smi_irq);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static void pm_io_space_update(PIIX4PMState *s)
|
|
|
|
{
|
2013-06-30 14:40:37 +02:00
|
|
|
PCIDevice *d = PCI_DEVICE(s);
|
2010-05-14 09:29:02 +02:00
|
|
|
|
2013-07-24 17:56:11 +02:00
|
|
|
s->io_base = le32_to_cpu(*(uint32_t *)(d->config + 0x40));
|
|
|
|
s->io_base &= 0xffc0;
|
2010-05-14 09:29:02 +02:00
|
|
|
|
2012-11-22 11:34:44 +01:00
|
|
|
memory_region_transaction_begin();
|
2013-06-30 14:40:37 +02:00
|
|
|
memory_region_set_enabled(&s->io, d->config[0x80] & 1);
|
2013-07-24 17:56:11 +02:00
|
|
|
memory_region_set_address(&s->io, s->io_base);
|
2012-11-22 11:34:44 +01:00
|
|
|
memory_region_transaction_commit();
|
2010-05-14 09:29:02 +02:00
|
|
|
}
|
|
|
|
|
2012-11-23 14:58:04 +01:00
|
|
|
static void smbus_io_space_update(PIIX4PMState *s)
|
|
|
|
{
|
2013-06-30 14:40:37 +02:00
|
|
|
PCIDevice *d = PCI_DEVICE(s);
|
|
|
|
|
|
|
|
s->smb_io_base = le32_to_cpu(*(uint32_t *)(d->config + 0x90));
|
2012-11-23 14:58:04 +01:00
|
|
|
s->smb_io_base &= 0xffc0;
|
|
|
|
|
|
|
|
memory_region_transaction_begin();
|
2013-06-30 14:40:37 +02:00
|
|
|
memory_region_set_enabled(&s->smb.io, d->config[0xd2] & 1);
|
2012-11-23 14:58:04 +01:00
|
|
|
memory_region_set_address(&s->smb.io, s->smb_io_base);
|
|
|
|
memory_region_transaction_commit();
|
2010-05-14 09:29:02 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
static void pm_write_config(PCIDevice *d,
|
|
|
|
uint32_t address, uint32_t val, int len)
|
|
|
|
{
|
|
|
|
pci_default_write_config(d, address, val, len);
|
2012-11-23 14:58:04 +01:00
|
|
|
if (range_covers_byte(address, len, 0x80) ||
|
|
|
|
ranges_overlap(address, len, 0x40, 4)) {
|
2010-05-14 09:29:02 +02:00
|
|
|
pm_io_space_update((PIIX4PMState *)d);
|
2012-11-23 14:58:04 +01:00
|
|
|
}
|
|
|
|
if (range_covers_byte(address, len, 0xd2) ||
|
|
|
|
ranges_overlap(address, len, 0x90, 4)) {
|
|
|
|
smbus_io_space_update((PIIX4PMState *)d);
|
|
|
|
}
|
2010-05-14 09:29:02 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
static int vmstate_acpi_post_load(void *opaque, int version_id)
|
|
|
|
{
|
|
|
|
PIIX4PMState *s = opaque;
|
|
|
|
|
|
|
|
pm_io_space_update(s);
|
2018-11-26 19:28:44 +01:00
|
|
|
smbus_io_space_update(s);
|
2010-05-14 09:29:02 +02:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2011-03-25 11:54:41 +01:00
|
|
|
#define VMSTATE_GPE_ARRAY(_field, _state) \
|
|
|
|
{ \
|
|
|
|
.name = (stringify(_field)), \
|
|
|
|
.version_id = 0, \
|
|
|
|
.info = &vmstate_info_uint16, \
|
|
|
|
.size = sizeof(uint16_t), \
|
2012-10-31 00:14:19 +01:00
|
|
|
.flags = VMS_SINGLE | VMS_POINTER, \
|
2011-03-25 11:54:41 +01:00
|
|
|
.offset = vmstate_offset_pointer(_state, _field, uint8_t), \
|
|
|
|
}
|
|
|
|
|
2010-06-02 18:58:29 +02:00
|
|
|
static const VMStateDescription vmstate_gpe = {
|
|
|
|
.name = "gpe",
|
|
|
|
.version_id = 1,
|
|
|
|
.minimum_version_id = 1,
|
2014-04-16 15:32:32 +02:00
|
|
|
.fields = (VMStateField[]) {
|
2011-03-25 11:54:41 +01:00
|
|
|
VMSTATE_GPE_ARRAY(sts, ACPIGPE),
|
|
|
|
VMSTATE_GPE_ARRAY(en, ACPIGPE),
|
2010-06-02 18:58:29 +02:00
|
|
|
VMSTATE_END_OF_LIST()
|
|
|
|
}
|
|
|
|
};
|
|
|
|
|
|
|
|
static const VMStateDescription vmstate_pci_status = {
|
|
|
|
.name = "pci_status",
|
|
|
|
.version_id = 1,
|
|
|
|
.minimum_version_id = 1,
|
2014-04-16 15:32:32 +02:00
|
|
|
.fields = (VMStateField[]) {
|
2014-02-03 11:45:01 +01:00
|
|
|
VMSTATE_UINT32(up, struct AcpiPciHpPciStatus),
|
|
|
|
VMSTATE_UINT32(down, struct AcpiPciHpPciStatus),
|
2010-06-02 18:58:29 +02:00
|
|
|
VMSTATE_END_OF_LIST()
|
|
|
|
}
|
|
|
|
};
|
|
|
|
|
2012-10-31 00:14:19 +01:00
|
|
|
static int acpi_load_old(QEMUFile *f, void *opaque, int version_id)
|
|
|
|
{
|
|
|
|
PIIX4PMState *s = opaque;
|
|
|
|
int ret, i;
|
|
|
|
uint16_t temp;
|
|
|
|
|
2013-06-30 14:40:37 +02:00
|
|
|
ret = pci_device_load(PCI_DEVICE(s), f);
|
2012-10-31 00:14:19 +01:00
|
|
|
if (ret < 0) {
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
qemu_get_be16s(f, &s->ar.pm1.evt.sts);
|
|
|
|
qemu_get_be16s(f, &s->ar.pm1.evt.en);
|
|
|
|
qemu_get_be16s(f, &s->ar.pm1.cnt.cnt);
|
|
|
|
|
2013-02-04 17:07:51 +01:00
|
|
|
ret = vmstate_load_state(f, &vmstate_apm, &s->apm, 1);
|
2012-10-31 00:14:19 +01:00
|
|
|
if (ret) {
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2013-08-21 17:03:02 +02:00
|
|
|
timer_get(f, s->ar.tmr.timer);
|
2012-10-31 00:14:19 +01:00
|
|
|
qemu_get_sbe64s(f, &s->ar.tmr.overflow_time);
|
|
|
|
|
|
|
|
qemu_get_be16s(f, (uint16_t *)s->ar.gpe.sts);
|
|
|
|
for (i = 0; i < 3; i++) {
|
|
|
|
qemu_get_be16s(f, &temp);
|
|
|
|
}
|
|
|
|
|
|
|
|
qemu_get_be16s(f, (uint16_t *)s->ar.gpe.en);
|
|
|
|
for (i = 0; i < 3; i++) {
|
|
|
|
qemu_get_be16s(f, &temp);
|
|
|
|
}
|
|
|
|
|
2014-02-03 11:45:01 +01:00
|
|
|
ret = vmstate_load_state(f, &vmstate_pci_status,
|
|
|
|
&s->acpi_pci_hotplug.acpi_pcihp_pci_status[ACPI_PCIHP_BSEL_DEFAULT], 1);
|
2012-10-31 00:14:19 +01:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2013-10-14 17:01:20 +02:00
|
|
|
static bool vmstate_test_use_acpi_pci_hotplug(void *opaque, int version_id)
|
|
|
|
{
|
|
|
|
PIIX4PMState *s = opaque;
|
|
|
|
return s->use_acpi_pci_hotplug;
|
|
|
|
}
|
|
|
|
|
|
|
|
static bool vmstate_test_no_use_acpi_pci_hotplug(void *opaque, int version_id)
|
|
|
|
{
|
|
|
|
PIIX4PMState *s = opaque;
|
|
|
|
return !s->use_acpi_pci_hotplug;
|
|
|
|
}
|
|
|
|
|
2014-06-02 15:25:23 +02:00
|
|
|
static bool vmstate_test_use_memhp(void *opaque)
|
|
|
|
{
|
|
|
|
PIIX4PMState *s = opaque;
|
|
|
|
return s->acpi_memory_hotplug.is_enabled;
|
|
|
|
}
|
|
|
|
|
|
|
|
static const VMStateDescription vmstate_memhp_state = {
|
|
|
|
.name = "piix4_pm/memhp",
|
|
|
|
.version_id = 1,
|
|
|
|
.minimum_version_id = 1,
|
|
|
|
.minimum_version_id_old = 1,
|
2014-09-23 14:09:54 +02:00
|
|
|
.needed = vmstate_test_use_memhp,
|
2014-06-02 15:25:23 +02:00
|
|
|
.fields = (VMStateField[]) {
|
|
|
|
VMSTATE_MEMORY_HOTPLUG(acpi_memory_hotplug, PIIX4PMState),
|
|
|
|
VMSTATE_END_OF_LIST()
|
|
|
|
}
|
|
|
|
};
|
|
|
|
|
2016-06-15 11:25:23 +02:00
|
|
|
static bool vmstate_test_use_cpuhp(void *opaque)
|
|
|
|
{
|
|
|
|
PIIX4PMState *s = opaque;
|
|
|
|
return !s->cpu_hotplug_legacy;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int vmstate_cpuhp_pre_load(void *opaque)
|
|
|
|
{
|
|
|
|
Object *obj = OBJECT(opaque);
|
|
|
|
object_property_set_bool(obj, false, "cpu-hotplug-legacy", &error_abort);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static const VMStateDescription vmstate_cpuhp_state = {
|
|
|
|
.name = "piix4_pm/cpuhp",
|
|
|
|
.version_id = 1,
|
|
|
|
.minimum_version_id = 1,
|
|
|
|
.minimum_version_id_old = 1,
|
|
|
|
.needed = vmstate_test_use_cpuhp,
|
|
|
|
.pre_load = vmstate_cpuhp_pre_load,
|
|
|
|
.fields = (VMStateField[]) {
|
|
|
|
VMSTATE_CPU_HOTPLUG(cpuhp_state, PIIX4PMState),
|
|
|
|
VMSTATE_END_OF_LIST()
|
|
|
|
}
|
|
|
|
};
|
|
|
|
|
2016-12-22 19:28:23 +01:00
|
|
|
static bool piix4_vmstate_need_smbus(void *opaque, int version_id)
|
|
|
|
{
|
|
|
|
return pm_smbus_vmstate_needed();
|
|
|
|
}
|
|
|
|
|
2012-10-31 00:14:19 +01:00
|
|
|
/* qemu-kvm 1.2 uses version 3 but advertised as 2
|
|
|
|
* To support incoming qemu-kvm 1.2 migration, change version_id
|
|
|
|
* and minimum_version_id to 2 below (which breaks migration from
|
|
|
|
* qemu 1.2).
|
|
|
|
*
|
|
|
|
*/
|
2010-05-14 09:29:02 +02:00
|
|
|
static const VMStateDescription vmstate_acpi = {
|
|
|
|
.name = "piix4_pm",
|
2012-10-31 00:14:19 +01:00
|
|
|
.version_id = 3,
|
|
|
|
.minimum_version_id = 3,
|
2010-05-14 09:29:02 +02:00
|
|
|
.minimum_version_id_old = 1,
|
2012-10-31 00:14:19 +01:00
|
|
|
.load_state_old = acpi_load_old,
|
2010-05-14 09:29:02 +02:00
|
|
|
.post_load = vmstate_acpi_post_load,
|
2014-04-16 15:32:32 +02:00
|
|
|
.fields = (VMStateField[]) {
|
2013-06-30 14:40:37 +02:00
|
|
|
VMSTATE_PCI_DEVICE(parent_obj, PIIX4PMState),
|
2012-02-23 13:45:16 +01:00
|
|
|
VMSTATE_UINT16(ar.pm1.evt.sts, PIIX4PMState),
|
|
|
|
VMSTATE_UINT16(ar.pm1.evt.en, PIIX4PMState),
|
|
|
|
VMSTATE_UINT16(ar.pm1.cnt.cnt, PIIX4PMState),
|
2010-05-14 09:29:02 +02:00
|
|
|
VMSTATE_STRUCT(apm, PIIX4PMState, 0, vmstate_apm, APMState),
|
2016-12-22 19:28:23 +01:00
|
|
|
VMSTATE_STRUCT_TEST(smb, PIIX4PMState, piix4_vmstate_need_smbus, 3,
|
|
|
|
pmsmb_vmstate, PMSMBus),
|
2015-01-08 10:18:59 +01:00
|
|
|
VMSTATE_TIMER_PTR(ar.tmr.timer, PIIX4PMState),
|
2012-02-23 13:45:16 +01:00
|
|
|
VMSTATE_INT64(ar.tmr.overflow_time, PIIX4PMState),
|
|
|
|
VMSTATE_STRUCT(ar.gpe, PIIX4PMState, 2, vmstate_gpe, ACPIGPE),
|
2014-02-03 11:45:01 +01:00
|
|
|
VMSTATE_STRUCT_TEST(
|
|
|
|
acpi_pci_hotplug.acpi_pcihp_pci_status[ACPI_PCIHP_BSEL_DEFAULT],
|
|
|
|
PIIX4PMState,
|
|
|
|
vmstate_test_no_use_acpi_pci_hotplug,
|
|
|
|
2, vmstate_pci_status,
|
|
|
|
struct AcpiPciHpPciStatus),
|
2013-10-14 17:01:20 +02:00
|
|
|
VMSTATE_PCI_HOTPLUG(acpi_pci_hotplug, PIIX4PMState,
|
|
|
|
vmstate_test_use_acpi_pci_hotplug),
|
2010-05-14 09:29:02 +02:00
|
|
|
VMSTATE_END_OF_LIST()
|
2014-06-02 15:25:23 +02:00
|
|
|
},
|
2014-09-23 14:09:54 +02:00
|
|
|
.subsections = (const VMStateDescription*[]) {
|
|
|
|
&vmstate_memhp_state,
|
2016-06-15 11:25:23 +02:00
|
|
|
&vmstate_cpuhp_state,
|
2014-09-23 14:09:54 +02:00
|
|
|
NULL
|
2010-05-14 09:29:02 +02:00
|
|
|
}
|
|
|
|
};
|
|
|
|
|
|
|
|
static void piix4_reset(void *opaque)
|
|
|
|
{
|
|
|
|
PIIX4PMState *s = opaque;
|
2013-06-30 14:40:37 +02:00
|
|
|
PCIDevice *d = PCI_DEVICE(s);
|
|
|
|
uint8_t *pci_conf = d->config;
|
2010-05-14 09:29:02 +02:00
|
|
|
|
|
|
|
pci_conf[0x58] = 0;
|
|
|
|
pci_conf[0x59] = 0;
|
|
|
|
pci_conf[0x5a] = 0;
|
|
|
|
pci_conf[0x5b] = 0;
|
|
|
|
|
2012-08-07 14:52:03 +02:00
|
|
|
pci_conf[0x40] = 0x01; /* PM io base read only bit */
|
|
|
|
pci_conf[0x80] = 0;
|
|
|
|
|
2015-06-18 18:30:17 +02:00
|
|
|
if (!s->smm_enabled) {
|
2010-05-14 09:29:02 +02:00
|
|
|
/* Mark SMM as already inited (until KVM supports SMM). */
|
|
|
|
pci_conf[0x5B] = 0x02;
|
|
|
|
}
|
2013-09-11 12:33:31 +02:00
|
|
|
pm_io_space_update(s);
|
2014-02-03 11:45:01 +01:00
|
|
|
acpi_pcihp_reset(&s->acpi_pci_hotplug);
|
2010-05-14 09:29:02 +02:00
|
|
|
}
|
|
|
|
|
2012-09-05 23:06:22 +02:00
|
|
|
static void piix4_pm_powerdown_req(Notifier *n, void *opaque)
|
2010-05-14 09:29:02 +02:00
|
|
|
{
|
2012-09-05 23:06:22 +02:00
|
|
|
PIIX4PMState *s = container_of(n, PIIX4PMState, powerdown_notifier);
|
2010-05-14 09:29:02 +02:00
|
|
|
|
2012-02-23 13:45:16 +01:00
|
|
|
assert(s != NULL);
|
|
|
|
acpi_pm1_evt_power_down(&s->ar);
|
2010-05-14 09:29:02 +02:00
|
|
|
}
|
|
|
|
|
2018-12-12 10:16:17 +01:00
|
|
|
static void piix4_device_pre_plug_cb(HotplugHandler *hotplug_dev,
|
|
|
|
DeviceState *dev, Error **errp)
|
|
|
|
{
|
2019-03-01 04:35:48 +01:00
|
|
|
PIIX4PMState *s = PIIX4_PM(hotplug_dev);
|
|
|
|
|
2018-12-12 10:16:17 +01:00
|
|
|
if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) {
|
|
|
|
acpi_pcihp_device_pre_plug_cb(hotplug_dev, dev, errp);
|
2019-03-01 04:35:48 +01:00
|
|
|
} else if (object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) {
|
|
|
|
if (!s->acpi_memory_hotplug.is_enabled) {
|
|
|
|
error_setg(errp,
|
|
|
|
"memory hotplug is not enabled: %s.memory-hotplug-support "
|
|
|
|
"is not set", object_get_typename(OBJECT(s)));
|
|
|
|
}
|
|
|
|
} else if (
|
2018-12-12 10:16:17 +01:00
|
|
|
!object_dynamic_cast(OBJECT(dev), TYPE_CPU)) {
|
|
|
|
error_setg(errp, "acpi: device pre plug request for not supported"
|
|
|
|
" device type: %s", object_get_typename(OBJECT(dev)));
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2014-06-02 15:25:19 +02:00
|
|
|
static void piix4_device_plug_cb(HotplugHandler *hotplug_dev,
|
|
|
|
DeviceState *dev, Error **errp)
|
2013-10-14 17:01:20 +02:00
|
|
|
{
|
2014-02-05 16:36:49 +01:00
|
|
|
PIIX4PMState *s = PIIX4_PM(hotplug_dev);
|
2014-06-02 15:25:19 +02:00
|
|
|
|
2019-03-01 04:35:48 +01:00
|
|
|
if (object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) {
|
2016-11-07 12:13:38 +01:00
|
|
|
if (object_dynamic_cast(OBJECT(dev), TYPE_NVDIMM)) {
|
|
|
|
nvdimm_acpi_plug_cb(hotplug_dev, dev);
|
|
|
|
} else {
|
|
|
|
acpi_memory_plug_cb(hotplug_dev, &s->acpi_memory_hotplug,
|
|
|
|
dev, errp);
|
|
|
|
}
|
2014-06-02 15:25:20 +02:00
|
|
|
} else if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) {
|
2017-09-06 15:40:33 +02:00
|
|
|
acpi_pcihp_device_plug_cb(hotplug_dev, &s->acpi_pci_hotplug, dev, errp);
|
2016-06-14 16:02:06 +02:00
|
|
|
} else if (object_dynamic_cast(OBJECT(dev), TYPE_CPU)) {
|
|
|
|
if (s->cpu_hotplug_legacy) {
|
|
|
|
legacy_acpi_cpu_plug_cb(hotplug_dev, &s->gpe_cpu, dev, errp);
|
|
|
|
} else {
|
|
|
|
acpi_cpu_plug_cb(hotplug_dev, &s->cpuhp_state, dev, errp);
|
|
|
|
}
|
2014-06-02 15:25:19 +02:00
|
|
|
} else {
|
2018-12-12 10:16:17 +01:00
|
|
|
g_assert_not_reached();
|
2014-06-02 15:25:19 +02:00
|
|
|
}
|
2014-02-05 16:36:49 +01:00
|
|
|
}
|
2013-10-14 17:01:20 +02:00
|
|
|
|
2014-09-26 11:28:19 +02:00
|
|
|
static void piix4_device_unplug_request_cb(HotplugHandler *hotplug_dev,
|
|
|
|
DeviceState *dev, Error **errp)
|
2014-02-05 16:36:49 +01:00
|
|
|
{
|
|
|
|
PIIX4PMState *s = PIIX4_PM(hotplug_dev);
|
2014-06-02 15:25:19 +02:00
|
|
|
|
2015-04-27 10:47:17 +02:00
|
|
|
if (s->acpi_memory_hotplug.is_enabled &&
|
|
|
|
object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) {
|
2016-05-31 12:01:17 +02:00
|
|
|
acpi_memory_unplug_request_cb(hotplug_dev, &s->acpi_memory_hotplug,
|
2015-04-27 10:47:17 +02:00
|
|
|
dev, errp);
|
|
|
|
} else if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) {
|
2018-12-12 10:16:19 +01:00
|
|
|
acpi_pcihp_device_unplug_request_cb(hotplug_dev, &s->acpi_pci_hotplug,
|
|
|
|
dev, errp);
|
2016-06-14 16:14:02 +02:00
|
|
|
} else if (object_dynamic_cast(OBJECT(dev), TYPE_CPU) &&
|
|
|
|
!s->cpu_hotplug_legacy) {
|
|
|
|
acpi_cpu_unplug_request_cb(hotplug_dev, &s->cpuhp_state, dev, errp);
|
2014-06-02 15:25:19 +02:00
|
|
|
} else {
|
|
|
|
error_setg(errp, "acpi: device unplug request for not supported device"
|
|
|
|
" type: %s", object_get_typename(OBJECT(dev)));
|
|
|
|
}
|
2013-10-14 17:01:20 +02:00
|
|
|
}
|
|
|
|
|
2015-01-28 08:45:41 +01:00
|
|
|
static void piix4_device_unplug_cb(HotplugHandler *hotplug_dev,
|
|
|
|
DeviceState *dev, Error **errp)
|
|
|
|
{
|
2015-04-27 10:47:18 +02:00
|
|
|
PIIX4PMState *s = PIIX4_PM(hotplug_dev);
|
|
|
|
|
|
|
|
if (s->acpi_memory_hotplug.is_enabled &&
|
|
|
|
object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) {
|
|
|
|
acpi_memory_unplug_cb(&s->acpi_memory_hotplug, dev, errp);
|
2018-12-12 10:16:19 +01:00
|
|
|
} else if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) {
|
|
|
|
acpi_pcihp_device_unplug_cb(hotplug_dev, &s->acpi_pci_hotplug, dev,
|
|
|
|
errp);
|
2016-06-14 16:14:02 +02:00
|
|
|
} else if (object_dynamic_cast(OBJECT(dev), TYPE_CPU) &&
|
|
|
|
!s->cpu_hotplug_legacy) {
|
|
|
|
acpi_cpu_unplug_cb(&s->cpuhp_state, dev, errp);
|
2015-04-27 10:47:18 +02:00
|
|
|
} else {
|
|
|
|
error_setg(errp, "acpi: device unplug for not supported device"
|
|
|
|
" type: %s", object_get_typename(OBJECT(dev)));
|
|
|
|
}
|
2015-01-28 08:45:41 +01:00
|
|
|
}
|
|
|
|
|
2011-06-20 14:06:26 +02:00
|
|
|
static void piix4_pm_machine_ready(Notifier *n, void *opaque)
|
2011-07-15 17:10:15 +02:00
|
|
|
{
|
|
|
|
PIIX4PMState *s = container_of(n, PIIX4PMState, machine_ready);
|
2013-06-30 14:40:37 +02:00
|
|
|
PCIDevice *d = PCI_DEVICE(s);
|
|
|
|
MemoryRegion *io_as = pci_address_space_io(d);
|
2011-07-15 17:10:15 +02:00
|
|
|
uint8_t *pci_conf;
|
|
|
|
|
2013-06-30 14:40:37 +02:00
|
|
|
pci_conf = d->config;
|
2013-06-22 08:07:01 +02:00
|
|
|
pci_conf[0x5f] = 0x10 |
|
2013-07-02 13:40:48 +02:00
|
|
|
(memory_region_present(io_as, 0x378) ? 0x80 : 0);
|
2011-07-15 17:10:15 +02:00
|
|
|
pci_conf[0x63] = 0x60;
|
2013-07-02 13:40:48 +02:00
|
|
|
pci_conf[0x67] = (memory_region_present(io_as, 0x3f8) ? 0x08 : 0) |
|
|
|
|
(memory_region_present(io_as, 0x2f8) ? 0x90 : 0);
|
2011-07-15 17:10:15 +02:00
|
|
|
}
|
|
|
|
|
2013-07-24 17:56:11 +02:00
|
|
|
static void piix4_pm_add_propeties(PIIX4PMState *s)
|
|
|
|
{
|
|
|
|
static const uint8_t acpi_enable_cmd = ACPI_ENABLE;
|
|
|
|
static const uint8_t acpi_disable_cmd = ACPI_DISABLE;
|
|
|
|
static const uint32_t gpe0_blk = GPE_BASE;
|
|
|
|
static const uint32_t gpe0_blk_len = GPE_LEN;
|
|
|
|
static const uint16_t sci_int = 9;
|
|
|
|
|
|
|
|
object_property_add_uint8_ptr(OBJECT(s), ACPI_PM_PROP_ACPI_ENABLE_CMD,
|
|
|
|
&acpi_enable_cmd, NULL);
|
|
|
|
object_property_add_uint8_ptr(OBJECT(s), ACPI_PM_PROP_ACPI_DISABLE_CMD,
|
|
|
|
&acpi_disable_cmd, NULL);
|
|
|
|
object_property_add_uint32_ptr(OBJECT(s), ACPI_PM_PROP_GPE0_BLK,
|
|
|
|
&gpe0_blk, NULL);
|
|
|
|
object_property_add_uint32_ptr(OBJECT(s), ACPI_PM_PROP_GPE0_BLK_LEN,
|
|
|
|
&gpe0_blk_len, NULL);
|
|
|
|
object_property_add_uint16_ptr(OBJECT(s), ACPI_PM_PROP_SCI_INT,
|
|
|
|
&sci_int, NULL);
|
|
|
|
object_property_add_uint32_ptr(OBJECT(s), ACPI_PM_PROP_PM_IO_BASE,
|
|
|
|
&s->io_base, NULL);
|
|
|
|
}
|
|
|
|
|
2015-01-19 15:52:30 +01:00
|
|
|
static void piix4_pm_realize(PCIDevice *dev, Error **errp)
|
2010-05-14 09:29:02 +02:00
|
|
|
{
|
2013-06-24 08:57:14 +02:00
|
|
|
PIIX4PMState *s = PIIX4_PM(dev);
|
2010-05-14 09:29:02 +02:00
|
|
|
uint8_t *pci_conf;
|
|
|
|
|
2013-06-30 14:40:37 +02:00
|
|
|
pci_conf = dev->config;
|
2010-05-14 09:29:02 +02:00
|
|
|
pci_conf[0x06] = 0x80;
|
|
|
|
pci_conf[0x07] = 0x02;
|
|
|
|
pci_conf[0x09] = 0x00;
|
|
|
|
pci_conf[0x3d] = 0x01; // interrupt pin 1
|
|
|
|
|
|
|
|
/* APM */
|
2012-09-19 13:50:03 +02:00
|
|
|
apm_init(dev, &s->apm, apm_ctrl_changed, s);
|
2010-05-14 09:29:02 +02:00
|
|
|
|
2015-06-18 18:30:17 +02:00
|
|
|
if (!s->smm_enabled) {
|
2010-05-14 09:29:02 +02:00
|
|
|
/* Mark SMM as already inited to prevent SMM from running. KVM does not
|
|
|
|
* support SMM mode. */
|
|
|
|
pci_conf[0x5B] = 0x02;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* XXX: which specification is used ? The i82731AB has different
|
|
|
|
mappings */
|
2010-05-14 09:29:18 +02:00
|
|
|
pci_conf[0x90] = s->smb_io_base | 1;
|
|
|
|
pci_conf[0x91] = s->smb_io_base >> 8;
|
2010-05-14 09:29:02 +02:00
|
|
|
pci_conf[0xd2] = 0x09;
|
2018-08-20 22:26:08 +02:00
|
|
|
pm_smbus_init(DEVICE(dev), &s->smb, true);
|
2012-11-23 14:58:04 +01:00
|
|
|
memory_region_set_enabled(&s->smb.io, pci_conf[0xd2] & 1);
|
2012-12-11 09:40:45 +01:00
|
|
|
memory_region_add_subregion(pci_address_space_io(dev),
|
|
|
|
s->smb_io_base, &s->smb.io);
|
2010-05-14 09:29:02 +02:00
|
|
|
|
2013-06-07 03:25:08 +02:00
|
|
|
memory_region_init(&s->io, OBJECT(s), "piix4-pm", 64);
|
2012-11-22 11:34:44 +01:00
|
|
|
memory_region_set_enabled(&s->io, false);
|
2012-12-11 09:40:45 +01:00
|
|
|
memory_region_add_subregion(pci_address_space_io(dev),
|
|
|
|
0, &s->io);
|
2010-05-14 09:29:02 +02:00
|
|
|
|
2012-11-22 12:12:30 +01:00
|
|
|
acpi_pm_tmr_init(&s->ar, pm_tmr_timer, &s->io);
|
2012-11-22 13:25:10 +01:00
|
|
|
acpi_pm1_evt_init(&s->ar, pm_tmr_timer, &s->io);
|
2015-04-29 15:20:14 +02:00
|
|
|
acpi_pm1_cnt_init(&s->ar, &s->io, s->disable_s3, s->disable_s4, s->s4_val);
|
2012-02-23 13:45:16 +01:00
|
|
|
acpi_gpe_init(&s->ar, GPE_LEN);
|
2010-05-14 09:29:02 +02:00
|
|
|
|
2012-09-05 23:06:22 +02:00
|
|
|
s->powerdown_notifier.notify = piix4_pm_powerdown_req;
|
|
|
|
qemu_register_powerdown_notifier(&s->powerdown_notifier);
|
2010-05-14 09:29:02 +02:00
|
|
|
|
2011-07-15 17:10:15 +02:00
|
|
|
s->machine_ready.notify = piix4_pm_machine_ready;
|
|
|
|
qemu_add_machine_init_done_notifier(&s->machine_ready);
|
2010-05-14 09:29:18 +02:00
|
|
|
qemu_register_reset(piix4_reset, s);
|
2012-12-11 09:40:45 +01:00
|
|
|
|
2017-11-29 09:46:27 +01:00
|
|
|
piix4_acpi_system_hot_add_init(pci_address_space_io(dev),
|
|
|
|
pci_get_bus(dev), s);
|
2019-02-12 19:24:59 +01:00
|
|
|
qbus_set_hotplug_handler(BUS(pci_get_bus(dev)), OBJECT(s), &error_abort);
|
2010-05-14 09:29:18 +02:00
|
|
|
|
2013-07-24 17:56:11 +02:00
|
|
|
piix4_pm_add_propeties(s);
|
2010-05-14 09:29:18 +02:00
|
|
|
}
|
|
|
|
|
2013-08-03 00:18:51 +02:00
|
|
|
I2CBus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base,
|
|
|
|
qemu_irq sci_irq, qemu_irq smi_irq,
|
2015-06-18 18:30:17 +02:00
|
|
|
int smm_enabled, DeviceState **piix4_pm)
|
2010-05-14 09:29:18 +02:00
|
|
|
{
|
2013-06-24 08:57:14 +02:00
|
|
|
DeviceState *dev;
|
2010-05-14 09:29:18 +02:00
|
|
|
PIIX4PMState *s;
|
|
|
|
|
2013-06-24 08:57:14 +02:00
|
|
|
dev = DEVICE(pci_create(bus, devfn, TYPE_PIIX4_PM));
|
|
|
|
qdev_prop_set_uint32(dev, "smb_io_base", smb_io_base);
|
2014-06-02 15:25:24 +02:00
|
|
|
if (piix4_pm) {
|
|
|
|
*piix4_pm = dev;
|
|
|
|
}
|
2010-05-14 09:29:02 +02:00
|
|
|
|
2013-06-24 08:57:14 +02:00
|
|
|
s = PIIX4_PM(dev);
|
2010-05-14 09:29:02 +02:00
|
|
|
s->irq = sci_irq;
|
|
|
|
s->smi_irq = smi_irq;
|
2015-06-18 18:30:17 +02:00
|
|
|
s->smm_enabled = smm_enabled;
|
2014-11-14 12:11:44 +01:00
|
|
|
if (xen_enabled()) {
|
|
|
|
s->use_acpi_pci_hotplug = false;
|
|
|
|
}
|
2010-05-14 09:29:18 +02:00
|
|
|
|
2013-06-24 08:57:14 +02:00
|
|
|
qdev_init_nofail(dev);
|
2010-05-14 09:29:02 +02:00
|
|
|
|
|
|
|
return s->smb.smbus;
|
|
|
|
}
|
|
|
|
|
2012-11-23 15:35:13 +01:00
|
|
|
static uint64_t gpe_readb(void *opaque, hwaddr addr, unsigned width)
|
2010-05-14 09:29:02 +02:00
|
|
|
{
|
2010-10-17 11:45:25 +02:00
|
|
|
PIIX4PMState *s = opaque;
|
2012-02-23 13:45:16 +01:00
|
|
|
uint32_t val = acpi_gpe_ioport_readb(&s->ar, addr);
|
2010-05-14 09:29:02 +02:00
|
|
|
|
2019-04-02 18:18:58 +02:00
|
|
|
trace_piix4_gpe_readb(addr, width, val);
|
2010-05-14 09:29:02 +02:00
|
|
|
return val;
|
|
|
|
}
|
|
|
|
|
2012-11-23 15:35:13 +01:00
|
|
|
static void gpe_writeb(void *opaque, hwaddr addr, uint64_t val,
|
|
|
|
unsigned width)
|
2010-05-14 09:29:02 +02:00
|
|
|
{
|
2010-10-17 11:45:25 +02:00
|
|
|
PIIX4PMState *s = opaque;
|
|
|
|
|
2019-04-02 18:18:58 +02:00
|
|
|
trace_piix4_gpe_writeb(addr, width, val);
|
2012-02-23 13:45:16 +01:00
|
|
|
acpi_gpe_ioport_writeb(&s->ar, addr, val);
|
2013-12-13 17:22:07 +01:00
|
|
|
acpi_update_sci(&s->ar, s->irq);
|
2010-05-14 09:29:02 +02:00
|
|
|
}
|
|
|
|
|
2012-11-23 15:35:13 +01:00
|
|
|
static const MemoryRegionOps piix4_gpe_ops = {
|
|
|
|
.read = gpe_readb,
|
|
|
|
.write = gpe_writeb,
|
|
|
|
.valid.min_access_size = 1,
|
|
|
|
.valid.max_access_size = 4,
|
|
|
|
.impl.min_access_size = 1,
|
|
|
|
.impl.max_access_size = 1,
|
|
|
|
.endianness = DEVICE_LITTLE_ENDIAN,
|
|
|
|
};
|
|
|
|
|
2016-04-11 17:25:54 +02:00
|
|
|
|
|
|
|
static bool piix4_get_cpu_hotplug_legacy(Object *obj, Error **errp)
|
|
|
|
{
|
|
|
|
PIIX4PMState *s = PIIX4_PM(obj);
|
|
|
|
|
|
|
|
return s->cpu_hotplug_legacy;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void piix4_set_cpu_hotplug_legacy(Object *obj, bool value, Error **errp)
|
|
|
|
{
|
|
|
|
PIIX4PMState *s = PIIX4_PM(obj);
|
|
|
|
|
2016-06-15 11:25:23 +02:00
|
|
|
assert(!value);
|
|
|
|
if (s->cpu_hotplug_legacy && value == false) {
|
|
|
|
acpi_switch_to_modern_cphp(&s->gpe_cpu, &s->cpuhp_state,
|
|
|
|
PIIX4_CPU_HOTPLUG_IO_BASE);
|
|
|
|
}
|
2016-04-11 17:25:54 +02:00
|
|
|
s->cpu_hotplug_legacy = value;
|
|
|
|
}
|
|
|
|
|
2012-12-11 09:40:45 +01:00
|
|
|
static void piix4_acpi_system_hot_add_init(MemoryRegion *parent,
|
|
|
|
PCIBus *bus, PIIX4PMState *s)
|
2010-05-14 09:29:02 +02:00
|
|
|
{
|
2013-06-07 03:25:08 +02:00
|
|
|
memory_region_init_io(&s->io_gpe, OBJECT(s), &piix4_gpe_ops, s,
|
|
|
|
"acpi-gpe0", GPE_LEN);
|
2012-12-11 09:40:45 +01:00
|
|
|
memory_region_add_subregion(parent, GPE_BASE, &s->io_gpe);
|
2010-05-14 09:29:20 +02:00
|
|
|
|
2015-02-18 20:14:49 +01:00
|
|
|
acpi_pcihp_init(OBJECT(s), &s->acpi_pci_hotplug, bus, parent,
|
2014-02-03 11:45:01 +01:00
|
|
|
s->use_acpi_pci_hotplug);
|
2013-04-25 16:05:25 +02:00
|
|
|
|
2016-04-11 17:25:54 +02:00
|
|
|
s->cpu_hotplug_legacy = true;
|
|
|
|
object_property_add_bool(OBJECT(s), "cpu-hotplug-legacy",
|
|
|
|
piix4_get_cpu_hotplug_legacy,
|
|
|
|
piix4_set_cpu_hotplug_legacy,
|
|
|
|
NULL);
|
2016-05-17 16:43:00 +02:00
|
|
|
legacy_acpi_cpu_hotplug_init(parent, OBJECT(s), &s->gpe_cpu,
|
|
|
|
PIIX4_CPU_HOTPLUG_IO_BASE);
|
2014-06-02 15:25:20 +02:00
|
|
|
|
|
|
|
if (s->acpi_memory_hotplug.is_enabled) {
|
2016-12-06 00:32:28 +01:00
|
|
|
acpi_memory_hotplug_init(parent, OBJECT(s), &s->acpi_memory_hotplug,
|
|
|
|
ACPI_MEMORY_HOTPLUG_BASE);
|
2014-06-02 15:25:20 +02:00
|
|
|
}
|
2010-05-14 09:29:02 +02:00
|
|
|
}
|
2014-02-05 16:36:47 +01:00
|
|
|
|
2014-06-16 19:12:27 +02:00
|
|
|
static void piix4_ospm_status(AcpiDeviceIf *adev, ACPIOSTInfoList ***list)
|
|
|
|
{
|
|
|
|
PIIX4PMState *s = PIIX4_PM(adev);
|
|
|
|
|
|
|
|
acpi_memory_ospm_status(&s->acpi_memory_hotplug, list);
|
2016-04-22 19:06:36 +02:00
|
|
|
if (!s->cpu_hotplug_legacy) {
|
|
|
|
acpi_cpu_ospm_status(&s->cpuhp_state, list);
|
|
|
|
}
|
2014-06-16 19:12:27 +02:00
|
|
|
}
|
|
|
|
|
2016-05-31 11:57:57 +02:00
|
|
|
static void piix4_send_gpe(AcpiDeviceIf *adev, AcpiEventStatusBits ev)
|
|
|
|
{
|
|
|
|
PIIX4PMState *s = PIIX4_PM(adev);
|
|
|
|
|
|
|
|
acpi_send_gpe_event(&s->ar, s->irq, ev);
|
|
|
|
}
|
|
|
|
|
2014-02-05 16:36:47 +01:00
|
|
|
static Property piix4_pm_properties[] = {
|
|
|
|
DEFINE_PROP_UINT32("smb_io_base", PIIX4PMState, smb_io_base, 0),
|
|
|
|
DEFINE_PROP_UINT8(ACPI_PM_PROP_S3_DISABLED, PIIX4PMState, disable_s3, 0),
|
|
|
|
DEFINE_PROP_UINT8(ACPI_PM_PROP_S4_DISABLED, PIIX4PMState, disable_s4, 0),
|
|
|
|
DEFINE_PROP_UINT8(ACPI_PM_PROP_S4_VAL, PIIX4PMState, s4_val, 2),
|
|
|
|
DEFINE_PROP_BOOL("acpi-pci-hotplug-with-bridge-support", PIIX4PMState,
|
|
|
|
use_acpi_pci_hotplug, true),
|
2014-06-02 15:25:20 +02:00
|
|
|
DEFINE_PROP_BOOL("memory-hotplug-support", PIIX4PMState,
|
|
|
|
acpi_memory_hotplug.is_enabled, true),
|
2014-02-05 16:36:47 +01:00
|
|
|
DEFINE_PROP_END_OF_LIST(),
|
|
|
|
};
|
|
|
|
|
|
|
|
static void piix4_pm_class_init(ObjectClass *klass, void *data)
|
|
|
|
{
|
|
|
|
DeviceClass *dc = DEVICE_CLASS(klass);
|
|
|
|
PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
|
2014-02-05 16:36:49 +01:00
|
|
|
HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(klass);
|
2014-06-16 19:12:27 +02:00
|
|
|
AcpiDeviceIfClass *adevc = ACPI_DEVICE_IF_CLASS(klass);
|
2014-02-05 16:36:47 +01:00
|
|
|
|
2015-01-19 15:52:30 +01:00
|
|
|
k->realize = piix4_pm_realize;
|
2014-02-05 16:36:47 +01:00
|
|
|
k->config_write = pm_write_config;
|
|
|
|
k->vendor_id = PCI_VENDOR_ID_INTEL;
|
|
|
|
k->device_id = PCI_DEVICE_ID_INTEL_82371AB_3;
|
|
|
|
k->revision = 0x03;
|
|
|
|
k->class_id = PCI_CLASS_BRIDGE_OTHER;
|
|
|
|
dc->desc = "PM";
|
|
|
|
dc->vmsd = &vmstate_acpi;
|
|
|
|
dc->props = piix4_pm_properties;
|
|
|
|
/*
|
|
|
|
* Reason: part of PIIX4 southbridge, needs to be wired up,
|
|
|
|
* e.g. by mips_malta_init()
|
|
|
|
*/
|
2017-05-03 22:35:44 +02:00
|
|
|
dc->user_creatable = false;
|
2014-02-05 16:36:48 +01:00
|
|
|
dc->hotpluggable = false;
|
2018-12-12 10:16:17 +01:00
|
|
|
hc->pre_plug = piix4_device_pre_plug_cb;
|
2014-06-02 15:25:19 +02:00
|
|
|
hc->plug = piix4_device_plug_cb;
|
2014-09-26 11:28:19 +02:00
|
|
|
hc->unplug_request = piix4_device_unplug_request_cb;
|
2015-01-28 08:45:41 +01:00
|
|
|
hc->unplug = piix4_device_unplug_cb;
|
2014-06-16 19:12:27 +02:00
|
|
|
adevc->ospm_status = piix4_ospm_status;
|
2016-05-31 11:57:57 +02:00
|
|
|
adevc->send_event = piix4_send_gpe;
|
2016-04-20 11:28:57 +02:00
|
|
|
adevc->madt_cpu = pc_madt_cpu_entry;
|
2014-02-05 16:36:47 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
static const TypeInfo piix4_pm_info = {
|
|
|
|
.name = TYPE_PIIX4_PM,
|
|
|
|
.parent = TYPE_PCI_DEVICE,
|
|
|
|
.instance_size = sizeof(PIIX4PMState),
|
|
|
|
.class_init = piix4_pm_class_init,
|
2014-02-05 16:36:49 +01:00
|
|
|
.interfaces = (InterfaceInfo[]) {
|
|
|
|
{ TYPE_HOTPLUG_HANDLER },
|
2014-06-16 19:12:27 +02:00
|
|
|
{ TYPE_ACPI_DEVICE_IF },
|
2017-09-27 21:56:34 +02:00
|
|
|
{ INTERFACE_CONVENTIONAL_PCI_DEVICE },
|
2014-02-05 16:36:49 +01:00
|
|
|
{ }
|
|
|
|
}
|
2014-02-05 16:36:47 +01:00
|
|
|
};
|
|
|
|
|
|
|
|
static void piix4_pm_register_types(void)
|
|
|
|
{
|
|
|
|
type_register_static(&piix4_pm_info);
|
|
|
|
}
|
|
|
|
|
|
|
|
type_init(piix4_pm_register_types)
|