2003-06-15 21:58:51 +02:00
|
|
|
/*
|
|
|
|
* Host code generation
|
2007-09-16 23:08:06 +02:00
|
|
|
*
|
2003-06-15 21:58:51 +02:00
|
|
|
* Copyright (c) 2003 Fabrice Bellard
|
|
|
|
*
|
|
|
|
* This library is free software; you can redistribute it and/or
|
|
|
|
* modify it under the terms of the GNU Lesser General Public
|
|
|
|
* License as published by the Free Software Foundation; either
|
|
|
|
* version 2 of the License, or (at your option) any later version.
|
|
|
|
*
|
|
|
|
* This library is distributed in the hope that it will be useful,
|
|
|
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
|
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
|
|
|
* Lesser General Public License for more details.
|
|
|
|
*
|
|
|
|
* You should have received a copy of the GNU Lesser General Public
|
2009-07-16 22:47:01 +02:00
|
|
|
* License along with this library; if not, see <http://www.gnu.org/licenses/>.
|
2003-06-15 21:58:51 +02:00
|
|
|
*/
|
2012-12-02 17:04:43 +01:00
|
|
|
#ifdef _WIN32
|
|
|
|
#include <windows.h>
|
|
|
|
#endif
|
2016-01-26 19:16:56 +01:00
|
|
|
#include "qemu/osdep.h"
|
2003-06-15 21:58:51 +02:00
|
|
|
|
2003-06-16 01:28:43 +02:00
|
|
|
|
2012-12-02 17:04:43 +01:00
|
|
|
#include "qemu-common.h"
|
2004-01-05 00:28:12 +01:00
|
|
|
#define NO_CPU_IO_DEFS
|
2003-09-30 22:59:51 +02:00
|
|
|
#include "cpu.h"
|
2017-06-02 08:06:45 +02:00
|
|
|
#include "trace.h"
|
2012-10-24 11:12:21 +02:00
|
|
|
#include "disas/disas.h"
|
2016-03-15 13:18:37 +01:00
|
|
|
#include "exec/exec-all.h"
|
2008-02-01 11:50:11 +01:00
|
|
|
#include "tcg.h"
|
2012-12-02 17:04:43 +01:00
|
|
|
#if defined(CONFIG_USER_ONLY)
|
|
|
|
#include "qemu.h"
|
2016-10-27 17:10:00 +02:00
|
|
|
#include "exec/exec-all.h"
|
2012-12-02 17:04:43 +01:00
|
|
|
#if defined(__FreeBSD__) || defined(__FreeBSD_kernel__)
|
|
|
|
#include <sys/param.h>
|
|
|
|
#if __FreeBSD_version >= 700104
|
|
|
|
#define HAVE_KINFO_GETVMMAP
|
|
|
|
#define sigqueue sigqueue_freebsd /* avoid redefinition */
|
|
|
|
#include <sys/proc.h>
|
|
|
|
#include <machine/profile.h>
|
|
|
|
#define _KERNEL
|
|
|
|
#include <sys/user.h>
|
|
|
|
#undef _KERNEL
|
|
|
|
#undef sigqueue
|
|
|
|
#include <libutil.h>
|
|
|
|
#endif
|
|
|
|
#endif
|
2013-04-08 17:29:59 +02:00
|
|
|
#else
|
|
|
|
#include "exec/address-spaces.h"
|
2012-12-02 17:04:43 +01:00
|
|
|
#endif
|
|
|
|
|
2012-12-17 18:19:49 +01:00
|
|
|
#include "exec/cputlb.h"
|
2015-05-31 08:11:45 +02:00
|
|
|
#include "exec/tb-hash.h"
|
2012-12-02 17:04:43 +01:00
|
|
|
#include "translate-all.h"
|
2015-04-22 23:50:52 +02:00
|
|
|
#include "qemu/bitmap.h"
|
2017-07-04 10:42:32 +02:00
|
|
|
#include "qemu/error-report.h"
|
2013-04-22 09:42:50 +02:00
|
|
|
#include "qemu/timer.h"
|
tcg: drop global lock during TCG code execution
This finally allows TCG to benefit from the iothread introduction: Drop
the global mutex while running pure TCG CPU code. Reacquire the lock
when entering MMIO or PIO emulation, or when leaving the TCG loop.
We have to revert a few optimization for the current TCG threading
model, namely kicking the TCG thread in qemu_mutex_lock_iothread and not
kicking it in qemu_cpu_kick. We also need to disable RAM block
reordering until we have a more efficient locking mechanism at hand.
Still, a Linux x86 UP guest and my Musicpal ARM model boot fine here.
These numbers demonstrate where we gain something:
20338 jan 20 0 331m 75m 6904 R 99 0.9 0:50.95 qemu-system-arm
20337 jan 20 0 331m 75m 6904 S 20 0.9 0:26.50 qemu-system-arm
The guest CPU was fully loaded, but the iothread could still run mostly
independent on a second core. Without the patch we don't get beyond
32206 jan 20 0 330m 73m 7036 R 82 0.9 1:06.00 qemu-system-arm
32204 jan 20 0 330m 73m 7036 S 21 0.9 0:17.03 qemu-system-arm
We don't benefit significantly, though, when the guest is not fully
loading a host CPU.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Message-Id: <1439220437-23957-10-git-send-email-fred.konrad@greensocs.com>
[FK: Rebase, fix qemu_devices_reset deadlock, rm address_space_* mutex]
Signed-off-by: KONRAD Frederic <fred.konrad@greensocs.com>
[EGC: fixed iothread lock for cpu-exec IRQ handling]
Signed-off-by: Emilio G. Cota <cota@braap.org>
[AJB: -smp single-threaded fix, clean commit msg, BQL fixes]
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Reviewed-by: Pranith Kumar <bobby.prani@gmail.com>
[PM: target-arm changes]
Acked-by: Peter Maydell <peter.maydell@linaro.org>
2017-02-23 19:29:11 +01:00
|
|
|
#include "qemu/main-loop.h"
|
2016-01-07 14:55:28 +01:00
|
|
|
#include "exec/log.h"
|
2017-03-03 12:01:16 +01:00
|
|
|
#include "sysemu/cpus.h"
|
2012-12-02 17:04:43 +01:00
|
|
|
|
2016-10-27 17:09:59 +02:00
|
|
|
/* #define DEBUG_TB_INVALIDATE */
|
|
|
|
/* #define DEBUG_TB_FLUSH */
|
2012-12-02 17:04:43 +01:00
|
|
|
/* make various TB consistency checks */
|
2016-10-27 17:09:59 +02:00
|
|
|
/* #define DEBUG_TB_CHECK */
|
2012-12-02 17:04:43 +01:00
|
|
|
|
2017-07-12 21:04:02 +02:00
|
|
|
#ifdef DEBUG_TB_INVALIDATE
|
|
|
|
#define DEBUG_TB_INVALIDATE_GATE 1
|
|
|
|
#else
|
|
|
|
#define DEBUG_TB_INVALIDATE_GATE 0
|
|
|
|
#endif
|
|
|
|
|
2017-07-12 21:01:07 +02:00
|
|
|
#ifdef DEBUG_TB_FLUSH
|
|
|
|
#define DEBUG_TB_FLUSH_GATE 1
|
|
|
|
#else
|
|
|
|
#define DEBUG_TB_FLUSH_GATE 0
|
|
|
|
#endif
|
|
|
|
|
2012-12-02 17:04:43 +01:00
|
|
|
#if !defined(CONFIG_USER_ONLY)
|
|
|
|
/* TB consistency checks only implemented for usermode emulation. */
|
|
|
|
#undef DEBUG_TB_CHECK
|
|
|
|
#endif
|
|
|
|
|
2017-07-12 21:31:57 +02:00
|
|
|
#ifdef DEBUG_TB_CHECK
|
|
|
|
#define DEBUG_TB_CHECK_GATE 1
|
|
|
|
#else
|
|
|
|
#define DEBUG_TB_CHECK_GATE 0
|
|
|
|
#endif
|
|
|
|
|
2016-10-27 17:10:00 +02:00
|
|
|
/* Access to the various translations structures need to be serialised via locks
|
|
|
|
* for consistency. This is automatic for SoftMMU based system
|
|
|
|
* emulation due to its single threaded nature. In user-mode emulation
|
|
|
|
* access to the memory related structures are protected with the
|
|
|
|
* mmap_lock.
|
|
|
|
*/
|
|
|
|
#ifdef CONFIG_SOFTMMU
|
2017-02-23 19:29:13 +01:00
|
|
|
#define assert_memory_lock() tcg_debug_assert(have_tb_lock)
|
2016-10-27 17:10:00 +02:00
|
|
|
#else
|
2017-02-23 19:29:05 +01:00
|
|
|
#define assert_memory_lock() tcg_debug_assert(have_mmap_lock())
|
2016-10-27 17:10:00 +02:00
|
|
|
#endif
|
|
|
|
|
2012-12-02 17:04:43 +01:00
|
|
|
#define SMC_BITMAP_USE_THRESHOLD 10
|
|
|
|
|
|
|
|
typedef struct PageDesc {
|
|
|
|
/* list of TBs intersecting this ram page */
|
|
|
|
TranslationBlock *first_tb;
|
2015-08-11 12:42:55 +02:00
|
|
|
#ifdef CONFIG_SOFTMMU
|
2012-12-02 17:04:43 +01:00
|
|
|
/* in order to optimize self modifying code, we count the number
|
|
|
|
of lookups we do to a given page to use a bitmap */
|
|
|
|
unsigned int code_write_count;
|
2015-04-22 23:50:52 +02:00
|
|
|
unsigned long *code_bitmap;
|
2015-08-11 12:42:55 +02:00
|
|
|
#else
|
2012-12-02 17:04:43 +01:00
|
|
|
unsigned long flags;
|
|
|
|
#endif
|
|
|
|
} PageDesc;
|
|
|
|
|
|
|
|
/* In system mode we want L1_MAP to be based on ram offsets,
|
|
|
|
while in user mode we want it to be based on virtual addresses. */
|
|
|
|
#if !defined(CONFIG_USER_ONLY)
|
|
|
|
#if HOST_LONG_BITS < TARGET_PHYS_ADDR_SPACE_BITS
|
|
|
|
# define L1_MAP_ADDR_SPACE_BITS HOST_LONG_BITS
|
|
|
|
#else
|
|
|
|
# define L1_MAP_ADDR_SPACE_BITS TARGET_PHYS_ADDR_SPACE_BITS
|
|
|
|
#endif
|
|
|
|
#else
|
|
|
|
# define L1_MAP_ADDR_SPACE_BITS TARGET_VIRT_ADDR_SPACE_BITS
|
|
|
|
#endif
|
|
|
|
|
2013-11-07 17:14:36 +01:00
|
|
|
/* Size of the L2 (and L3, etc) page tables. */
|
|
|
|
#define V_L2_BITS 10
|
|
|
|
#define V_L2_SIZE (1 << V_L2_BITS)
|
|
|
|
|
2017-07-04 10:42:32 +02:00
|
|
|
/* Make sure all possible CPU event bits fit in tb->trace_vcpu_dstate */
|
|
|
|
QEMU_BUILD_BUG_ON(CPU_TRACE_DSTATE_MAX_EVENTS >
|
|
|
|
sizeof(((TranslationBlock *)0)->trace_vcpu_dstate)
|
|
|
|
* BITS_PER_BYTE);
|
|
|
|
|
2016-10-24 17:26:49 +02:00
|
|
|
/*
|
|
|
|
* L1 Mapping properties
|
|
|
|
*/
|
|
|
|
static int v_l1_size;
|
|
|
|
static int v_l1_shift;
|
|
|
|
static int v_l2_levels;
|
|
|
|
|
|
|
|
/* The bottom level has pointers to PageDesc, and is indexed by
|
|
|
|
* anything from 4 to (V_L2_BITS + 3) bits, depending on target page size.
|
|
|
|
*/
|
|
|
|
#define V_L1_MIN_BITS 4
|
|
|
|
#define V_L1_MAX_BITS (V_L2_BITS + 3)
|
|
|
|
#define V_L1_MAX_SIZE (1 << V_L1_MAX_BITS)
|
|
|
|
|
|
|
|
static void *l1_map[V_L1_MAX_SIZE];
|
2012-12-02 17:04:43 +01:00
|
|
|
|
2008-02-01 11:50:11 +01:00
|
|
|
/* code generation context */
|
|
|
|
TCGContext tcg_ctx;
|
2016-06-30 07:12:55 +02:00
|
|
|
bool parallel_cpus;
|
2003-06-15 21:58:51 +02:00
|
|
|
|
2015-08-10 17:27:02 +02:00
|
|
|
/* translation block context */
|
2017-07-07 03:28:52 +02:00
|
|
|
static __thread int have_tb_lock;
|
2015-08-10 17:27:02 +02:00
|
|
|
|
2016-10-24 17:26:49 +02:00
|
|
|
static void page_table_config_init(void)
|
|
|
|
{
|
|
|
|
uint32_t v_l1_bits;
|
|
|
|
|
|
|
|
assert(TARGET_PAGE_BITS);
|
|
|
|
/* The bits remaining after N lower levels of page tables. */
|
|
|
|
v_l1_bits = (L1_MAP_ADDR_SPACE_BITS - TARGET_PAGE_BITS) % V_L2_BITS;
|
|
|
|
if (v_l1_bits < V_L1_MIN_BITS) {
|
|
|
|
v_l1_bits += V_L2_BITS;
|
|
|
|
}
|
|
|
|
|
|
|
|
v_l1_size = 1 << v_l1_bits;
|
|
|
|
v_l1_shift = L1_MAP_ADDR_SPACE_BITS - TARGET_PAGE_BITS - v_l1_bits;
|
|
|
|
v_l2_levels = v_l1_shift / V_L2_BITS - 1;
|
|
|
|
|
|
|
|
assert(v_l1_bits <= V_L1_MAX_BITS);
|
|
|
|
assert(v_l1_shift % V_L2_BITS == 0);
|
|
|
|
assert(v_l2_levels >= 0);
|
|
|
|
}
|
|
|
|
|
2017-02-23 19:29:05 +01:00
|
|
|
#define assert_tb_locked() tcg_debug_assert(have_tb_lock)
|
|
|
|
#define assert_tb_unlocked() tcg_debug_assert(!have_tb_lock)
|
|
|
|
|
2015-08-10 17:27:02 +02:00
|
|
|
void tb_lock(void)
|
|
|
|
{
|
2017-02-23 19:29:05 +01:00
|
|
|
assert_tb_unlocked();
|
2015-08-10 17:27:02 +02:00
|
|
|
qemu_mutex_lock(&tcg_ctx.tb_ctx.tb_lock);
|
|
|
|
have_tb_lock++;
|
|
|
|
}
|
|
|
|
|
|
|
|
void tb_unlock(void)
|
|
|
|
{
|
2017-02-23 19:29:05 +01:00
|
|
|
assert_tb_locked();
|
2015-08-10 17:27:02 +02:00
|
|
|
have_tb_lock--;
|
|
|
|
qemu_mutex_unlock(&tcg_ctx.tb_ctx.tb_lock);
|
|
|
|
}
|
|
|
|
|
|
|
|
void tb_lock_reset(void)
|
|
|
|
{
|
|
|
|
if (have_tb_lock) {
|
|
|
|
qemu_mutex_unlock(&tcg_ctx.tb_ctx.tb_lock);
|
|
|
|
have_tb_lock = 0;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2012-12-04 21:16:07 +01:00
|
|
|
static TranslationBlock *tb_find_pc(uintptr_t tc_ptr);
|
2012-12-02 17:04:43 +01:00
|
|
|
|
2008-02-01 11:50:11 +01:00
|
|
|
void cpu_gen_init(void)
|
|
|
|
{
|
|
|
|
tcg_context_init(&tcg_ctx);
|
|
|
|
}
|
|
|
|
|
2015-09-02 04:11:45 +02:00
|
|
|
/* Encode VAL as a signed leb128 sequence at P.
|
|
|
|
Return P incremented past the encoded value. */
|
|
|
|
static uint8_t *encode_sleb128(uint8_t *p, target_long val)
|
|
|
|
{
|
|
|
|
int more, byte;
|
|
|
|
|
|
|
|
do {
|
|
|
|
byte = val & 0x7f;
|
|
|
|
val >>= 7;
|
|
|
|
more = !((val == 0 && (byte & 0x40) == 0)
|
|
|
|
|| (val == -1 && (byte & 0x40) != 0));
|
|
|
|
if (more) {
|
|
|
|
byte |= 0x80;
|
|
|
|
}
|
|
|
|
*p++ = byte;
|
|
|
|
} while (more);
|
|
|
|
|
|
|
|
return p;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Decode a signed leb128 sequence at *PP; increment *PP past the
|
|
|
|
decoded value. Return the decoded value. */
|
|
|
|
static target_long decode_sleb128(uint8_t **pp)
|
|
|
|
{
|
|
|
|
uint8_t *p = *pp;
|
|
|
|
target_long val = 0;
|
|
|
|
int byte, shift = 0;
|
|
|
|
|
|
|
|
do {
|
|
|
|
byte = *p++;
|
|
|
|
val |= (target_ulong)(byte & 0x7f) << shift;
|
|
|
|
shift += 7;
|
|
|
|
} while (byte & 0x80);
|
|
|
|
if (shift < TARGET_LONG_BITS && (byte & 0x40)) {
|
|
|
|
val |= -(target_ulong)1 << shift;
|
|
|
|
}
|
|
|
|
|
|
|
|
*pp = p;
|
|
|
|
return val;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Encode the data collected about the instructions while compiling TB.
|
|
|
|
Place the data at BLOCK, and return the number of bytes consumed.
|
|
|
|
|
|
|
|
The logical table consisits of TARGET_INSN_START_WORDS target_ulong's,
|
|
|
|
which come from the target's insn_start data, followed by a uintptr_t
|
|
|
|
which comes from the host pc of the end of the code implementing the insn.
|
|
|
|
|
|
|
|
Each line of the table is encoded as sleb128 deltas from the previous
|
2017-07-12 06:08:21 +02:00
|
|
|
line. The seed for the first line is { tb->pc, 0..., tb->tc.ptr }.
|
2015-09-02 04:11:45 +02:00
|
|
|
That is, the first column is seeded with the guest pc, the last column
|
|
|
|
with the host pc, and the middle columns with zeros. */
|
|
|
|
|
|
|
|
static int encode_search(TranslationBlock *tb, uint8_t *block)
|
|
|
|
{
|
2015-09-22 22:01:15 +02:00
|
|
|
uint8_t *highwater = tcg_ctx.code_gen_highwater;
|
2015-09-02 04:11:45 +02:00
|
|
|
uint8_t *p = block;
|
|
|
|
int i, j, n;
|
|
|
|
|
2017-07-12 06:08:21 +02:00
|
|
|
tb->tc.search = block;
|
2015-09-02 04:11:45 +02:00
|
|
|
|
|
|
|
for (i = 0, n = tb->icount; i < n; ++i) {
|
|
|
|
target_ulong prev;
|
|
|
|
|
|
|
|
for (j = 0; j < TARGET_INSN_START_WORDS; ++j) {
|
|
|
|
if (i == 0) {
|
|
|
|
prev = (j == 0 ? tb->pc : 0);
|
|
|
|
} else {
|
|
|
|
prev = tcg_ctx.gen_insn_data[i - 1][j];
|
|
|
|
}
|
|
|
|
p = encode_sleb128(p, tcg_ctx.gen_insn_data[i][j] - prev);
|
|
|
|
}
|
|
|
|
prev = (i == 0 ? 0 : tcg_ctx.gen_insn_end_off[i - 1]);
|
|
|
|
p = encode_sleb128(p, tcg_ctx.gen_insn_end_off[i] - prev);
|
2015-09-22 22:01:15 +02:00
|
|
|
|
|
|
|
/* Test for (pending) buffer overflow. The assumption is that any
|
|
|
|
one row beginning below the high water mark cannot overrun
|
|
|
|
the buffer completely. Thus we can test for overflow after
|
|
|
|
encoding a row without having to check during encoding. */
|
|
|
|
if (unlikely(p > highwater)) {
|
|
|
|
return -1;
|
|
|
|
}
|
2015-09-02 04:11:45 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
return p - block;
|
|
|
|
}
|
|
|
|
|
2016-10-27 17:10:03 +02:00
|
|
|
/* The cpu state corresponding to 'searched_pc' is restored.
|
|
|
|
* Called with tb_lock held.
|
|
|
|
*/
|
2013-09-01 17:02:58 +02:00
|
|
|
static int cpu_restore_state_from_tb(CPUState *cpu, TranslationBlock *tb,
|
2012-12-04 21:16:07 +01:00
|
|
|
uintptr_t searched_pc)
|
2003-06-15 21:58:51 +02:00
|
|
|
{
|
2015-09-02 04:11:45 +02:00
|
|
|
target_ulong data[TARGET_INSN_START_WORDS] = { tb->pc };
|
2017-07-12 06:08:21 +02:00
|
|
|
uintptr_t host_pc = (uintptr_t)tb->tc.ptr;
|
2013-09-01 17:02:58 +02:00
|
|
|
CPUArchState *env = cpu->env_ptr;
|
2017-07-12 06:08:21 +02:00
|
|
|
uint8_t *p = tb->tc.search;
|
2015-09-02 04:11:45 +02:00
|
|
|
int i, j, num_insns = tb->icount;
|
2008-02-01 11:50:11 +01:00
|
|
|
#ifdef CONFIG_PROFILER
|
2015-09-02 04:11:45 +02:00
|
|
|
int64_t ti = profile_getclock();
|
2008-02-01 11:50:11 +01:00
|
|
|
#endif
|
|
|
|
|
2016-07-26 02:39:16 +02:00
|
|
|
searched_pc -= GETPC_ADJ;
|
|
|
|
|
2015-09-02 04:11:45 +02:00
|
|
|
if (searched_pc < host_pc) {
|
|
|
|
return -1;
|
|
|
|
}
|
2003-06-15 21:58:51 +02:00
|
|
|
|
2015-09-02 04:11:45 +02:00
|
|
|
/* Reconstruct the stored insn data while looking for the point at
|
|
|
|
which the end of the insn exceeds the searched_pc. */
|
|
|
|
for (i = 0; i < num_insns; ++i) {
|
|
|
|
for (j = 0; j < TARGET_INSN_START_WORDS; ++j) {
|
|
|
|
data[j] += decode_sleb128(&p);
|
|
|
|
}
|
|
|
|
host_pc += decode_sleb128(&p);
|
|
|
|
if (host_pc > searched_pc) {
|
|
|
|
goto found;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
return -1;
|
2007-09-17 10:09:54 +02:00
|
|
|
|
2015-09-02 04:11:45 +02:00
|
|
|
found:
|
2014-11-26 11:39:59 +01:00
|
|
|
if (tb->cflags & CF_USE_ICOUNT) {
|
2015-06-24 14:16:26 +02:00
|
|
|
assert(use_icount);
|
2008-06-29 03:03:05 +02:00
|
|
|
/* Reset the cycle counter to the start of the block. */
|
2015-09-02 04:11:45 +02:00
|
|
|
cpu->icount_decr.u16.low += num_insns;
|
2008-06-29 03:03:05 +02:00
|
|
|
/* Clear the IO flag. */
|
2013-08-26 05:15:23 +02:00
|
|
|
cpu->can_do_io = 0;
|
2008-06-29 03:03:05 +02:00
|
|
|
}
|
2015-09-02 04:11:45 +02:00
|
|
|
cpu->icount_decr.u16.low -= i;
|
|
|
|
restore_state_to_opc(env, tb, data);
|
2008-02-01 11:50:11 +01:00
|
|
|
|
|
|
|
#ifdef CONFIG_PROFILER
|
2015-09-02 04:11:45 +02:00
|
|
|
tcg_ctx.restore_time += profile_getclock() - ti;
|
|
|
|
tcg_ctx.restore_count++;
|
2008-02-01 11:50:11 +01:00
|
|
|
#endif
|
2003-06-15 21:58:51 +02:00
|
|
|
return 0;
|
|
|
|
}
|
2012-12-02 17:04:43 +01:00
|
|
|
|
2013-09-01 16:51:34 +02:00
|
|
|
bool cpu_restore_state(CPUState *cpu, uintptr_t retaddr)
|
2012-12-04 21:16:07 +01:00
|
|
|
{
|
|
|
|
TranslationBlock *tb;
|
2016-10-27 17:10:06 +02:00
|
|
|
bool r = false;
|
2012-12-04 21:16:07 +01:00
|
|
|
|
2017-03-02 11:31:32 +01:00
|
|
|
/* A retaddr of zero is invalid so we really shouldn't have ended
|
|
|
|
* up here. The target code has likely forgotten to check retaddr
|
|
|
|
* != 0 before attempting to restore state. We return early to
|
|
|
|
* avoid blowing up on a recursive tb_lock(). The target must have
|
|
|
|
* previously survived a failed cpu_restore_state because
|
|
|
|
* tb_find_pc(0) would have failed anyway. It still should be
|
|
|
|
* fixed though.
|
|
|
|
*/
|
|
|
|
|
|
|
|
if (!retaddr) {
|
|
|
|
return r;
|
|
|
|
}
|
|
|
|
|
2016-10-27 17:10:06 +02:00
|
|
|
tb_lock();
|
2012-12-04 21:16:07 +01:00
|
|
|
tb = tb_find_pc(retaddr);
|
|
|
|
if (tb) {
|
2013-09-01 17:02:58 +02:00
|
|
|
cpu_restore_state_from_tb(cpu, tb, retaddr);
|
2014-11-26 11:40:16 +01:00
|
|
|
if (tb->cflags & CF_NOCACHE) {
|
|
|
|
/* one-shot translation, invalidate it immediately */
|
|
|
|
tb_phys_invalidate(tb, -1);
|
|
|
|
tb_free(tb);
|
|
|
|
}
|
2016-10-27 17:10:06 +02:00
|
|
|
r = true;
|
2012-12-04 21:16:07 +01:00
|
|
|
}
|
2016-10-27 17:10:06 +02:00
|
|
|
tb_unlock();
|
|
|
|
|
|
|
|
return r;
|
2012-12-04 21:16:07 +01:00
|
|
|
}
|
|
|
|
|
2014-01-17 19:12:07 +01:00
|
|
|
static void page_init(void)
|
|
|
|
{
|
|
|
|
page_size_init();
|
2016-10-24 17:26:49 +02:00
|
|
|
page_table_config_init();
|
|
|
|
|
2012-12-02 17:04:43 +01:00
|
|
|
#if defined(CONFIG_BSD) && defined(CONFIG_USER_ONLY)
|
|
|
|
{
|
|
|
|
#ifdef HAVE_KINFO_GETVMMAP
|
|
|
|
struct kinfo_vmentry *freep;
|
|
|
|
int i, cnt;
|
|
|
|
|
|
|
|
freep = kinfo_getvmmap(getpid(), &cnt);
|
|
|
|
if (freep) {
|
|
|
|
mmap_lock();
|
|
|
|
for (i = 0; i < cnt; i++) {
|
|
|
|
unsigned long startaddr, endaddr;
|
|
|
|
|
|
|
|
startaddr = freep[i].kve_start;
|
|
|
|
endaddr = freep[i].kve_end;
|
|
|
|
if (h2g_valid(startaddr)) {
|
|
|
|
startaddr = h2g(startaddr) & TARGET_PAGE_MASK;
|
|
|
|
|
|
|
|
if (h2g_valid(endaddr)) {
|
|
|
|
endaddr = h2g(endaddr);
|
|
|
|
page_set_flags(startaddr, endaddr, PAGE_RESERVED);
|
|
|
|
} else {
|
|
|
|
#if TARGET_ABI_BITS <= L1_MAP_ADDR_SPACE_BITS
|
|
|
|
endaddr = ~0ul;
|
|
|
|
page_set_flags(startaddr, endaddr, PAGE_RESERVED);
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
free(freep);
|
|
|
|
mmap_unlock();
|
|
|
|
}
|
|
|
|
#else
|
|
|
|
FILE *f;
|
|
|
|
|
|
|
|
last_brk = (unsigned long)sbrk(0);
|
|
|
|
|
|
|
|
f = fopen("/compat/linux/proc/self/maps", "r");
|
|
|
|
if (f) {
|
|
|
|
mmap_lock();
|
|
|
|
|
|
|
|
do {
|
|
|
|
unsigned long startaddr, endaddr;
|
|
|
|
int n;
|
|
|
|
|
|
|
|
n = fscanf(f, "%lx-%lx %*[^\n]\n", &startaddr, &endaddr);
|
|
|
|
|
|
|
|
if (n == 2 && h2g_valid(startaddr)) {
|
|
|
|
startaddr = h2g(startaddr) & TARGET_PAGE_MASK;
|
|
|
|
|
|
|
|
if (h2g_valid(endaddr)) {
|
|
|
|
endaddr = h2g(endaddr);
|
|
|
|
} else {
|
|
|
|
endaddr = ~0ul;
|
|
|
|
}
|
|
|
|
page_set_flags(startaddr, endaddr, PAGE_RESERVED);
|
|
|
|
}
|
|
|
|
} while (!feof(f));
|
|
|
|
|
|
|
|
fclose(f);
|
|
|
|
mmap_unlock();
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
2015-08-11 10:59:50 +02:00
|
|
|
/* If alloc=1:
|
2016-10-27 17:10:03 +02:00
|
|
|
* Called with tb_lock held for system emulation.
|
2015-08-11 10:59:50 +02:00
|
|
|
* Called with mmap_lock held for user-mode emulation.
|
|
|
|
*/
|
2012-12-02 17:04:43 +01:00
|
|
|
static PageDesc *page_find_alloc(tb_page_addr_t index, int alloc)
|
|
|
|
{
|
|
|
|
PageDesc *pd;
|
|
|
|
void **lp;
|
|
|
|
int i;
|
|
|
|
|
2016-10-27 17:10:05 +02:00
|
|
|
if (alloc) {
|
|
|
|
assert_memory_lock();
|
|
|
|
}
|
|
|
|
|
2012-12-02 17:04:43 +01:00
|
|
|
/* Level 1. Always allocated. */
|
2016-10-24 17:26:49 +02:00
|
|
|
lp = l1_map + ((index >> v_l1_shift) & (v_l1_size - 1));
|
2012-12-02 17:04:43 +01:00
|
|
|
|
|
|
|
/* Level 2..N-1. */
|
2016-10-24 17:26:49 +02:00
|
|
|
for (i = v_l2_levels; i > 0; i--) {
|
2015-08-12 09:41:40 +02:00
|
|
|
void **p = atomic_rcu_read(lp);
|
2012-12-02 17:04:43 +01:00
|
|
|
|
|
|
|
if (p == NULL) {
|
|
|
|
if (!alloc) {
|
|
|
|
return NULL;
|
|
|
|
}
|
2015-04-09 22:07:33 +02:00
|
|
|
p = g_new0(void *, V_L2_SIZE);
|
2015-08-12 09:41:40 +02:00
|
|
|
atomic_rcu_set(lp, p);
|
2012-12-02 17:04:43 +01:00
|
|
|
}
|
|
|
|
|
2013-11-07 17:14:36 +01:00
|
|
|
lp = p + ((index >> (i * V_L2_BITS)) & (V_L2_SIZE - 1));
|
2012-12-02 17:04:43 +01:00
|
|
|
}
|
|
|
|
|
2015-08-12 09:41:40 +02:00
|
|
|
pd = atomic_rcu_read(lp);
|
2012-12-02 17:04:43 +01:00
|
|
|
if (pd == NULL) {
|
|
|
|
if (!alloc) {
|
|
|
|
return NULL;
|
|
|
|
}
|
2015-04-09 22:07:33 +02:00
|
|
|
pd = g_new0(PageDesc, V_L2_SIZE);
|
2015-08-12 09:41:40 +02:00
|
|
|
atomic_rcu_set(lp, pd);
|
2012-12-02 17:04:43 +01:00
|
|
|
}
|
|
|
|
|
2013-11-07 17:14:36 +01:00
|
|
|
return pd + (index & (V_L2_SIZE - 1));
|
2012-12-02 17:04:43 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
static inline PageDesc *page_find(tb_page_addr_t index)
|
|
|
|
{
|
|
|
|
return page_find_alloc(index, 0);
|
|
|
|
}
|
|
|
|
|
|
|
|
#if defined(CONFIG_USER_ONLY)
|
|
|
|
/* Currently it is not recommended to allocate big chunks of data in
|
|
|
|
user mode. It will change when a dedicated libc will be used. */
|
|
|
|
/* ??? 64-bit hosts ought to have no problem mmaping data outside the
|
|
|
|
region in which the guest needs to run. Revisit this. */
|
|
|
|
#define USE_STATIC_CODE_GEN_BUFFER
|
|
|
|
#endif
|
|
|
|
|
|
|
|
/* Minimum size of the code gen buffer. This number is randomly chosen,
|
|
|
|
but not so small that we can't have a fair number of TB's live. */
|
|
|
|
#define MIN_CODE_GEN_BUFFER_SIZE (1024u * 1024)
|
|
|
|
|
|
|
|
/* Maximum size of the code gen buffer we'd like to use. Unless otherwise
|
|
|
|
indicated, this is constrained by the range of direct branches on the
|
|
|
|
host cpu, as used by the TCG implementation of goto_tb. */
|
|
|
|
#if defined(__x86_64__)
|
|
|
|
# define MAX_CODE_GEN_BUFFER_SIZE (2ul * 1024 * 1024 * 1024)
|
|
|
|
#elif defined(__sparc__)
|
|
|
|
# define MAX_CODE_GEN_BUFFER_SIZE (2ul * 1024 * 1024 * 1024)
|
2015-10-03 00:25:28 +02:00
|
|
|
#elif defined(__powerpc64__)
|
|
|
|
# define MAX_CODE_GEN_BUFFER_SIZE (2ul * 1024 * 1024 * 1024)
|
2016-04-22 18:08:46 +02:00
|
|
|
#elif defined(__powerpc__)
|
|
|
|
# define MAX_CODE_GEN_BUFFER_SIZE (32u * 1024 * 1024)
|
2013-06-12 17:20:22 +02:00
|
|
|
#elif defined(__aarch64__)
|
2017-06-30 16:36:13 +02:00
|
|
|
# define MAX_CODE_GEN_BUFFER_SIZE (2ul * 1024 * 1024 * 1024)
|
2012-12-02 17:04:43 +01:00
|
|
|
#elif defined(__s390x__)
|
|
|
|
/* We have a +- 4GB range on the branches; leave some slop. */
|
|
|
|
# define MAX_CODE_GEN_BUFFER_SIZE (3ul * 1024 * 1024 * 1024)
|
2014-04-24 17:25:03 +02:00
|
|
|
#elif defined(__mips__)
|
|
|
|
/* We have a 256MB branch region, but leave room to make sure the
|
|
|
|
main executable is also within that region. */
|
|
|
|
# define MAX_CODE_GEN_BUFFER_SIZE (128ul * 1024 * 1024)
|
2012-12-02 17:04:43 +01:00
|
|
|
#else
|
|
|
|
# define MAX_CODE_GEN_BUFFER_SIZE ((size_t)-1)
|
|
|
|
#endif
|
|
|
|
|
|
|
|
#define DEFAULT_CODE_GEN_BUFFER_SIZE_1 (32u * 1024 * 1024)
|
|
|
|
|
|
|
|
#define DEFAULT_CODE_GEN_BUFFER_SIZE \
|
|
|
|
(DEFAULT_CODE_GEN_BUFFER_SIZE_1 < MAX_CODE_GEN_BUFFER_SIZE \
|
|
|
|
? DEFAULT_CODE_GEN_BUFFER_SIZE_1 : MAX_CODE_GEN_BUFFER_SIZE)
|
|
|
|
|
|
|
|
static inline size_t size_code_gen_buffer(size_t tb_size)
|
|
|
|
{
|
|
|
|
/* Size the buffer. */
|
|
|
|
if (tb_size == 0) {
|
|
|
|
#ifdef USE_STATIC_CODE_GEN_BUFFER
|
|
|
|
tb_size = DEFAULT_CODE_GEN_BUFFER_SIZE;
|
|
|
|
#else
|
|
|
|
/* ??? Needs adjustments. */
|
|
|
|
/* ??? If we relax the requirement that CONFIG_USER_ONLY use the
|
|
|
|
static buffer, we could size this on RESERVED_VA, on the text
|
|
|
|
segment size of the executable, or continue to use the default. */
|
|
|
|
tb_size = (unsigned long)(ram_size / 4);
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
if (tb_size < MIN_CODE_GEN_BUFFER_SIZE) {
|
|
|
|
tb_size = MIN_CODE_GEN_BUFFER_SIZE;
|
|
|
|
}
|
|
|
|
if (tb_size > MAX_CODE_GEN_BUFFER_SIZE) {
|
|
|
|
tb_size = MAX_CODE_GEN_BUFFER_SIZE;
|
|
|
|
}
|
|
|
|
return tb_size;
|
|
|
|
}
|
|
|
|
|
2014-04-24 18:16:07 +02:00
|
|
|
#ifdef __mips__
|
|
|
|
/* In order to use J and JAL within the code_gen_buffer, we require
|
|
|
|
that the buffer not cross a 256MB boundary. */
|
|
|
|
static inline bool cross_256mb(void *addr, size_t size)
|
|
|
|
{
|
2016-04-25 00:55:29 +02:00
|
|
|
return ((uintptr_t)addr ^ ((uintptr_t)addr + size)) & ~0x0ffffffful;
|
2014-04-24 18:16:07 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
/* We weren't able to allocate a buffer without crossing that boundary,
|
|
|
|
so make do with the larger portion of the buffer that doesn't cross.
|
|
|
|
Returns the new base of the buffer, and adjusts code_gen_buffer_size. */
|
|
|
|
static inline void *split_cross_256mb(void *buf1, size_t size1)
|
|
|
|
{
|
2016-04-25 00:55:29 +02:00
|
|
|
void *buf2 = (void *)(((uintptr_t)buf1 + size1) & ~0x0ffffffful);
|
2014-04-24 18:16:07 +02:00
|
|
|
size_t size2 = buf1 + size1 - buf2;
|
|
|
|
|
|
|
|
size1 = buf2 - buf1;
|
|
|
|
if (size1 < size2) {
|
|
|
|
size1 = size2;
|
|
|
|
buf1 = buf2;
|
|
|
|
}
|
|
|
|
|
|
|
|
tcg_ctx.code_gen_buffer_size = size1;
|
|
|
|
return buf1;
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
2012-12-02 17:04:43 +01:00
|
|
|
#ifdef USE_STATIC_CODE_GEN_BUFFER
|
|
|
|
static uint8_t static_code_gen_buffer[DEFAULT_CODE_GEN_BUFFER_SIZE]
|
|
|
|
__attribute__((aligned(CODE_GEN_ALIGN)));
|
|
|
|
|
2015-09-19 21:03:15 +02:00
|
|
|
# ifdef _WIN32
|
|
|
|
static inline void do_protect(void *addr, long size, int prot)
|
|
|
|
{
|
|
|
|
DWORD old_protect;
|
|
|
|
VirtualProtect(addr, size, prot, &old_protect);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline void map_exec(void *addr, long size)
|
|
|
|
{
|
|
|
|
do_protect(addr, size, PAGE_EXECUTE_READWRITE);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline void map_none(void *addr, long size)
|
|
|
|
{
|
|
|
|
do_protect(addr, size, PAGE_NOACCESS);
|
|
|
|
}
|
|
|
|
# else
|
|
|
|
static inline void do_protect(void *addr, long size, int prot)
|
|
|
|
{
|
|
|
|
uintptr_t start, end;
|
|
|
|
|
|
|
|
start = (uintptr_t)addr;
|
|
|
|
start &= qemu_real_host_page_mask;
|
|
|
|
|
|
|
|
end = (uintptr_t)addr + size;
|
|
|
|
end = ROUND_UP(end, qemu_real_host_page_size);
|
|
|
|
|
|
|
|
mprotect((void *)start, end - start, prot);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline void map_exec(void *addr, long size)
|
|
|
|
{
|
|
|
|
do_protect(addr, size, PROT_READ | PROT_WRITE | PROT_EXEC);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline void map_none(void *addr, long size)
|
|
|
|
{
|
|
|
|
do_protect(addr, size, PROT_NONE);
|
|
|
|
}
|
|
|
|
# endif /* WIN32 */
|
|
|
|
|
2012-12-02 17:04:43 +01:00
|
|
|
static inline void *alloc_code_gen_buffer(void)
|
|
|
|
{
|
2014-04-24 18:16:07 +02:00
|
|
|
void *buf = static_code_gen_buffer;
|
2015-09-19 21:03:15 +02:00
|
|
|
size_t full_size, size;
|
|
|
|
|
|
|
|
/* The size of the buffer, rounded down to end on a page boundary. */
|
|
|
|
full_size = (((uintptr_t)buf + sizeof(static_code_gen_buffer))
|
|
|
|
& qemu_real_host_page_mask) - (uintptr_t)buf;
|
|
|
|
|
|
|
|
/* Reserve a guard page. */
|
|
|
|
size = full_size - qemu_real_host_page_size;
|
|
|
|
|
|
|
|
/* Honor a command-line option limiting the size of the buffer. */
|
|
|
|
if (size > tcg_ctx.code_gen_buffer_size) {
|
|
|
|
size = (((uintptr_t)buf + tcg_ctx.code_gen_buffer_size)
|
|
|
|
& qemu_real_host_page_mask) - (uintptr_t)buf;
|
|
|
|
}
|
|
|
|
tcg_ctx.code_gen_buffer_size = size;
|
|
|
|
|
2014-04-24 18:16:07 +02:00
|
|
|
#ifdef __mips__
|
2015-09-19 21:03:15 +02:00
|
|
|
if (cross_256mb(buf, size)) {
|
|
|
|
buf = split_cross_256mb(buf, size);
|
|
|
|
size = tcg_ctx.code_gen_buffer_size;
|
2014-04-24 18:16:07 +02:00
|
|
|
}
|
|
|
|
#endif
|
2015-09-19 21:03:15 +02:00
|
|
|
|
|
|
|
map_exec(buf, size);
|
|
|
|
map_none(buf + size, qemu_real_host_page_size);
|
|
|
|
qemu_madvise(buf, size, QEMU_MADV_HUGEPAGE);
|
|
|
|
|
2014-04-24 18:16:07 +02:00
|
|
|
return buf;
|
2012-12-02 17:04:43 +01:00
|
|
|
}
|
2015-09-19 21:03:15 +02:00
|
|
|
#elif defined(_WIN32)
|
|
|
|
static inline void *alloc_code_gen_buffer(void)
|
|
|
|
{
|
|
|
|
size_t size = tcg_ctx.code_gen_buffer_size;
|
|
|
|
void *buf1, *buf2;
|
|
|
|
|
|
|
|
/* Perform the allocation in two steps, so that the guard page
|
|
|
|
is reserved but uncommitted. */
|
|
|
|
buf1 = VirtualAlloc(NULL, size + qemu_real_host_page_size,
|
|
|
|
MEM_RESERVE, PAGE_NOACCESS);
|
|
|
|
if (buf1 != NULL) {
|
|
|
|
buf2 = VirtualAlloc(buf1, size, MEM_COMMIT, PAGE_EXECUTE_READWRITE);
|
|
|
|
assert(buf1 == buf2);
|
|
|
|
}
|
|
|
|
|
|
|
|
return buf1;
|
|
|
|
}
|
|
|
|
#else
|
2012-12-02 17:04:43 +01:00
|
|
|
static inline void *alloc_code_gen_buffer(void)
|
|
|
|
{
|
|
|
|
int flags = MAP_PRIVATE | MAP_ANONYMOUS;
|
|
|
|
uintptr_t start = 0;
|
2015-09-19 21:03:15 +02:00
|
|
|
size_t size = tcg_ctx.code_gen_buffer_size;
|
2012-12-02 17:04:43 +01:00
|
|
|
void *buf;
|
|
|
|
|
|
|
|
/* Constrain the position of the buffer based on the host cpu.
|
|
|
|
Note that these addresses are chosen in concert with the
|
|
|
|
addresses assigned in the relevant linker script file. */
|
|
|
|
# if defined(__PIE__) || defined(__PIC__)
|
|
|
|
/* Don't bother setting a preferred location if we're building
|
|
|
|
a position-independent executable. We're more likely to get
|
|
|
|
an address near the main executable if we let the kernel
|
|
|
|
choose the address. */
|
|
|
|
# elif defined(__x86_64__) && defined(MAP_32BIT)
|
|
|
|
/* Force the memory down into low memory with the executable.
|
|
|
|
Leave the choice of exact location with the kernel. */
|
|
|
|
flags |= MAP_32BIT;
|
|
|
|
/* Cannot expect to map more than 800MB in low memory. */
|
2015-09-19 21:03:15 +02:00
|
|
|
if (size > 800u * 1024 * 1024) {
|
|
|
|
tcg_ctx.code_gen_buffer_size = size = 800u * 1024 * 1024;
|
2012-12-02 17:04:43 +01:00
|
|
|
}
|
|
|
|
# elif defined(__sparc__)
|
|
|
|
start = 0x40000000ul;
|
|
|
|
# elif defined(__s390x__)
|
|
|
|
start = 0x90000000ul;
|
2014-04-24 17:25:03 +02:00
|
|
|
# elif defined(__mips__)
|
2015-09-19 21:03:15 +02:00
|
|
|
# if _MIPS_SIM == _ABI64
|
2014-04-24 17:25:03 +02:00
|
|
|
start = 0x128000000ul;
|
|
|
|
# else
|
|
|
|
start = 0x08000000ul;
|
|
|
|
# endif
|
2012-12-02 17:04:43 +01:00
|
|
|
# endif
|
|
|
|
|
2015-09-19 21:03:15 +02:00
|
|
|
buf = mmap((void *)start, size + qemu_real_host_page_size,
|
|
|
|
PROT_NONE, flags, -1, 0);
|
2014-04-24 18:16:07 +02:00
|
|
|
if (buf == MAP_FAILED) {
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
#ifdef __mips__
|
2015-09-19 21:03:15 +02:00
|
|
|
if (cross_256mb(buf, size)) {
|
2014-06-13 20:42:57 +02:00
|
|
|
/* Try again, with the original still mapped, to avoid re-acquiring
|
2014-04-24 18:16:07 +02:00
|
|
|
that 256mb crossing. This time don't specify an address. */
|
2015-09-19 21:03:15 +02:00
|
|
|
size_t size2;
|
|
|
|
void *buf2 = mmap(NULL, size + qemu_real_host_page_size,
|
|
|
|
PROT_NONE, flags, -1, 0);
|
2017-01-08 18:48:34 +01:00
|
|
|
switch ((int)(buf2 != MAP_FAILED)) {
|
2015-09-19 21:03:15 +02:00
|
|
|
case 1:
|
|
|
|
if (!cross_256mb(buf2, size)) {
|
2014-04-24 18:16:07 +02:00
|
|
|
/* Success! Use the new buffer. */
|
2016-04-22 02:01:54 +02:00
|
|
|
munmap(buf, size + qemu_real_host_page_size);
|
2015-09-19 21:03:15 +02:00
|
|
|
break;
|
2014-04-24 18:16:07 +02:00
|
|
|
}
|
|
|
|
/* Failure. Work with what we had. */
|
2016-04-22 02:01:54 +02:00
|
|
|
munmap(buf2, size + qemu_real_host_page_size);
|
2015-09-19 21:03:15 +02:00
|
|
|
/* fallthru */
|
|
|
|
default:
|
|
|
|
/* Split the original buffer. Free the smaller half. */
|
|
|
|
buf2 = split_cross_256mb(buf, size);
|
|
|
|
size2 = tcg_ctx.code_gen_buffer_size;
|
|
|
|
if (buf == buf2) {
|
|
|
|
munmap(buf + size2 + qemu_real_host_page_size, size - size2);
|
|
|
|
} else {
|
|
|
|
munmap(buf, size - size2);
|
|
|
|
}
|
|
|
|
size = size2;
|
|
|
|
break;
|
2014-04-24 18:16:07 +02:00
|
|
|
}
|
2015-09-19 21:03:15 +02:00
|
|
|
buf = buf2;
|
2014-04-24 18:16:07 +02:00
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
2015-09-19 21:03:15 +02:00
|
|
|
/* Make the final buffer accessible. The guard page at the end
|
|
|
|
will remain inaccessible with PROT_NONE. */
|
|
|
|
mprotect(buf, size, PROT_WRITE | PROT_READ | PROT_EXEC);
|
2014-04-24 18:16:07 +02:00
|
|
|
|
2015-09-19 21:03:15 +02:00
|
|
|
/* Request large pages for the buffer. */
|
|
|
|
qemu_madvise(buf, size, QEMU_MADV_HUGEPAGE);
|
2014-04-24 18:16:07 +02:00
|
|
|
|
2012-12-02 17:04:43 +01:00
|
|
|
return buf;
|
|
|
|
}
|
2015-09-19 21:03:15 +02:00
|
|
|
#endif /* USE_STATIC_CODE_GEN_BUFFER, WIN32, POSIX */
|
2012-12-02 17:04:43 +01:00
|
|
|
|
|
|
|
static inline void code_gen_alloc(size_t tb_size)
|
|
|
|
{
|
2013-01-31 19:47:22 +01:00
|
|
|
tcg_ctx.code_gen_buffer_size = size_code_gen_buffer(tb_size);
|
|
|
|
tcg_ctx.code_gen_buffer = alloc_code_gen_buffer();
|
|
|
|
if (tcg_ctx.code_gen_buffer == NULL) {
|
2012-12-02 17:04:43 +01:00
|
|
|
fprintf(stderr, "Could not allocate dynamic translator buffer\n");
|
|
|
|
exit(1);
|
|
|
|
}
|
|
|
|
|
2017-06-07 01:12:25 +02:00
|
|
|
/* size this conservatively -- realloc later if needed */
|
|
|
|
tcg_ctx.tb_ctx.tbs_size =
|
|
|
|
tcg_ctx.code_gen_buffer_size / CODE_GEN_AVG_BLOCK_SIZE / 8;
|
|
|
|
if (unlikely(!tcg_ctx.tb_ctx.tbs_size)) {
|
|
|
|
tcg_ctx.tb_ctx.tbs_size = 64 * 1024;
|
|
|
|
}
|
|
|
|
tcg_ctx.tb_ctx.tbs = g_new(TranslationBlock *, tcg_ctx.tb_ctx.tbs_size);
|
2015-09-19 08:43:05 +02:00
|
|
|
|
2015-08-10 17:27:02 +02:00
|
|
|
qemu_mutex_init(&tcg_ctx.tb_ctx.tb_lock);
|
2012-12-02 17:04:43 +01:00
|
|
|
}
|
|
|
|
|
tb hash: track translated blocks with qht
Having a fixed-size hash table for keeping track of all translation blocks
is suboptimal: some workloads are just too big or too small to get maximum
performance from the hash table. The MRU promotion policy helps improve
performance when the hash table is a little undersized, but it cannot
make up for severely undersized hash tables.
Furthermore, frequent MRU promotions result in writes that are a scalability
bottleneck. For scalability, lookups should only perform reads, not writes.
This is not a big deal for now, but it will become one once MTTCG matures.
The appended fixes these issues by using qht as the implementation of
the TB hash table. This solution is superior to other alternatives considered,
namely:
- master: implementation in QEMU before this patchset
- xxhash: before this patch, i.e. fixed buckets + xxhash hashing + MRU.
- xxhash-rcu: fixed buckets + xxhash + RCU list + MRU.
MRU is implemented here by adding an intermediate struct
that contains the u32 hash and a pointer to the TB; this
allows us, on an MRU promotion, to copy said struct (that is not
at the head), and put this new copy at the head. After a grace
period, the original non-head struct can be eliminated, and
after another grace period, freed.
- qht-fixed-nomru: fixed buckets + xxhash + qht without auto-resize +
no MRU for lookups; MRU for inserts.
The appended solution is the following:
- qht-dyn-nomru: dynamic number of buckets + xxhash + qht w/ auto-resize +
no MRU for lookups; MRU for inserts.
The plots below compare the considered solutions. The Y axis shows the
boot time (in seconds) of a debian jessie image with arm-softmmu; the X axis
sweeps the number of buckets (or initial number of buckets for qht-autoresize).
The plots in PNG format (and with errorbars) can be seen here:
http://imgur.com/a/Awgnq
Each test runs 5 times, and the entire QEMU process is pinned to a
single core for repeatability of results.
Host: Intel Xeon E5-2690
28 ++------------+-------------+-------------+-------------+------------++
A***** + + + master **A*** +
27 ++ * xxhash ##B###++
| A******A****** xxhash-rcu $$C$$$ |
26 C$$ A******A****** qht-fixed-nomru*%%D%%%++
D%%$$ A******A******A*qht-dyn-mru A*E****A
25 ++ %%$$ qht-dyn-nomru &&F&&&++
B#####% |
24 ++ #C$$$$$ ++
| B### $ |
| ## C$$$$$$ |
23 ++ # C$$$$$$ ++
| B###### C$$$$$$ %%%D
22 ++ %B###### C$$$$$$C$$$$$$C$$$$$$C$$$$$$C$$$$$$C
| D%%%%%%B###### @E@@@@@@ %%%D%%%@@@E@@@@@@E
21 E@@@@@@E@@@@@@F&&&@@@E@@@&&&D%%%%%%B######B######B######B######B######B
+ E@@@ F&&& + E@ + F&&& + +
20 ++------------+-------------+-------------+-------------+------------++
14 16 18 20 22 24
log2 number of buckets
Host: Intel i7-4790K
14.5 ++------------+------------+-------------+------------+------------++
A** + + + master **A*** +
14 ++ ** xxhash ##B###++
13.5 ++ ** xxhash-rcu $$C$$$++
| qht-fixed-nomru %%D%%% |
13 ++ A****** qht-dyn-mru @@E@@@++
| A*****A******A****** qht-dyn-nomru &&F&&& |
12.5 C$$ A******A******A*****A****** ***A
12 ++ $$ A*** ++
D%%% $$ |
11.5 ++ %% ++
B### %C$$$$$$ |
11 ++ ## D%%%%% C$$$$$ ++
| # % C$$$$$$ |
10.5 F&&&&&&B######D%%%%% C$$$$$$C$$$$$$C$$$$$$C$$$$$C$$$$$$ $$$C
10 E@@@@@@E@@@@@@B#####B######B######E@@@@@@E@@@%%%D%%%%%D%%%###B######B
+ F&& D%%%%%%B######B######B#####B###@@@D%%% +
9.5 ++------------+------------+-------------+------------+------------++
14 16 18 20 22 24
log2 number of buckets
Note that the original point before this patch series is X=15 for "master";
the little sensitivity to the increased number of buckets is due to the
poor hashing function in master.
xxhash-rcu has significant overhead due to the constant churn of allocating
and deallocating intermediate structs for implementing MRU. An alternative
would be do consider failed lookups as "maybe not there", and then
acquire the external lock (tb_lock in this case) to really confirm that
there was indeed a failed lookup. This, however, would not be enough
to implement dynamic resizing--this is more complex: see
"Resizable, Scalable, Concurrent Hash Tables via Relativistic
Programming" by Triplett, McKenney and Walpole. This solution was
discarded due to the very coarse RCU read critical sections that we have
in MTTCG; resizing requires waiting for readers after every pointer update,
and resizes require many pointer updates, so this would quickly become
prohibitive.
qht-fixed-nomru shows that MRU promotion is advisable for undersized
hash tables.
However, qht-dyn-mru shows that MRU promotion is not important if the
hash table is properly sized: there is virtually no difference in
performance between qht-dyn-nomru and qht-dyn-mru.
Before this patch, we're at X=15 on "xxhash"; after this patch, we're at
X=15 @ qht-dyn-nomru. This patch thus matches the best performance that we
can achieve with optimum sizing of the hash table, while keeping the hash
table scalable for readers.
The improvement we get before and after this patch for booting debian jessie
with arm-softmmu is:
- Intel Xeon E5-2690: 10.5% less time
- Intel i7-4790K: 5.2% less time
We could get this same improvement _for this particular workload_ by
statically increasing the size of the hash table. But this would hurt
workloads that do not need a large hash table. The dynamic (upward)
resizing allows us to start small and enlarge the hash table as needed.
A quick note on downsizing: the table is resized back to 2**15 buckets
on every tb_flush; this makes sense because it is not guaranteed that the
table will reach the same number of TBs later on (e.g. most bootup code is
thrown away after boot); it makes sense to grow the hash table as
more code blocks are translated. This also avoids the complication of
having to build downsizing hysteresis logic into qht.
Reviewed-by: Sergey Fedorov <serge.fedorov@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Emilio G. Cota <cota@braap.org>
Message-Id: <1465412133-3029-15-git-send-email-cota@braap.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
2016-06-08 20:55:32 +02:00
|
|
|
static void tb_htable_init(void)
|
|
|
|
{
|
|
|
|
unsigned int mode = QHT_MODE_AUTO_RESIZE;
|
|
|
|
|
|
|
|
qht_init(&tcg_ctx.tb_ctx.htable, CODE_GEN_HTABLE_SIZE, mode);
|
|
|
|
}
|
|
|
|
|
2012-12-02 17:04:43 +01:00
|
|
|
/* Must be called before using the QEMU cpus. 'tb_size' is the size
|
|
|
|
(in bytes) allocated to the translation buffer. Zero means default
|
|
|
|
size. */
|
|
|
|
void tcg_exec_init(unsigned long tb_size)
|
|
|
|
{
|
2017-07-03 12:12:12 +02:00
|
|
|
tcg_allowed = true;
|
2012-12-02 17:04:43 +01:00
|
|
|
cpu_gen_init();
|
|
|
|
page_init();
|
tb hash: track translated blocks with qht
Having a fixed-size hash table for keeping track of all translation blocks
is suboptimal: some workloads are just too big or too small to get maximum
performance from the hash table. The MRU promotion policy helps improve
performance when the hash table is a little undersized, but it cannot
make up for severely undersized hash tables.
Furthermore, frequent MRU promotions result in writes that are a scalability
bottleneck. For scalability, lookups should only perform reads, not writes.
This is not a big deal for now, but it will become one once MTTCG matures.
The appended fixes these issues by using qht as the implementation of
the TB hash table. This solution is superior to other alternatives considered,
namely:
- master: implementation in QEMU before this patchset
- xxhash: before this patch, i.e. fixed buckets + xxhash hashing + MRU.
- xxhash-rcu: fixed buckets + xxhash + RCU list + MRU.
MRU is implemented here by adding an intermediate struct
that contains the u32 hash and a pointer to the TB; this
allows us, on an MRU promotion, to copy said struct (that is not
at the head), and put this new copy at the head. After a grace
period, the original non-head struct can be eliminated, and
after another grace period, freed.
- qht-fixed-nomru: fixed buckets + xxhash + qht without auto-resize +
no MRU for lookups; MRU for inserts.
The appended solution is the following:
- qht-dyn-nomru: dynamic number of buckets + xxhash + qht w/ auto-resize +
no MRU for lookups; MRU for inserts.
The plots below compare the considered solutions. The Y axis shows the
boot time (in seconds) of a debian jessie image with arm-softmmu; the X axis
sweeps the number of buckets (or initial number of buckets for qht-autoresize).
The plots in PNG format (and with errorbars) can be seen here:
http://imgur.com/a/Awgnq
Each test runs 5 times, and the entire QEMU process is pinned to a
single core for repeatability of results.
Host: Intel Xeon E5-2690
28 ++------------+-------------+-------------+-------------+------------++
A***** + + + master **A*** +
27 ++ * xxhash ##B###++
| A******A****** xxhash-rcu $$C$$$ |
26 C$$ A******A****** qht-fixed-nomru*%%D%%%++
D%%$$ A******A******A*qht-dyn-mru A*E****A
25 ++ %%$$ qht-dyn-nomru &&F&&&++
B#####% |
24 ++ #C$$$$$ ++
| B### $ |
| ## C$$$$$$ |
23 ++ # C$$$$$$ ++
| B###### C$$$$$$ %%%D
22 ++ %B###### C$$$$$$C$$$$$$C$$$$$$C$$$$$$C$$$$$$C
| D%%%%%%B###### @E@@@@@@ %%%D%%%@@@E@@@@@@E
21 E@@@@@@E@@@@@@F&&&@@@E@@@&&&D%%%%%%B######B######B######B######B######B
+ E@@@ F&&& + E@ + F&&& + +
20 ++------------+-------------+-------------+-------------+------------++
14 16 18 20 22 24
log2 number of buckets
Host: Intel i7-4790K
14.5 ++------------+------------+-------------+------------+------------++
A** + + + master **A*** +
14 ++ ** xxhash ##B###++
13.5 ++ ** xxhash-rcu $$C$$$++
| qht-fixed-nomru %%D%%% |
13 ++ A****** qht-dyn-mru @@E@@@++
| A*****A******A****** qht-dyn-nomru &&F&&& |
12.5 C$$ A******A******A*****A****** ***A
12 ++ $$ A*** ++
D%%% $$ |
11.5 ++ %% ++
B### %C$$$$$$ |
11 ++ ## D%%%%% C$$$$$ ++
| # % C$$$$$$ |
10.5 F&&&&&&B######D%%%%% C$$$$$$C$$$$$$C$$$$$$C$$$$$C$$$$$$ $$$C
10 E@@@@@@E@@@@@@B#####B######B######E@@@@@@E@@@%%%D%%%%%D%%%###B######B
+ F&& D%%%%%%B######B######B#####B###@@@D%%% +
9.5 ++------------+------------+-------------+------------+------------++
14 16 18 20 22 24
log2 number of buckets
Note that the original point before this patch series is X=15 for "master";
the little sensitivity to the increased number of buckets is due to the
poor hashing function in master.
xxhash-rcu has significant overhead due to the constant churn of allocating
and deallocating intermediate structs for implementing MRU. An alternative
would be do consider failed lookups as "maybe not there", and then
acquire the external lock (tb_lock in this case) to really confirm that
there was indeed a failed lookup. This, however, would not be enough
to implement dynamic resizing--this is more complex: see
"Resizable, Scalable, Concurrent Hash Tables via Relativistic
Programming" by Triplett, McKenney and Walpole. This solution was
discarded due to the very coarse RCU read critical sections that we have
in MTTCG; resizing requires waiting for readers after every pointer update,
and resizes require many pointer updates, so this would quickly become
prohibitive.
qht-fixed-nomru shows that MRU promotion is advisable for undersized
hash tables.
However, qht-dyn-mru shows that MRU promotion is not important if the
hash table is properly sized: there is virtually no difference in
performance between qht-dyn-nomru and qht-dyn-mru.
Before this patch, we're at X=15 on "xxhash"; after this patch, we're at
X=15 @ qht-dyn-nomru. This patch thus matches the best performance that we
can achieve with optimum sizing of the hash table, while keeping the hash
table scalable for readers.
The improvement we get before and after this patch for booting debian jessie
with arm-softmmu is:
- Intel Xeon E5-2690: 10.5% less time
- Intel i7-4790K: 5.2% less time
We could get this same improvement _for this particular workload_ by
statically increasing the size of the hash table. But this would hurt
workloads that do not need a large hash table. The dynamic (upward)
resizing allows us to start small and enlarge the hash table as needed.
A quick note on downsizing: the table is resized back to 2**15 buckets
on every tb_flush; this makes sense because it is not guaranteed that the
table will reach the same number of TBs later on (e.g. most bootup code is
thrown away after boot); it makes sense to grow the hash table as
more code blocks are translated. This also avoids the complication of
having to build downsizing hysteresis logic into qht.
Reviewed-by: Sergey Fedorov <serge.fedorov@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Emilio G. Cota <cota@braap.org>
Message-Id: <1465412133-3029-15-git-send-email-cota@braap.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
2016-06-08 20:55:32 +02:00
|
|
|
tb_htable_init();
|
2015-09-19 21:03:15 +02:00
|
|
|
code_gen_alloc(tb_size);
|
2015-08-24 01:42:07 +02:00
|
|
|
#if defined(CONFIG_SOFTMMU)
|
2012-12-02 17:04:43 +01:00
|
|
|
/* There's no guest base to take into account, so go ahead and
|
|
|
|
initialize the prologue now. */
|
|
|
|
tcg_prologue_init(&tcg_ctx);
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
2016-10-27 17:10:03 +02:00
|
|
|
/*
|
|
|
|
* Allocate a new translation block. Flush the translation buffer if
|
|
|
|
* too many translation blocks or too much generated code.
|
|
|
|
*
|
|
|
|
* Called with tb_lock held.
|
|
|
|
*/
|
2012-12-02 17:04:43 +01:00
|
|
|
static TranslationBlock *tb_alloc(target_ulong pc)
|
|
|
|
{
|
|
|
|
TranslationBlock *tb;
|
2017-06-07 01:12:25 +02:00
|
|
|
TBContext *ctx;
|
2012-12-02 17:04:43 +01:00
|
|
|
|
2017-02-23 19:29:05 +01:00
|
|
|
assert_tb_locked();
|
2016-10-27 17:10:05 +02:00
|
|
|
|
2017-06-07 01:12:25 +02:00
|
|
|
tb = tcg_tb_alloc(&tcg_ctx);
|
|
|
|
if (unlikely(tb == NULL)) {
|
2012-12-02 17:04:43 +01:00
|
|
|
return NULL;
|
|
|
|
}
|
2017-06-07 01:12:25 +02:00
|
|
|
ctx = &tcg_ctx.tb_ctx;
|
|
|
|
if (unlikely(ctx->nb_tbs == ctx->tbs_size)) {
|
|
|
|
ctx->tbs_size *= 2;
|
|
|
|
ctx->tbs = g_renew(TranslationBlock *, ctx->tbs, ctx->tbs_size);
|
|
|
|
}
|
|
|
|
ctx->tbs[ctx->nb_tbs++] = tb;
|
2012-12-02 17:04:43 +01:00
|
|
|
return tb;
|
|
|
|
}
|
|
|
|
|
2016-10-27 17:10:03 +02:00
|
|
|
/* Called with tb_lock held. */
|
2012-12-02 17:04:43 +01:00
|
|
|
void tb_free(TranslationBlock *tb)
|
|
|
|
{
|
2017-02-23 19:29:05 +01:00
|
|
|
assert_tb_locked();
|
2016-10-27 17:10:05 +02:00
|
|
|
|
2012-12-02 17:04:43 +01:00
|
|
|
/* In practice this is mostly used for single use temporary TB
|
|
|
|
Ignore the hard cases and just back up if this TB happens to
|
|
|
|
be the last one generated. */
|
2013-01-31 19:47:23 +01:00
|
|
|
if (tcg_ctx.tb_ctx.nb_tbs > 0 &&
|
2017-06-07 01:12:25 +02:00
|
|
|
tb == tcg_ctx.tb_ctx.tbs[tcg_ctx.tb_ctx.nb_tbs - 1]) {
|
|
|
|
size_t struct_size = ROUND_UP(sizeof(*tb), qemu_icache_linesize);
|
|
|
|
|
2017-07-12 06:08:21 +02:00
|
|
|
tcg_ctx.code_gen_ptr = tb->tc.ptr - struct_size;
|
2013-01-31 19:47:23 +01:00
|
|
|
tcg_ctx.tb_ctx.nb_tbs--;
|
2012-12-02 17:04:43 +01:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline void invalidate_page_bitmap(PageDesc *p)
|
|
|
|
{
|
2015-08-11 12:42:55 +02:00
|
|
|
#ifdef CONFIG_SOFTMMU
|
2015-08-26 14:02:53 +02:00
|
|
|
g_free(p->code_bitmap);
|
|
|
|
p->code_bitmap = NULL;
|
2012-12-02 17:04:43 +01:00
|
|
|
p->code_write_count = 0;
|
2015-08-11 12:42:55 +02:00
|
|
|
#endif
|
2012-12-02 17:04:43 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
/* Set to NULL all the 'first_tb' fields in all PageDescs. */
|
|
|
|
static void page_flush_tb_1(int level, void **lp)
|
|
|
|
{
|
|
|
|
int i;
|
|
|
|
|
|
|
|
if (*lp == NULL) {
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
if (level == 0) {
|
|
|
|
PageDesc *pd = *lp;
|
|
|
|
|
2013-11-07 17:14:36 +01:00
|
|
|
for (i = 0; i < V_L2_SIZE; ++i) {
|
2012-12-02 17:04:43 +01:00
|
|
|
pd[i].first_tb = NULL;
|
|
|
|
invalidate_page_bitmap(pd + i);
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
void **pp = *lp;
|
|
|
|
|
2013-11-07 17:14:36 +01:00
|
|
|
for (i = 0; i < V_L2_SIZE; ++i) {
|
2012-12-02 17:04:43 +01:00
|
|
|
page_flush_tb_1(level - 1, pp + i);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static void page_flush_tb(void)
|
|
|
|
{
|
2016-10-24 17:26:49 +02:00
|
|
|
int i, l1_sz = v_l1_size;
|
2012-12-02 17:04:43 +01:00
|
|
|
|
2016-10-24 17:26:49 +02:00
|
|
|
for (i = 0; i < l1_sz; i++) {
|
|
|
|
page_flush_tb_1(v_l2_levels, l1_map + i);
|
2012-12-02 17:04:43 +01:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/* flush all the translation blocks */
|
2016-10-31 10:36:08 +01:00
|
|
|
static void do_tb_flush(CPUState *cpu, run_on_cpu_data tb_flush_count)
|
2012-12-02 17:04:43 +01:00
|
|
|
{
|
2016-08-02 19:27:43 +02:00
|
|
|
tb_lock();
|
|
|
|
|
2016-10-31 10:36:08 +01:00
|
|
|
/* If it is already been done on request of another CPU,
|
2016-08-02 19:27:43 +02:00
|
|
|
* just retry.
|
|
|
|
*/
|
2016-10-31 10:36:08 +01:00
|
|
|
if (tcg_ctx.tb_ctx.tb_flush_count != tb_flush_count.host_int) {
|
2016-08-02 19:27:43 +02:00
|
|
|
goto done;
|
2016-08-25 20:11:26 +02:00
|
|
|
}
|
2016-08-02 19:27:43 +02:00
|
|
|
|
2017-07-12 21:01:07 +02:00
|
|
|
if (DEBUG_TB_FLUSH_GATE) {
|
|
|
|
printf("qemu: flush code_size=%td nb_tbs=%d avg_tb_size=%td\n",
|
|
|
|
tcg_ctx.code_gen_ptr - tcg_ctx.code_gen_buffer,
|
|
|
|
tcg_ctx.tb_ctx.nb_tbs, tcg_ctx.tb_ctx.nb_tbs > 0 ?
|
|
|
|
(tcg_ctx.code_gen_ptr - tcg_ctx.code_gen_buffer) /
|
|
|
|
tcg_ctx.tb_ctx.nb_tbs : 0);
|
|
|
|
}
|
2013-01-31 19:47:22 +01:00
|
|
|
if ((unsigned long)(tcg_ctx.code_gen_ptr - tcg_ctx.code_gen_buffer)
|
|
|
|
> tcg_ctx.code_gen_buffer_size) {
|
2013-09-03 17:38:47 +02:00
|
|
|
cpu_abort(cpu, "Internal error: code buffer overflow\n");
|
2012-12-02 17:04:43 +01:00
|
|
|
}
|
|
|
|
|
2013-06-24 23:50:24 +02:00
|
|
|
CPU_FOREACH(cpu) {
|
2017-06-15 02:36:13 +02:00
|
|
|
cpu_tb_jmp_cache_clear(cpu);
|
2012-12-02 17:04:43 +01:00
|
|
|
}
|
|
|
|
|
2016-07-15 19:58:44 +02:00
|
|
|
tcg_ctx.tb_ctx.nb_tbs = 0;
|
tb hash: track translated blocks with qht
Having a fixed-size hash table for keeping track of all translation blocks
is suboptimal: some workloads are just too big or too small to get maximum
performance from the hash table. The MRU promotion policy helps improve
performance when the hash table is a little undersized, but it cannot
make up for severely undersized hash tables.
Furthermore, frequent MRU promotions result in writes that are a scalability
bottleneck. For scalability, lookups should only perform reads, not writes.
This is not a big deal for now, but it will become one once MTTCG matures.
The appended fixes these issues by using qht as the implementation of
the TB hash table. This solution is superior to other alternatives considered,
namely:
- master: implementation in QEMU before this patchset
- xxhash: before this patch, i.e. fixed buckets + xxhash hashing + MRU.
- xxhash-rcu: fixed buckets + xxhash + RCU list + MRU.
MRU is implemented here by adding an intermediate struct
that contains the u32 hash and a pointer to the TB; this
allows us, on an MRU promotion, to copy said struct (that is not
at the head), and put this new copy at the head. After a grace
period, the original non-head struct can be eliminated, and
after another grace period, freed.
- qht-fixed-nomru: fixed buckets + xxhash + qht without auto-resize +
no MRU for lookups; MRU for inserts.
The appended solution is the following:
- qht-dyn-nomru: dynamic number of buckets + xxhash + qht w/ auto-resize +
no MRU for lookups; MRU for inserts.
The plots below compare the considered solutions. The Y axis shows the
boot time (in seconds) of a debian jessie image with arm-softmmu; the X axis
sweeps the number of buckets (or initial number of buckets for qht-autoresize).
The plots in PNG format (and with errorbars) can be seen here:
http://imgur.com/a/Awgnq
Each test runs 5 times, and the entire QEMU process is pinned to a
single core for repeatability of results.
Host: Intel Xeon E5-2690
28 ++------------+-------------+-------------+-------------+------------++
A***** + + + master **A*** +
27 ++ * xxhash ##B###++
| A******A****** xxhash-rcu $$C$$$ |
26 C$$ A******A****** qht-fixed-nomru*%%D%%%++
D%%$$ A******A******A*qht-dyn-mru A*E****A
25 ++ %%$$ qht-dyn-nomru &&F&&&++
B#####% |
24 ++ #C$$$$$ ++
| B### $ |
| ## C$$$$$$ |
23 ++ # C$$$$$$ ++
| B###### C$$$$$$ %%%D
22 ++ %B###### C$$$$$$C$$$$$$C$$$$$$C$$$$$$C$$$$$$C
| D%%%%%%B###### @E@@@@@@ %%%D%%%@@@E@@@@@@E
21 E@@@@@@E@@@@@@F&&&@@@E@@@&&&D%%%%%%B######B######B######B######B######B
+ E@@@ F&&& + E@ + F&&& + +
20 ++------------+-------------+-------------+-------------+------------++
14 16 18 20 22 24
log2 number of buckets
Host: Intel i7-4790K
14.5 ++------------+------------+-------------+------------+------------++
A** + + + master **A*** +
14 ++ ** xxhash ##B###++
13.5 ++ ** xxhash-rcu $$C$$$++
| qht-fixed-nomru %%D%%% |
13 ++ A****** qht-dyn-mru @@E@@@++
| A*****A******A****** qht-dyn-nomru &&F&&& |
12.5 C$$ A******A******A*****A****** ***A
12 ++ $$ A*** ++
D%%% $$ |
11.5 ++ %% ++
B### %C$$$$$$ |
11 ++ ## D%%%%% C$$$$$ ++
| # % C$$$$$$ |
10.5 F&&&&&&B######D%%%%% C$$$$$$C$$$$$$C$$$$$$C$$$$$C$$$$$$ $$$C
10 E@@@@@@E@@@@@@B#####B######B######E@@@@@@E@@@%%%D%%%%%D%%%###B######B
+ F&& D%%%%%%B######B######B#####B###@@@D%%% +
9.5 ++------------+------------+-------------+------------+------------++
14 16 18 20 22 24
log2 number of buckets
Note that the original point before this patch series is X=15 for "master";
the little sensitivity to the increased number of buckets is due to the
poor hashing function in master.
xxhash-rcu has significant overhead due to the constant churn of allocating
and deallocating intermediate structs for implementing MRU. An alternative
would be do consider failed lookups as "maybe not there", and then
acquire the external lock (tb_lock in this case) to really confirm that
there was indeed a failed lookup. This, however, would not be enough
to implement dynamic resizing--this is more complex: see
"Resizable, Scalable, Concurrent Hash Tables via Relativistic
Programming" by Triplett, McKenney and Walpole. This solution was
discarded due to the very coarse RCU read critical sections that we have
in MTTCG; resizing requires waiting for readers after every pointer update,
and resizes require many pointer updates, so this would quickly become
prohibitive.
qht-fixed-nomru shows that MRU promotion is advisable for undersized
hash tables.
However, qht-dyn-mru shows that MRU promotion is not important if the
hash table is properly sized: there is virtually no difference in
performance between qht-dyn-nomru and qht-dyn-mru.
Before this patch, we're at X=15 on "xxhash"; after this patch, we're at
X=15 @ qht-dyn-nomru. This patch thus matches the best performance that we
can achieve with optimum sizing of the hash table, while keeping the hash
table scalable for readers.
The improvement we get before and after this patch for booting debian jessie
with arm-softmmu is:
- Intel Xeon E5-2690: 10.5% less time
- Intel i7-4790K: 5.2% less time
We could get this same improvement _for this particular workload_ by
statically increasing the size of the hash table. But this would hurt
workloads that do not need a large hash table. The dynamic (upward)
resizing allows us to start small and enlarge the hash table as needed.
A quick note on downsizing: the table is resized back to 2**15 buckets
on every tb_flush; this makes sense because it is not guaranteed that the
table will reach the same number of TBs later on (e.g. most bootup code is
thrown away after boot); it makes sense to grow the hash table as
more code blocks are translated. This also avoids the complication of
having to build downsizing hysteresis logic into qht.
Reviewed-by: Sergey Fedorov <serge.fedorov@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Emilio G. Cota <cota@braap.org>
Message-Id: <1465412133-3029-15-git-send-email-cota@braap.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
2016-06-08 20:55:32 +02:00
|
|
|
qht_reset_size(&tcg_ctx.tb_ctx.htable, CODE_GEN_HTABLE_SIZE);
|
2012-12-02 17:04:43 +01:00
|
|
|
page_flush_tb();
|
|
|
|
|
2013-01-31 19:47:22 +01:00
|
|
|
tcg_ctx.code_gen_ptr = tcg_ctx.code_gen_buffer;
|
2012-12-02 17:04:43 +01:00
|
|
|
/* XXX: flush processor icache at this point if cache flush is
|
|
|
|
expensive */
|
2016-08-02 19:27:43 +02:00
|
|
|
atomic_mb_set(&tcg_ctx.tb_ctx.tb_flush_count,
|
|
|
|
tcg_ctx.tb_ctx.tb_flush_count + 1);
|
|
|
|
|
|
|
|
done:
|
|
|
|
tb_unlock();
|
|
|
|
}
|
|
|
|
|
|
|
|
void tb_flush(CPUState *cpu)
|
|
|
|
{
|
|
|
|
if (tcg_enabled()) {
|
2016-10-31 10:36:08 +01:00
|
|
|
unsigned tb_flush_count = atomic_mb_read(&tcg_ctx.tb_ctx.tb_flush_count);
|
|
|
|
async_safe_run_on_cpu(cpu, do_tb_flush,
|
|
|
|
RUN_ON_CPU_HOST_INT(tb_flush_count));
|
2016-08-02 19:27:43 +02:00
|
|
|
}
|
2012-12-02 17:04:43 +01:00
|
|
|
}
|
|
|
|
|
2017-07-12 21:31:57 +02:00
|
|
|
/*
|
|
|
|
* Formerly ifdef DEBUG_TB_CHECK. These debug functions are user-mode-only,
|
|
|
|
* so in order to prevent bit rot we compile them unconditionally in user-mode,
|
|
|
|
* and let the optimizer get rid of them by wrapping their user-only callers
|
|
|
|
* with if (DEBUG_TB_CHECK_GATE).
|
|
|
|
*/
|
|
|
|
#ifdef CONFIG_USER_ONLY
|
2012-12-02 17:04:43 +01:00
|
|
|
|
tb hash: track translated blocks with qht
Having a fixed-size hash table for keeping track of all translation blocks
is suboptimal: some workloads are just too big or too small to get maximum
performance from the hash table. The MRU promotion policy helps improve
performance when the hash table is a little undersized, but it cannot
make up for severely undersized hash tables.
Furthermore, frequent MRU promotions result in writes that are a scalability
bottleneck. For scalability, lookups should only perform reads, not writes.
This is not a big deal for now, but it will become one once MTTCG matures.
The appended fixes these issues by using qht as the implementation of
the TB hash table. This solution is superior to other alternatives considered,
namely:
- master: implementation in QEMU before this patchset
- xxhash: before this patch, i.e. fixed buckets + xxhash hashing + MRU.
- xxhash-rcu: fixed buckets + xxhash + RCU list + MRU.
MRU is implemented here by adding an intermediate struct
that contains the u32 hash and a pointer to the TB; this
allows us, on an MRU promotion, to copy said struct (that is not
at the head), and put this new copy at the head. After a grace
period, the original non-head struct can be eliminated, and
after another grace period, freed.
- qht-fixed-nomru: fixed buckets + xxhash + qht without auto-resize +
no MRU for lookups; MRU for inserts.
The appended solution is the following:
- qht-dyn-nomru: dynamic number of buckets + xxhash + qht w/ auto-resize +
no MRU for lookups; MRU for inserts.
The plots below compare the considered solutions. The Y axis shows the
boot time (in seconds) of a debian jessie image with arm-softmmu; the X axis
sweeps the number of buckets (or initial number of buckets for qht-autoresize).
The plots in PNG format (and with errorbars) can be seen here:
http://imgur.com/a/Awgnq
Each test runs 5 times, and the entire QEMU process is pinned to a
single core for repeatability of results.
Host: Intel Xeon E5-2690
28 ++------------+-------------+-------------+-------------+------------++
A***** + + + master **A*** +
27 ++ * xxhash ##B###++
| A******A****** xxhash-rcu $$C$$$ |
26 C$$ A******A****** qht-fixed-nomru*%%D%%%++
D%%$$ A******A******A*qht-dyn-mru A*E****A
25 ++ %%$$ qht-dyn-nomru &&F&&&++
B#####% |
24 ++ #C$$$$$ ++
| B### $ |
| ## C$$$$$$ |
23 ++ # C$$$$$$ ++
| B###### C$$$$$$ %%%D
22 ++ %B###### C$$$$$$C$$$$$$C$$$$$$C$$$$$$C$$$$$$C
| D%%%%%%B###### @E@@@@@@ %%%D%%%@@@E@@@@@@E
21 E@@@@@@E@@@@@@F&&&@@@E@@@&&&D%%%%%%B######B######B######B######B######B
+ E@@@ F&&& + E@ + F&&& + +
20 ++------------+-------------+-------------+-------------+------------++
14 16 18 20 22 24
log2 number of buckets
Host: Intel i7-4790K
14.5 ++------------+------------+-------------+------------+------------++
A** + + + master **A*** +
14 ++ ** xxhash ##B###++
13.5 ++ ** xxhash-rcu $$C$$$++
| qht-fixed-nomru %%D%%% |
13 ++ A****** qht-dyn-mru @@E@@@++
| A*****A******A****** qht-dyn-nomru &&F&&& |
12.5 C$$ A******A******A*****A****** ***A
12 ++ $$ A*** ++
D%%% $$ |
11.5 ++ %% ++
B### %C$$$$$$ |
11 ++ ## D%%%%% C$$$$$ ++
| # % C$$$$$$ |
10.5 F&&&&&&B######D%%%%% C$$$$$$C$$$$$$C$$$$$$C$$$$$C$$$$$$ $$$C
10 E@@@@@@E@@@@@@B#####B######B######E@@@@@@E@@@%%%D%%%%%D%%%###B######B
+ F&& D%%%%%%B######B######B#####B###@@@D%%% +
9.5 ++------------+------------+-------------+------------+------------++
14 16 18 20 22 24
log2 number of buckets
Note that the original point before this patch series is X=15 for "master";
the little sensitivity to the increased number of buckets is due to the
poor hashing function in master.
xxhash-rcu has significant overhead due to the constant churn of allocating
and deallocating intermediate structs for implementing MRU. An alternative
would be do consider failed lookups as "maybe not there", and then
acquire the external lock (tb_lock in this case) to really confirm that
there was indeed a failed lookup. This, however, would not be enough
to implement dynamic resizing--this is more complex: see
"Resizable, Scalable, Concurrent Hash Tables via Relativistic
Programming" by Triplett, McKenney and Walpole. This solution was
discarded due to the very coarse RCU read critical sections that we have
in MTTCG; resizing requires waiting for readers after every pointer update,
and resizes require many pointer updates, so this would quickly become
prohibitive.
qht-fixed-nomru shows that MRU promotion is advisable for undersized
hash tables.
However, qht-dyn-mru shows that MRU promotion is not important if the
hash table is properly sized: there is virtually no difference in
performance between qht-dyn-nomru and qht-dyn-mru.
Before this patch, we're at X=15 on "xxhash"; after this patch, we're at
X=15 @ qht-dyn-nomru. This patch thus matches the best performance that we
can achieve with optimum sizing of the hash table, while keeping the hash
table scalable for readers.
The improvement we get before and after this patch for booting debian jessie
with arm-softmmu is:
- Intel Xeon E5-2690: 10.5% less time
- Intel i7-4790K: 5.2% less time
We could get this same improvement _for this particular workload_ by
statically increasing the size of the hash table. But this would hurt
workloads that do not need a large hash table. The dynamic (upward)
resizing allows us to start small and enlarge the hash table as needed.
A quick note on downsizing: the table is resized back to 2**15 buckets
on every tb_flush; this makes sense because it is not guaranteed that the
table will reach the same number of TBs later on (e.g. most bootup code is
thrown away after boot); it makes sense to grow the hash table as
more code blocks are translated. This also avoids the complication of
having to build downsizing hysteresis logic into qht.
Reviewed-by: Sergey Fedorov <serge.fedorov@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Emilio G. Cota <cota@braap.org>
Message-Id: <1465412133-3029-15-git-send-email-cota@braap.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
2016-06-08 20:55:32 +02:00
|
|
|
static void
|
|
|
|
do_tb_invalidate_check(struct qht *ht, void *p, uint32_t hash, void *userp)
|
2012-12-02 17:04:43 +01:00
|
|
|
{
|
tb hash: track translated blocks with qht
Having a fixed-size hash table for keeping track of all translation blocks
is suboptimal: some workloads are just too big or too small to get maximum
performance from the hash table. The MRU promotion policy helps improve
performance when the hash table is a little undersized, but it cannot
make up for severely undersized hash tables.
Furthermore, frequent MRU promotions result in writes that are a scalability
bottleneck. For scalability, lookups should only perform reads, not writes.
This is not a big deal for now, but it will become one once MTTCG matures.
The appended fixes these issues by using qht as the implementation of
the TB hash table. This solution is superior to other alternatives considered,
namely:
- master: implementation in QEMU before this patchset
- xxhash: before this patch, i.e. fixed buckets + xxhash hashing + MRU.
- xxhash-rcu: fixed buckets + xxhash + RCU list + MRU.
MRU is implemented here by adding an intermediate struct
that contains the u32 hash and a pointer to the TB; this
allows us, on an MRU promotion, to copy said struct (that is not
at the head), and put this new copy at the head. After a grace
period, the original non-head struct can be eliminated, and
after another grace period, freed.
- qht-fixed-nomru: fixed buckets + xxhash + qht without auto-resize +
no MRU for lookups; MRU for inserts.
The appended solution is the following:
- qht-dyn-nomru: dynamic number of buckets + xxhash + qht w/ auto-resize +
no MRU for lookups; MRU for inserts.
The plots below compare the considered solutions. The Y axis shows the
boot time (in seconds) of a debian jessie image with arm-softmmu; the X axis
sweeps the number of buckets (or initial number of buckets for qht-autoresize).
The plots in PNG format (and with errorbars) can be seen here:
http://imgur.com/a/Awgnq
Each test runs 5 times, and the entire QEMU process is pinned to a
single core for repeatability of results.
Host: Intel Xeon E5-2690
28 ++------------+-------------+-------------+-------------+------------++
A***** + + + master **A*** +
27 ++ * xxhash ##B###++
| A******A****** xxhash-rcu $$C$$$ |
26 C$$ A******A****** qht-fixed-nomru*%%D%%%++
D%%$$ A******A******A*qht-dyn-mru A*E****A
25 ++ %%$$ qht-dyn-nomru &&F&&&++
B#####% |
24 ++ #C$$$$$ ++
| B### $ |
| ## C$$$$$$ |
23 ++ # C$$$$$$ ++
| B###### C$$$$$$ %%%D
22 ++ %B###### C$$$$$$C$$$$$$C$$$$$$C$$$$$$C$$$$$$C
| D%%%%%%B###### @E@@@@@@ %%%D%%%@@@E@@@@@@E
21 E@@@@@@E@@@@@@F&&&@@@E@@@&&&D%%%%%%B######B######B######B######B######B
+ E@@@ F&&& + E@ + F&&& + +
20 ++------------+-------------+-------------+-------------+------------++
14 16 18 20 22 24
log2 number of buckets
Host: Intel i7-4790K
14.5 ++------------+------------+-------------+------------+------------++
A** + + + master **A*** +
14 ++ ** xxhash ##B###++
13.5 ++ ** xxhash-rcu $$C$$$++
| qht-fixed-nomru %%D%%% |
13 ++ A****** qht-dyn-mru @@E@@@++
| A*****A******A****** qht-dyn-nomru &&F&&& |
12.5 C$$ A******A******A*****A****** ***A
12 ++ $$ A*** ++
D%%% $$ |
11.5 ++ %% ++
B### %C$$$$$$ |
11 ++ ## D%%%%% C$$$$$ ++
| # % C$$$$$$ |
10.5 F&&&&&&B######D%%%%% C$$$$$$C$$$$$$C$$$$$$C$$$$$C$$$$$$ $$$C
10 E@@@@@@E@@@@@@B#####B######B######E@@@@@@E@@@%%%D%%%%%D%%%###B######B
+ F&& D%%%%%%B######B######B#####B###@@@D%%% +
9.5 ++------------+------------+-------------+------------+------------++
14 16 18 20 22 24
log2 number of buckets
Note that the original point before this patch series is X=15 for "master";
the little sensitivity to the increased number of buckets is due to the
poor hashing function in master.
xxhash-rcu has significant overhead due to the constant churn of allocating
and deallocating intermediate structs for implementing MRU. An alternative
would be do consider failed lookups as "maybe not there", and then
acquire the external lock (tb_lock in this case) to really confirm that
there was indeed a failed lookup. This, however, would not be enough
to implement dynamic resizing--this is more complex: see
"Resizable, Scalable, Concurrent Hash Tables via Relativistic
Programming" by Triplett, McKenney and Walpole. This solution was
discarded due to the very coarse RCU read critical sections that we have
in MTTCG; resizing requires waiting for readers after every pointer update,
and resizes require many pointer updates, so this would quickly become
prohibitive.
qht-fixed-nomru shows that MRU promotion is advisable for undersized
hash tables.
However, qht-dyn-mru shows that MRU promotion is not important if the
hash table is properly sized: there is virtually no difference in
performance between qht-dyn-nomru and qht-dyn-mru.
Before this patch, we're at X=15 on "xxhash"; after this patch, we're at
X=15 @ qht-dyn-nomru. This patch thus matches the best performance that we
can achieve with optimum sizing of the hash table, while keeping the hash
table scalable for readers.
The improvement we get before and after this patch for booting debian jessie
with arm-softmmu is:
- Intel Xeon E5-2690: 10.5% less time
- Intel i7-4790K: 5.2% less time
We could get this same improvement _for this particular workload_ by
statically increasing the size of the hash table. But this would hurt
workloads that do not need a large hash table. The dynamic (upward)
resizing allows us to start small and enlarge the hash table as needed.
A quick note on downsizing: the table is resized back to 2**15 buckets
on every tb_flush; this makes sense because it is not guaranteed that the
table will reach the same number of TBs later on (e.g. most bootup code is
thrown away after boot); it makes sense to grow the hash table as
more code blocks are translated. This also avoids the complication of
having to build downsizing hysteresis logic into qht.
Reviewed-by: Sergey Fedorov <serge.fedorov@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Emilio G. Cota <cota@braap.org>
Message-Id: <1465412133-3029-15-git-send-email-cota@braap.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
2016-06-08 20:55:32 +02:00
|
|
|
TranslationBlock *tb = p;
|
|
|
|
target_ulong addr = *(target_ulong *)userp;
|
|
|
|
|
|
|
|
if (!(addr + TARGET_PAGE_SIZE <= tb->pc || addr >= tb->pc + tb->size)) {
|
|
|
|
printf("ERROR invalidate: address=" TARGET_FMT_lx
|
|
|
|
" PC=%08lx size=%04x\n", addr, (long)tb->pc, tb->size);
|
|
|
|
}
|
|
|
|
}
|
2012-12-02 17:04:43 +01:00
|
|
|
|
2016-10-27 17:10:03 +02:00
|
|
|
/* verify that all the pages have correct rights for code
|
|
|
|
*
|
|
|
|
* Called with tb_lock held.
|
|
|
|
*/
|
tb hash: track translated blocks with qht
Having a fixed-size hash table for keeping track of all translation blocks
is suboptimal: some workloads are just too big or too small to get maximum
performance from the hash table. The MRU promotion policy helps improve
performance when the hash table is a little undersized, but it cannot
make up for severely undersized hash tables.
Furthermore, frequent MRU promotions result in writes that are a scalability
bottleneck. For scalability, lookups should only perform reads, not writes.
This is not a big deal for now, but it will become one once MTTCG matures.
The appended fixes these issues by using qht as the implementation of
the TB hash table. This solution is superior to other alternatives considered,
namely:
- master: implementation in QEMU before this patchset
- xxhash: before this patch, i.e. fixed buckets + xxhash hashing + MRU.
- xxhash-rcu: fixed buckets + xxhash + RCU list + MRU.
MRU is implemented here by adding an intermediate struct
that contains the u32 hash and a pointer to the TB; this
allows us, on an MRU promotion, to copy said struct (that is not
at the head), and put this new copy at the head. After a grace
period, the original non-head struct can be eliminated, and
after another grace period, freed.
- qht-fixed-nomru: fixed buckets + xxhash + qht without auto-resize +
no MRU for lookups; MRU for inserts.
The appended solution is the following:
- qht-dyn-nomru: dynamic number of buckets + xxhash + qht w/ auto-resize +
no MRU for lookups; MRU for inserts.
The plots below compare the considered solutions. The Y axis shows the
boot time (in seconds) of a debian jessie image with arm-softmmu; the X axis
sweeps the number of buckets (or initial number of buckets for qht-autoresize).
The plots in PNG format (and with errorbars) can be seen here:
http://imgur.com/a/Awgnq
Each test runs 5 times, and the entire QEMU process is pinned to a
single core for repeatability of results.
Host: Intel Xeon E5-2690
28 ++------------+-------------+-------------+-------------+------------++
A***** + + + master **A*** +
27 ++ * xxhash ##B###++
| A******A****** xxhash-rcu $$C$$$ |
26 C$$ A******A****** qht-fixed-nomru*%%D%%%++
D%%$$ A******A******A*qht-dyn-mru A*E****A
25 ++ %%$$ qht-dyn-nomru &&F&&&++
B#####% |
24 ++ #C$$$$$ ++
| B### $ |
| ## C$$$$$$ |
23 ++ # C$$$$$$ ++
| B###### C$$$$$$ %%%D
22 ++ %B###### C$$$$$$C$$$$$$C$$$$$$C$$$$$$C$$$$$$C
| D%%%%%%B###### @E@@@@@@ %%%D%%%@@@E@@@@@@E
21 E@@@@@@E@@@@@@F&&&@@@E@@@&&&D%%%%%%B######B######B######B######B######B
+ E@@@ F&&& + E@ + F&&& + +
20 ++------------+-------------+-------------+-------------+------------++
14 16 18 20 22 24
log2 number of buckets
Host: Intel i7-4790K
14.5 ++------------+------------+-------------+------------+------------++
A** + + + master **A*** +
14 ++ ** xxhash ##B###++
13.5 ++ ** xxhash-rcu $$C$$$++
| qht-fixed-nomru %%D%%% |
13 ++ A****** qht-dyn-mru @@E@@@++
| A*****A******A****** qht-dyn-nomru &&F&&& |
12.5 C$$ A******A******A*****A****** ***A
12 ++ $$ A*** ++
D%%% $$ |
11.5 ++ %% ++
B### %C$$$$$$ |
11 ++ ## D%%%%% C$$$$$ ++
| # % C$$$$$$ |
10.5 F&&&&&&B######D%%%%% C$$$$$$C$$$$$$C$$$$$$C$$$$$C$$$$$$ $$$C
10 E@@@@@@E@@@@@@B#####B######B######E@@@@@@E@@@%%%D%%%%%D%%%###B######B
+ F&& D%%%%%%B######B######B#####B###@@@D%%% +
9.5 ++------------+------------+-------------+------------+------------++
14 16 18 20 22 24
log2 number of buckets
Note that the original point before this patch series is X=15 for "master";
the little sensitivity to the increased number of buckets is due to the
poor hashing function in master.
xxhash-rcu has significant overhead due to the constant churn of allocating
and deallocating intermediate structs for implementing MRU. An alternative
would be do consider failed lookups as "maybe not there", and then
acquire the external lock (tb_lock in this case) to really confirm that
there was indeed a failed lookup. This, however, would not be enough
to implement dynamic resizing--this is more complex: see
"Resizable, Scalable, Concurrent Hash Tables via Relativistic
Programming" by Triplett, McKenney and Walpole. This solution was
discarded due to the very coarse RCU read critical sections that we have
in MTTCG; resizing requires waiting for readers after every pointer update,
and resizes require many pointer updates, so this would quickly become
prohibitive.
qht-fixed-nomru shows that MRU promotion is advisable for undersized
hash tables.
However, qht-dyn-mru shows that MRU promotion is not important if the
hash table is properly sized: there is virtually no difference in
performance between qht-dyn-nomru and qht-dyn-mru.
Before this patch, we're at X=15 on "xxhash"; after this patch, we're at
X=15 @ qht-dyn-nomru. This patch thus matches the best performance that we
can achieve with optimum sizing of the hash table, while keeping the hash
table scalable for readers.
The improvement we get before and after this patch for booting debian jessie
with arm-softmmu is:
- Intel Xeon E5-2690: 10.5% less time
- Intel i7-4790K: 5.2% less time
We could get this same improvement _for this particular workload_ by
statically increasing the size of the hash table. But this would hurt
workloads that do not need a large hash table. The dynamic (upward)
resizing allows us to start small and enlarge the hash table as needed.
A quick note on downsizing: the table is resized back to 2**15 buckets
on every tb_flush; this makes sense because it is not guaranteed that the
table will reach the same number of TBs later on (e.g. most bootup code is
thrown away after boot); it makes sense to grow the hash table as
more code blocks are translated. This also avoids the complication of
having to build downsizing hysteresis logic into qht.
Reviewed-by: Sergey Fedorov <serge.fedorov@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Emilio G. Cota <cota@braap.org>
Message-Id: <1465412133-3029-15-git-send-email-cota@braap.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
2016-06-08 20:55:32 +02:00
|
|
|
static void tb_invalidate_check(target_ulong address)
|
|
|
|
{
|
2012-12-02 17:04:43 +01:00
|
|
|
address &= TARGET_PAGE_MASK;
|
tb hash: track translated blocks with qht
Having a fixed-size hash table for keeping track of all translation blocks
is suboptimal: some workloads are just too big or too small to get maximum
performance from the hash table. The MRU promotion policy helps improve
performance when the hash table is a little undersized, but it cannot
make up for severely undersized hash tables.
Furthermore, frequent MRU promotions result in writes that are a scalability
bottleneck. For scalability, lookups should only perform reads, not writes.
This is not a big deal for now, but it will become one once MTTCG matures.
The appended fixes these issues by using qht as the implementation of
the TB hash table. This solution is superior to other alternatives considered,
namely:
- master: implementation in QEMU before this patchset
- xxhash: before this patch, i.e. fixed buckets + xxhash hashing + MRU.
- xxhash-rcu: fixed buckets + xxhash + RCU list + MRU.
MRU is implemented here by adding an intermediate struct
that contains the u32 hash and a pointer to the TB; this
allows us, on an MRU promotion, to copy said struct (that is not
at the head), and put this new copy at the head. After a grace
period, the original non-head struct can be eliminated, and
after another grace period, freed.
- qht-fixed-nomru: fixed buckets + xxhash + qht without auto-resize +
no MRU for lookups; MRU for inserts.
The appended solution is the following:
- qht-dyn-nomru: dynamic number of buckets + xxhash + qht w/ auto-resize +
no MRU for lookups; MRU for inserts.
The plots below compare the considered solutions. The Y axis shows the
boot time (in seconds) of a debian jessie image with arm-softmmu; the X axis
sweeps the number of buckets (or initial number of buckets for qht-autoresize).
The plots in PNG format (and with errorbars) can be seen here:
http://imgur.com/a/Awgnq
Each test runs 5 times, and the entire QEMU process is pinned to a
single core for repeatability of results.
Host: Intel Xeon E5-2690
28 ++------------+-------------+-------------+-------------+------------++
A***** + + + master **A*** +
27 ++ * xxhash ##B###++
| A******A****** xxhash-rcu $$C$$$ |
26 C$$ A******A****** qht-fixed-nomru*%%D%%%++
D%%$$ A******A******A*qht-dyn-mru A*E****A
25 ++ %%$$ qht-dyn-nomru &&F&&&++
B#####% |
24 ++ #C$$$$$ ++
| B### $ |
| ## C$$$$$$ |
23 ++ # C$$$$$$ ++
| B###### C$$$$$$ %%%D
22 ++ %B###### C$$$$$$C$$$$$$C$$$$$$C$$$$$$C$$$$$$C
| D%%%%%%B###### @E@@@@@@ %%%D%%%@@@E@@@@@@E
21 E@@@@@@E@@@@@@F&&&@@@E@@@&&&D%%%%%%B######B######B######B######B######B
+ E@@@ F&&& + E@ + F&&& + +
20 ++------------+-------------+-------------+-------------+------------++
14 16 18 20 22 24
log2 number of buckets
Host: Intel i7-4790K
14.5 ++------------+------------+-------------+------------+------------++
A** + + + master **A*** +
14 ++ ** xxhash ##B###++
13.5 ++ ** xxhash-rcu $$C$$$++
| qht-fixed-nomru %%D%%% |
13 ++ A****** qht-dyn-mru @@E@@@++
| A*****A******A****** qht-dyn-nomru &&F&&& |
12.5 C$$ A******A******A*****A****** ***A
12 ++ $$ A*** ++
D%%% $$ |
11.5 ++ %% ++
B### %C$$$$$$ |
11 ++ ## D%%%%% C$$$$$ ++
| # % C$$$$$$ |
10.5 F&&&&&&B######D%%%%% C$$$$$$C$$$$$$C$$$$$$C$$$$$C$$$$$$ $$$C
10 E@@@@@@E@@@@@@B#####B######B######E@@@@@@E@@@%%%D%%%%%D%%%###B######B
+ F&& D%%%%%%B######B######B#####B###@@@D%%% +
9.5 ++------------+------------+-------------+------------+------------++
14 16 18 20 22 24
log2 number of buckets
Note that the original point before this patch series is X=15 for "master";
the little sensitivity to the increased number of buckets is due to the
poor hashing function in master.
xxhash-rcu has significant overhead due to the constant churn of allocating
and deallocating intermediate structs for implementing MRU. An alternative
would be do consider failed lookups as "maybe not there", and then
acquire the external lock (tb_lock in this case) to really confirm that
there was indeed a failed lookup. This, however, would not be enough
to implement dynamic resizing--this is more complex: see
"Resizable, Scalable, Concurrent Hash Tables via Relativistic
Programming" by Triplett, McKenney and Walpole. This solution was
discarded due to the very coarse RCU read critical sections that we have
in MTTCG; resizing requires waiting for readers after every pointer update,
and resizes require many pointer updates, so this would quickly become
prohibitive.
qht-fixed-nomru shows that MRU promotion is advisable for undersized
hash tables.
However, qht-dyn-mru shows that MRU promotion is not important if the
hash table is properly sized: there is virtually no difference in
performance between qht-dyn-nomru and qht-dyn-mru.
Before this patch, we're at X=15 on "xxhash"; after this patch, we're at
X=15 @ qht-dyn-nomru. This patch thus matches the best performance that we
can achieve with optimum sizing of the hash table, while keeping the hash
table scalable for readers.
The improvement we get before and after this patch for booting debian jessie
with arm-softmmu is:
- Intel Xeon E5-2690: 10.5% less time
- Intel i7-4790K: 5.2% less time
We could get this same improvement _for this particular workload_ by
statically increasing the size of the hash table. But this would hurt
workloads that do not need a large hash table. The dynamic (upward)
resizing allows us to start small and enlarge the hash table as needed.
A quick note on downsizing: the table is resized back to 2**15 buckets
on every tb_flush; this makes sense because it is not guaranteed that the
table will reach the same number of TBs later on (e.g. most bootup code is
thrown away after boot); it makes sense to grow the hash table as
more code blocks are translated. This also avoids the complication of
having to build downsizing hysteresis logic into qht.
Reviewed-by: Sergey Fedorov <serge.fedorov@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Emilio G. Cota <cota@braap.org>
Message-Id: <1465412133-3029-15-git-send-email-cota@braap.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
2016-06-08 20:55:32 +02:00
|
|
|
qht_iter(&tcg_ctx.tb_ctx.htable, do_tb_invalidate_check, &address);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
do_tb_page_check(struct qht *ht, void *p, uint32_t hash, void *userp)
|
|
|
|
{
|
|
|
|
TranslationBlock *tb = p;
|
|
|
|
int flags1, flags2;
|
|
|
|
|
|
|
|
flags1 = page_get_flags(tb->pc);
|
|
|
|
flags2 = page_get_flags(tb->pc + tb->size - 1);
|
|
|
|
if ((flags1 & PAGE_WRITE) || (flags2 & PAGE_WRITE)) {
|
|
|
|
printf("ERROR page flags: PC=%08lx size=%04x f1=%x f2=%x\n",
|
|
|
|
(long)tb->pc, tb->size, flags1, flags2);
|
2012-12-02 17:04:43 +01:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/* verify that all the pages have correct rights for code */
|
|
|
|
static void tb_page_check(void)
|
|
|
|
{
|
tb hash: track translated blocks with qht
Having a fixed-size hash table for keeping track of all translation blocks
is suboptimal: some workloads are just too big or too small to get maximum
performance from the hash table. The MRU promotion policy helps improve
performance when the hash table is a little undersized, but it cannot
make up for severely undersized hash tables.
Furthermore, frequent MRU promotions result in writes that are a scalability
bottleneck. For scalability, lookups should only perform reads, not writes.
This is not a big deal for now, but it will become one once MTTCG matures.
The appended fixes these issues by using qht as the implementation of
the TB hash table. This solution is superior to other alternatives considered,
namely:
- master: implementation in QEMU before this patchset
- xxhash: before this patch, i.e. fixed buckets + xxhash hashing + MRU.
- xxhash-rcu: fixed buckets + xxhash + RCU list + MRU.
MRU is implemented here by adding an intermediate struct
that contains the u32 hash and a pointer to the TB; this
allows us, on an MRU promotion, to copy said struct (that is not
at the head), and put this new copy at the head. After a grace
period, the original non-head struct can be eliminated, and
after another grace period, freed.
- qht-fixed-nomru: fixed buckets + xxhash + qht without auto-resize +
no MRU for lookups; MRU for inserts.
The appended solution is the following:
- qht-dyn-nomru: dynamic number of buckets + xxhash + qht w/ auto-resize +
no MRU for lookups; MRU for inserts.
The plots below compare the considered solutions. The Y axis shows the
boot time (in seconds) of a debian jessie image with arm-softmmu; the X axis
sweeps the number of buckets (or initial number of buckets for qht-autoresize).
The plots in PNG format (and with errorbars) can be seen here:
http://imgur.com/a/Awgnq
Each test runs 5 times, and the entire QEMU process is pinned to a
single core for repeatability of results.
Host: Intel Xeon E5-2690
28 ++------------+-------------+-------------+-------------+------------++
A***** + + + master **A*** +
27 ++ * xxhash ##B###++
| A******A****** xxhash-rcu $$C$$$ |
26 C$$ A******A****** qht-fixed-nomru*%%D%%%++
D%%$$ A******A******A*qht-dyn-mru A*E****A
25 ++ %%$$ qht-dyn-nomru &&F&&&++
B#####% |
24 ++ #C$$$$$ ++
| B### $ |
| ## C$$$$$$ |
23 ++ # C$$$$$$ ++
| B###### C$$$$$$ %%%D
22 ++ %B###### C$$$$$$C$$$$$$C$$$$$$C$$$$$$C$$$$$$C
| D%%%%%%B###### @E@@@@@@ %%%D%%%@@@E@@@@@@E
21 E@@@@@@E@@@@@@F&&&@@@E@@@&&&D%%%%%%B######B######B######B######B######B
+ E@@@ F&&& + E@ + F&&& + +
20 ++------------+-------------+-------------+-------------+------------++
14 16 18 20 22 24
log2 number of buckets
Host: Intel i7-4790K
14.5 ++------------+------------+-------------+------------+------------++
A** + + + master **A*** +
14 ++ ** xxhash ##B###++
13.5 ++ ** xxhash-rcu $$C$$$++
| qht-fixed-nomru %%D%%% |
13 ++ A****** qht-dyn-mru @@E@@@++
| A*****A******A****** qht-dyn-nomru &&F&&& |
12.5 C$$ A******A******A*****A****** ***A
12 ++ $$ A*** ++
D%%% $$ |
11.5 ++ %% ++
B### %C$$$$$$ |
11 ++ ## D%%%%% C$$$$$ ++
| # % C$$$$$$ |
10.5 F&&&&&&B######D%%%%% C$$$$$$C$$$$$$C$$$$$$C$$$$$C$$$$$$ $$$C
10 E@@@@@@E@@@@@@B#####B######B######E@@@@@@E@@@%%%D%%%%%D%%%###B######B
+ F&& D%%%%%%B######B######B#####B###@@@D%%% +
9.5 ++------------+------------+-------------+------------+------------++
14 16 18 20 22 24
log2 number of buckets
Note that the original point before this patch series is X=15 for "master";
the little sensitivity to the increased number of buckets is due to the
poor hashing function in master.
xxhash-rcu has significant overhead due to the constant churn of allocating
and deallocating intermediate structs for implementing MRU. An alternative
would be do consider failed lookups as "maybe not there", and then
acquire the external lock (tb_lock in this case) to really confirm that
there was indeed a failed lookup. This, however, would not be enough
to implement dynamic resizing--this is more complex: see
"Resizable, Scalable, Concurrent Hash Tables via Relativistic
Programming" by Triplett, McKenney and Walpole. This solution was
discarded due to the very coarse RCU read critical sections that we have
in MTTCG; resizing requires waiting for readers after every pointer update,
and resizes require many pointer updates, so this would quickly become
prohibitive.
qht-fixed-nomru shows that MRU promotion is advisable for undersized
hash tables.
However, qht-dyn-mru shows that MRU promotion is not important if the
hash table is properly sized: there is virtually no difference in
performance between qht-dyn-nomru and qht-dyn-mru.
Before this patch, we're at X=15 on "xxhash"; after this patch, we're at
X=15 @ qht-dyn-nomru. This patch thus matches the best performance that we
can achieve with optimum sizing of the hash table, while keeping the hash
table scalable for readers.
The improvement we get before and after this patch for booting debian jessie
with arm-softmmu is:
- Intel Xeon E5-2690: 10.5% less time
- Intel i7-4790K: 5.2% less time
We could get this same improvement _for this particular workload_ by
statically increasing the size of the hash table. But this would hurt
workloads that do not need a large hash table. The dynamic (upward)
resizing allows us to start small and enlarge the hash table as needed.
A quick note on downsizing: the table is resized back to 2**15 buckets
on every tb_flush; this makes sense because it is not guaranteed that the
table will reach the same number of TBs later on (e.g. most bootup code is
thrown away after boot); it makes sense to grow the hash table as
more code blocks are translated. This also avoids the complication of
having to build downsizing hysteresis logic into qht.
Reviewed-by: Sergey Fedorov <serge.fedorov@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Emilio G. Cota <cota@braap.org>
Message-Id: <1465412133-3029-15-git-send-email-cota@braap.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
2016-06-08 20:55:32 +02:00
|
|
|
qht_iter(&tcg_ctx.tb_ctx.htable, do_tb_page_check, NULL);
|
2012-12-02 17:04:43 +01:00
|
|
|
}
|
|
|
|
|
2017-07-12 21:31:57 +02:00
|
|
|
#endif /* CONFIG_USER_ONLY */
|
2012-12-02 17:04:43 +01:00
|
|
|
|
|
|
|
static inline void tb_page_remove(TranslationBlock **ptb, TranslationBlock *tb)
|
|
|
|
{
|
|
|
|
TranslationBlock *tb1;
|
|
|
|
unsigned int n1;
|
|
|
|
|
|
|
|
for (;;) {
|
|
|
|
tb1 = *ptb;
|
|
|
|
n1 = (uintptr_t)tb1 & 3;
|
|
|
|
tb1 = (TranslationBlock *)((uintptr_t)tb1 & ~3);
|
|
|
|
if (tb1 == tb) {
|
|
|
|
*ptb = tb1->page_next[n1];
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
ptb = &tb1->page_next[n1];
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2016-03-23 16:30:16 +01:00
|
|
|
/* remove the TB from a list of TBs jumping to the n-th jump target of the TB */
|
|
|
|
static inline void tb_remove_from_jmp_list(TranslationBlock *tb, int n)
|
2012-12-02 17:04:43 +01:00
|
|
|
{
|
2016-03-21 21:11:00 +01:00
|
|
|
TranslationBlock *tb1;
|
|
|
|
uintptr_t *ptb, ntb;
|
2012-12-02 17:04:43 +01:00
|
|
|
unsigned int n1;
|
|
|
|
|
2016-04-10 22:35:45 +02:00
|
|
|
ptb = &tb->jmp_list_next[n];
|
2016-03-21 21:11:00 +01:00
|
|
|
if (*ptb) {
|
2012-12-02 17:04:43 +01:00
|
|
|
/* find tb(n) in circular list */
|
|
|
|
for (;;) {
|
2016-03-21 21:11:00 +01:00
|
|
|
ntb = *ptb;
|
|
|
|
n1 = ntb & 3;
|
|
|
|
tb1 = (TranslationBlock *)(ntb & ~3);
|
2012-12-02 17:04:43 +01:00
|
|
|
if (n1 == n && tb1 == tb) {
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
if (n1 == 2) {
|
2016-04-10 22:35:45 +02:00
|
|
|
ptb = &tb1->jmp_list_first;
|
2012-12-02 17:04:43 +01:00
|
|
|
} else {
|
2016-04-10 22:35:45 +02:00
|
|
|
ptb = &tb1->jmp_list_next[n1];
|
2012-12-02 17:04:43 +01:00
|
|
|
}
|
|
|
|
}
|
|
|
|
/* now we can suppress tb(n) from the list */
|
2016-04-10 22:35:45 +02:00
|
|
|
*ptb = tb->jmp_list_next[n];
|
2012-12-02 17:04:43 +01:00
|
|
|
|
2016-03-21 21:11:00 +01:00
|
|
|
tb->jmp_list_next[n] = (uintptr_t)NULL;
|
2012-12-02 17:04:43 +01:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/* reset the jump entry 'n' of a TB so that it is not chained to
|
|
|
|
another TB */
|
|
|
|
static inline void tb_reset_jump(TranslationBlock *tb, int n)
|
|
|
|
{
|
2017-07-12 06:08:21 +02:00
|
|
|
uintptr_t addr = (uintptr_t)(tb->tc.ptr + tb->jmp_reset_offset[n]);
|
2016-04-10 22:35:45 +02:00
|
|
|
tb_set_jmp_target(tb, n, addr);
|
2012-12-02 17:04:43 +01:00
|
|
|
}
|
|
|
|
|
2016-03-23 16:36:31 +01:00
|
|
|
/* remove any jumps to the TB */
|
|
|
|
static inline void tb_jmp_unlink(TranslationBlock *tb)
|
|
|
|
{
|
2016-03-23 19:47:33 +01:00
|
|
|
TranslationBlock *tb1;
|
|
|
|
uintptr_t *ptb, ntb;
|
2016-03-23 16:36:31 +01:00
|
|
|
unsigned int n1;
|
|
|
|
|
2016-03-23 19:47:33 +01:00
|
|
|
ptb = &tb->jmp_list_first;
|
2016-03-23 16:36:31 +01:00
|
|
|
for (;;) {
|
2016-03-23 19:47:33 +01:00
|
|
|
ntb = *ptb;
|
|
|
|
n1 = ntb & 3;
|
|
|
|
tb1 = (TranslationBlock *)(ntb & ~3);
|
2016-03-23 16:36:31 +01:00
|
|
|
if (n1 == 2) {
|
|
|
|
break;
|
|
|
|
}
|
2016-03-23 19:47:33 +01:00
|
|
|
tb_reset_jump(tb1, n1);
|
|
|
|
*ptb = tb1->jmp_list_next[n1];
|
|
|
|
tb1->jmp_list_next[n1] = (uintptr_t)NULL;
|
2016-03-23 16:36:31 +01:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2016-10-27 17:10:03 +02:00
|
|
|
/* invalidate one TB
|
|
|
|
*
|
|
|
|
* Called with tb_lock held.
|
|
|
|
*/
|
2012-12-02 17:04:43 +01:00
|
|
|
void tb_phys_invalidate(TranslationBlock *tb, tb_page_addr_t page_addr)
|
|
|
|
{
|
2013-05-29 22:29:20 +02:00
|
|
|
CPUState *cpu;
|
2012-12-02 17:04:43 +01:00
|
|
|
PageDesc *p;
|
tb hash: hash phys_pc, pc, and flags with xxhash
For some workloads such as arm bootup, tb_phys_hash is performance-critical.
The is due to the high frequency of accesses to the hash table, originated
by (frequent) TLB flushes that wipe out the cpu-private tb_jmp_cache's.
More info:
https://lists.nongnu.org/archive/html/qemu-devel/2016-03/msg05098.html
To dig further into this I modified an arm image booting debian jessie to
immediately shut down after boot. Analysis revealed that quite a bit of time
is unnecessarily spent in tb_phys_hash: the cause is poor hashing that
results in very uneven loading of chains in the hash table's buckets;
the longest observed chain had ~550 elements.
The appended addresses this with two changes:
1) Use xxhash as the hash table's hash function. xxhash is a fast,
high-quality hashing function.
2) Feed the hashing function with not just tb_phys, but also pc and flags.
This improves performance over using just tb_phys for hashing, since that
resulted in some hash buckets having many TB's, while others getting very few;
with these changes, the longest observed chain on a single hash bucket is
brought down from ~550 to ~40.
Tests show that the other element checked for in tb_find_physical,
cs_base, is always a match when tb_phys+pc+flags are a match,
so hashing cs_base is wasteful. It could be that this is an ARM-only
thing, though. UPDATE:
On Tue, Apr 05, 2016 at 08:41:43 -0700, Richard Henderson wrote:
> The cs_base field is only used by i386 (in 16-bit modes), and sparc (for a TB
> consisting of only a delay slot).
> It may well still turn out to be reasonable to ignore cs_base for hashing.
BTW, after this change the hash table should not be called "tb_hash_phys"
anymore; this is addressed later in this series.
This change gives consistent bootup time improvements. I tested two
host machines:
- Intel Xeon E5-2690: 11.6% less time
- Intel i7-4790K: 19.2% less time
Increasing the number of hash buckets yields further improvements. However,
using a larger, fixed number of buckets can degrade performance for other
workloads that do not translate as many blocks (600K+ for debian-jessie arm
bootup). This is dealt with later in this series.
Reviewed-by: Sergey Fedorov <sergey.fedorov@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Emilio G. Cota <cota@braap.org>
Message-Id: <1465412133-3029-8-git-send-email-cota@braap.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
2016-06-08 20:55:25 +02:00
|
|
|
uint32_t h;
|
2012-12-02 17:04:43 +01:00
|
|
|
tb_page_addr_t phys_pc;
|
|
|
|
|
2017-02-23 19:29:05 +01:00
|
|
|
assert_tb_locked();
|
2016-10-27 17:10:05 +02:00
|
|
|
|
2017-07-11 02:03:50 +02:00
|
|
|
atomic_set(&tb->cflags, tb->cflags | CF_INVALID);
|
2016-07-19 08:36:18 +02:00
|
|
|
|
2012-12-02 17:04:43 +01:00
|
|
|
/* remove the TB from the hash list */
|
|
|
|
phys_pc = tb->page_addr[0] + (tb->pc & ~TARGET_PAGE_MASK);
|
2017-07-04 10:42:32 +02:00
|
|
|
h = tb_hash_func(phys_pc, tb->pc, tb->flags, tb->trace_vcpu_dstate);
|
tb hash: track translated blocks with qht
Having a fixed-size hash table for keeping track of all translation blocks
is suboptimal: some workloads are just too big or too small to get maximum
performance from the hash table. The MRU promotion policy helps improve
performance when the hash table is a little undersized, but it cannot
make up for severely undersized hash tables.
Furthermore, frequent MRU promotions result in writes that are a scalability
bottleneck. For scalability, lookups should only perform reads, not writes.
This is not a big deal for now, but it will become one once MTTCG matures.
The appended fixes these issues by using qht as the implementation of
the TB hash table. This solution is superior to other alternatives considered,
namely:
- master: implementation in QEMU before this patchset
- xxhash: before this patch, i.e. fixed buckets + xxhash hashing + MRU.
- xxhash-rcu: fixed buckets + xxhash + RCU list + MRU.
MRU is implemented here by adding an intermediate struct
that contains the u32 hash and a pointer to the TB; this
allows us, on an MRU promotion, to copy said struct (that is not
at the head), and put this new copy at the head. After a grace
period, the original non-head struct can be eliminated, and
after another grace period, freed.
- qht-fixed-nomru: fixed buckets + xxhash + qht without auto-resize +
no MRU for lookups; MRU for inserts.
The appended solution is the following:
- qht-dyn-nomru: dynamic number of buckets + xxhash + qht w/ auto-resize +
no MRU for lookups; MRU for inserts.
The plots below compare the considered solutions. The Y axis shows the
boot time (in seconds) of a debian jessie image with arm-softmmu; the X axis
sweeps the number of buckets (or initial number of buckets for qht-autoresize).
The plots in PNG format (and with errorbars) can be seen here:
http://imgur.com/a/Awgnq
Each test runs 5 times, and the entire QEMU process is pinned to a
single core for repeatability of results.
Host: Intel Xeon E5-2690
28 ++------------+-------------+-------------+-------------+------------++
A***** + + + master **A*** +
27 ++ * xxhash ##B###++
| A******A****** xxhash-rcu $$C$$$ |
26 C$$ A******A****** qht-fixed-nomru*%%D%%%++
D%%$$ A******A******A*qht-dyn-mru A*E****A
25 ++ %%$$ qht-dyn-nomru &&F&&&++
B#####% |
24 ++ #C$$$$$ ++
| B### $ |
| ## C$$$$$$ |
23 ++ # C$$$$$$ ++
| B###### C$$$$$$ %%%D
22 ++ %B###### C$$$$$$C$$$$$$C$$$$$$C$$$$$$C$$$$$$C
| D%%%%%%B###### @E@@@@@@ %%%D%%%@@@E@@@@@@E
21 E@@@@@@E@@@@@@F&&&@@@E@@@&&&D%%%%%%B######B######B######B######B######B
+ E@@@ F&&& + E@ + F&&& + +
20 ++------------+-------------+-------------+-------------+------------++
14 16 18 20 22 24
log2 number of buckets
Host: Intel i7-4790K
14.5 ++------------+------------+-------------+------------+------------++
A** + + + master **A*** +
14 ++ ** xxhash ##B###++
13.5 ++ ** xxhash-rcu $$C$$$++
| qht-fixed-nomru %%D%%% |
13 ++ A****** qht-dyn-mru @@E@@@++
| A*****A******A****** qht-dyn-nomru &&F&&& |
12.5 C$$ A******A******A*****A****** ***A
12 ++ $$ A*** ++
D%%% $$ |
11.5 ++ %% ++
B### %C$$$$$$ |
11 ++ ## D%%%%% C$$$$$ ++
| # % C$$$$$$ |
10.5 F&&&&&&B######D%%%%% C$$$$$$C$$$$$$C$$$$$$C$$$$$C$$$$$$ $$$C
10 E@@@@@@E@@@@@@B#####B######B######E@@@@@@E@@@%%%D%%%%%D%%%###B######B
+ F&& D%%%%%%B######B######B#####B###@@@D%%% +
9.5 ++------------+------------+-------------+------------+------------++
14 16 18 20 22 24
log2 number of buckets
Note that the original point before this patch series is X=15 for "master";
the little sensitivity to the increased number of buckets is due to the
poor hashing function in master.
xxhash-rcu has significant overhead due to the constant churn of allocating
and deallocating intermediate structs for implementing MRU. An alternative
would be do consider failed lookups as "maybe not there", and then
acquire the external lock (tb_lock in this case) to really confirm that
there was indeed a failed lookup. This, however, would not be enough
to implement dynamic resizing--this is more complex: see
"Resizable, Scalable, Concurrent Hash Tables via Relativistic
Programming" by Triplett, McKenney and Walpole. This solution was
discarded due to the very coarse RCU read critical sections that we have
in MTTCG; resizing requires waiting for readers after every pointer update,
and resizes require many pointer updates, so this would quickly become
prohibitive.
qht-fixed-nomru shows that MRU promotion is advisable for undersized
hash tables.
However, qht-dyn-mru shows that MRU promotion is not important if the
hash table is properly sized: there is virtually no difference in
performance between qht-dyn-nomru and qht-dyn-mru.
Before this patch, we're at X=15 on "xxhash"; after this patch, we're at
X=15 @ qht-dyn-nomru. This patch thus matches the best performance that we
can achieve with optimum sizing of the hash table, while keeping the hash
table scalable for readers.
The improvement we get before and after this patch for booting debian jessie
with arm-softmmu is:
- Intel Xeon E5-2690: 10.5% less time
- Intel i7-4790K: 5.2% less time
We could get this same improvement _for this particular workload_ by
statically increasing the size of the hash table. But this would hurt
workloads that do not need a large hash table. The dynamic (upward)
resizing allows us to start small and enlarge the hash table as needed.
A quick note on downsizing: the table is resized back to 2**15 buckets
on every tb_flush; this makes sense because it is not guaranteed that the
table will reach the same number of TBs later on (e.g. most bootup code is
thrown away after boot); it makes sense to grow the hash table as
more code blocks are translated. This also avoids the complication of
having to build downsizing hysteresis logic into qht.
Reviewed-by: Sergey Fedorov <serge.fedorov@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Emilio G. Cota <cota@braap.org>
Message-Id: <1465412133-3029-15-git-send-email-cota@braap.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
2016-06-08 20:55:32 +02:00
|
|
|
qht_remove(&tcg_ctx.tb_ctx.htable, tb, h);
|
2012-12-02 17:04:43 +01:00
|
|
|
|
|
|
|
/* remove the TB from the page list */
|
|
|
|
if (tb->page_addr[0] != page_addr) {
|
|
|
|
p = page_find(tb->page_addr[0] >> TARGET_PAGE_BITS);
|
|
|
|
tb_page_remove(&p->first_tb, tb);
|
|
|
|
invalidate_page_bitmap(p);
|
|
|
|
}
|
|
|
|
if (tb->page_addr[1] != -1 && tb->page_addr[1] != page_addr) {
|
|
|
|
p = page_find(tb->page_addr[1] >> TARGET_PAGE_BITS);
|
|
|
|
tb_page_remove(&p->first_tb, tb);
|
|
|
|
invalidate_page_bitmap(p);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* remove the TB from the hash list */
|
|
|
|
h = tb_jmp_cache_hash_func(tb->pc);
|
2013-06-24 23:50:24 +02:00
|
|
|
CPU_FOREACH(cpu) {
|
2016-07-15 19:58:43 +02:00
|
|
|
if (atomic_read(&cpu->tb_jmp_cache[h]) == tb) {
|
|
|
|
atomic_set(&cpu->tb_jmp_cache[h], NULL);
|
2012-12-02 17:04:43 +01:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/* suppress this TB from the two jump lists */
|
2016-03-23 16:30:16 +01:00
|
|
|
tb_remove_from_jmp_list(tb, 0);
|
|
|
|
tb_remove_from_jmp_list(tb, 1);
|
2012-12-02 17:04:43 +01:00
|
|
|
|
|
|
|
/* suppress any remaining jumps to this TB */
|
2016-03-23 16:36:31 +01:00
|
|
|
tb_jmp_unlink(tb);
|
2012-12-02 17:04:43 +01:00
|
|
|
|
2013-01-31 19:47:23 +01:00
|
|
|
tcg_ctx.tb_ctx.tb_phys_invalidate_count++;
|
2012-12-02 17:04:43 +01:00
|
|
|
}
|
|
|
|
|
2015-08-11 12:42:55 +02:00
|
|
|
#ifdef CONFIG_SOFTMMU
|
2012-12-02 17:04:43 +01:00
|
|
|
static void build_page_bitmap(PageDesc *p)
|
|
|
|
{
|
|
|
|
int n, tb_start, tb_end;
|
|
|
|
TranslationBlock *tb;
|
|
|
|
|
2015-04-22 23:50:52 +02:00
|
|
|
p->code_bitmap = bitmap_new(TARGET_PAGE_SIZE);
|
2012-12-02 17:04:43 +01:00
|
|
|
|
|
|
|
tb = p->first_tb;
|
|
|
|
while (tb != NULL) {
|
|
|
|
n = (uintptr_t)tb & 3;
|
|
|
|
tb = (TranslationBlock *)((uintptr_t)tb & ~3);
|
|
|
|
/* NOTE: this is subtle as a TB may span two physical pages */
|
|
|
|
if (n == 0) {
|
|
|
|
/* NOTE: tb_end may be after the end of the page, but
|
|
|
|
it is not a problem */
|
|
|
|
tb_start = tb->pc & ~TARGET_PAGE_MASK;
|
|
|
|
tb_end = tb_start + tb->size;
|
|
|
|
if (tb_end > TARGET_PAGE_SIZE) {
|
|
|
|
tb_end = TARGET_PAGE_SIZE;
|
2016-10-27 17:10:05 +02:00
|
|
|
}
|
2012-12-02 17:04:43 +01:00
|
|
|
} else {
|
|
|
|
tb_start = 0;
|
|
|
|
tb_end = ((tb->pc + tb->size) & ~TARGET_PAGE_MASK);
|
|
|
|
}
|
2015-04-22 23:50:52 +02:00
|
|
|
bitmap_set(p->code_bitmap, tb_start, tb_end - tb_start);
|
2012-12-02 17:04:43 +01:00
|
|
|
tb = tb->page_next[n];
|
|
|
|
}
|
|
|
|
}
|
2015-08-11 12:42:55 +02:00
|
|
|
#endif
|
2012-12-02 17:04:43 +01:00
|
|
|
|
2016-03-22 16:47:54 +01:00
|
|
|
/* add the tb in the target page and protect it if necessary
|
|
|
|
*
|
|
|
|
* Called with mmap_lock held for user-mode emulation.
|
|
|
|
*/
|
|
|
|
static inline void tb_alloc_page(TranslationBlock *tb,
|
|
|
|
unsigned int n, tb_page_addr_t page_addr)
|
|
|
|
{
|
|
|
|
PageDesc *p;
|
|
|
|
#ifndef CONFIG_USER_ONLY
|
|
|
|
bool page_already_protected;
|
|
|
|
#endif
|
|
|
|
|
2016-10-27 17:10:05 +02:00
|
|
|
assert_memory_lock();
|
|
|
|
|
2016-03-22 16:47:54 +01:00
|
|
|
tb->page_addr[n] = page_addr;
|
|
|
|
p = page_find_alloc(page_addr >> TARGET_PAGE_BITS, 1);
|
|
|
|
tb->page_next[n] = p->first_tb;
|
|
|
|
#ifndef CONFIG_USER_ONLY
|
|
|
|
page_already_protected = p->first_tb != NULL;
|
|
|
|
#endif
|
|
|
|
p->first_tb = (TranslationBlock *)((uintptr_t)tb | n);
|
|
|
|
invalidate_page_bitmap(p);
|
|
|
|
|
|
|
|
#if defined(CONFIG_USER_ONLY)
|
|
|
|
if (p->flags & PAGE_WRITE) {
|
|
|
|
target_ulong addr;
|
|
|
|
PageDesc *p2;
|
|
|
|
int prot;
|
|
|
|
|
|
|
|
/* force the host page as non writable (writes will have a
|
|
|
|
page fault + mprotect overhead) */
|
|
|
|
page_addr &= qemu_host_page_mask;
|
|
|
|
prot = 0;
|
|
|
|
for (addr = page_addr; addr < page_addr + qemu_host_page_size;
|
|
|
|
addr += TARGET_PAGE_SIZE) {
|
|
|
|
|
|
|
|
p2 = page_find(addr >> TARGET_PAGE_BITS);
|
|
|
|
if (!p2) {
|
|
|
|
continue;
|
|
|
|
}
|
|
|
|
prot |= p2->flags;
|
|
|
|
p2->flags &= ~PAGE_WRITE;
|
|
|
|
}
|
|
|
|
mprotect(g2h(page_addr), qemu_host_page_size,
|
|
|
|
(prot & PAGE_BITS) & ~PAGE_WRITE);
|
2017-07-12 21:04:02 +02:00
|
|
|
if (DEBUG_TB_INVALIDATE_GATE) {
|
|
|
|
printf("protecting code page: 0x" TB_PAGE_ADDR_FMT "\n", page_addr);
|
|
|
|
}
|
2016-03-22 16:47:54 +01:00
|
|
|
}
|
|
|
|
#else
|
|
|
|
/* if some code is already present, then the pages are already
|
|
|
|
protected. So we handle the case where only the first TB is
|
|
|
|
allocated in a physical page */
|
|
|
|
if (!page_already_protected) {
|
|
|
|
tlb_protect_code(page_addr);
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
|
|
|
/* add a new TB and link it to the physical page tables. phys_page2 is
|
|
|
|
* (-1) to indicate that only one page contains the TB.
|
|
|
|
*
|
|
|
|
* Called with mmap_lock held for user-mode emulation.
|
|
|
|
*/
|
|
|
|
static void tb_link_page(TranslationBlock *tb, tb_page_addr_t phys_pc,
|
|
|
|
tb_page_addr_t phys_page2)
|
|
|
|
{
|
tb hash: hash phys_pc, pc, and flags with xxhash
For some workloads such as arm bootup, tb_phys_hash is performance-critical.
The is due to the high frequency of accesses to the hash table, originated
by (frequent) TLB flushes that wipe out the cpu-private tb_jmp_cache's.
More info:
https://lists.nongnu.org/archive/html/qemu-devel/2016-03/msg05098.html
To dig further into this I modified an arm image booting debian jessie to
immediately shut down after boot. Analysis revealed that quite a bit of time
is unnecessarily spent in tb_phys_hash: the cause is poor hashing that
results in very uneven loading of chains in the hash table's buckets;
the longest observed chain had ~550 elements.
The appended addresses this with two changes:
1) Use xxhash as the hash table's hash function. xxhash is a fast,
high-quality hashing function.
2) Feed the hashing function with not just tb_phys, but also pc and flags.
This improves performance over using just tb_phys for hashing, since that
resulted in some hash buckets having many TB's, while others getting very few;
with these changes, the longest observed chain on a single hash bucket is
brought down from ~550 to ~40.
Tests show that the other element checked for in tb_find_physical,
cs_base, is always a match when tb_phys+pc+flags are a match,
so hashing cs_base is wasteful. It could be that this is an ARM-only
thing, though. UPDATE:
On Tue, Apr 05, 2016 at 08:41:43 -0700, Richard Henderson wrote:
> The cs_base field is only used by i386 (in 16-bit modes), and sparc (for a TB
> consisting of only a delay slot).
> It may well still turn out to be reasonable to ignore cs_base for hashing.
BTW, after this change the hash table should not be called "tb_hash_phys"
anymore; this is addressed later in this series.
This change gives consistent bootup time improvements. I tested two
host machines:
- Intel Xeon E5-2690: 11.6% less time
- Intel i7-4790K: 19.2% less time
Increasing the number of hash buckets yields further improvements. However,
using a larger, fixed number of buckets can degrade performance for other
workloads that do not translate as many blocks (600K+ for debian-jessie arm
bootup). This is dealt with later in this series.
Reviewed-by: Sergey Fedorov <sergey.fedorov@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Emilio G. Cota <cota@braap.org>
Message-Id: <1465412133-3029-8-git-send-email-cota@braap.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
2016-06-08 20:55:25 +02:00
|
|
|
uint32_t h;
|
2016-03-22 16:47:54 +01:00
|
|
|
|
2016-10-27 17:10:05 +02:00
|
|
|
assert_memory_lock();
|
|
|
|
|
2016-03-22 16:47:54 +01:00
|
|
|
/* add in the page list */
|
|
|
|
tb_alloc_page(tb, 0, phys_pc & TARGET_PAGE_MASK);
|
|
|
|
if (phys_page2 != -1) {
|
|
|
|
tb_alloc_page(tb, 1, phys_page2);
|
|
|
|
} else {
|
|
|
|
tb->page_addr[1] = -1;
|
|
|
|
}
|
|
|
|
|
2016-07-15 19:58:48 +02:00
|
|
|
/* add in the hash table */
|
2017-07-04 10:42:32 +02:00
|
|
|
h = tb_hash_func(phys_pc, tb->pc, tb->flags, tb->trace_vcpu_dstate);
|
2016-07-15 19:58:48 +02:00
|
|
|
qht_insert(&tcg_ctx.tb_ctx.htable, tb, h);
|
|
|
|
|
2017-07-12 21:31:57 +02:00
|
|
|
#ifdef CONFIG_USER_ONLY
|
|
|
|
if (DEBUG_TB_CHECK_GATE) {
|
|
|
|
tb_page_check();
|
|
|
|
}
|
2016-03-22 16:47:54 +01:00
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
2015-08-11 10:59:50 +02:00
|
|
|
/* Called with mmap_lock held for user mode emulation. */
|
2013-09-01 17:43:17 +02:00
|
|
|
TranslationBlock *tb_gen_code(CPUState *cpu,
|
2012-12-02 17:04:43 +01:00
|
|
|
target_ulong pc, target_ulong cs_base,
|
2016-04-07 19:19:22 +02:00
|
|
|
uint32_t flags, int cflags)
|
2012-12-02 17:04:43 +01:00
|
|
|
{
|
2013-09-01 17:43:17 +02:00
|
|
|
CPUArchState *env = cpu->env_ptr;
|
2012-12-02 17:04:43 +01:00
|
|
|
TranslationBlock *tb;
|
|
|
|
tb_page_addr_t phys_pc, phys_page2;
|
|
|
|
target_ulong virt_page2;
|
2015-08-28 03:17:40 +02:00
|
|
|
tcg_insn_unit *gen_code_buf;
|
2015-09-02 04:11:45 +02:00
|
|
|
int gen_code_size, search_size;
|
2015-08-28 03:17:40 +02:00
|
|
|
#ifdef CONFIG_PROFILER
|
|
|
|
int64_t ti;
|
|
|
|
#endif
|
2016-10-27 17:10:05 +02:00
|
|
|
assert_memory_lock();
|
2012-12-02 17:04:43 +01:00
|
|
|
|
|
|
|
phys_pc = get_page_addr_code(env, pc);
|
2015-09-17 18:23:59 +02:00
|
|
|
if (use_icount && !(cflags & CF_IGNORE_ICOUNT)) {
|
2014-11-26 11:39:53 +01:00
|
|
|
cflags |= CF_USE_ICOUNT;
|
|
|
|
}
|
2015-09-22 22:01:15 +02:00
|
|
|
|
2012-12-02 17:04:43 +01:00
|
|
|
tb = tb_alloc(pc);
|
2015-09-22 22:01:15 +02:00
|
|
|
if (unlikely(!tb)) {
|
|
|
|
buffer_overflow:
|
2012-12-02 17:04:43 +01:00
|
|
|
/* flush must be done */
|
2015-06-24 04:31:15 +02:00
|
|
|
tb_flush(cpu);
|
2016-08-02 19:27:43 +02:00
|
|
|
mmap_unlock();
|
2017-01-26 13:34:18 +01:00
|
|
|
/* Make the execution loop process the flush as soon as possible. */
|
|
|
|
cpu->exception_index = EXCP_INTERRUPT;
|
2016-08-02 19:27:43 +02:00
|
|
|
cpu_loop_exit(cpu);
|
2012-12-02 17:04:43 +01:00
|
|
|
}
|
2015-08-28 03:17:40 +02:00
|
|
|
|
|
|
|
gen_code_buf = tcg_ctx.code_gen_ptr;
|
2017-07-12 06:08:21 +02:00
|
|
|
tb->tc.ptr = gen_code_buf;
|
2017-06-09 21:55:22 +02:00
|
|
|
tb->pc = pc;
|
2012-12-02 17:04:43 +01:00
|
|
|
tb->cs_base = cs_base;
|
|
|
|
tb->flags = flags;
|
|
|
|
tb->cflags = cflags;
|
2017-07-04 10:42:32 +02:00
|
|
|
tb->trace_vcpu_dstate = *cpu->trace_dstate;
|
2015-08-28 03:17:40 +02:00
|
|
|
|
|
|
|
#ifdef CONFIG_PROFILER
|
|
|
|
tcg_ctx.tb_count1++; /* includes aborted translations because of
|
|
|
|
exceptions */
|
|
|
|
ti = profile_getclock();
|
|
|
|
#endif
|
|
|
|
|
|
|
|
tcg_func_start(&tcg_ctx);
|
|
|
|
|
2016-06-09 19:31:41 +02:00
|
|
|
tcg_ctx.cpu = ENV_GET_CPU(env);
|
2017-07-14 10:17:35 +02:00
|
|
|
gen_intermediate_code(cpu, tb);
|
2016-06-09 19:31:41 +02:00
|
|
|
tcg_ctx.cpu = NULL;
|
2015-08-28 03:17:40 +02:00
|
|
|
|
2017-07-12 06:08:21 +02:00
|
|
|
trace_translate_block(tb, tb->pc, tb->tc.ptr);
|
2015-08-28 03:17:40 +02:00
|
|
|
|
|
|
|
/* generate machine code */
|
2016-04-10 22:35:45 +02:00
|
|
|
tb->jmp_reset_offset[0] = TB_JMP_RESET_OFFSET_INVALID;
|
|
|
|
tb->jmp_reset_offset[1] = TB_JMP_RESET_OFFSET_INVALID;
|
|
|
|
tcg_ctx.tb_jmp_reset_offset = tb->jmp_reset_offset;
|
2017-08-01 07:02:31 +02:00
|
|
|
if (TCG_TARGET_HAS_direct_jump) {
|
|
|
|
tcg_ctx.tb_jmp_insn_offset = tb->jmp_target_arg;
|
|
|
|
tcg_ctx.tb_jmp_target_addr = NULL;
|
|
|
|
} else {
|
|
|
|
tcg_ctx.tb_jmp_insn_offset = NULL;
|
|
|
|
tcg_ctx.tb_jmp_target_addr = tb->jmp_target_arg;
|
|
|
|
}
|
2015-08-28 03:17:40 +02:00
|
|
|
|
|
|
|
#ifdef CONFIG_PROFILER
|
|
|
|
tcg_ctx.tb_count++;
|
|
|
|
tcg_ctx.interm_time += profile_getclock() - ti;
|
2017-07-08 00:22:49 +02:00
|
|
|
ti = profile_getclock();
|
2015-08-28 03:17:40 +02:00
|
|
|
#endif
|
|
|
|
|
2015-09-22 22:01:15 +02:00
|
|
|
/* ??? Overflow could be handled better here. In particular, we
|
|
|
|
don't need to re-do gen_intermediate_code, nor should we re-do
|
|
|
|
the tcg optimization currently hidden inside tcg_gen_code. All
|
|
|
|
that should be required is to flush the TBs, allocate a new TB,
|
|
|
|
re-initialize it per above, and re-do the actual code generation. */
|
2016-03-15 15:30:16 +01:00
|
|
|
gen_code_size = tcg_gen_code(&tcg_ctx, tb);
|
2015-09-22 22:01:15 +02:00
|
|
|
if (unlikely(gen_code_size < 0)) {
|
|
|
|
goto buffer_overflow;
|
|
|
|
}
|
2015-09-02 04:11:45 +02:00
|
|
|
search_size = encode_search(tb, (void *)gen_code_buf + gen_code_size);
|
2015-09-22 22:01:15 +02:00
|
|
|
if (unlikely(search_size < 0)) {
|
|
|
|
goto buffer_overflow;
|
|
|
|
}
|
2015-08-28 03:17:40 +02:00
|
|
|
|
|
|
|
#ifdef CONFIG_PROFILER
|
2017-07-08 00:22:49 +02:00
|
|
|
tcg_ctx.code_time += profile_getclock() - ti;
|
2015-08-28 03:17:40 +02:00
|
|
|
tcg_ctx.code_in_len += tb->size;
|
|
|
|
tcg_ctx.code_out_len += gen_code_size;
|
2015-09-02 04:11:45 +02:00
|
|
|
tcg_ctx.search_out_len += search_size;
|
2015-08-28 03:17:40 +02:00
|
|
|
#endif
|
|
|
|
|
|
|
|
#ifdef DEBUG_DISAS
|
2016-03-15 15:30:21 +01:00
|
|
|
if (qemu_loglevel_mask(CPU_LOG_TB_OUT_ASM) &&
|
|
|
|
qemu_log_in_addr_range(tb->pc)) {
|
2016-09-23 00:17:10 +02:00
|
|
|
qemu_log_lock();
|
2015-08-28 03:17:40 +02:00
|
|
|
qemu_log("OUT: [size=%d]\n", gen_code_size);
|
2017-07-30 22:13:21 +02:00
|
|
|
if (tcg_ctx.data_gen_ptr) {
|
2017-07-12 06:08:21 +02:00
|
|
|
size_t code_size = tcg_ctx.data_gen_ptr - tb->tc.ptr;
|
2017-07-30 22:13:21 +02:00
|
|
|
size_t data_size = gen_code_size - code_size;
|
|
|
|
size_t i;
|
|
|
|
|
2017-07-12 06:08:21 +02:00
|
|
|
log_disas(tb->tc.ptr, code_size);
|
2017-07-30 22:13:21 +02:00
|
|
|
|
|
|
|
for (i = 0; i < data_size; i += sizeof(tcg_target_ulong)) {
|
|
|
|
if (sizeof(tcg_target_ulong) == 8) {
|
|
|
|
qemu_log("0x%08" PRIxPTR ": .quad 0x%016" PRIx64 "\n",
|
|
|
|
(uintptr_t)tcg_ctx.data_gen_ptr + i,
|
|
|
|
*(uint64_t *)(tcg_ctx.data_gen_ptr + i));
|
|
|
|
} else {
|
|
|
|
qemu_log("0x%08" PRIxPTR ": .long 0x%08x\n",
|
|
|
|
(uintptr_t)tcg_ctx.data_gen_ptr + i,
|
|
|
|
*(uint32_t *)(tcg_ctx.data_gen_ptr + i));
|
|
|
|
}
|
|
|
|
}
|
|
|
|
} else {
|
2017-07-12 06:08:21 +02:00
|
|
|
log_disas(tb->tc.ptr, gen_code_size);
|
2017-07-30 22:13:21 +02:00
|
|
|
}
|
2015-08-28 03:17:40 +02:00
|
|
|
qemu_log("\n");
|
|
|
|
qemu_log_flush();
|
2016-09-23 00:17:10 +02:00
|
|
|
qemu_log_unlock();
|
2015-08-28 03:17:40 +02:00
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
2015-09-02 04:11:45 +02:00
|
|
|
tcg_ctx.code_gen_ptr = (void *)
|
|
|
|
ROUND_UP((uintptr_t)gen_code_buf + gen_code_size + search_size,
|
|
|
|
CODE_GEN_ALIGN);
|
2012-12-02 17:04:43 +01:00
|
|
|
|
2016-03-22 17:00:12 +01:00
|
|
|
/* init jump list */
|
|
|
|
assert(((uintptr_t)tb & 3) == 0);
|
|
|
|
tb->jmp_list_first = (uintptr_t)tb | 2;
|
|
|
|
tb->jmp_list_next[0] = (uintptr_t)NULL;
|
|
|
|
tb->jmp_list_next[1] = (uintptr_t)NULL;
|
|
|
|
|
|
|
|
/* init original jump addresses wich has been set during tcg_gen_code() */
|
|
|
|
if (tb->jmp_reset_offset[0] != TB_JMP_RESET_OFFSET_INVALID) {
|
|
|
|
tb_reset_jump(tb, 0);
|
|
|
|
}
|
|
|
|
if (tb->jmp_reset_offset[1] != TB_JMP_RESET_OFFSET_INVALID) {
|
|
|
|
tb_reset_jump(tb, 1);
|
|
|
|
}
|
|
|
|
|
2012-12-02 17:04:43 +01:00
|
|
|
/* check next page if needed */
|
|
|
|
virt_page2 = (pc + tb->size - 1) & TARGET_PAGE_MASK;
|
|
|
|
phys_page2 = -1;
|
|
|
|
if ((pc & TARGET_PAGE_MASK) != virt_page2) {
|
|
|
|
phys_page2 = get_page_addr_code(env, virt_page2);
|
|
|
|
}
|
2016-03-22 17:00:12 +01:00
|
|
|
/* As long as consistency of the TB stuff is provided by tb_lock in user
|
|
|
|
* mode and is implicit in single-threaded softmmu emulation, no explicit
|
|
|
|
* memory barrier is required before tb_link_page() makes the TB visible
|
|
|
|
* through the physical hash table and physical page list.
|
|
|
|
*/
|
2012-12-02 17:04:43 +01:00
|
|
|
tb_link_page(tb, phys_pc, phys_page2);
|
|
|
|
return tb;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Invalidate all TBs which intersect with the target physical address range
|
|
|
|
* [start;end[. NOTE: start and end may refer to *different* physical pages.
|
|
|
|
* 'is_cpu_write_access' should be true if called from a real cpu write
|
|
|
|
* access: the virtual CPU will exit the current TB if code is modified inside
|
|
|
|
* this TB.
|
2015-08-11 10:59:50 +02:00
|
|
|
*
|
2016-10-27 17:10:16 +02:00
|
|
|
* Called with mmap_lock held for user-mode emulation, grabs tb_lock
|
|
|
|
* Called with tb_lock held for system-mode emulation
|
2012-12-02 17:04:43 +01:00
|
|
|
*/
|
2016-10-27 17:10:16 +02:00
|
|
|
static void tb_invalidate_phys_range_1(tb_page_addr_t start, tb_page_addr_t end)
|
2012-12-02 17:04:43 +01:00
|
|
|
{
|
|
|
|
while (start < end) {
|
2015-04-22 14:20:35 +02:00
|
|
|
tb_invalidate_phys_page_range(start, end, 0);
|
2012-12-02 17:04:43 +01:00
|
|
|
start &= TARGET_PAGE_MASK;
|
|
|
|
start += TARGET_PAGE_SIZE;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2016-10-27 17:10:16 +02:00
|
|
|
#ifdef CONFIG_SOFTMMU
|
|
|
|
void tb_invalidate_phys_range(tb_page_addr_t start, tb_page_addr_t end)
|
|
|
|
{
|
2017-02-23 19:29:05 +01:00
|
|
|
assert_tb_locked();
|
2016-10-27 17:10:16 +02:00
|
|
|
tb_invalidate_phys_range_1(start, end);
|
|
|
|
}
|
|
|
|
#else
|
|
|
|
void tb_invalidate_phys_range(tb_page_addr_t start, tb_page_addr_t end)
|
|
|
|
{
|
|
|
|
assert_memory_lock();
|
|
|
|
tb_lock();
|
|
|
|
tb_invalidate_phys_range_1(start, end);
|
|
|
|
tb_unlock();
|
|
|
|
}
|
|
|
|
#endif
|
2012-12-02 17:04:43 +01:00
|
|
|
/*
|
|
|
|
* Invalidate all TBs which intersect with the target physical address range
|
|
|
|
* [start;end[. NOTE: start and end must refer to the *same* physical page.
|
|
|
|
* 'is_cpu_write_access' should be true if called from a real cpu write
|
|
|
|
* access: the virtual CPU will exit the current TB if code is modified inside
|
|
|
|
* this TB.
|
2015-08-11 10:59:50 +02:00
|
|
|
*
|
2016-10-27 17:10:16 +02:00
|
|
|
* Called with tb_lock/mmap_lock held for user-mode emulation
|
|
|
|
* Called with tb_lock held for system-mode emulation
|
2012-12-02 17:04:43 +01:00
|
|
|
*/
|
|
|
|
void tb_invalidate_phys_page_range(tb_page_addr_t start, tb_page_addr_t end,
|
|
|
|
int is_cpu_write_access)
|
|
|
|
{
|
2016-05-03 13:04:22 +02:00
|
|
|
TranslationBlock *tb, *tb_next;
|
2013-09-03 10:51:26 +02:00
|
|
|
#if defined(TARGET_HAS_PRECISE_SMC)
|
2016-05-03 13:04:22 +02:00
|
|
|
CPUState *cpu = current_cpu;
|
2013-05-27 05:17:50 +02:00
|
|
|
CPUArchState *env = NULL;
|
|
|
|
#endif
|
2012-12-02 17:04:43 +01:00
|
|
|
tb_page_addr_t tb_start, tb_end;
|
|
|
|
PageDesc *p;
|
|
|
|
int n;
|
|
|
|
#ifdef TARGET_HAS_PRECISE_SMC
|
|
|
|
int current_tb_not_found = is_cpu_write_access;
|
|
|
|
TranslationBlock *current_tb = NULL;
|
|
|
|
int current_tb_modified = 0;
|
|
|
|
target_ulong current_pc = 0;
|
|
|
|
target_ulong current_cs_base = 0;
|
2016-04-07 19:19:22 +02:00
|
|
|
uint32_t current_flags = 0;
|
2012-12-02 17:04:43 +01:00
|
|
|
#endif /* TARGET_HAS_PRECISE_SMC */
|
|
|
|
|
2016-10-27 17:10:05 +02:00
|
|
|
assert_memory_lock();
|
2017-02-23 19:29:05 +01:00
|
|
|
assert_tb_locked();
|
2016-10-27 17:10:05 +02:00
|
|
|
|
2012-12-02 17:04:43 +01:00
|
|
|
p = page_find(start >> TARGET_PAGE_BITS);
|
|
|
|
if (!p) {
|
|
|
|
return;
|
|
|
|
}
|
2013-09-03 10:51:26 +02:00
|
|
|
#if defined(TARGET_HAS_PRECISE_SMC)
|
2013-05-27 05:17:50 +02:00
|
|
|
if (cpu != NULL) {
|
|
|
|
env = cpu->env_ptr;
|
2013-01-16 19:29:31 +01:00
|
|
|
}
|
2013-05-27 05:17:50 +02:00
|
|
|
#endif
|
2012-12-02 17:04:43 +01:00
|
|
|
|
|
|
|
/* we remove all the TBs in the range [start, end[ */
|
|
|
|
/* XXX: see if in some cases it could be faster to invalidate all
|
|
|
|
the code */
|
|
|
|
tb = p->first_tb;
|
|
|
|
while (tb != NULL) {
|
|
|
|
n = (uintptr_t)tb & 3;
|
|
|
|
tb = (TranslationBlock *)((uintptr_t)tb & ~3);
|
|
|
|
tb_next = tb->page_next[n];
|
|
|
|
/* NOTE: this is subtle as a TB may span two physical pages */
|
|
|
|
if (n == 0) {
|
|
|
|
/* NOTE: tb_end may be after the end of the page, but
|
|
|
|
it is not a problem */
|
|
|
|
tb_start = tb->page_addr[0] + (tb->pc & ~TARGET_PAGE_MASK);
|
|
|
|
tb_end = tb_start + tb->size;
|
|
|
|
} else {
|
|
|
|
tb_start = tb->page_addr[1];
|
|
|
|
tb_end = tb_start + ((tb->pc + tb->size) & ~TARGET_PAGE_MASK);
|
|
|
|
}
|
|
|
|
if (!(tb_end <= start || tb_start >= end)) {
|
|
|
|
#ifdef TARGET_HAS_PRECISE_SMC
|
|
|
|
if (current_tb_not_found) {
|
|
|
|
current_tb_not_found = 0;
|
|
|
|
current_tb = NULL;
|
2013-08-26 03:41:01 +02:00
|
|
|
if (cpu->mem_io_pc) {
|
2012-12-02 17:04:43 +01:00
|
|
|
/* now we have a real cpu fault */
|
2013-08-26 03:41:01 +02:00
|
|
|
current_tb = tb_find_pc(cpu->mem_io_pc);
|
2012-12-02 17:04:43 +01:00
|
|
|
}
|
|
|
|
}
|
|
|
|
if (current_tb == tb &&
|
|
|
|
(current_tb->cflags & CF_COUNT_MASK) != 1) {
|
|
|
|
/* If we are modifying the current TB, we must stop
|
|
|
|
its execution. We could be more precise by checking
|
|
|
|
that the modification is after the current PC, but it
|
|
|
|
would require a specialized function to partially
|
|
|
|
restore the CPU state */
|
|
|
|
|
|
|
|
current_tb_modified = 1;
|
2013-09-01 17:02:58 +02:00
|
|
|
cpu_restore_state_from_tb(cpu, current_tb, cpu->mem_io_pc);
|
2012-12-02 17:04:43 +01:00
|
|
|
cpu_get_tb_cpu_state(env, ¤t_pc, ¤t_cs_base,
|
|
|
|
¤t_flags);
|
|
|
|
}
|
|
|
|
#endif /* TARGET_HAS_PRECISE_SMC */
|
|
|
|
tb_phys_invalidate(tb, -1);
|
|
|
|
}
|
|
|
|
tb = tb_next;
|
|
|
|
}
|
|
|
|
#if !defined(CONFIG_USER_ONLY)
|
|
|
|
/* if no code remaining, no need to continue to use slow writes */
|
|
|
|
if (!p->first_tb) {
|
|
|
|
invalidate_page_bitmap(p);
|
2015-04-22 14:20:35 +02:00
|
|
|
tlb_unprotect_code(start);
|
2012-12-02 17:04:43 +01:00
|
|
|
}
|
|
|
|
#endif
|
|
|
|
#ifdef TARGET_HAS_PRECISE_SMC
|
|
|
|
if (current_tb_modified) {
|
|
|
|
/* we generate a block containing just the instruction
|
|
|
|
modifying the memory. It will ensure that it cannot modify
|
|
|
|
itself */
|
2013-09-01 17:43:17 +02:00
|
|
|
tb_gen_code(cpu, current_pc, current_cs_base, current_flags, 1);
|
2016-05-17 16:18:04 +02:00
|
|
|
cpu_loop_exit_noexc(cpu);
|
2012-12-02 17:04:43 +01:00
|
|
|
}
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
2015-08-11 12:42:55 +02:00
|
|
|
#ifdef CONFIG_SOFTMMU
|
2016-10-27 17:10:16 +02:00
|
|
|
/* len must be <= 8 and start must be a multiple of len.
|
|
|
|
* Called via softmmu_template.h when code areas are written to with
|
tcg: drop global lock during TCG code execution
This finally allows TCG to benefit from the iothread introduction: Drop
the global mutex while running pure TCG CPU code. Reacquire the lock
when entering MMIO or PIO emulation, or when leaving the TCG loop.
We have to revert a few optimization for the current TCG threading
model, namely kicking the TCG thread in qemu_mutex_lock_iothread and not
kicking it in qemu_cpu_kick. We also need to disable RAM block
reordering until we have a more efficient locking mechanism at hand.
Still, a Linux x86 UP guest and my Musicpal ARM model boot fine here.
These numbers demonstrate where we gain something:
20338 jan 20 0 331m 75m 6904 R 99 0.9 0:50.95 qemu-system-arm
20337 jan 20 0 331m 75m 6904 S 20 0.9 0:26.50 qemu-system-arm
The guest CPU was fully loaded, but the iothread could still run mostly
independent on a second core. Without the patch we don't get beyond
32206 jan 20 0 330m 73m 7036 R 82 0.9 1:06.00 qemu-system-arm
32204 jan 20 0 330m 73m 7036 S 21 0.9 0:17.03 qemu-system-arm
We don't benefit significantly, though, when the guest is not fully
loading a host CPU.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Message-Id: <1439220437-23957-10-git-send-email-fred.konrad@greensocs.com>
[FK: Rebase, fix qemu_devices_reset deadlock, rm address_space_* mutex]
Signed-off-by: KONRAD Frederic <fred.konrad@greensocs.com>
[EGC: fixed iothread lock for cpu-exec IRQ handling]
Signed-off-by: Emilio G. Cota <cota@braap.org>
[AJB: -smp single-threaded fix, clean commit msg, BQL fixes]
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Reviewed-by: Pranith Kumar <bobby.prani@gmail.com>
[PM: target-arm changes]
Acked-by: Peter Maydell <peter.maydell@linaro.org>
2017-02-23 19:29:11 +01:00
|
|
|
* iothread mutex not held.
|
2016-10-27 17:10:16 +02:00
|
|
|
*/
|
2012-12-02 17:04:43 +01:00
|
|
|
void tb_invalidate_phys_page_fast(tb_page_addr_t start, int len)
|
|
|
|
{
|
|
|
|
PageDesc *p;
|
|
|
|
|
|
|
|
#if 0
|
|
|
|
if (1) {
|
|
|
|
qemu_log("modifying code at 0x%x size=%d EIP=%x PC=%08x\n",
|
|
|
|
cpu_single_env->mem_io_vaddr, len,
|
|
|
|
cpu_single_env->eip,
|
|
|
|
cpu_single_env->eip +
|
|
|
|
(intptr_t)cpu_single_env->segs[R_CS].base);
|
|
|
|
}
|
|
|
|
#endif
|
2016-10-27 17:10:16 +02:00
|
|
|
assert_memory_lock();
|
|
|
|
|
2012-12-02 17:04:43 +01:00
|
|
|
p = page_find(start >> TARGET_PAGE_BITS);
|
|
|
|
if (!p) {
|
|
|
|
return;
|
|
|
|
}
|
2015-04-22 14:20:35 +02:00
|
|
|
if (!p->code_bitmap &&
|
|
|
|
++p->code_write_count >= SMC_BITMAP_USE_THRESHOLD) {
|
2016-10-27 17:10:03 +02:00
|
|
|
/* build code bitmap. FIXME: writes should be protected by
|
|
|
|
* tb_lock, reads by tb_lock or RCU.
|
|
|
|
*/
|
2015-04-22 14:20:35 +02:00
|
|
|
build_page_bitmap(p);
|
|
|
|
}
|
2012-12-02 17:04:43 +01:00
|
|
|
if (p->code_bitmap) {
|
2015-04-22 23:50:52 +02:00
|
|
|
unsigned int nr;
|
|
|
|
unsigned long b;
|
|
|
|
|
|
|
|
nr = start & ~TARGET_PAGE_MASK;
|
|
|
|
b = p->code_bitmap[BIT_WORD(nr)] >> (nr & (BITS_PER_LONG - 1));
|
2012-12-02 17:04:43 +01:00
|
|
|
if (b & ((1 << len) - 1)) {
|
|
|
|
goto do_invalidate;
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
do_invalidate:
|
|
|
|
tb_invalidate_phys_page_range(start, start + len, 1);
|
|
|
|
}
|
|
|
|
}
|
2015-08-11 12:42:55 +02:00
|
|
|
#else
|
2016-05-17 16:18:02 +02:00
|
|
|
/* Called with mmap_lock held. If pc is not 0 then it indicates the
|
|
|
|
* host PC of the faulting store instruction that caused this invalidate.
|
|
|
|
* Returns true if the caller needs to abort execution of the current
|
|
|
|
* TB (because it was modified by this store and the guest CPU has
|
|
|
|
* precise-SMC semantics).
|
|
|
|
*/
|
|
|
|
static bool tb_invalidate_phys_page(tb_page_addr_t addr, uintptr_t pc)
|
2012-12-02 17:04:43 +01:00
|
|
|
{
|
|
|
|
TranslationBlock *tb;
|
|
|
|
PageDesc *p;
|
|
|
|
int n;
|
|
|
|
#ifdef TARGET_HAS_PRECISE_SMC
|
|
|
|
TranslationBlock *current_tb = NULL;
|
2013-05-27 05:17:50 +02:00
|
|
|
CPUState *cpu = current_cpu;
|
|
|
|
CPUArchState *env = NULL;
|
2012-12-02 17:04:43 +01:00
|
|
|
int current_tb_modified = 0;
|
|
|
|
target_ulong current_pc = 0;
|
|
|
|
target_ulong current_cs_base = 0;
|
2016-04-07 19:19:22 +02:00
|
|
|
uint32_t current_flags = 0;
|
2012-12-02 17:04:43 +01:00
|
|
|
#endif
|
|
|
|
|
2016-10-27 17:10:16 +02:00
|
|
|
assert_memory_lock();
|
|
|
|
|
2012-12-02 17:04:43 +01:00
|
|
|
addr &= TARGET_PAGE_MASK;
|
|
|
|
p = page_find(addr >> TARGET_PAGE_BITS);
|
|
|
|
if (!p) {
|
2016-05-17 16:18:02 +02:00
|
|
|
return false;
|
2012-12-02 17:04:43 +01:00
|
|
|
}
|
2016-10-27 17:10:06 +02:00
|
|
|
|
|
|
|
tb_lock();
|
2012-12-02 17:04:43 +01:00
|
|
|
tb = p->first_tb;
|
|
|
|
#ifdef TARGET_HAS_PRECISE_SMC
|
|
|
|
if (tb && pc != 0) {
|
|
|
|
current_tb = tb_find_pc(pc);
|
|
|
|
}
|
2013-05-27 05:17:50 +02:00
|
|
|
if (cpu != NULL) {
|
|
|
|
env = cpu->env_ptr;
|
2013-01-16 19:29:31 +01:00
|
|
|
}
|
2012-12-02 17:04:43 +01:00
|
|
|
#endif
|
|
|
|
while (tb != NULL) {
|
|
|
|
n = (uintptr_t)tb & 3;
|
|
|
|
tb = (TranslationBlock *)((uintptr_t)tb & ~3);
|
|
|
|
#ifdef TARGET_HAS_PRECISE_SMC
|
|
|
|
if (current_tb == tb &&
|
|
|
|
(current_tb->cflags & CF_COUNT_MASK) != 1) {
|
|
|
|
/* If we are modifying the current TB, we must stop
|
|
|
|
its execution. We could be more precise by checking
|
|
|
|
that the modification is after the current PC, but it
|
|
|
|
would require a specialized function to partially
|
|
|
|
restore the CPU state */
|
|
|
|
|
|
|
|
current_tb_modified = 1;
|
2013-09-01 17:02:58 +02:00
|
|
|
cpu_restore_state_from_tb(cpu, current_tb, pc);
|
2012-12-02 17:04:43 +01:00
|
|
|
cpu_get_tb_cpu_state(env, ¤t_pc, ¤t_cs_base,
|
|
|
|
¤t_flags);
|
|
|
|
}
|
|
|
|
#endif /* TARGET_HAS_PRECISE_SMC */
|
|
|
|
tb_phys_invalidate(tb, addr);
|
|
|
|
tb = tb->page_next[n];
|
|
|
|
}
|
|
|
|
p->first_tb = NULL;
|
|
|
|
#ifdef TARGET_HAS_PRECISE_SMC
|
|
|
|
if (current_tb_modified) {
|
|
|
|
/* we generate a block containing just the instruction
|
|
|
|
modifying the memory. It will ensure that it cannot modify
|
|
|
|
itself */
|
2013-09-01 17:43:17 +02:00
|
|
|
tb_gen_code(cpu, current_pc, current_cs_base, current_flags, 1);
|
2016-10-27 17:10:06 +02:00
|
|
|
/* tb_lock will be reset after cpu_loop_exit_noexc longjmps
|
|
|
|
* back into the cpu_exec loop. */
|
2016-05-17 16:18:02 +02:00
|
|
|
return true;
|
2012-12-02 17:04:43 +01:00
|
|
|
}
|
|
|
|
#endif
|
2016-10-27 17:10:06 +02:00
|
|
|
tb_unlock();
|
|
|
|
|
2016-05-17 16:18:02 +02:00
|
|
|
return false;
|
2012-12-02 17:04:43 +01:00
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
|
|
|
/* find the TB 'tb' such that tb[0].tc_ptr <= tc_ptr <
|
|
|
|
tb[1].tc_ptr. Return NULL if not found */
|
2012-12-04 21:16:07 +01:00
|
|
|
static TranslationBlock *tb_find_pc(uintptr_t tc_ptr)
|
2012-12-02 17:04:43 +01:00
|
|
|
{
|
|
|
|
int m_min, m_max, m;
|
|
|
|
uintptr_t v;
|
|
|
|
TranslationBlock *tb;
|
|
|
|
|
2013-01-31 19:47:23 +01:00
|
|
|
if (tcg_ctx.tb_ctx.nb_tbs <= 0) {
|
2012-12-02 17:04:43 +01:00
|
|
|
return NULL;
|
|
|
|
}
|
2013-01-31 19:47:22 +01:00
|
|
|
if (tc_ptr < (uintptr_t)tcg_ctx.code_gen_buffer ||
|
|
|
|
tc_ptr >= (uintptr_t)tcg_ctx.code_gen_ptr) {
|
2012-12-02 17:04:43 +01:00
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
/* binary search (cf Knuth) */
|
|
|
|
m_min = 0;
|
2013-01-31 19:47:23 +01:00
|
|
|
m_max = tcg_ctx.tb_ctx.nb_tbs - 1;
|
2012-12-02 17:04:43 +01:00
|
|
|
while (m_min <= m_max) {
|
|
|
|
m = (m_min + m_max) >> 1;
|
2017-06-07 01:12:25 +02:00
|
|
|
tb = tcg_ctx.tb_ctx.tbs[m];
|
2017-07-12 06:08:21 +02:00
|
|
|
v = (uintptr_t)tb->tc.ptr;
|
2012-12-02 17:04:43 +01:00
|
|
|
if (v == tc_ptr) {
|
|
|
|
return tb;
|
|
|
|
} else if (tc_ptr < v) {
|
|
|
|
m_max = m - 1;
|
|
|
|
} else {
|
|
|
|
m_min = m + 1;
|
|
|
|
}
|
|
|
|
}
|
2017-06-07 01:12:25 +02:00
|
|
|
return tcg_ctx.tb_ctx.tbs[m_max];
|
2012-12-02 17:04:43 +01:00
|
|
|
}
|
|
|
|
|
2015-01-20 16:19:32 +01:00
|
|
|
#if !defined(CONFIG_USER_ONLY)
|
2013-11-07 19:43:10 +01:00
|
|
|
void tb_invalidate_phys_addr(AddressSpace *as, hwaddr addr)
|
2012-12-02 17:04:43 +01:00
|
|
|
{
|
|
|
|
ram_addr_t ram_addr;
|
2013-05-29 12:42:00 +02:00
|
|
|
MemoryRegion *mr;
|
2013-05-24 12:59:37 +02:00
|
|
|
hwaddr l = 1;
|
2012-12-02 17:04:43 +01:00
|
|
|
|
2015-03-18 14:21:43 +01:00
|
|
|
rcu_read_lock();
|
2013-11-07 19:43:10 +01:00
|
|
|
mr = address_space_translate(as, addr, &addr, &l, false);
|
2013-05-29 12:42:00 +02:00
|
|
|
if (!(memory_region_is_ram(mr)
|
|
|
|
|| memory_region_is_romd(mr))) {
|
2015-03-18 14:21:43 +01:00
|
|
|
rcu_read_unlock();
|
2012-12-02 17:04:43 +01:00
|
|
|
return;
|
|
|
|
}
|
2016-03-01 10:44:50 +01:00
|
|
|
ram_addr = memory_region_get_ram_addr(mr) + addr;
|
2016-10-27 17:10:16 +02:00
|
|
|
tb_lock();
|
2012-12-02 17:04:43 +01:00
|
|
|
tb_invalidate_phys_page_range(ram_addr, ram_addr + 1, 0);
|
2016-10-27 17:10:16 +02:00
|
|
|
tb_unlock();
|
2015-03-18 14:21:43 +01:00
|
|
|
rcu_read_unlock();
|
2012-12-02 17:04:43 +01:00
|
|
|
}
|
2015-01-20 16:19:32 +01:00
|
|
|
#endif /* !defined(CONFIG_USER_ONLY) */
|
2012-12-02 17:04:43 +01:00
|
|
|
|
2016-10-27 17:10:03 +02:00
|
|
|
/* Called with tb_lock held. */
|
2013-09-01 17:12:23 +02:00
|
|
|
void tb_check_watchpoint(CPUState *cpu)
|
2012-12-02 17:04:43 +01:00
|
|
|
{
|
|
|
|
TranslationBlock *tb;
|
|
|
|
|
2013-08-26 03:41:01 +02:00
|
|
|
tb = tb_find_pc(cpu->mem_io_pc);
|
2015-06-13 00:45:59 +02:00
|
|
|
if (tb) {
|
|
|
|
/* We can use retranslation to find the PC. */
|
|
|
|
cpu_restore_state_from_tb(cpu, tb, cpu->mem_io_pc);
|
|
|
|
tb_phys_invalidate(tb, -1);
|
|
|
|
} else {
|
|
|
|
/* The exception probably happened in a helper. The CPU state should
|
|
|
|
have been saved before calling it. Fetch the PC from there. */
|
|
|
|
CPUArchState *env = cpu->env_ptr;
|
|
|
|
target_ulong pc, cs_base;
|
|
|
|
tb_page_addr_t addr;
|
2016-04-07 19:19:22 +02:00
|
|
|
uint32_t flags;
|
2015-06-13 00:45:59 +02:00
|
|
|
|
|
|
|
cpu_get_tb_cpu_state(env, &pc, &cs_base, &flags);
|
|
|
|
addr = get_page_addr_code(env, pc);
|
|
|
|
tb_invalidate_phys_range(addr, addr + 1);
|
2012-12-02 17:04:43 +01:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
#ifndef CONFIG_USER_ONLY
|
|
|
|
/* in deterministic execution mode, instructions doing device I/Os
|
tcg: drop global lock during TCG code execution
This finally allows TCG to benefit from the iothread introduction: Drop
the global mutex while running pure TCG CPU code. Reacquire the lock
when entering MMIO or PIO emulation, or when leaving the TCG loop.
We have to revert a few optimization for the current TCG threading
model, namely kicking the TCG thread in qemu_mutex_lock_iothread and not
kicking it in qemu_cpu_kick. We also need to disable RAM block
reordering until we have a more efficient locking mechanism at hand.
Still, a Linux x86 UP guest and my Musicpal ARM model boot fine here.
These numbers demonstrate where we gain something:
20338 jan 20 0 331m 75m 6904 R 99 0.9 0:50.95 qemu-system-arm
20337 jan 20 0 331m 75m 6904 S 20 0.9 0:26.50 qemu-system-arm
The guest CPU was fully loaded, but the iothread could still run mostly
independent on a second core. Without the patch we don't get beyond
32206 jan 20 0 330m 73m 7036 R 82 0.9 1:06.00 qemu-system-arm
32204 jan 20 0 330m 73m 7036 S 21 0.9 0:17.03 qemu-system-arm
We don't benefit significantly, though, when the guest is not fully
loading a host CPU.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Message-Id: <1439220437-23957-10-git-send-email-fred.konrad@greensocs.com>
[FK: Rebase, fix qemu_devices_reset deadlock, rm address_space_* mutex]
Signed-off-by: KONRAD Frederic <fred.konrad@greensocs.com>
[EGC: fixed iothread lock for cpu-exec IRQ handling]
Signed-off-by: Emilio G. Cota <cota@braap.org>
[AJB: -smp single-threaded fix, clean commit msg, BQL fixes]
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Reviewed-by: Pranith Kumar <bobby.prani@gmail.com>
[PM: target-arm changes]
Acked-by: Peter Maydell <peter.maydell@linaro.org>
2017-02-23 19:29:11 +01:00
|
|
|
* must be at the end of the TB.
|
|
|
|
*
|
|
|
|
* Called by softmmu_template.h, with iothread mutex not held.
|
|
|
|
*/
|
2013-09-01 17:21:47 +02:00
|
|
|
void cpu_io_recompile(CPUState *cpu, uintptr_t retaddr)
|
2012-12-02 17:04:43 +01:00
|
|
|
{
|
2013-09-03 17:38:47 +02:00
|
|
|
#if defined(TARGET_MIPS) || defined(TARGET_SH4)
|
2013-09-01 17:21:47 +02:00
|
|
|
CPUArchState *env = cpu->env_ptr;
|
2013-09-03 17:38:47 +02:00
|
|
|
#endif
|
2012-12-02 17:04:43 +01:00
|
|
|
TranslationBlock *tb;
|
|
|
|
uint32_t n, cflags;
|
|
|
|
target_ulong pc, cs_base;
|
2016-04-07 19:19:22 +02:00
|
|
|
uint32_t flags;
|
2012-12-02 17:04:43 +01:00
|
|
|
|
2016-10-27 17:10:06 +02:00
|
|
|
tb_lock();
|
2012-12-02 17:04:43 +01:00
|
|
|
tb = tb_find_pc(retaddr);
|
|
|
|
if (!tb) {
|
2013-09-03 17:38:47 +02:00
|
|
|
cpu_abort(cpu, "cpu_io_recompile: could not find TB for pc=%p",
|
2012-12-02 17:04:43 +01:00
|
|
|
(void *)retaddr);
|
|
|
|
}
|
2013-08-26 05:51:49 +02:00
|
|
|
n = cpu->icount_decr.u16.low + tb->icount;
|
2013-09-01 17:02:58 +02:00
|
|
|
cpu_restore_state_from_tb(cpu, tb, retaddr);
|
2012-12-02 17:04:43 +01:00
|
|
|
/* Calculate how many instructions had been executed before the fault
|
|
|
|
occurred. */
|
2013-08-26 05:51:49 +02:00
|
|
|
n = n - cpu->icount_decr.u16.low;
|
2012-12-02 17:04:43 +01:00
|
|
|
/* Generate a new TB ending on the I/O insn. */
|
|
|
|
n++;
|
|
|
|
/* On MIPS and SH, delay slot instructions can only be restarted if
|
|
|
|
they were already the first instruction in the TB. If this is not
|
|
|
|
the first instruction in a TB then re-execute the preceding
|
|
|
|
branch. */
|
|
|
|
#if defined(TARGET_MIPS)
|
|
|
|
if ((env->hflags & MIPS_HFLAG_BMASK) != 0 && n > 1) {
|
2014-11-07 21:05:35 +01:00
|
|
|
env->active_tc.PC -= (env->hflags & MIPS_HFLAG_B16 ? 2 : 4);
|
2013-08-26 05:51:49 +02:00
|
|
|
cpu->icount_decr.u16.low++;
|
2012-12-02 17:04:43 +01:00
|
|
|
env->hflags &= ~MIPS_HFLAG_BMASK;
|
|
|
|
}
|
|
|
|
#elif defined(TARGET_SH4)
|
|
|
|
if ((env->flags & ((DELAY_SLOT | DELAY_SLOT_CONDITIONAL))) != 0
|
|
|
|
&& n > 1) {
|
|
|
|
env->pc -= 2;
|
2013-08-26 05:51:49 +02:00
|
|
|
cpu->icount_decr.u16.low++;
|
2012-12-02 17:04:43 +01:00
|
|
|
env->flags &= ~(DELAY_SLOT | DELAY_SLOT_CONDITIONAL);
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
/* This should never happen. */
|
|
|
|
if (n > CF_COUNT_MASK) {
|
2013-09-03 17:38:47 +02:00
|
|
|
cpu_abort(cpu, "TB too big during recompile");
|
2012-12-02 17:04:43 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
cflags = n | CF_LAST_IO;
|
|
|
|
pc = tb->pc;
|
|
|
|
cs_base = tb->cs_base;
|
|
|
|
flags = tb->flags;
|
|
|
|
tb_phys_invalidate(tb, -1);
|
2015-06-30 11:35:09 +02:00
|
|
|
if (tb->cflags & CF_NOCACHE) {
|
|
|
|
if (tb->orig_tb) {
|
|
|
|
/* Invalidate original TB if this TB was generated in
|
|
|
|
* cpu_exec_nocache() */
|
|
|
|
tb_phys_invalidate(tb->orig_tb, -1);
|
|
|
|
}
|
|
|
|
tb_free(tb);
|
|
|
|
}
|
2012-12-02 17:04:43 +01:00
|
|
|
/* FIXME: In theory this could raise an exception. In practice
|
|
|
|
we have already translated the block once so it's probably ok. */
|
2013-09-01 17:43:17 +02:00
|
|
|
tb_gen_code(cpu, pc, cs_base, flags, cflags);
|
2016-10-27 17:10:06 +02:00
|
|
|
|
2012-12-02 17:04:43 +01:00
|
|
|
/* TODO: If env->pc != tb->pc (i.e. the faulting instruction was not
|
2016-10-27 17:10:06 +02:00
|
|
|
* the first in the TB) then we end up generating a whole new TB and
|
|
|
|
* repeating the fault, which is horribly inefficient.
|
|
|
|
* Better would be to execute just this insn uncached, or generate a
|
|
|
|
* second new TB.
|
|
|
|
*
|
|
|
|
* cpu_loop_exit_noexc will longjmp back to cpu_exec where the
|
|
|
|
* tb_lock gets reset.
|
|
|
|
*/
|
2016-05-17 16:18:04 +02:00
|
|
|
cpu_loop_exit_noexc(cpu);
|
2012-12-02 17:04:43 +01:00
|
|
|
}
|
|
|
|
|
2017-06-15 02:36:13 +02:00
|
|
|
static void tb_jmp_cache_clear_page(CPUState *cpu, target_ulong page_addr)
|
2012-12-02 17:04:43 +01:00
|
|
|
{
|
2017-06-15 02:36:13 +02:00
|
|
|
unsigned int i, i0 = tb_jmp_cache_hash_page(page_addr);
|
2012-12-02 17:04:43 +01:00
|
|
|
|
2017-06-15 02:36:13 +02:00
|
|
|
for (i = 0; i < TB_JMP_PAGE_SIZE; i++) {
|
|
|
|
atomic_set(&cpu->tb_jmp_cache[i0 + i], NULL);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
void tb_flush_jmp_cache(CPUState *cpu, target_ulong addr)
|
|
|
|
{
|
2012-12-02 17:04:43 +01:00
|
|
|
/* Discard jump cache entries for any tb which might potentially
|
|
|
|
overlap the flushed page. */
|
2017-06-15 02:36:13 +02:00
|
|
|
tb_jmp_cache_clear_page(cpu, addr - TARGET_PAGE_SIZE);
|
|
|
|
tb_jmp_cache_clear_page(cpu, addr);
|
2012-12-02 17:04:43 +01:00
|
|
|
}
|
|
|
|
|
qht: do not segfault when gathering stats from an uninitialized qht
So far, QHT functions assume that the passed qht has previously been
initialized--otherwise they segfault.
This patch makes an exception for qht_statistics_init, with the goal
of simplifying calling code. For instance, qht_statistics_init is
called from the 'info jit' dump, and given that under KVM the TB qht
is never initialized, we get a segfault. Thus, instead of complicating
the 'info jit' code with additional checks, let's allow passing an
uninitialized qht to qht_statistics_init.
While at it, add a test for this to test-qht.
Before the patch (for $ qemu -enable-kvm [...]):
(qemu) info jit
[...]
direct jump count 0 (0%) (2 jumps=0 0%)
Program received signal SIGSEGV, Segmentation fault.
After the patch the "TB hash buckets", "TB hash occupancy"
and "TB hash avg chain" lines are omitted.
(qemu) info jit
[...]
direct jump count 0 (0%) (2 jumps=0 0%)
TB hash buckets 0/0 (-nan% head buckets used)
TB hash occupancy nan% avg chain occ. Histogram: (null)
TB hash avg chain nan buckets. Histogram: (null)
[...]
Reported by: Changlong Xie <xiecl.fnst@cn.fujitsu.com>
Signed-off-by: Emilio G. Cota <cota@braap.org>
Message-Id: <1469205390-14369-1-git-send-email-cota@braap.org>
[Extract printing statistics to an entirely separate function. - Paolo]
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2016-07-22 18:36:30 +02:00
|
|
|
static void print_qht_statistics(FILE *f, fprintf_function cpu_fprintf,
|
|
|
|
struct qht_stats hst)
|
|
|
|
{
|
|
|
|
uint32_t hgram_opts;
|
|
|
|
size_t hgram_bins;
|
|
|
|
char *hgram;
|
|
|
|
|
|
|
|
if (!hst.head_buckets) {
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
cpu_fprintf(f, "TB hash buckets %zu/%zu (%0.2f%% head buckets used)\n",
|
|
|
|
hst.used_head_buckets, hst.head_buckets,
|
|
|
|
(double)hst.used_head_buckets / hst.head_buckets * 100);
|
|
|
|
|
|
|
|
hgram_opts = QDIST_PR_BORDER | QDIST_PR_LABELS;
|
|
|
|
hgram_opts |= QDIST_PR_100X | QDIST_PR_PERCENT;
|
|
|
|
if (qdist_xmax(&hst.occupancy) - qdist_xmin(&hst.occupancy) == 1) {
|
|
|
|
hgram_opts |= QDIST_PR_NODECIMAL;
|
|
|
|
}
|
|
|
|
hgram = qdist_pr(&hst.occupancy, 10, hgram_opts);
|
|
|
|
cpu_fprintf(f, "TB hash occupancy %0.2f%% avg chain occ. Histogram: %s\n",
|
|
|
|
qdist_avg(&hst.occupancy) * 100, hgram);
|
|
|
|
g_free(hgram);
|
|
|
|
|
|
|
|
hgram_opts = QDIST_PR_BORDER | QDIST_PR_LABELS;
|
|
|
|
hgram_bins = qdist_xmax(&hst.chain) - qdist_xmin(&hst.chain);
|
|
|
|
if (hgram_bins > 10) {
|
|
|
|
hgram_bins = 10;
|
|
|
|
} else {
|
|
|
|
hgram_bins = 0;
|
|
|
|
hgram_opts |= QDIST_PR_NODECIMAL | QDIST_PR_NOBINRANGE;
|
|
|
|
}
|
|
|
|
hgram = qdist_pr(&hst.chain, hgram_bins, hgram_opts);
|
|
|
|
cpu_fprintf(f, "TB hash avg chain %0.3f buckets. Histogram: %s\n",
|
|
|
|
qdist_avg(&hst.chain), hgram);
|
|
|
|
g_free(hgram);
|
|
|
|
}
|
|
|
|
|
2012-12-02 17:04:43 +01:00
|
|
|
void dump_exec_info(FILE *f, fprintf_function cpu_fprintf)
|
|
|
|
{
|
|
|
|
int i, target_code_size, max_target_code_size;
|
|
|
|
int direct_jmp_count, direct_jmp2_count, cross_page;
|
|
|
|
TranslationBlock *tb;
|
translate-all: add tb hash bucket info to 'info jit' dump
Examples:
- Good hashing, i.e. tb_hash_func5(phys_pc, pc, flags):
TB count 715135/2684354
[...]
TB hash buckets 388775/524288 (74.15% head buckets used)
TB hash occupancy 33.04% avg chain occ. Histogram: [0,10)%|▆ █ ▅▁▃▁▁|[90,100]%
TB hash avg chain 1.017 buckets. Histogram: 1|█▁▁|3
- Not-so-good hashing, i.e. tb_hash_func5(phys_pc, pc, 0):
TB count 712636/2684354
[...]
TB hash buckets 344924/524288 (65.79% head buckets used)
TB hash occupancy 31.64% avg chain occ. Histogram: [0,10)%|█ ▆ ▅▁▃▁▂|[90,100]%
TB hash avg chain 1.047 buckets. Histogram: 1|█▁▁▁|4
- Bad hashing, i.e. tb_hash_func5(phys_pc, 0, 0):
TB count 702818/2684354
[...]
TB hash buckets 112741/524288 (21.50% head buckets used)
TB hash occupancy 10.15% avg chain occ. Histogram: [0,10)%|█ ▁ ▁▁▁▁▁|[90,100]%
TB hash avg chain 2.107 buckets. Histogram: [1.0,10.2)|█▁▁▁▁▁▁▁▁▁|[83.8,93.0]
- Good hashing, but no auto-resize:
TB count 715634/2684354
TB hash buckets 8192/8192 (100.00% head buckets used)
TB hash occupancy 98.30% avg chain occ. Histogram: [95.3,95.8)%|▁▁▃▄▃▄▁▇▁█|[99.5,100.0]%
TB hash avg chain 22.070 buckets. Histogram: [15.0,16.7)|▁▂▅▄█▅▁▁▁▁|[30.3,32.0]
Acked-by: Sergey Fedorov <sergey.fedorov@linaro.org>
Suggested-by: Richard Henderson <rth@twiddle.net>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Emilio G. Cota <cota@braap.org>
Message-Id: <1465412133-3029-16-git-send-email-cota@braap.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
2016-06-08 20:55:33 +02:00
|
|
|
struct qht_stats hst;
|
2012-12-02 17:04:43 +01:00
|
|
|
|
2016-10-27 17:10:06 +02:00
|
|
|
tb_lock();
|
|
|
|
|
2012-12-02 17:04:43 +01:00
|
|
|
target_code_size = 0;
|
|
|
|
max_target_code_size = 0;
|
|
|
|
cross_page = 0;
|
|
|
|
direct_jmp_count = 0;
|
|
|
|
direct_jmp2_count = 0;
|
2013-01-31 19:47:23 +01:00
|
|
|
for (i = 0; i < tcg_ctx.tb_ctx.nb_tbs; i++) {
|
2017-06-07 01:12:25 +02:00
|
|
|
tb = tcg_ctx.tb_ctx.tbs[i];
|
2012-12-02 17:04:43 +01:00
|
|
|
target_code_size += tb->size;
|
|
|
|
if (tb->size > max_target_code_size) {
|
|
|
|
max_target_code_size = tb->size;
|
|
|
|
}
|
|
|
|
if (tb->page_addr[1] != -1) {
|
|
|
|
cross_page++;
|
|
|
|
}
|
2016-04-10 22:35:45 +02:00
|
|
|
if (tb->jmp_reset_offset[0] != TB_JMP_RESET_OFFSET_INVALID) {
|
2012-12-02 17:04:43 +01:00
|
|
|
direct_jmp_count++;
|
2016-04-10 22:35:45 +02:00
|
|
|
if (tb->jmp_reset_offset[1] != TB_JMP_RESET_OFFSET_INVALID) {
|
2012-12-02 17:04:43 +01:00
|
|
|
direct_jmp2_count++;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
/* XXX: avoid using doubles ? */
|
|
|
|
cpu_fprintf(f, "Translation buffer state:\n");
|
|
|
|
cpu_fprintf(f, "gen code size %td/%zd\n",
|
2013-01-31 19:47:22 +01:00
|
|
|
tcg_ctx.code_gen_ptr - tcg_ctx.code_gen_buffer,
|
2015-09-22 22:01:15 +02:00
|
|
|
tcg_ctx.code_gen_highwater - tcg_ctx.code_gen_buffer);
|
2017-06-07 01:12:25 +02:00
|
|
|
cpu_fprintf(f, "TB count %d\n", tcg_ctx.tb_ctx.nb_tbs);
|
2012-12-02 17:04:43 +01:00
|
|
|
cpu_fprintf(f, "TB avg target size %d max=%d bytes\n",
|
2013-01-31 19:47:23 +01:00
|
|
|
tcg_ctx.tb_ctx.nb_tbs ? target_code_size /
|
|
|
|
tcg_ctx.tb_ctx.nb_tbs : 0,
|
|
|
|
max_target_code_size);
|
2012-12-02 17:04:43 +01:00
|
|
|
cpu_fprintf(f, "TB avg host size %td bytes (expansion ratio: %0.1f)\n",
|
2013-01-31 19:47:23 +01:00
|
|
|
tcg_ctx.tb_ctx.nb_tbs ? (tcg_ctx.code_gen_ptr -
|
|
|
|
tcg_ctx.code_gen_buffer) /
|
|
|
|
tcg_ctx.tb_ctx.nb_tbs : 0,
|
|
|
|
target_code_size ? (double) (tcg_ctx.code_gen_ptr -
|
|
|
|
tcg_ctx.code_gen_buffer) /
|
|
|
|
target_code_size : 0);
|
|
|
|
cpu_fprintf(f, "cross page TB count %d (%d%%)\n", cross_page,
|
|
|
|
tcg_ctx.tb_ctx.nb_tbs ? (cross_page * 100) /
|
|
|
|
tcg_ctx.tb_ctx.nb_tbs : 0);
|
2012-12-02 17:04:43 +01:00
|
|
|
cpu_fprintf(f, "direct jump count %d (%d%%) (2 jumps=%d %d%%)\n",
|
|
|
|
direct_jmp_count,
|
2013-01-31 19:47:23 +01:00
|
|
|
tcg_ctx.tb_ctx.nb_tbs ? (direct_jmp_count * 100) /
|
|
|
|
tcg_ctx.tb_ctx.nb_tbs : 0,
|
2012-12-02 17:04:43 +01:00
|
|
|
direct_jmp2_count,
|
2013-01-31 19:47:23 +01:00
|
|
|
tcg_ctx.tb_ctx.nb_tbs ? (direct_jmp2_count * 100) /
|
|
|
|
tcg_ctx.tb_ctx.nb_tbs : 0);
|
translate-all: add tb hash bucket info to 'info jit' dump
Examples:
- Good hashing, i.e. tb_hash_func5(phys_pc, pc, flags):
TB count 715135/2684354
[...]
TB hash buckets 388775/524288 (74.15% head buckets used)
TB hash occupancy 33.04% avg chain occ. Histogram: [0,10)%|▆ █ ▅▁▃▁▁|[90,100]%
TB hash avg chain 1.017 buckets. Histogram: 1|█▁▁|3
- Not-so-good hashing, i.e. tb_hash_func5(phys_pc, pc, 0):
TB count 712636/2684354
[...]
TB hash buckets 344924/524288 (65.79% head buckets used)
TB hash occupancy 31.64% avg chain occ. Histogram: [0,10)%|█ ▆ ▅▁▃▁▂|[90,100]%
TB hash avg chain 1.047 buckets. Histogram: 1|█▁▁▁|4
- Bad hashing, i.e. tb_hash_func5(phys_pc, 0, 0):
TB count 702818/2684354
[...]
TB hash buckets 112741/524288 (21.50% head buckets used)
TB hash occupancy 10.15% avg chain occ. Histogram: [0,10)%|█ ▁ ▁▁▁▁▁|[90,100]%
TB hash avg chain 2.107 buckets. Histogram: [1.0,10.2)|█▁▁▁▁▁▁▁▁▁|[83.8,93.0]
- Good hashing, but no auto-resize:
TB count 715634/2684354
TB hash buckets 8192/8192 (100.00% head buckets used)
TB hash occupancy 98.30% avg chain occ. Histogram: [95.3,95.8)%|▁▁▃▄▃▄▁▇▁█|[99.5,100.0]%
TB hash avg chain 22.070 buckets. Histogram: [15.0,16.7)|▁▂▅▄█▅▁▁▁▁|[30.3,32.0]
Acked-by: Sergey Fedorov <sergey.fedorov@linaro.org>
Suggested-by: Richard Henderson <rth@twiddle.net>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Emilio G. Cota <cota@braap.org>
Message-Id: <1465412133-3029-16-git-send-email-cota@braap.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
2016-06-08 20:55:33 +02:00
|
|
|
|
|
|
|
qht_statistics_init(&tcg_ctx.tb_ctx.htable, &hst);
|
qht: do not segfault when gathering stats from an uninitialized qht
So far, QHT functions assume that the passed qht has previously been
initialized--otherwise they segfault.
This patch makes an exception for qht_statistics_init, with the goal
of simplifying calling code. For instance, qht_statistics_init is
called from the 'info jit' dump, and given that under KVM the TB qht
is never initialized, we get a segfault. Thus, instead of complicating
the 'info jit' code with additional checks, let's allow passing an
uninitialized qht to qht_statistics_init.
While at it, add a test for this to test-qht.
Before the patch (for $ qemu -enable-kvm [...]):
(qemu) info jit
[...]
direct jump count 0 (0%) (2 jumps=0 0%)
Program received signal SIGSEGV, Segmentation fault.
After the patch the "TB hash buckets", "TB hash occupancy"
and "TB hash avg chain" lines are omitted.
(qemu) info jit
[...]
direct jump count 0 (0%) (2 jumps=0 0%)
TB hash buckets 0/0 (-nan% head buckets used)
TB hash occupancy nan% avg chain occ. Histogram: (null)
TB hash avg chain nan buckets. Histogram: (null)
[...]
Reported by: Changlong Xie <xiecl.fnst@cn.fujitsu.com>
Signed-off-by: Emilio G. Cota <cota@braap.org>
Message-Id: <1469205390-14369-1-git-send-email-cota@braap.org>
[Extract printing statistics to an entirely separate function. - Paolo]
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2016-07-22 18:36:30 +02:00
|
|
|
print_qht_statistics(f, cpu_fprintf, hst);
|
translate-all: add tb hash bucket info to 'info jit' dump
Examples:
- Good hashing, i.e. tb_hash_func5(phys_pc, pc, flags):
TB count 715135/2684354
[...]
TB hash buckets 388775/524288 (74.15% head buckets used)
TB hash occupancy 33.04% avg chain occ. Histogram: [0,10)%|▆ █ ▅▁▃▁▁|[90,100]%
TB hash avg chain 1.017 buckets. Histogram: 1|█▁▁|3
- Not-so-good hashing, i.e. tb_hash_func5(phys_pc, pc, 0):
TB count 712636/2684354
[...]
TB hash buckets 344924/524288 (65.79% head buckets used)
TB hash occupancy 31.64% avg chain occ. Histogram: [0,10)%|█ ▆ ▅▁▃▁▂|[90,100]%
TB hash avg chain 1.047 buckets. Histogram: 1|█▁▁▁|4
- Bad hashing, i.e. tb_hash_func5(phys_pc, 0, 0):
TB count 702818/2684354
[...]
TB hash buckets 112741/524288 (21.50% head buckets used)
TB hash occupancy 10.15% avg chain occ. Histogram: [0,10)%|█ ▁ ▁▁▁▁▁|[90,100]%
TB hash avg chain 2.107 buckets. Histogram: [1.0,10.2)|█▁▁▁▁▁▁▁▁▁|[83.8,93.0]
- Good hashing, but no auto-resize:
TB count 715634/2684354
TB hash buckets 8192/8192 (100.00% head buckets used)
TB hash occupancy 98.30% avg chain occ. Histogram: [95.3,95.8)%|▁▁▃▄▃▄▁▇▁█|[99.5,100.0]%
TB hash avg chain 22.070 buckets. Histogram: [15.0,16.7)|▁▂▅▄█▅▁▁▁▁|[30.3,32.0]
Acked-by: Sergey Fedorov <sergey.fedorov@linaro.org>
Suggested-by: Richard Henderson <rth@twiddle.net>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Emilio G. Cota <cota@braap.org>
Message-Id: <1465412133-3029-16-git-send-email-cota@braap.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
2016-06-08 20:55:33 +02:00
|
|
|
qht_statistics_destroy(&hst);
|
|
|
|
|
2012-12-02 17:04:43 +01:00
|
|
|
cpu_fprintf(f, "\nStatistics:\n");
|
2016-08-02 19:27:43 +02:00
|
|
|
cpu_fprintf(f, "TB flush count %u\n",
|
|
|
|
atomic_read(&tcg_ctx.tb_ctx.tb_flush_count));
|
2013-01-31 19:47:23 +01:00
|
|
|
cpu_fprintf(f, "TB invalidate count %d\n",
|
|
|
|
tcg_ctx.tb_ctx.tb_phys_invalidate_count);
|
2017-07-06 20:42:26 +02:00
|
|
|
cpu_fprintf(f, "TLB flush count %zu\n", tlb_flush_count());
|
2012-12-02 17:04:43 +01:00
|
|
|
tcg_dump_info(f, cpu_fprintf);
|
2016-10-27 17:10:06 +02:00
|
|
|
|
|
|
|
tb_unlock();
|
2012-12-02 17:04:43 +01:00
|
|
|
}
|
|
|
|
|
2014-11-02 09:04:18 +01:00
|
|
|
void dump_opcount_info(FILE *f, fprintf_function cpu_fprintf)
|
|
|
|
{
|
|
|
|
tcg_dump_op_count(f, cpu_fprintf);
|
|
|
|
}
|
|
|
|
|
2012-12-02 17:04:43 +01:00
|
|
|
#else /* CONFIG_USER_ONLY */
|
|
|
|
|
2013-01-18 15:03:43 +01:00
|
|
|
void cpu_interrupt(CPUState *cpu, int mask)
|
2012-12-02 17:04:43 +01:00
|
|
|
{
|
tcg: drop global lock during TCG code execution
This finally allows TCG to benefit from the iothread introduction: Drop
the global mutex while running pure TCG CPU code. Reacquire the lock
when entering MMIO or PIO emulation, or when leaving the TCG loop.
We have to revert a few optimization for the current TCG threading
model, namely kicking the TCG thread in qemu_mutex_lock_iothread and not
kicking it in qemu_cpu_kick. We also need to disable RAM block
reordering until we have a more efficient locking mechanism at hand.
Still, a Linux x86 UP guest and my Musicpal ARM model boot fine here.
These numbers demonstrate where we gain something:
20338 jan 20 0 331m 75m 6904 R 99 0.9 0:50.95 qemu-system-arm
20337 jan 20 0 331m 75m 6904 S 20 0.9 0:26.50 qemu-system-arm
The guest CPU was fully loaded, but the iothread could still run mostly
independent on a second core. Without the patch we don't get beyond
32206 jan 20 0 330m 73m 7036 R 82 0.9 1:06.00 qemu-system-arm
32204 jan 20 0 330m 73m 7036 S 21 0.9 0:17.03 qemu-system-arm
We don't benefit significantly, though, when the guest is not fully
loading a host CPU.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Message-Id: <1439220437-23957-10-git-send-email-fred.konrad@greensocs.com>
[FK: Rebase, fix qemu_devices_reset deadlock, rm address_space_* mutex]
Signed-off-by: KONRAD Frederic <fred.konrad@greensocs.com>
[EGC: fixed iothread lock for cpu-exec IRQ handling]
Signed-off-by: Emilio G. Cota <cota@braap.org>
[AJB: -smp single-threaded fix, clean commit msg, BQL fixes]
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Reviewed-by: Pranith Kumar <bobby.prani@gmail.com>
[PM: target-arm changes]
Acked-by: Peter Maydell <peter.maydell@linaro.org>
2017-02-23 19:29:11 +01:00
|
|
|
g_assert(qemu_mutex_iothread_locked());
|
2013-01-17 18:51:17 +01:00
|
|
|
cpu->interrupt_request |= mask;
|
2017-01-27 11:25:33 +01:00
|
|
|
cpu->icount_decr.u16.high = -1;
|
2012-12-02 17:04:43 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Walks guest process memory "regions" one by one
|
|
|
|
* and calls callback function 'fn' for each region.
|
|
|
|
*/
|
|
|
|
struct walk_memory_regions_data {
|
|
|
|
walk_memory_regions_fn fn;
|
|
|
|
void *priv;
|
2014-09-08 15:28:56 +02:00
|
|
|
target_ulong start;
|
2012-12-02 17:04:43 +01:00
|
|
|
int prot;
|
|
|
|
};
|
|
|
|
|
|
|
|
static int walk_memory_regions_end(struct walk_memory_regions_data *data,
|
2014-09-08 15:28:56 +02:00
|
|
|
target_ulong end, int new_prot)
|
2012-12-02 17:04:43 +01:00
|
|
|
{
|
2014-09-08 15:28:56 +02:00
|
|
|
if (data->start != -1u) {
|
2012-12-02 17:04:43 +01:00
|
|
|
int rc = data->fn(data->priv, data->start, end, data->prot);
|
|
|
|
if (rc != 0) {
|
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2014-09-08 15:28:56 +02:00
|
|
|
data->start = (new_prot ? end : -1u);
|
2012-12-02 17:04:43 +01:00
|
|
|
data->prot = new_prot;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int walk_memory_regions_1(struct walk_memory_regions_data *data,
|
2014-09-08 15:28:56 +02:00
|
|
|
target_ulong base, int level, void **lp)
|
2012-12-02 17:04:43 +01:00
|
|
|
{
|
2014-09-08 15:28:56 +02:00
|
|
|
target_ulong pa;
|
2012-12-02 17:04:43 +01:00
|
|
|
int i, rc;
|
|
|
|
|
|
|
|
if (*lp == NULL) {
|
|
|
|
return walk_memory_regions_end(data, base, 0);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (level == 0) {
|
|
|
|
PageDesc *pd = *lp;
|
|
|
|
|
2013-11-07 17:14:36 +01:00
|
|
|
for (i = 0; i < V_L2_SIZE; ++i) {
|
2012-12-02 17:04:43 +01:00
|
|
|
int prot = pd[i].flags;
|
|
|
|
|
|
|
|
pa = base | (i << TARGET_PAGE_BITS);
|
|
|
|
if (prot != data->prot) {
|
|
|
|
rc = walk_memory_regions_end(data, pa, prot);
|
|
|
|
if (rc != 0) {
|
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
void **pp = *lp;
|
|
|
|
|
2013-11-07 17:14:36 +01:00
|
|
|
for (i = 0; i < V_L2_SIZE; ++i) {
|
2014-09-08 15:28:56 +02:00
|
|
|
pa = base | ((target_ulong)i <<
|
2013-11-07 17:14:36 +01:00
|
|
|
(TARGET_PAGE_BITS + V_L2_BITS * level));
|
2012-12-02 17:04:43 +01:00
|
|
|
rc = walk_memory_regions_1(data, pa, level - 1, pp + i);
|
|
|
|
if (rc != 0) {
|
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
int walk_memory_regions(void *priv, walk_memory_regions_fn fn)
|
|
|
|
{
|
|
|
|
struct walk_memory_regions_data data;
|
2016-10-24 17:26:49 +02:00
|
|
|
uintptr_t i, l1_sz = v_l1_size;
|
2012-12-02 17:04:43 +01:00
|
|
|
|
|
|
|
data.fn = fn;
|
|
|
|
data.priv = priv;
|
2014-09-08 15:28:56 +02:00
|
|
|
data.start = -1u;
|
2012-12-02 17:04:43 +01:00
|
|
|
data.prot = 0;
|
|
|
|
|
2016-10-24 17:26:49 +02:00
|
|
|
for (i = 0; i < l1_sz; i++) {
|
|
|
|
target_ulong base = i << (v_l1_shift + TARGET_PAGE_BITS);
|
|
|
|
int rc = walk_memory_regions_1(&data, base, v_l2_levels, l1_map + i);
|
2012-12-02 17:04:43 +01:00
|
|
|
if (rc != 0) {
|
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
return walk_memory_regions_end(&data, 0, 0);
|
|
|
|
}
|
|
|
|
|
2014-09-08 15:28:56 +02:00
|
|
|
static int dump_region(void *priv, target_ulong start,
|
|
|
|
target_ulong end, unsigned long prot)
|
2012-12-02 17:04:43 +01:00
|
|
|
{
|
|
|
|
FILE *f = (FILE *)priv;
|
|
|
|
|
2014-09-08 15:28:56 +02:00
|
|
|
(void) fprintf(f, TARGET_FMT_lx"-"TARGET_FMT_lx
|
|
|
|
" "TARGET_FMT_lx" %c%c%c\n",
|
2012-12-02 17:04:43 +01:00
|
|
|
start, end, end - start,
|
|
|
|
((prot & PAGE_READ) ? 'r' : '-'),
|
|
|
|
((prot & PAGE_WRITE) ? 'w' : '-'),
|
|
|
|
((prot & PAGE_EXEC) ? 'x' : '-'));
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* dump memory mappings */
|
|
|
|
void page_dump(FILE *f)
|
|
|
|
{
|
2014-09-08 15:28:56 +02:00
|
|
|
const int length = sizeof(target_ulong) * 2;
|
2013-09-12 20:09:06 +02:00
|
|
|
(void) fprintf(f, "%-*s %-*s %-*s %s\n",
|
|
|
|
length, "start", length, "end", length, "size", "prot");
|
2012-12-02 17:04:43 +01:00
|
|
|
walk_memory_regions(f, dump_region);
|
|
|
|
}
|
|
|
|
|
|
|
|
int page_get_flags(target_ulong address)
|
|
|
|
{
|
|
|
|
PageDesc *p;
|
|
|
|
|
|
|
|
p = page_find(address >> TARGET_PAGE_BITS);
|
|
|
|
if (!p) {
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
return p->flags;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Modify the flags of a page and invalidate the code if necessary.
|
|
|
|
The flag PAGE_WRITE_ORG is positioned automatically depending
|
|
|
|
on PAGE_WRITE. The mmap_lock should already be held. */
|
|
|
|
void page_set_flags(target_ulong start, target_ulong end, int flags)
|
|
|
|
{
|
|
|
|
target_ulong addr, len;
|
|
|
|
|
|
|
|
/* This function should never be called with addresses outside the
|
|
|
|
guest address space. If this assert fires, it probably indicates
|
|
|
|
a missing call to h2g_valid. */
|
|
|
|
#if TARGET_ABI_BITS > L1_MAP_ADDR_SPACE_BITS
|
2014-09-08 15:28:56 +02:00
|
|
|
assert(end < ((target_ulong)1 << L1_MAP_ADDR_SPACE_BITS));
|
2012-12-02 17:04:43 +01:00
|
|
|
#endif
|
|
|
|
assert(start < end);
|
2016-10-27 17:10:05 +02:00
|
|
|
assert_memory_lock();
|
2012-12-02 17:04:43 +01:00
|
|
|
|
|
|
|
start = start & TARGET_PAGE_MASK;
|
|
|
|
end = TARGET_PAGE_ALIGN(end);
|
|
|
|
|
|
|
|
if (flags & PAGE_WRITE) {
|
|
|
|
flags |= PAGE_WRITE_ORG;
|
|
|
|
}
|
|
|
|
|
|
|
|
for (addr = start, len = end - start;
|
|
|
|
len != 0;
|
|
|
|
len -= TARGET_PAGE_SIZE, addr += TARGET_PAGE_SIZE) {
|
|
|
|
PageDesc *p = page_find_alloc(addr >> TARGET_PAGE_BITS, 1);
|
|
|
|
|
|
|
|
/* If the write protection bit is set, then we invalidate
|
|
|
|
the code inside. */
|
|
|
|
if (!(p->flags & PAGE_WRITE) &&
|
|
|
|
(flags & PAGE_WRITE) &&
|
|
|
|
p->first_tb) {
|
2016-05-17 16:18:02 +02:00
|
|
|
tb_invalidate_phys_page(addr, 0);
|
2012-12-02 17:04:43 +01:00
|
|
|
}
|
|
|
|
p->flags = flags;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
int page_check_range(target_ulong start, target_ulong len, int flags)
|
|
|
|
{
|
|
|
|
PageDesc *p;
|
|
|
|
target_ulong end;
|
|
|
|
target_ulong addr;
|
|
|
|
|
|
|
|
/* This function should never be called with addresses outside the
|
|
|
|
guest address space. If this assert fires, it probably indicates
|
|
|
|
a missing call to h2g_valid. */
|
|
|
|
#if TARGET_ABI_BITS > L1_MAP_ADDR_SPACE_BITS
|
2014-09-08 15:28:56 +02:00
|
|
|
assert(start < ((target_ulong)1 << L1_MAP_ADDR_SPACE_BITS));
|
2012-12-02 17:04:43 +01:00
|
|
|
#endif
|
|
|
|
|
|
|
|
if (len == 0) {
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
if (start + len - 1 < start) {
|
|
|
|
/* We've wrapped around. */
|
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* must do before we loose bits in the next step */
|
|
|
|
end = TARGET_PAGE_ALIGN(start + len);
|
|
|
|
start = start & TARGET_PAGE_MASK;
|
|
|
|
|
|
|
|
for (addr = start, len = end - start;
|
|
|
|
len != 0;
|
|
|
|
len -= TARGET_PAGE_SIZE, addr += TARGET_PAGE_SIZE) {
|
|
|
|
p = page_find(addr >> TARGET_PAGE_BITS);
|
|
|
|
if (!p) {
|
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
if (!(p->flags & PAGE_VALID)) {
|
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
|
|
|
|
if ((flags & PAGE_READ) && !(p->flags & PAGE_READ)) {
|
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
if (flags & PAGE_WRITE) {
|
|
|
|
if (!(p->flags & PAGE_WRITE_ORG)) {
|
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
/* unprotect the page if it was put read-only because it
|
|
|
|
contains translated code */
|
|
|
|
if (!(p->flags & PAGE_WRITE)) {
|
2016-05-17 16:18:03 +02:00
|
|
|
if (!page_unprotect(addr, 0)) {
|
2012-12-02 17:04:43 +01:00
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* called from signal handler: invalidate the code and unprotect the
|
2016-05-17 16:18:03 +02:00
|
|
|
* page. Return 0 if the fault was not handled, 1 if it was handled,
|
|
|
|
* and 2 if it was handled but the caller must cause the TB to be
|
|
|
|
* immediately exited. (We can only return 2 if the 'pc' argument is
|
|
|
|
* non-zero.)
|
|
|
|
*/
|
|
|
|
int page_unprotect(target_ulong address, uintptr_t pc)
|
2012-12-02 17:04:43 +01:00
|
|
|
{
|
|
|
|
unsigned int prot;
|
2016-07-07 10:33:12 +02:00
|
|
|
bool current_tb_invalidated;
|
2012-12-02 17:04:43 +01:00
|
|
|
PageDesc *p;
|
|
|
|
target_ulong host_start, host_end, addr;
|
|
|
|
|
|
|
|
/* Technically this isn't safe inside a signal handler. However we
|
|
|
|
know this only ever happens in a synchronous SEGV handler, so in
|
|
|
|
practice it seems to be ok. */
|
|
|
|
mmap_lock();
|
|
|
|
|
|
|
|
p = page_find(address >> TARGET_PAGE_BITS);
|
|
|
|
if (!p) {
|
|
|
|
mmap_unlock();
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* if the page was really writable, then we change its
|
|
|
|
protection back to writable */
|
|
|
|
if ((p->flags & PAGE_WRITE_ORG) && !(p->flags & PAGE_WRITE)) {
|
|
|
|
host_start = address & qemu_host_page_mask;
|
|
|
|
host_end = host_start + qemu_host_page_size;
|
|
|
|
|
|
|
|
prot = 0;
|
2016-07-07 10:33:12 +02:00
|
|
|
current_tb_invalidated = false;
|
2012-12-02 17:04:43 +01:00
|
|
|
for (addr = host_start ; addr < host_end ; addr += TARGET_PAGE_SIZE) {
|
|
|
|
p = page_find(addr >> TARGET_PAGE_BITS);
|
|
|
|
p->flags |= PAGE_WRITE;
|
|
|
|
prot |= p->flags;
|
|
|
|
|
|
|
|
/* and since the content will be modified, we must invalidate
|
|
|
|
the corresponding translated code. */
|
2016-07-07 10:33:12 +02:00
|
|
|
current_tb_invalidated |= tb_invalidate_phys_page(addr, pc);
|
2017-07-12 21:31:57 +02:00
|
|
|
#ifdef CONFIG_USER_ONLY
|
|
|
|
if (DEBUG_TB_CHECK_GATE) {
|
|
|
|
tb_invalidate_check(addr);
|
|
|
|
}
|
2012-12-02 17:04:43 +01:00
|
|
|
#endif
|
|
|
|
}
|
|
|
|
mprotect((void *)g2h(host_start), qemu_host_page_size,
|
|
|
|
prot & PAGE_BITS);
|
|
|
|
|
|
|
|
mmap_unlock();
|
2016-07-07 10:33:12 +02:00
|
|
|
/* If current TB was invalidated return to main loop */
|
|
|
|
return current_tb_invalidated ? 2 : 1;
|
2012-12-02 17:04:43 +01:00
|
|
|
}
|
|
|
|
mmap_unlock();
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
#endif /* CONFIG_USER_ONLY */
|
2017-06-26 07:22:55 +02:00
|
|
|
|
|
|
|
/* This is a wrapper for common code that can not use CONFIG_SOFTMMU */
|
|
|
|
void tcg_flush_softmmu_tlb(CPUState *cs)
|
|
|
|
{
|
|
|
|
#ifdef CONFIG_SOFTMMU
|
|
|
|
tlb_flush(cs);
|
|
|
|
#endif
|
|
|
|
}
|