2011-04-01 06:15:20 +02:00
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/*
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* QEMU PowerPC pSeries Logical Partition (aka sPAPR) hardware System Emulator
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*
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* Copyright (c) 2004-2007 Fabrice Bellard
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* Copyright (c) 2007 Jocelyn Mayer
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* Copyright (c) 2010 David Gibson, IBM Corporation.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*
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*/
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2016-01-26 19:16:58 +01:00
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#include "qemu/osdep.h"
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include/qemu/osdep.h: Don't include qapi/error.h
Commit 57cb38b included qapi/error.h into qemu/osdep.h to get the
Error typedef. Since then, we've moved to include qemu/osdep.h
everywhere. Its file comment explains: "To avoid getting into
possible circular include dependencies, this file should not include
any other QEMU headers, with the exceptions of config-host.h,
compiler.h, os-posix.h and os-win32.h, all of which are doing a
similar job to this file and are under similar constraints."
qapi/error.h doesn't do a similar job, and it doesn't adhere to
similar constraints: it includes qapi-types.h. That's in excess of
100KiB of crap most .c files don't actually need.
Add the typedef to qemu/typedefs.h, and include that instead of
qapi/error.h. Include qapi/error.h in .c files that need it and don't
get it now. Include qapi-types.h in qom/object.h for uint16List.
Update scripts/clean-includes accordingly. Update it further to match
reality: replace config.h by config-target.h, add sysemu/os-posix.h,
sysemu/os-win32.h. Update the list of includes in the qemu/osdep.h
comment quoted above similarly.
This reduces the number of objects depending on qapi/error.h from "all
of them" to less than a third. Unfortunately, the number depending on
qapi-types.h shrinks only a little. More work is needed for that one.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
[Fix compilation without the spice devel packages. - Paolo]
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2016-03-14 09:01:28 +01:00
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#include "qapi/error.h"
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2017-08-18 07:50:22 +02:00
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#include "qapi/visitor.h"
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2012-12-17 18:20:04 +01:00
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#include "sysemu/sysemu.h"
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2015-02-08 19:51:16 +01:00
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#include "sysemu/numa.h"
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2013-02-04 15:40:22 +01:00
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#include "hw/hw.h"
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2015-12-15 13:16:16 +01:00
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#include "qemu/log.h"
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2014-03-17 03:40:27 +01:00
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#include "hw/fw-path-provider.h"
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2011-04-01 06:15:20 +02:00
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#include "elf.h"
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2012-10-24 08:43:34 +02:00
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#include "net/net.h"
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2015-09-01 03:25:35 +02:00
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#include "sysemu/device_tree.h"
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2012-12-17 18:20:04 +01:00
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#include "sysemu/cpus.h"
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2017-01-10 11:59:55 +01:00
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#include "sysemu/hw_accel.h"
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2011-09-29 23:39:10 +02:00
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#include "kvm_ppc.h"
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2017-04-24 19:02:44 +02:00
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#include "migration/misc.h"
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2017-04-24 18:53:30 +02:00
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#include "migration/global_state.h"
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2017-04-24 13:42:55 +02:00
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#include "migration/register.h"
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2013-07-18 21:33:01 +02:00
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#include "mmu-hash64.h"
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2017-03-20 00:46:46 +01:00
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#include "mmu-book3s-v3.h"
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2017-11-17 06:39:00 +01:00
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#include "cpu-models.h"
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spapr: Implement processor compatibility in ibm, client-architecture-support
Modern Linux kernels support last POWERPC CPUs so when a kernel boots,
in most cases it can find a matching cpu_spec in the kernel's cpu_specs
list. However if the kernel is quite old, it may be missing a definition
of the actual CPU. To provide an ability for old kernels to work on modern
hardware, a Processor Compatibility Mode has been introduced
by the PowerISA specification.
>From the hardware prospective, it is supported by the Processor
Compatibility Register (PCR) which is defined in PowerISA. The register
enables one of the compatibility modes (2.05/2.06/2.07).
Since PCR is a hypervisor privileged register and cannot be
directly accessed from the guest, the mode selection is done via
ibm,client-architecture-support (CAS) RTAS call using which the guest
specifies what "raw" and "architected" CPU versions it supports.
QEMU works out the best match, changes a "cpu-version" property of
every CPU and notifies the guest about the change by setting these
properties in the buffer passed as a response on a custom H_CAS hypercall.
This implements ibm,client-architecture-support parameters parsing
(now only for PVRs) and cooks the device tree diff with new values for
"cpu-version", "ibm,ppc-interrupt-server#s" and
"ibm,ppc-interrupt-server#s" properties.
Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Signed-off-by: Alexander Graf <agraf@suse.de>
2014-05-23 04:26:57 +02:00
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#include "qom/cpu.h"
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2011-04-01 06:15:20 +02:00
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#include "hw/boards.h"
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2013-02-05 17:06:20 +01:00
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#include "hw/ppc/ppc.h"
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2011-04-01 06:15:20 +02:00
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#include "hw/loader.h"
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2016-07-25 16:24:41 +02:00
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#include "hw/ppc/fdt.h"
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2013-02-05 17:06:20 +01:00
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#include "hw/ppc/spapr.h"
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#include "hw/ppc/spapr_vio.h"
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#include "hw/pci-host/spapr.h"
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2012-12-12 13:24:50 +01:00
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#include "hw/pci/msi.h"
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2011-04-01 06:15:20 +02:00
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2013-02-04 15:40:22 +01:00
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#include "hw/pci/pci.h"
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2014-03-17 03:40:27 +01:00
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#include "hw/scsi/scsi.h"
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#include "hw/virtio/virtio-scsi.h"
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2017-06-05 17:55:18 +02:00
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#include "hw/virtio/vhost-scsi-common.h"
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2011-08-09 17:57:37 +02:00
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2012-12-17 18:19:49 +01:00
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#include "exec/address-spaces.h"
|
2018-03-16 09:19:13 +01:00
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#include "exec/ram_addr.h"
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2012-08-16 04:03:56 +02:00
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#include "hw/usb.h"
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2012-12-17 18:20:00 +01:00
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#include "qemu/config-file.h"
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2013-12-23 16:40:40 +01:00
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#include "qemu/error-report.h"
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2014-05-23 04:26:54 +02:00
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#include "trace.h"
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2014-08-20 14:16:36 +02:00
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#include "hw/nmi.h"
|
2017-02-27 15:29:32 +01:00
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#include "hw/intc/intc.h"
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2011-10-03 12:56:38 +02:00
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2014-10-14 18:40:06 +02:00
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#include "hw/compat.h"
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2016-03-20 18:16:19 +01:00
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#include "qemu/cutils.h"
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2016-06-10 02:59:03 +02:00
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#include "hw/ppc/spapr_cpu_core.h"
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2018-04-23 18:51:16 +02:00
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#include "hw/mem/memory-device.h"
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2014-10-14 18:40:06 +02:00
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2011-04-01 06:15:20 +02:00
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#include <libfdt.h>
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2012-01-11 20:46:28 +01:00
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/* SLOF memory layout:
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*
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* SLOF raw image loaded at 0, copies its romfs right below the flat
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* device-tree, then position SLOF itself 31M below that
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*
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* So we set FW_OVERHEAD to 40MB which should account for all of that
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* and more
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*
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* We load our kernel at 4M, leaving space for SLOF initial image
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*/
|
2015-08-06 05:37:24 +02:00
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#define FDT_MAX_SIZE 0x100000
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2011-04-01 06:15:23 +02:00
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#define RTAS_MAX_SIZE 0x10000
|
spapr: Locate RTAS and device-tree based on real RMA
We currently calculate the final RTAS and FDT location based on
the early estimate of the RMA size, cropped to 256M on KVM since
we only know the real RMA size at reset time which happens much
later in the boot process.
This means the FDT and RTAS end up right below 256M while they
could be much higher, using precious RMA space and limiting
what the OS bootloader can put there which has proved to be
a problem with some OSes (such as when using very large initrd's)
Fortunately, we do the actual copy of the device-tree into guest
memory much later, during reset, late enough to be able to do it
using the final RMA value, we just need to move the calculation
to the right place.
However, RTAS is still loaded too early, so we change the code to
load the tiny blob into qemu memory early on, and then copy it into
guest memory at reset time. It's small enough that the memory usage
doesn't matter.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
[aik: fixed errors from checkpatch.pl, defined RTAS_MAX_ADDR]
Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
[agraf: fix compilation on 32bit hosts]
Signed-off-by: Alexander Graf <agraf@suse.de>
2014-07-21 05:02:04 +02:00
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|
#define RTAS_MAX_ADDR 0x80000000 /* RTAS must stay below that */
|
Add SLOF-based partition firmware for pSeries machine, allowing more boot options
Currently, the emulated pSeries machine requires the use of the
-kernel parameter in order to explicitly load a guest kernel. This
means booting from the virtual disk, cdrom or network is not possible.
This patch addresses this limitation by inserting a within-partition
firmware image (derived from the "SLOF" free Open Firmware project).
If -kernel is not specified, qemu will now load the SLOF image, which
has access to the qemu boot device list through the device tree, and
can boot from any of the usual virtual devices.
In order to support the new firmware, an extension to the emulated
machine/hypervisor is necessary. Unlike Linux, which expects
multi-CPU entry to be handled kexec() style, the SLOF firmware expects
only one CPU to be active at entry, and to use a hypervisor RTAS
method to enable the other CPUs one by one.
This patch also implements this 'start-cpu' method, so that SLOF can
start the secondary CPUs and marshal them into the kexec() holding
pattern ready for entry into the guest OS. Linux should, and in the
future might directly use the start-cpu method to enable initially
disabled CPUs, but for now it does require kexec() entry.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-04-01 06:15:34 +02:00
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#define FW_MAX_SIZE 0x400000
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#define FW_FILE_NAME "slof.bin"
|
2012-01-11 20:46:28 +01:00
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#define FW_OVERHEAD 0x2800000
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#define KERNEL_LOAD_ADDR FW_MAX_SIZE
|
Add SLOF-based partition firmware for pSeries machine, allowing more boot options
Currently, the emulated pSeries machine requires the use of the
-kernel parameter in order to explicitly load a guest kernel. This
means booting from the virtual disk, cdrom or network is not possible.
This patch addresses this limitation by inserting a within-partition
firmware image (derived from the "SLOF" free Open Firmware project).
If -kernel is not specified, qemu will now load the SLOF image, which
has access to the qemu boot device list through the device tree, and
can boot from any of the usual virtual devices.
In order to support the new firmware, an extension to the emulated
machine/hypervisor is necessary. Unlike Linux, which expects
multi-CPU entry to be handled kexec() style, the SLOF firmware expects
only one CPU to be active at entry, and to use a hypervisor RTAS
method to enable the other CPUs one by one.
This patch also implements this 'start-cpu' method, so that SLOF can
start the secondary CPUs and marshal them into the kexec() holding
pattern ready for entry into the guest OS. Linux should, and in the
future might directly use the start-cpu method to enable initially
disabled CPUs, but for now it does require kexec() entry.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-04-01 06:15:34 +02:00
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|
2012-01-11 20:46:28 +01:00
|
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#define MIN_RMA_SLOF 128UL
|
2011-04-01 06:15:20 +02:00
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2011-08-03 23:02:17 +02:00
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#define PHANDLE_XICP 0x00001111
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|
2018-02-14 20:40:53 +01:00
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/* These two functions implement the VCPU id numbering: one to compute them
|
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* all and one to identify thread 0 of a VCORE. Any change to the first one
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* is likely to have an impact on the second one, so let's keep them close.
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*/
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static int spapr_vcpu_id(sPAPRMachineState *spapr, int cpu_index)
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{
|
2018-02-27 16:23:07 +01:00
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assert(spapr->vsmt);
|
2018-02-14 20:40:53 +01:00
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return
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(cpu_index / smp_threads) * spapr->vsmt + cpu_index % smp_threads;
|
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}
|
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static bool spapr_is_thread0_in_vcore(sPAPRMachineState *spapr,
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PowerPCCPU *cpu)
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{
|
2018-02-27 16:23:07 +01:00
|
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assert(spapr->vsmt);
|
2018-02-14 20:40:53 +01:00
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return spapr_get_vcpu_id(cpu) % spapr->vsmt == 0;
|
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}
|
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|
2017-06-14 15:29:19 +02:00
|
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static bool pre_2_10_vmstate_dummy_icp_needed(void *opaque)
|
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|
{
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|
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/* Dummy entries correspond to unused ICPState objects in older QEMUs,
|
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* and newer QEMUs don't even have them. In both cases, we don't want
|
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* to send anything on the wire.
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*/
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return false;
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}
|
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static const VMStateDescription pre_2_10_vmstate_dummy_icp = {
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.name = "icp/server",
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.version_id = 1,
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.minimum_version_id = 1,
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.needed = pre_2_10_vmstate_dummy_icp_needed,
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.fields = (VMStateField[]) {
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VMSTATE_UNUSED(4), /* uint32_t xirr */
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VMSTATE_UNUSED(1), /* uint8_t pending_priority */
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VMSTATE_UNUSED(1), /* uint8_t mfrr */
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VMSTATE_END_OF_LIST()
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},
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};
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static void pre_2_10_vmstate_register_dummy_icp(int i)
|
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{
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|
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vmstate_register(NULL, i, &pre_2_10_vmstate_dummy_icp,
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(void *)(uintptr_t) i);
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}
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static void pre_2_10_vmstate_unregister_dummy_icp(int i)
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{
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vmstate_unregister(NULL, &pre_2_10_vmstate_dummy_icp,
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(void *)(uintptr_t) i);
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}
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|
spapr: use spapr->vsmt to compute VCPU ids
Since the introduction of VSMT in 2.11, the spacing of VCPU ids
between cores is controllable through a machine property instead
of being only dictated by the SMT mode of the host:
cpu->vcpu_id = (cc->core_id * spapr->vsmt / smp_threads) + i
Until recently, the machine code would try to change the SMT mode
of the host to be equal to VSMT or exit. This allowed the rest of
the code to assume that kvmppc_smt_threads() == spapr->vsmt is
always true.
Recent commit "8904e5a75005 spapr: Adjust default VSMT value for
better migration compatibility" relaxed the rule. If the VSMT
mode cannot be set in KVM for some reasons, but the requested
CPU topology is compatible with the current SMT mode, then we
let the guest run with kvmppc_smt_threads() != spapr->vsmt.
This breaks quite a few places in the code, in particular when
calculating DRC indexes.
This is what happens on a POWER host with subcores-per-core=2 (ie,
supports up to SMT4) when passing the following topology:
-smp threads=4,maxcpus=16 \
-device host-spapr-cpu-core,core-id=4,id=core1 \
-device host-spapr-cpu-core,core-id=8,id=core2
qemu-system-ppc64: warning: Failed to set KVM's VSMT mode to 8 (errno -22)
This is expected since KVM is limited to SMT4, but the guest is started
anyway because this topology can run on SMT4 even with a VSMT8 spacing.
But when we look at the DT, things get nastier:
cpus {
...
ibm,drc-indexes = <0x4 0x10000000 0x10000004 0x10000008 0x1000000c>;
This means that we have the following association:
CPU core device | DRC | VCPU id
-----------------+------------+---------
boot core | 0x10000000 | 0
core1 | 0x10000004 | 4
core2 | 0x10000008 | 8
core3 | 0x1000000c | 12
But since the spacing of VCPU ids is 8, the DRC for core1 points to a
VCPU that doesn't exist, the DRC for core2 points to the first VCPU of
core1 and and so on...
...
PowerPC,POWER8@0 {
...
ibm,my-drc-index = <0x10000000>;
...
};
PowerPC,POWER8@8 {
...
ibm,my-drc-index = <0x10000008>;
...
};
PowerPC,POWER8@10 {
...
No ibm,my-drc-index property for this core since 0x10000010 doesn't
exist in ibm,drc-indexes above.
...
};
};
...
interrupt-controller {
...
ibm,interrupt-server-ranges = <0x0 0x10>;
With a spacing of 8, the highest VCPU id for the given topology should be:
16 * 8 / 4 = 32 and not 16
...
linux,phandle = <0x7e7323b8>;
interrupt-controller;
};
And CPU hot-plug/unplug is broken:
(qemu) device_del core1
pseries-hotplug-cpu: Cannot find CPU (drc index 10000004) to remove
(qemu) device_del core2
cpu 4 (hwid 8) Ready to die...
cpu 5 (hwid 9) Ready to die...
cpu 6 (hwid 10) Ready to die...
cpu 7 (hwid 11) Ready to die...
These are the VCPU ids of core1 actually
(qemu) device_add host-spapr-cpu-core,core-id=12,id=core3
(qemu) device_del core3
pseries-hotplug-cpu: Cannot find CPU (drc index 1000000c) to remove
This patches all the code in hw/ppc/spapr.c to assume the VSMT
spacing when manipulating VCPU ids.
Fixes: 8904e5a75005
Signed-off-by: Greg Kurz <groug@kaod.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2018-02-14 20:40:26 +01:00
|
|
|
static int xics_max_server_number(sPAPRMachineState *spapr)
|
2017-06-14 15:29:19 +02:00
|
|
|
{
|
2018-02-27 16:23:07 +01:00
|
|
|
assert(spapr->vsmt);
|
spapr: use spapr->vsmt to compute VCPU ids
Since the introduction of VSMT in 2.11, the spacing of VCPU ids
between cores is controllable through a machine property instead
of being only dictated by the SMT mode of the host:
cpu->vcpu_id = (cc->core_id * spapr->vsmt / smp_threads) + i
Until recently, the machine code would try to change the SMT mode
of the host to be equal to VSMT or exit. This allowed the rest of
the code to assume that kvmppc_smt_threads() == spapr->vsmt is
always true.
Recent commit "8904e5a75005 spapr: Adjust default VSMT value for
better migration compatibility" relaxed the rule. If the VSMT
mode cannot be set in KVM for some reasons, but the requested
CPU topology is compatible with the current SMT mode, then we
let the guest run with kvmppc_smt_threads() != spapr->vsmt.
This breaks quite a few places in the code, in particular when
calculating DRC indexes.
This is what happens on a POWER host with subcores-per-core=2 (ie,
supports up to SMT4) when passing the following topology:
-smp threads=4,maxcpus=16 \
-device host-spapr-cpu-core,core-id=4,id=core1 \
-device host-spapr-cpu-core,core-id=8,id=core2
qemu-system-ppc64: warning: Failed to set KVM's VSMT mode to 8 (errno -22)
This is expected since KVM is limited to SMT4, but the guest is started
anyway because this topology can run on SMT4 even with a VSMT8 spacing.
But when we look at the DT, things get nastier:
cpus {
...
ibm,drc-indexes = <0x4 0x10000000 0x10000004 0x10000008 0x1000000c>;
This means that we have the following association:
CPU core device | DRC | VCPU id
-----------------+------------+---------
boot core | 0x10000000 | 0
core1 | 0x10000004 | 4
core2 | 0x10000008 | 8
core3 | 0x1000000c | 12
But since the spacing of VCPU ids is 8, the DRC for core1 points to a
VCPU that doesn't exist, the DRC for core2 points to the first VCPU of
core1 and and so on...
...
PowerPC,POWER8@0 {
...
ibm,my-drc-index = <0x10000000>;
...
};
PowerPC,POWER8@8 {
...
ibm,my-drc-index = <0x10000008>;
...
};
PowerPC,POWER8@10 {
...
No ibm,my-drc-index property for this core since 0x10000010 doesn't
exist in ibm,drc-indexes above.
...
};
};
...
interrupt-controller {
...
ibm,interrupt-server-ranges = <0x0 0x10>;
With a spacing of 8, the highest VCPU id for the given topology should be:
16 * 8 / 4 = 32 and not 16
...
linux,phandle = <0x7e7323b8>;
interrupt-controller;
};
And CPU hot-plug/unplug is broken:
(qemu) device_del core1
pseries-hotplug-cpu: Cannot find CPU (drc index 10000004) to remove
(qemu) device_del core2
cpu 4 (hwid 8) Ready to die...
cpu 5 (hwid 9) Ready to die...
cpu 6 (hwid 10) Ready to die...
cpu 7 (hwid 11) Ready to die...
These are the VCPU ids of core1 actually
(qemu) device_add host-spapr-cpu-core,core-id=12,id=core3
(qemu) device_del core3
pseries-hotplug-cpu: Cannot find CPU (drc index 1000000c) to remove
This patches all the code in hw/ppc/spapr.c to assume the VSMT
spacing when manipulating VCPU ids.
Fixes: 8904e5a75005
Signed-off-by: Greg Kurz <groug@kaod.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2018-02-14 20:40:26 +01:00
|
|
|
return DIV_ROUND_UP(max_cpus * spapr->vsmt, smp_threads);
|
2017-06-14 15:29:19 +02:00
|
|
|
}
|
|
|
|
|
2014-05-23 04:26:51 +02:00
|
|
|
static int spapr_fixup_cpu_smt_dt(void *fdt, int offset, PowerPCCPU *cpu,
|
|
|
|
int smt_threads)
|
|
|
|
{
|
|
|
|
int i, ret = 0;
|
|
|
|
uint32_t servers_prop[smt_threads];
|
|
|
|
uint32_t gservers_prop[smt_threads * 2];
|
2018-02-14 20:40:44 +01:00
|
|
|
int index = spapr_get_vcpu_id(cpu);
|
2014-05-23 04:26:51 +02:00
|
|
|
|
2016-10-28 13:09:37 +02:00
|
|
|
if (cpu->compat_pvr) {
|
|
|
|
ret = fdt_setprop_cell(fdt, offset, "cpu-version", cpu->compat_pvr);
|
2014-05-23 04:26:52 +02:00
|
|
|
if (ret < 0) {
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2014-05-23 04:26:51 +02:00
|
|
|
/* Build interrupt servers and gservers properties */
|
|
|
|
for (i = 0; i < smt_threads; i++) {
|
|
|
|
servers_prop[i] = cpu_to_be32(index + i);
|
|
|
|
/* Hack, direct the group queues back to cpu 0 */
|
|
|
|
gservers_prop[i*2] = cpu_to_be32(index + i);
|
|
|
|
gservers_prop[i*2 + 1] = 0;
|
|
|
|
}
|
|
|
|
ret = fdt_setprop(fdt, offset, "ibm,ppc-interrupt-server#s",
|
|
|
|
servers_prop, sizeof(servers_prop));
|
|
|
|
if (ret < 0) {
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
ret = fdt_setprop(fdt, offset, "ibm,ppc-interrupt-gserver#s",
|
|
|
|
gservers_prop, sizeof(gservers_prop));
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2017-05-30 18:24:01 +02:00
|
|
|
static int spapr_fixup_cpu_numa_dt(void *fdt, int offset, PowerPCCPU *cpu)
|
2015-07-02 08:23:17 +02:00
|
|
|
{
|
2018-02-14 20:40:44 +01:00
|
|
|
int index = spapr_get_vcpu_id(cpu);
|
2015-07-02 08:23:17 +02:00
|
|
|
uint32_t associativity[] = {cpu_to_be32(0x5),
|
|
|
|
cpu_to_be32(0x0),
|
|
|
|
cpu_to_be32(0x0),
|
|
|
|
cpu_to_be32(0x0),
|
2017-05-30 18:24:00 +02:00
|
|
|
cpu_to_be32(cpu->node_id),
|
2015-07-02 08:23:17 +02:00
|
|
|
cpu_to_be32(index)};
|
|
|
|
|
|
|
|
/* Advertise NUMA via ibm,associativity */
|
2017-05-30 18:24:01 +02:00
|
|
|
return fdt_setprop(fdt, offset, "ibm,associativity", associativity,
|
2015-07-02 08:23:17 +02:00
|
|
|
sizeof(associativity));
|
|
|
|
}
|
|
|
|
|
2017-03-20 00:46:47 +01:00
|
|
|
/* Populate the "ibm,pa-features" property */
|
2017-12-11 03:10:44 +01:00
|
|
|
static void spapr_populate_pa_features(sPAPRMachineState *spapr,
|
|
|
|
PowerPCCPU *cpu,
|
|
|
|
void *fdt, int offset,
|
2017-11-17 06:39:00 +01:00
|
|
|
bool legacy_guest)
|
2017-03-20 00:46:47 +01:00
|
|
|
{
|
|
|
|
uint8_t pa_features_206[] = { 6, 0,
|
|
|
|
0xf6, 0x1f, 0xc7, 0x00, 0x80, 0xc0 };
|
|
|
|
uint8_t pa_features_207[] = { 24, 0,
|
|
|
|
0xf6, 0x1f, 0xc7, 0xc0, 0x80, 0xf0,
|
|
|
|
0x80, 0x00, 0x00, 0x00, 0x00, 0x00,
|
|
|
|
0x00, 0x00, 0x00, 0x00, 0x80, 0x00,
|
|
|
|
0x80, 0x00, 0x80, 0x00, 0x00, 0x00 };
|
2017-03-23 04:46:00 +01:00
|
|
|
uint8_t pa_features_300[] = { 66, 0,
|
|
|
|
/* 0: MMU|FPU|SLB|RUN|DABR|NX, 1: fri[nzpm]|DABRX|SPRG3|SLB0|PP110 */
|
|
|
|
/* 2: VPM|DS205|PPR|DS202|DS206, 3: LSD|URG, SSO, 5: LE|CFAR|EB|LSQ */
|
|
|
|
0xf6, 0x1f, 0xc7, 0xc0, 0x80, 0xf0, /* 0 - 5 */
|
|
|
|
/* 6: DS207 */
|
|
|
|
0x80, 0x00, 0x00, 0x00, 0x00, 0x00, /* 6 - 11 */
|
|
|
|
/* 16: Vector */
|
2017-03-20 00:46:47 +01:00
|
|
|
0x00, 0x00, 0x00, 0x00, 0x80, 0x00, /* 12 - 17 */
|
2017-03-23 04:46:00 +01:00
|
|
|
/* 18: Vec. Scalar, 20: Vec. XOR, 22: HTM */
|
2017-05-09 07:03:12 +02:00
|
|
|
0x80, 0x00, 0x80, 0x00, 0x00, 0x00, /* 18 - 23 */
|
2017-03-23 04:46:00 +01:00
|
|
|
/* 24: Ext. Dec, 26: 64 bit ftrs, 28: PM ftrs */
|
|
|
|
0x80, 0x00, 0x80, 0x00, 0x80, 0x00, /* 24 - 29 */
|
|
|
|
/* 30: MMR, 32: LE atomic, 34: EBB + ext EBB */
|
|
|
|
0x80, 0x00, 0x80, 0x00, 0xC0, 0x00, /* 30 - 35 */
|
|
|
|
/* 36: SPR SO, 38: Copy/Paste, 40: Radix MMU */
|
|
|
|
0x80, 0x00, 0x80, 0x00, 0x80, 0x00, /* 36 - 41 */
|
|
|
|
/* 42: PM, 44: PC RA, 46: SC vec'd */
|
|
|
|
0x80, 0x00, 0x80, 0x00, 0x80, 0x00, /* 42 - 47 */
|
|
|
|
/* 48: SIMD, 50: QP BFP, 52: String */
|
|
|
|
0x80, 0x00, 0x80, 0x00, 0x80, 0x00, /* 48 - 53 */
|
|
|
|
/* 54: DecFP, 56: DecI, 58: SHA */
|
|
|
|
0x80, 0x00, 0x80, 0x00, 0x80, 0x00, /* 54 - 59 */
|
|
|
|
/* 60: NM atomic, 62: RNG */
|
|
|
|
0x80, 0x00, 0x80, 0x00, 0x00, 0x00, /* 60 - 65 */
|
|
|
|
};
|
2017-11-17 06:39:00 +01:00
|
|
|
uint8_t *pa_features = NULL;
|
2017-03-20 00:46:47 +01:00
|
|
|
size_t pa_size;
|
|
|
|
|
2017-11-17 06:39:00 +01:00
|
|
|
if (ppc_check_compat(cpu, CPU_POWERPC_LOGICAL_2_06, 0, cpu->compat_pvr)) {
|
2017-03-20 00:46:47 +01:00
|
|
|
pa_features = pa_features_206;
|
|
|
|
pa_size = sizeof(pa_features_206);
|
2017-11-17 06:39:00 +01:00
|
|
|
}
|
|
|
|
if (ppc_check_compat(cpu, CPU_POWERPC_LOGICAL_2_07, 0, cpu->compat_pvr)) {
|
2017-03-20 00:46:47 +01:00
|
|
|
pa_features = pa_features_207;
|
|
|
|
pa_size = sizeof(pa_features_207);
|
2017-11-17 06:39:00 +01:00
|
|
|
}
|
|
|
|
if (ppc_check_compat(cpu, CPU_POWERPC_LOGICAL_3_00, 0, cpu->compat_pvr)) {
|
2017-03-20 00:46:47 +01:00
|
|
|
pa_features = pa_features_300;
|
|
|
|
pa_size = sizeof(pa_features_300);
|
2017-11-17 06:39:00 +01:00
|
|
|
}
|
|
|
|
if (!pa_features) {
|
2017-03-20 00:46:47 +01:00
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2018-03-23 04:32:48 +01:00
|
|
|
if (ppc_hash64_has(cpu, PPC_HASH64_CI_LARGEPAGE)) {
|
2017-03-20 00:46:47 +01:00
|
|
|
/*
|
|
|
|
* Note: we keep CI large pages off by default because a 64K capable
|
|
|
|
* guest provisioned with large pages might otherwise try to map a qemu
|
|
|
|
* framebuffer (or other kind of memory mapped PCI BAR) using 64K pages
|
|
|
|
* even if that qemu runs on a 4k host.
|
|
|
|
* We dd this bit back here if we are confident this is not an issue
|
|
|
|
*/
|
|
|
|
pa_features[3] |= 0x20;
|
|
|
|
}
|
2018-01-12 06:33:43 +01:00
|
|
|
if ((spapr_get_cap(spapr, SPAPR_CAP_HTM) != 0) && pa_size > 24) {
|
2017-03-20 00:46:47 +01:00
|
|
|
pa_features[24] |= 0x80; /* Transactional memory support */
|
|
|
|
}
|
2017-03-20 00:46:49 +01:00
|
|
|
if (legacy_guest && pa_size > 40) {
|
|
|
|
/* Workaround for broken kernels that attempt (guest) radix
|
|
|
|
* mode when they can't handle it, if they see the radix bit set
|
|
|
|
* in pa-features. So hide it from them. */
|
|
|
|
pa_features[40 + 2] &= ~0x80; /* Radix MMU */
|
|
|
|
}
|
2017-03-20 00:46:47 +01:00
|
|
|
|
|
|
|
_FDT((fdt_setprop(fdt, offset, "ibm,pa-features", pa_features, pa_size)));
|
|
|
|
}
|
|
|
|
|
2015-07-02 08:23:04 +02:00
|
|
|
static int spapr_fixup_cpu_dt(void *fdt, sPAPRMachineState *spapr)
|
2011-12-12 19:24:30 +01:00
|
|
|
{
|
2014-05-23 04:26:55 +02:00
|
|
|
int ret = 0, offset, cpus_offset;
|
|
|
|
CPUState *cs;
|
2011-12-12 19:24:30 +01:00
|
|
|
char cpu_model[32];
|
2012-09-12 18:57:12 +02:00
|
|
|
uint32_t pft_size_prop[] = {0, cpu_to_be32(spapr->htab_shift)};
|
2011-12-12 19:24:30 +01:00
|
|
|
|
2014-05-23 04:26:55 +02:00
|
|
|
CPU_FOREACH(cs) {
|
|
|
|
PowerPCCPU *cpu = POWERPC_CPU(cs);
|
|
|
|
DeviceClass *dc = DEVICE_GET_CLASS(cs);
|
2018-02-14 20:40:44 +01:00
|
|
|
int index = spapr_get_vcpu_id(cpu);
|
2018-01-15 06:40:23 +01:00
|
|
|
int compat_smt = MIN(smp_threads, ppc_compat_max_vthreads(cpu));
|
2011-12-12 19:24:30 +01:00
|
|
|
|
2018-02-14 20:40:53 +01:00
|
|
|
if (!spapr_is_thread0_in_vcore(spapr, cpu)) {
|
2011-12-12 19:24:30 +01:00
|
|
|
continue;
|
|
|
|
}
|
|
|
|
|
2014-05-23 04:26:55 +02:00
|
|
|
snprintf(cpu_model, 32, "%s@%x", dc->fw_name, index);
|
2011-12-12 19:24:30 +01:00
|
|
|
|
2014-05-23 04:26:55 +02:00
|
|
|
cpus_offset = fdt_path_offset(fdt, "/cpus");
|
|
|
|
if (cpus_offset < 0) {
|
2017-10-03 16:13:11 +02:00
|
|
|
cpus_offset = fdt_add_subnode(fdt, 0, "cpus");
|
2014-05-23 04:26:55 +02:00
|
|
|
if (cpus_offset < 0) {
|
|
|
|
return cpus_offset;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
offset = fdt_subnode_offset(fdt, cpus_offset, cpu_model);
|
2011-12-12 19:24:30 +01:00
|
|
|
if (offset < 0) {
|
2014-05-23 04:26:55 +02:00
|
|
|
offset = fdt_add_subnode(fdt, cpus_offset, cpu_model);
|
|
|
|
if (offset < 0) {
|
|
|
|
return offset;
|
|
|
|
}
|
2011-12-12 19:24:30 +01:00
|
|
|
}
|
|
|
|
|
2012-09-12 18:57:12 +02:00
|
|
|
ret = fdt_setprop(fdt, offset, "ibm,pft-size",
|
|
|
|
pft_size_prop, sizeof(pft_size_prop));
|
2011-12-12 19:24:30 +01:00
|
|
|
if (ret < 0) {
|
|
|
|
return ret;
|
|
|
|
}
|
2014-05-23 04:26:51 +02:00
|
|
|
|
2017-05-30 18:24:01 +02:00
|
|
|
if (nb_numa_nodes > 1) {
|
|
|
|
ret = spapr_fixup_cpu_numa_dt(fdt, offset, cpu);
|
|
|
|
if (ret < 0) {
|
|
|
|
return ret;
|
|
|
|
}
|
2015-07-02 08:23:17 +02:00
|
|
|
}
|
|
|
|
|
2016-10-28 13:35:48 +02:00
|
|
|
ret = spapr_fixup_cpu_smt_dt(fdt, offset, cpu, compat_smt);
|
2014-05-23 04:26:51 +02:00
|
|
|
if (ret < 0) {
|
|
|
|
return ret;
|
|
|
|
}
|
2017-03-20 00:46:49 +01:00
|
|
|
|
2017-12-11 03:10:44 +01:00
|
|
|
spapr_populate_pa_features(spapr, cpu, fdt, offset,
|
|
|
|
spapr->cas_legacy_guest_workaround);
|
2011-12-12 19:24:30 +01:00
|
|
|
}
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2017-09-06 20:43:05 +02:00
|
|
|
static hwaddr spapr_node0_size(MachineState *machine)
|
2014-07-03 05:10:06 +02:00
|
|
|
{
|
|
|
|
if (nb_numa_nodes) {
|
|
|
|
int i;
|
|
|
|
for (i = 0; i < nb_numa_nodes; ++i) {
|
|
|
|
if (numa_info[i].node_mem) {
|
2015-07-02 08:23:05 +02:00
|
|
|
return MIN(pow2floor(numa_info[i].node_mem),
|
|
|
|
machine->ram_size);
|
2014-07-03 05:10:06 +02:00
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
2015-07-02 08:23:05 +02:00
|
|
|
return machine->ram_size;
|
2014-07-03 05:10:06 +02:00
|
|
|
}
|
|
|
|
|
2014-05-27 07:36:29 +02:00
|
|
|
static void add_str(GString *s, const gchar *s1)
|
|
|
|
{
|
|
|
|
g_string_append_len(s, s1, strlen(s1) + 1);
|
|
|
|
}
|
2012-09-12 18:57:12 +02:00
|
|
|
|
2015-07-13 02:34:00 +02:00
|
|
|
static int spapr_populate_memory_node(void *fdt, int nodeid, hwaddr start,
|
2014-07-03 05:10:02 +02:00
|
|
|
hwaddr size)
|
|
|
|
{
|
|
|
|
uint32_t associativity[] = {
|
|
|
|
cpu_to_be32(0x4), /* length */
|
|
|
|
cpu_to_be32(0x0), cpu_to_be32(0x0),
|
2014-07-03 05:10:07 +02:00
|
|
|
cpu_to_be32(0x0), cpu_to_be32(nodeid)
|
2014-07-03 05:10:02 +02:00
|
|
|
};
|
|
|
|
char mem_name[32];
|
|
|
|
uint64_t mem_reg_property[2];
|
|
|
|
int off;
|
|
|
|
|
|
|
|
mem_reg_property[0] = cpu_to_be64(start);
|
|
|
|
mem_reg_property[1] = cpu_to_be64(size);
|
|
|
|
|
|
|
|
sprintf(mem_name, "memory@" TARGET_FMT_lx, start);
|
|
|
|
off = fdt_add_subnode(fdt, 0, mem_name);
|
|
|
|
_FDT(off);
|
|
|
|
_FDT((fdt_setprop_string(fdt, off, "device_type", "memory")));
|
|
|
|
_FDT((fdt_setprop(fdt, off, "reg", mem_reg_property,
|
|
|
|
sizeof(mem_reg_property))));
|
|
|
|
_FDT((fdt_setprop(fdt, off, "ibm,associativity", associativity,
|
|
|
|
sizeof(associativity))));
|
2015-07-13 02:34:00 +02:00
|
|
|
return off;
|
2014-07-03 05:10:02 +02:00
|
|
|
}
|
|
|
|
|
2015-07-02 08:23:04 +02:00
|
|
|
static int spapr_populate_memory(sPAPRMachineState *spapr, void *fdt)
|
2012-09-12 18:57:12 +02:00
|
|
|
{
|
2015-07-02 08:23:05 +02:00
|
|
|
MachineState *machine = MACHINE(spapr);
|
2014-07-03 05:10:04 +02:00
|
|
|
hwaddr mem_start, node_size;
|
|
|
|
int i, nb_nodes = nb_numa_nodes;
|
|
|
|
NodeInfo *nodes = numa_info;
|
|
|
|
NodeInfo ramnode;
|
|
|
|
|
|
|
|
/* No NUMA nodes, assume there is just one node with whole RAM */
|
|
|
|
if (!nb_numa_nodes) {
|
|
|
|
nb_nodes = 1;
|
2015-07-02 08:23:05 +02:00
|
|
|
ramnode.node_mem = machine->ram_size;
|
2014-07-03 05:10:04 +02:00
|
|
|
nodes = &ramnode;
|
2013-11-25 04:14:51 +01:00
|
|
|
}
|
2012-09-12 18:57:12 +02:00
|
|
|
|
2014-07-03 05:10:04 +02:00
|
|
|
for (i = 0, mem_start = 0; i < nb_nodes; ++i) {
|
|
|
|
if (!nodes[i].node_mem) {
|
|
|
|
continue;
|
|
|
|
}
|
2015-07-02 08:23:05 +02:00
|
|
|
if (mem_start >= machine->ram_size) {
|
2013-11-25 04:14:51 +01:00
|
|
|
node_size = 0;
|
|
|
|
} else {
|
2014-07-03 05:10:04 +02:00
|
|
|
node_size = nodes[i].node_mem;
|
2015-07-02 08:23:05 +02:00
|
|
|
if (node_size > machine->ram_size - mem_start) {
|
|
|
|
node_size = machine->ram_size - mem_start;
|
2013-11-25 04:14:51 +01:00
|
|
|
}
|
|
|
|
}
|
2014-07-03 05:10:04 +02:00
|
|
|
if (!mem_start) {
|
2018-02-09 19:13:30 +01:00
|
|
|
/* spapr_machine_init() checks for rma_size <= node0_size
|
|
|
|
* already */
|
2015-08-03 07:35:41 +02:00
|
|
|
spapr_populate_memory_node(fdt, i, 0, spapr->rma_size);
|
2014-07-03 05:10:04 +02:00
|
|
|
mem_start += spapr->rma_size;
|
|
|
|
node_size -= spapr->rma_size;
|
|
|
|
}
|
2014-07-03 05:10:05 +02:00
|
|
|
for ( ; node_size; ) {
|
|
|
|
hwaddr sizetmp = pow2floor(node_size);
|
|
|
|
|
|
|
|
/* mem_start != 0 here */
|
|
|
|
if (ctzl(mem_start) < ctzl(sizetmp)) {
|
|
|
|
sizetmp = 1ULL << ctzl(mem_start);
|
|
|
|
}
|
|
|
|
|
|
|
|
spapr_populate_memory_node(fdt, i, mem_start, sizetmp);
|
|
|
|
node_size -= sizetmp;
|
|
|
|
mem_start += sizetmp;
|
|
|
|
}
|
2012-09-12 18:57:12 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2015-07-02 08:23:17 +02:00
|
|
|
static void spapr_populate_cpu_dt(CPUState *cs, void *fdt, int offset,
|
|
|
|
sPAPRMachineState *spapr)
|
|
|
|
{
|
|
|
|
PowerPCCPU *cpu = POWERPC_CPU(cs);
|
|
|
|
CPUPPCState *env = &cpu->env;
|
|
|
|
PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cs);
|
2018-02-14 20:40:44 +01:00
|
|
|
int index = spapr_get_vcpu_id(cpu);
|
2015-07-02 08:23:17 +02:00
|
|
|
uint32_t segs[] = {cpu_to_be32(28), cpu_to_be32(40),
|
|
|
|
0xffffffff, 0xffffffff};
|
2016-06-10 02:59:02 +02:00
|
|
|
uint32_t tbfreq = kvm_enabled() ? kvmppc_get_tbfreq()
|
|
|
|
: SPAPR_TIMEBASE_FREQ;
|
2015-07-02 08:23:17 +02:00
|
|
|
uint32_t cpufreq = kvm_enabled() ? kvmppc_get_clockfreq() : 1000000000;
|
|
|
|
uint32_t page_sizes_prop[64];
|
|
|
|
size_t page_sizes_prop_size;
|
2015-09-08 03:21:31 +02:00
|
|
|
uint32_t vcpus_per_socket = smp_threads * smp_cores;
|
2015-07-02 08:23:17 +02:00
|
|
|
uint32_t pft_size_prop[] = {0, cpu_to_be32(spapr->htab_shift)};
|
2018-01-15 06:40:23 +01:00
|
|
|
int compat_smt = MIN(smp_threads, ppc_compat_max_vthreads(cpu));
|
2016-06-10 02:59:04 +02:00
|
|
|
sPAPRDRConnector *drc;
|
|
|
|
int drc_index;
|
2017-03-20 00:46:43 +01:00
|
|
|
uint32_t radix_AP_encodings[PPC_PAGE_SIZES_MAX_SZ];
|
|
|
|
int i;
|
2016-06-10 02:59:04 +02:00
|
|
|
|
2017-06-04 12:26:03 +02:00
|
|
|
drc = spapr_drc_by_id(TYPE_SPAPR_DRC_CPU, index);
|
2016-06-10 02:59:04 +02:00
|
|
|
if (drc) {
|
2017-06-02 05:49:20 +02:00
|
|
|
drc_index = spapr_drc_index(drc);
|
2016-06-10 02:59:04 +02:00
|
|
|
_FDT((fdt_setprop_cell(fdt, offset, "ibm,my-drc-index", drc_index)));
|
|
|
|
}
|
2015-07-02 08:23:17 +02:00
|
|
|
|
|
|
|
_FDT((fdt_setprop_cell(fdt, offset, "reg", index)));
|
|
|
|
_FDT((fdt_setprop_string(fdt, offset, "device_type", "cpu")));
|
|
|
|
|
|
|
|
_FDT((fdt_setprop_cell(fdt, offset, "cpu-version", env->spr[SPR_PVR])));
|
|
|
|
_FDT((fdt_setprop_cell(fdt, offset, "d-cache-block-size",
|
|
|
|
env->dcache_line_size)));
|
|
|
|
_FDT((fdt_setprop_cell(fdt, offset, "d-cache-line-size",
|
|
|
|
env->dcache_line_size)));
|
|
|
|
_FDT((fdt_setprop_cell(fdt, offset, "i-cache-block-size",
|
|
|
|
env->icache_line_size)));
|
|
|
|
_FDT((fdt_setprop_cell(fdt, offset, "i-cache-line-size",
|
|
|
|
env->icache_line_size)));
|
|
|
|
|
|
|
|
if (pcc->l1_dcache_size) {
|
|
|
|
_FDT((fdt_setprop_cell(fdt, offset, "d-cache-size",
|
|
|
|
pcc->l1_dcache_size)));
|
|
|
|
} else {
|
2017-07-12 15:57:41 +02:00
|
|
|
warn_report("Unknown L1 dcache size for cpu");
|
2015-07-02 08:23:17 +02:00
|
|
|
}
|
|
|
|
if (pcc->l1_icache_size) {
|
|
|
|
_FDT((fdt_setprop_cell(fdt, offset, "i-cache-size",
|
|
|
|
pcc->l1_icache_size)));
|
|
|
|
} else {
|
2017-07-12 15:57:41 +02:00
|
|
|
warn_report("Unknown L1 icache size for cpu");
|
2015-07-02 08:23:17 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
_FDT((fdt_setprop_cell(fdt, offset, "timebase-frequency", tbfreq)));
|
|
|
|
_FDT((fdt_setprop_cell(fdt, offset, "clock-frequency", cpufreq)));
|
2018-03-29 09:29:38 +02:00
|
|
|
_FDT((fdt_setprop_cell(fdt, offset, "slb-size", cpu->hash64_opts->slb_size)));
|
|
|
|
_FDT((fdt_setprop_cell(fdt, offset, "ibm,slb-size", cpu->hash64_opts->slb_size)));
|
2015-07-02 08:23:17 +02:00
|
|
|
_FDT((fdt_setprop_string(fdt, offset, "status", "okay")));
|
|
|
|
_FDT((fdt_setprop(fdt, offset, "64-bit", NULL, 0)));
|
|
|
|
|
|
|
|
if (env->spr_cb[SPR_PURR].oea_read) {
|
|
|
|
_FDT((fdt_setprop(fdt, offset, "ibm,purr", NULL, 0)));
|
|
|
|
}
|
|
|
|
|
2018-03-23 04:11:07 +01:00
|
|
|
if (ppc_hash64_has(cpu, PPC_HASH64_1TSEG)) {
|
2015-07-02 08:23:17 +02:00
|
|
|
_FDT((fdt_setprop(fdt, offset, "ibm,processor-segment-sizes",
|
|
|
|
segs, sizeof(segs))));
|
|
|
|
}
|
|
|
|
|
2017-12-07 07:08:47 +01:00
|
|
|
/* Advertise VSX (vector extensions) if available
|
2015-07-02 08:23:17 +02:00
|
|
|
* 1 == VMX / Altivec available
|
2017-12-07 07:08:47 +01:00
|
|
|
* 2 == VSX available
|
|
|
|
*
|
|
|
|
* Only CPUs for which we create core types in spapr_cpu_core.c
|
|
|
|
* are possible, and all of those have VMX */
|
2018-01-12 06:33:43 +01:00
|
|
|
if (spapr_get_cap(spapr, SPAPR_CAP_VSX) != 0) {
|
2017-12-07 07:08:47 +01:00
|
|
|
_FDT((fdt_setprop_cell(fdt, offset, "ibm,vmx", 2)));
|
|
|
|
} else {
|
|
|
|
_FDT((fdt_setprop_cell(fdt, offset, "ibm,vmx", 1)));
|
2015-07-02 08:23:17 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
/* Advertise DFP (Decimal Floating Point) if available
|
|
|
|
* 0 / no property == no DFP
|
|
|
|
* 1 == DFP available */
|
2018-01-12 06:33:43 +01:00
|
|
|
if (spapr_get_cap(spapr, SPAPR_CAP_DFP) != 0) {
|
2015-07-02 08:23:17 +02:00
|
|
|
_FDT((fdt_setprop_cell(fdt, offset, "ibm,dfp", 1)));
|
|
|
|
}
|
|
|
|
|
2018-03-22 06:18:40 +01:00
|
|
|
page_sizes_prop_size = ppc_create_page_sizes_prop(cpu, page_sizes_prop,
|
|
|
|
sizeof(page_sizes_prop));
|
2015-07-02 08:23:17 +02:00
|
|
|
if (page_sizes_prop_size) {
|
|
|
|
_FDT((fdt_setprop(fdt, offset, "ibm,segment-page-sizes",
|
|
|
|
page_sizes_prop, page_sizes_prop_size)));
|
|
|
|
}
|
|
|
|
|
2017-12-11 03:10:44 +01:00
|
|
|
spapr_populate_pa_features(spapr, cpu, fdt, offset, false);
|
2015-10-22 09:30:59 +02:00
|
|
|
|
2015-07-02 08:23:17 +02:00
|
|
|
_FDT((fdt_setprop_cell(fdt, offset, "ibm,chip-id",
|
2015-09-08 03:21:31 +02:00
|
|
|
cs->cpu_index / vcpus_per_socket)));
|
2015-07-02 08:23:17 +02:00
|
|
|
|
|
|
|
_FDT((fdt_setprop(fdt, offset, "ibm,pft-size",
|
|
|
|
pft_size_prop, sizeof(pft_size_prop))));
|
|
|
|
|
2017-05-30 18:24:01 +02:00
|
|
|
if (nb_numa_nodes > 1) {
|
|
|
|
_FDT(spapr_fixup_cpu_numa_dt(fdt, offset, cpu));
|
|
|
|
}
|
2015-07-02 08:23:17 +02:00
|
|
|
|
2016-10-28 13:35:48 +02:00
|
|
|
_FDT(spapr_fixup_cpu_smt_dt(fdt, offset, cpu, compat_smt));
|
2017-03-20 00:46:43 +01:00
|
|
|
|
|
|
|
if (pcc->radix_page_info) {
|
|
|
|
for (i = 0; i < pcc->radix_page_info->count; i++) {
|
|
|
|
radix_AP_encodings[i] =
|
|
|
|
cpu_to_be32(pcc->radix_page_info->entries[i]);
|
|
|
|
}
|
|
|
|
_FDT((fdt_setprop(fdt, offset, "ibm,processor-radix-AP-encodings",
|
|
|
|
radix_AP_encodings,
|
|
|
|
pcc->radix_page_info->count *
|
|
|
|
sizeof(radix_AP_encodings[0]))));
|
|
|
|
}
|
2015-07-02 08:23:17 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
static void spapr_populate_cpus_dt_node(void *fdt, sPAPRMachineState *spapr)
|
|
|
|
{
|
2018-08-19 11:13:34 +02:00
|
|
|
CPUState **rev;
|
2015-07-02 08:23:17 +02:00
|
|
|
CPUState *cs;
|
2018-08-19 11:13:34 +02:00
|
|
|
int n_cpus;
|
2015-07-02 08:23:17 +02:00
|
|
|
int cpus_offset;
|
|
|
|
char *nodename;
|
2018-08-19 11:13:34 +02:00
|
|
|
int i;
|
2015-07-02 08:23:17 +02:00
|
|
|
|
|
|
|
cpus_offset = fdt_add_subnode(fdt, 0, "cpus");
|
|
|
|
_FDT(cpus_offset);
|
|
|
|
_FDT((fdt_setprop_cell(fdt, cpus_offset, "#address-cells", 0x1)));
|
|
|
|
_FDT((fdt_setprop_cell(fdt, cpus_offset, "#size-cells", 0x0)));
|
|
|
|
|
|
|
|
/*
|
|
|
|
* We walk the CPUs in reverse order to ensure that CPU DT nodes
|
|
|
|
* created by fdt_add_subnode() end up in the right order in FDT
|
|
|
|
* for the guest kernel the enumerate the CPUs correctly.
|
2018-08-19 11:13:34 +02:00
|
|
|
*
|
|
|
|
* The CPU list cannot be traversed in reverse order, so we need
|
|
|
|
* to do extra work.
|
2015-07-02 08:23:17 +02:00
|
|
|
*/
|
2018-08-19 11:13:34 +02:00
|
|
|
n_cpus = 0;
|
|
|
|
rev = NULL;
|
|
|
|
CPU_FOREACH(cs) {
|
|
|
|
rev = g_renew(CPUState *, rev, n_cpus + 1);
|
|
|
|
rev[n_cpus++] = cs;
|
|
|
|
}
|
|
|
|
|
|
|
|
for (i = n_cpus - 1; i >= 0; i--) {
|
|
|
|
CPUState *cs = rev[i];
|
2015-07-02 08:23:17 +02:00
|
|
|
PowerPCCPU *cpu = POWERPC_CPU(cs);
|
2018-02-14 20:40:44 +01:00
|
|
|
int index = spapr_get_vcpu_id(cpu);
|
2015-07-02 08:23:17 +02:00
|
|
|
DeviceClass *dc = DEVICE_GET_CLASS(cs);
|
|
|
|
int offset;
|
|
|
|
|
2018-02-14 20:40:53 +01:00
|
|
|
if (!spapr_is_thread0_in_vcore(spapr, cpu)) {
|
2015-07-02 08:23:17 +02:00
|
|
|
continue;
|
|
|
|
}
|
|
|
|
|
|
|
|
nodename = g_strdup_printf("%s@%x", dc->fw_name, index);
|
|
|
|
offset = fdt_add_subnode(fdt, cpus_offset, nodename);
|
|
|
|
g_free(nodename);
|
|
|
|
_FDT(offset);
|
|
|
|
spapr_populate_cpu_dt(cs, fdt, offset, spapr);
|
|
|
|
}
|
|
|
|
|
2018-08-24 22:31:01 +02:00
|
|
|
g_free(rev);
|
2015-07-02 08:23:17 +02:00
|
|
|
}
|
|
|
|
|
2017-12-05 16:41:17 +01:00
|
|
|
static uint32_t spapr_pc_dimm_node(MemoryDeviceInfoList *list, ram_addr_t addr)
|
|
|
|
{
|
|
|
|
MemoryDeviceInfoList *info;
|
|
|
|
|
|
|
|
for (info = list; info; info = info->next) {
|
|
|
|
MemoryDeviceInfo *value = info->value;
|
|
|
|
|
|
|
|
if (value && value->type == MEMORY_DEVICE_INFO_KIND_DIMM) {
|
|
|
|
PCDIMMDeviceInfo *pcdimm_info = value->u.dimm.data;
|
|
|
|
|
2018-07-10 03:40:52 +02:00
|
|
|
if (addr >= pcdimm_info->addr &&
|
2017-12-05 16:41:17 +01:00
|
|
|
addr < (pcdimm_info->addr + pcdimm_info->size)) {
|
|
|
|
return pcdimm_info->node;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
|
2018-04-19 08:47:35 +02:00
|
|
|
struct sPAPRDrconfCellV2 {
|
|
|
|
uint32_t seq_lmbs;
|
|
|
|
uint64_t base_addr;
|
|
|
|
uint32_t drc_index;
|
|
|
|
uint32_t aa_index;
|
|
|
|
uint32_t flags;
|
|
|
|
} QEMU_PACKED;
|
|
|
|
|
|
|
|
typedef struct DrconfCellQueue {
|
|
|
|
struct sPAPRDrconfCellV2 cell;
|
|
|
|
QSIMPLEQ_ENTRY(DrconfCellQueue) entry;
|
|
|
|
} DrconfCellQueue;
|
|
|
|
|
|
|
|
static DrconfCellQueue *
|
|
|
|
spapr_get_drconf_cell(uint32_t seq_lmbs, uint64_t base_addr,
|
|
|
|
uint32_t drc_index, uint32_t aa_index,
|
|
|
|
uint32_t flags)
|
2015-07-13 02:34:00 +02:00
|
|
|
{
|
2018-04-19 08:47:35 +02:00
|
|
|
DrconfCellQueue *elem;
|
|
|
|
|
|
|
|
elem = g_malloc0(sizeof(*elem));
|
|
|
|
elem->cell.seq_lmbs = cpu_to_be32(seq_lmbs);
|
|
|
|
elem->cell.base_addr = cpu_to_be64(base_addr);
|
|
|
|
elem->cell.drc_index = cpu_to_be32(drc_index);
|
|
|
|
elem->cell.aa_index = cpu_to_be32(aa_index);
|
|
|
|
elem->cell.flags = cpu_to_be32(flags);
|
|
|
|
|
|
|
|
return elem;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* ibm,dynamic-memory-v2 */
|
|
|
|
static int spapr_populate_drmem_v2(sPAPRMachineState *spapr, void *fdt,
|
|
|
|
int offset, MemoryDeviceInfoList *dimms)
|
|
|
|
{
|
2018-04-23 18:51:17 +02:00
|
|
|
MachineState *machine = MACHINE(spapr);
|
2018-04-19 08:47:35 +02:00
|
|
|
uint8_t *int_buf, *cur_index, buf_len;
|
|
|
|
int ret;
|
|
|
|
uint64_t lmb_size = SPAPR_MEMORY_BLOCK_SIZE;
|
|
|
|
uint64_t addr, cur_addr, size;
|
2018-04-23 18:51:17 +02:00
|
|
|
uint32_t nr_boot_lmbs = (machine->device_memory->base / lmb_size);
|
|
|
|
uint64_t mem_end = machine->device_memory->base +
|
|
|
|
memory_region_size(&machine->device_memory->mr);
|
2018-04-19 08:47:35 +02:00
|
|
|
uint32_t node, nr_entries = 0;
|
|
|
|
sPAPRDRConnector *drc;
|
|
|
|
DrconfCellQueue *elem, *next;
|
|
|
|
MemoryDeviceInfoList *info;
|
|
|
|
QSIMPLEQ_HEAD(, DrconfCellQueue) drconf_queue
|
|
|
|
= QSIMPLEQ_HEAD_INITIALIZER(drconf_queue);
|
|
|
|
|
|
|
|
/* Entry to cover RAM and the gap area */
|
|
|
|
elem = spapr_get_drconf_cell(nr_boot_lmbs, 0, 0, -1,
|
|
|
|
SPAPR_LMB_FLAGS_RESERVED |
|
|
|
|
SPAPR_LMB_FLAGS_DRC_INVALID);
|
|
|
|
QSIMPLEQ_INSERT_TAIL(&drconf_queue, elem, entry);
|
|
|
|
nr_entries++;
|
|
|
|
|
2018-04-23 18:51:17 +02:00
|
|
|
cur_addr = machine->device_memory->base;
|
2018-04-19 08:47:35 +02:00
|
|
|
for (info = dimms; info; info = info->next) {
|
|
|
|
PCDIMMDeviceInfo *di = info->value->u.dimm.data;
|
|
|
|
|
|
|
|
addr = di->addr;
|
|
|
|
size = di->size;
|
|
|
|
node = di->node;
|
|
|
|
|
|
|
|
/* Entry for hot-pluggable area */
|
|
|
|
if (cur_addr < addr) {
|
|
|
|
drc = spapr_drc_by_id(TYPE_SPAPR_DRC_LMB, cur_addr / lmb_size);
|
|
|
|
g_assert(drc);
|
|
|
|
elem = spapr_get_drconf_cell((addr - cur_addr) / lmb_size,
|
|
|
|
cur_addr, spapr_drc_index(drc), -1, 0);
|
|
|
|
QSIMPLEQ_INSERT_TAIL(&drconf_queue, elem, entry);
|
|
|
|
nr_entries++;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Entry for DIMM */
|
|
|
|
drc = spapr_drc_by_id(TYPE_SPAPR_DRC_LMB, addr / lmb_size);
|
|
|
|
g_assert(drc);
|
|
|
|
elem = spapr_get_drconf_cell(size / lmb_size, addr,
|
|
|
|
spapr_drc_index(drc), node,
|
|
|
|
SPAPR_LMB_FLAGS_ASSIGNED);
|
|
|
|
QSIMPLEQ_INSERT_TAIL(&drconf_queue, elem, entry);
|
|
|
|
nr_entries++;
|
|
|
|
cur_addr = addr + size;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Entry for remaining hotpluggable area */
|
|
|
|
if (cur_addr < mem_end) {
|
|
|
|
drc = spapr_drc_by_id(TYPE_SPAPR_DRC_LMB, cur_addr / lmb_size);
|
|
|
|
g_assert(drc);
|
|
|
|
elem = spapr_get_drconf_cell((mem_end - cur_addr) / lmb_size,
|
|
|
|
cur_addr, spapr_drc_index(drc), -1, 0);
|
|
|
|
QSIMPLEQ_INSERT_TAIL(&drconf_queue, elem, entry);
|
|
|
|
nr_entries++;
|
|
|
|
}
|
|
|
|
|
|
|
|
buf_len = nr_entries * sizeof(struct sPAPRDrconfCellV2) + sizeof(uint32_t);
|
|
|
|
int_buf = cur_index = g_malloc0(buf_len);
|
|
|
|
*(uint32_t *)int_buf = cpu_to_be32(nr_entries);
|
|
|
|
cur_index += sizeof(nr_entries);
|
|
|
|
|
|
|
|
QSIMPLEQ_FOREACH_SAFE(elem, &drconf_queue, entry, next) {
|
|
|
|
memcpy(cur_index, &elem->cell, sizeof(elem->cell));
|
|
|
|
cur_index += sizeof(elem->cell);
|
|
|
|
QSIMPLEQ_REMOVE(&drconf_queue, elem, DrconfCellQueue, entry);
|
|
|
|
g_free(elem);
|
|
|
|
}
|
|
|
|
|
|
|
|
ret = fdt_setprop(fdt, offset, "ibm,dynamic-memory-v2", int_buf, buf_len);
|
|
|
|
g_free(int_buf);
|
|
|
|
if (ret < 0) {
|
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* ibm,dynamic-memory */
|
|
|
|
static int spapr_populate_drmem_v1(sPAPRMachineState *spapr, void *fdt,
|
|
|
|
int offset, MemoryDeviceInfoList *dimms)
|
|
|
|
{
|
2018-04-23 18:51:17 +02:00
|
|
|
MachineState *machine = MACHINE(spapr);
|
2018-04-19 08:47:35 +02:00
|
|
|
int i, ret;
|
2015-07-13 02:34:00 +02:00
|
|
|
uint64_t lmb_size = SPAPR_MEMORY_BLOCK_SIZE;
|
2018-04-23 18:51:25 +02:00
|
|
|
uint32_t device_lmb_start = machine->device_memory->base / lmb_size;
|
2018-04-23 18:51:17 +02:00
|
|
|
uint32_t nr_lmbs = (machine->device_memory->base +
|
|
|
|
memory_region_size(&machine->device_memory->mr)) /
|
2016-06-10 07:14:48 +02:00
|
|
|
lmb_size;
|
2015-07-13 02:34:00 +02:00
|
|
|
uint32_t *int_buf, *cur_index, buf_len;
|
2016-01-19 05:39:21 +01:00
|
|
|
|
2015-09-15 21:34:20 +02:00
|
|
|
/*
|
|
|
|
* Allocate enough buffer size to fit in ibm,dynamic-memory
|
|
|
|
*/
|
2018-04-19 08:47:35 +02:00
|
|
|
buf_len = (nr_lmbs * SPAPR_DR_LMB_LIST_ENTRY_SIZE + 1) * sizeof(uint32_t);
|
2015-07-13 02:34:00 +02:00
|
|
|
cur_index = int_buf = g_malloc0(buf_len);
|
|
|
|
int_buf[0] = cpu_to_be32(nr_lmbs);
|
|
|
|
cur_index++;
|
|
|
|
for (i = 0; i < nr_lmbs; i++) {
|
2016-06-10 07:14:48 +02:00
|
|
|
uint64_t addr = i * lmb_size;
|
2015-07-13 02:34:00 +02:00
|
|
|
uint32_t *dynamic_memory = cur_index;
|
|
|
|
|
2018-04-23 18:51:25 +02:00
|
|
|
if (i >= device_lmb_start) {
|
2016-06-10 07:14:48 +02:00
|
|
|
sPAPRDRConnector *drc;
|
|
|
|
|
2017-06-04 12:26:03 +02:00
|
|
|
drc = spapr_drc_by_id(TYPE_SPAPR_DRC_LMB, i);
|
2016-06-10 07:14:48 +02:00
|
|
|
g_assert(drc);
|
|
|
|
|
|
|
|
dynamic_memory[0] = cpu_to_be32(addr >> 32);
|
|
|
|
dynamic_memory[1] = cpu_to_be32(addr & 0xffffffff);
|
2017-06-02 05:49:20 +02:00
|
|
|
dynamic_memory[2] = cpu_to_be32(spapr_drc_index(drc));
|
2016-06-10 07:14:48 +02:00
|
|
|
dynamic_memory[3] = cpu_to_be32(0); /* reserved */
|
2017-12-05 16:41:17 +01:00
|
|
|
dynamic_memory[4] = cpu_to_be32(spapr_pc_dimm_node(dimms, addr));
|
2016-06-10 07:14:48 +02:00
|
|
|
if (memory_region_present(get_system_memory(), addr)) {
|
|
|
|
dynamic_memory[5] = cpu_to_be32(SPAPR_LMB_FLAGS_ASSIGNED);
|
|
|
|
} else {
|
|
|
|
dynamic_memory[5] = cpu_to_be32(0);
|
|
|
|
}
|
2015-07-13 02:34:00 +02:00
|
|
|
} else {
|
2016-06-10 07:14:48 +02:00
|
|
|
/*
|
|
|
|
* LMB information for RMA, boot time RAM and gap b/n RAM and
|
2018-04-23 18:51:25 +02:00
|
|
|
* device memory region -- all these are marked as reserved
|
2016-06-10 07:14:48 +02:00
|
|
|
* and as having no valid DRC.
|
|
|
|
*/
|
|
|
|
dynamic_memory[0] = cpu_to_be32(addr >> 32);
|
|
|
|
dynamic_memory[1] = cpu_to_be32(addr & 0xffffffff);
|
|
|
|
dynamic_memory[2] = cpu_to_be32(0);
|
|
|
|
dynamic_memory[3] = cpu_to_be32(0); /* reserved */
|
|
|
|
dynamic_memory[4] = cpu_to_be32(-1);
|
|
|
|
dynamic_memory[5] = cpu_to_be32(SPAPR_LMB_FLAGS_RESERVED |
|
|
|
|
SPAPR_LMB_FLAGS_DRC_INVALID);
|
2015-07-13 02:34:00 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
cur_index += SPAPR_DR_LMB_LIST_ENTRY_SIZE;
|
|
|
|
}
|
|
|
|
ret = fdt_setprop(fdt, offset, "ibm,dynamic-memory", int_buf, buf_len);
|
2018-04-19 08:47:35 +02:00
|
|
|
g_free(int_buf);
|
2015-07-13 02:34:00 +02:00
|
|
|
if (ret < 0) {
|
2018-04-19 08:47:35 +02:00
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Adds ibm,dynamic-reconfiguration-memory node.
|
|
|
|
* Refer to docs/specs/ppc-spapr-hotplug.txt for the documentation
|
|
|
|
* of this device tree node.
|
|
|
|
*/
|
|
|
|
static int spapr_populate_drconf_memory(sPAPRMachineState *spapr, void *fdt)
|
|
|
|
{
|
|
|
|
MachineState *machine = MACHINE(spapr);
|
|
|
|
int ret, i, offset;
|
|
|
|
uint64_t lmb_size = SPAPR_MEMORY_BLOCK_SIZE;
|
|
|
|
uint32_t prop_lmb_size[] = {0, cpu_to_be32(lmb_size)};
|
|
|
|
uint32_t *int_buf, *cur_index, buf_len;
|
|
|
|
int nr_nodes = nb_numa_nodes ? nb_numa_nodes : 1;
|
|
|
|
MemoryDeviceInfoList *dimms = NULL;
|
|
|
|
|
|
|
|
/*
|
2018-04-23 18:51:25 +02:00
|
|
|
* Don't create the node if there is no device memory
|
2018-04-19 08:47:35 +02:00
|
|
|
*/
|
|
|
|
if (machine->ram_size == machine->maxram_size) {
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
offset = fdt_add_subnode(fdt, 0, "ibm,dynamic-reconfiguration-memory");
|
|
|
|
|
|
|
|
ret = fdt_setprop(fdt, offset, "ibm,lmb-size", prop_lmb_size,
|
|
|
|
sizeof(prop_lmb_size));
|
|
|
|
if (ret < 0) {
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
ret = fdt_setprop_cell(fdt, offset, "ibm,memory-flags-mask", 0xff);
|
|
|
|
if (ret < 0) {
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
ret = fdt_setprop_cell(fdt, offset, "ibm,memory-preservation-time", 0x0);
|
|
|
|
if (ret < 0) {
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* ibm,dynamic-memory or ibm,dynamic-memory-v2 */
|
2018-04-23 18:51:16 +02:00
|
|
|
dimms = qmp_memory_device_list();
|
2018-04-19 08:47:35 +02:00
|
|
|
if (spapr_ovec_test(spapr->ov5_cas, OV5_DRMEM_V2)) {
|
|
|
|
ret = spapr_populate_drmem_v2(spapr, fdt, offset, dimms);
|
|
|
|
} else {
|
|
|
|
ret = spapr_populate_drmem_v1(spapr, fdt, offset, dimms);
|
|
|
|
}
|
|
|
|
qapi_free_MemoryDeviceInfoList(dimms);
|
|
|
|
|
|
|
|
if (ret < 0) {
|
|
|
|
return ret;
|
2015-07-13 02:34:00 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
/* ibm,associativity-lookup-arrays */
|
2018-04-19 08:47:35 +02:00
|
|
|
buf_len = (nr_nodes * 4 + 2) * sizeof(uint32_t);
|
|
|
|
cur_index = int_buf = g_malloc0(buf_len);
|
|
|
|
|
2015-07-13 02:34:00 +02:00
|
|
|
cur_index = int_buf;
|
2015-08-03 07:35:40 +02:00
|
|
|
int_buf[0] = cpu_to_be32(nr_nodes);
|
2015-07-13 02:34:00 +02:00
|
|
|
int_buf[1] = cpu_to_be32(4); /* Number of entries per associativity list */
|
|
|
|
cur_index += 2;
|
2015-08-03 07:35:40 +02:00
|
|
|
for (i = 0; i < nr_nodes; i++) {
|
2015-07-13 02:34:00 +02:00
|
|
|
uint32_t associativity[] = {
|
|
|
|
cpu_to_be32(0x0),
|
|
|
|
cpu_to_be32(0x0),
|
|
|
|
cpu_to_be32(0x0),
|
|
|
|
cpu_to_be32(i)
|
|
|
|
};
|
|
|
|
memcpy(cur_index, associativity, sizeof(associativity));
|
|
|
|
cur_index += 4;
|
|
|
|
}
|
|
|
|
ret = fdt_setprop(fdt, offset, "ibm,associativity-lookup-arrays", int_buf,
|
|
|
|
(cur_index - int_buf) * sizeof(uint32_t));
|
|
|
|
g_free(int_buf);
|
2018-04-19 08:47:35 +02:00
|
|
|
|
2015-07-13 02:34:00 +02:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
spapr: add option vector handling in CAS-generated resets
In some cases, ibm,client-architecture-support calls can fail. This
could happen in the current code for situations where the modified
device tree segment exceeds the buffer size provided by the guest
via the call parameters. In these cases, QEMU will reset, allowing
an opportunity to regenerate the device tree from scratch via
boot-time handling. There are potentially other scenarios as well,
not currently reachable in the current code, but possible in theory,
such as cases where device-tree properties or nodes need to be removed.
We currently don't handle either of these properly for option vector
capabilities however. Instead of carrying the negotiated capability
beyond the reset and creating the boot-time device tree accordingly,
we start from scratch, generating the same boot-time device tree as we
did prior to the CAS-generated and the same device tree updates as we
did before. This could (in theory) cause us to get stuck in a reset
loop. This hasn't been observed, but depending on the extensiveness
of CAS-induced device tree updates in the future, could eventually
become an issue.
Address this by pulling capability-related device tree
updates resulting from CAS calls into a common routine,
spapr_dt_cas_updates(), and adding an sPAPROptionVector*
parameter that allows us to test for newly-negotiated capabilities.
We invoke it as follows:
1) When ibm,client-architecture-support gets called, we
call spapr_dt_cas_updates() with the set of capabilities
added since the previous call to ibm,client-architecture-support.
For the initial boot, or a system reset generated by something
other than the CAS call itself, this set will consist of *all*
options supported both the platform and the guest. For calls
to ibm,client-architecture-support immediately after a CAS-induced
reset, we call spapr_dt_cas_updates() with only the set
of capabilities added since the previous call, since the other
capabilities will have already been addressed by the boot-time
device-tree this time around. In the unlikely event that
capabilities are *removed* since the previous CAS, we will
generate a CAS-induced reset. In the unlikely event that we
cannot fit the device-tree updates into the buffer provided
by the guest, well generate a CAS-induced reset.
2) When a CAS update results in the need to reset the machine and
include the updates in the boot-time device tree, we call the
spapr_dt_cas_updates() using the full set of negotiated
capabilities as part of the reset path. At initial boot, or after
a reset generated by something other than the CAS call itself,
this set will be empty, resulting in what should be the same
boot-time device-tree as we generated prior to this patch. For
CAS-induced reset, this routine will be called with the full set of
capabilities negotiated by the platform/guest in the previous
CAS call, which should result in CAS updates from previous call
being accounted for in the initial boot-time device tree.
Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
[dwg: Changed an int -> bool conversion to be more explicit]
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2016-10-25 06:47:29 +02:00
|
|
|
static int spapr_dt_cas_updates(sPAPRMachineState *spapr, void *fdt,
|
|
|
|
sPAPROptionVector *ov5_updates)
|
|
|
|
{
|
|
|
|
sPAPRMachineClass *smc = SPAPR_MACHINE_GET_CLASS(spapr);
|
2016-10-25 06:47:30 +02:00
|
|
|
int ret = 0, offset;
|
spapr: add option vector handling in CAS-generated resets
In some cases, ibm,client-architecture-support calls can fail. This
could happen in the current code for situations where the modified
device tree segment exceeds the buffer size provided by the guest
via the call parameters. In these cases, QEMU will reset, allowing
an opportunity to regenerate the device tree from scratch via
boot-time handling. There are potentially other scenarios as well,
not currently reachable in the current code, but possible in theory,
such as cases where device-tree properties or nodes need to be removed.
We currently don't handle either of these properly for option vector
capabilities however. Instead of carrying the negotiated capability
beyond the reset and creating the boot-time device tree accordingly,
we start from scratch, generating the same boot-time device tree as we
did prior to the CAS-generated and the same device tree updates as we
did before. This could (in theory) cause us to get stuck in a reset
loop. This hasn't been observed, but depending on the extensiveness
of CAS-induced device tree updates in the future, could eventually
become an issue.
Address this by pulling capability-related device tree
updates resulting from CAS calls into a common routine,
spapr_dt_cas_updates(), and adding an sPAPROptionVector*
parameter that allows us to test for newly-negotiated capabilities.
We invoke it as follows:
1) When ibm,client-architecture-support gets called, we
call spapr_dt_cas_updates() with the set of capabilities
added since the previous call to ibm,client-architecture-support.
For the initial boot, or a system reset generated by something
other than the CAS call itself, this set will consist of *all*
options supported both the platform and the guest. For calls
to ibm,client-architecture-support immediately after a CAS-induced
reset, we call spapr_dt_cas_updates() with only the set
of capabilities added since the previous call, since the other
capabilities will have already been addressed by the boot-time
device-tree this time around. In the unlikely event that
capabilities are *removed* since the previous CAS, we will
generate a CAS-induced reset. In the unlikely event that we
cannot fit the device-tree updates into the buffer provided
by the guest, well generate a CAS-induced reset.
2) When a CAS update results in the need to reset the machine and
include the updates in the boot-time device tree, we call the
spapr_dt_cas_updates() using the full set of negotiated
capabilities as part of the reset path. At initial boot, or after
a reset generated by something other than the CAS call itself,
this set will be empty, resulting in what should be the same
boot-time device-tree as we generated prior to this patch. For
CAS-induced reset, this routine will be called with the full set of
capabilities negotiated by the platform/guest in the previous
CAS call, which should result in CAS updates from previous call
being accounted for in the initial boot-time device tree.
Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
[dwg: Changed an int -> bool conversion to be more explicit]
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2016-10-25 06:47:29 +02:00
|
|
|
|
|
|
|
/* Generate ibm,dynamic-reconfiguration-memory node if required */
|
|
|
|
if (spapr_ovec_test(ov5_updates, OV5_DRCONF_MEMORY)) {
|
|
|
|
g_assert(smc->dr_lmb_enabled);
|
|
|
|
ret = spapr_populate_drconf_memory(spapr, fdt);
|
2016-10-25 06:47:30 +02:00
|
|
|
if (ret) {
|
|
|
|
goto out;
|
|
|
|
}
|
spapr: add option vector handling in CAS-generated resets
In some cases, ibm,client-architecture-support calls can fail. This
could happen in the current code for situations where the modified
device tree segment exceeds the buffer size provided by the guest
via the call parameters. In these cases, QEMU will reset, allowing
an opportunity to regenerate the device tree from scratch via
boot-time handling. There are potentially other scenarios as well,
not currently reachable in the current code, but possible in theory,
such as cases where device-tree properties or nodes need to be removed.
We currently don't handle either of these properly for option vector
capabilities however. Instead of carrying the negotiated capability
beyond the reset and creating the boot-time device tree accordingly,
we start from scratch, generating the same boot-time device tree as we
did prior to the CAS-generated and the same device tree updates as we
did before. This could (in theory) cause us to get stuck in a reset
loop. This hasn't been observed, but depending on the extensiveness
of CAS-induced device tree updates in the future, could eventually
become an issue.
Address this by pulling capability-related device tree
updates resulting from CAS calls into a common routine,
spapr_dt_cas_updates(), and adding an sPAPROptionVector*
parameter that allows us to test for newly-negotiated capabilities.
We invoke it as follows:
1) When ibm,client-architecture-support gets called, we
call spapr_dt_cas_updates() with the set of capabilities
added since the previous call to ibm,client-architecture-support.
For the initial boot, or a system reset generated by something
other than the CAS call itself, this set will consist of *all*
options supported both the platform and the guest. For calls
to ibm,client-architecture-support immediately after a CAS-induced
reset, we call spapr_dt_cas_updates() with only the set
of capabilities added since the previous call, since the other
capabilities will have already been addressed by the boot-time
device-tree this time around. In the unlikely event that
capabilities are *removed* since the previous CAS, we will
generate a CAS-induced reset. In the unlikely event that we
cannot fit the device-tree updates into the buffer provided
by the guest, well generate a CAS-induced reset.
2) When a CAS update results in the need to reset the machine and
include the updates in the boot-time device tree, we call the
spapr_dt_cas_updates() using the full set of negotiated
capabilities as part of the reset path. At initial boot, or after
a reset generated by something other than the CAS call itself,
this set will be empty, resulting in what should be the same
boot-time device-tree as we generated prior to this patch. For
CAS-induced reset, this routine will be called with the full set of
capabilities negotiated by the platform/guest in the previous
CAS call, which should result in CAS updates from previous call
being accounted for in the initial boot-time device tree.
Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
[dwg: Changed an int -> bool conversion to be more explicit]
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2016-10-25 06:47:29 +02:00
|
|
|
}
|
|
|
|
|
2016-10-25 06:47:30 +02:00
|
|
|
offset = fdt_path_offset(fdt, "/chosen");
|
|
|
|
if (offset < 0) {
|
|
|
|
offset = fdt_add_subnode(fdt, 0, "chosen");
|
|
|
|
if (offset < 0) {
|
|
|
|
return offset;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
ret = spapr_ovec_populate_dt(fdt, offset, spapr->ov5_cas,
|
|
|
|
"ibm,architecture-vec-5");
|
|
|
|
|
|
|
|
out:
|
spapr: add option vector handling in CAS-generated resets
In some cases, ibm,client-architecture-support calls can fail. This
could happen in the current code for situations where the modified
device tree segment exceeds the buffer size provided by the guest
via the call parameters. In these cases, QEMU will reset, allowing
an opportunity to regenerate the device tree from scratch via
boot-time handling. There are potentially other scenarios as well,
not currently reachable in the current code, but possible in theory,
such as cases where device-tree properties or nodes need to be removed.
We currently don't handle either of these properly for option vector
capabilities however. Instead of carrying the negotiated capability
beyond the reset and creating the boot-time device tree accordingly,
we start from scratch, generating the same boot-time device tree as we
did prior to the CAS-generated and the same device tree updates as we
did before. This could (in theory) cause us to get stuck in a reset
loop. This hasn't been observed, but depending on the extensiveness
of CAS-induced device tree updates in the future, could eventually
become an issue.
Address this by pulling capability-related device tree
updates resulting from CAS calls into a common routine,
spapr_dt_cas_updates(), and adding an sPAPROptionVector*
parameter that allows us to test for newly-negotiated capabilities.
We invoke it as follows:
1) When ibm,client-architecture-support gets called, we
call spapr_dt_cas_updates() with the set of capabilities
added since the previous call to ibm,client-architecture-support.
For the initial boot, or a system reset generated by something
other than the CAS call itself, this set will consist of *all*
options supported both the platform and the guest. For calls
to ibm,client-architecture-support immediately after a CAS-induced
reset, we call spapr_dt_cas_updates() with only the set
of capabilities added since the previous call, since the other
capabilities will have already been addressed by the boot-time
device-tree this time around. In the unlikely event that
capabilities are *removed* since the previous CAS, we will
generate a CAS-induced reset. In the unlikely event that we
cannot fit the device-tree updates into the buffer provided
by the guest, well generate a CAS-induced reset.
2) When a CAS update results in the need to reset the machine and
include the updates in the boot-time device tree, we call the
spapr_dt_cas_updates() using the full set of negotiated
capabilities as part of the reset path. At initial boot, or after
a reset generated by something other than the CAS call itself,
this set will be empty, resulting in what should be the same
boot-time device-tree as we generated prior to this patch. For
CAS-induced reset, this routine will be called with the full set of
capabilities negotiated by the platform/guest in the previous
CAS call, which should result in CAS updates from previous call
being accounted for in the initial boot-time device tree.
Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
[dwg: Changed an int -> bool conversion to be more explicit]
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2016-10-25 06:47:29 +02:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
hw/ppc: CAS reset on early device hotplug
This patch is a follow up on the discussions made in patch
"hw/ppc: disable hotplug before CAS is completed" that can be
found at [1].
At this moment, we do not support CPU/memory hotplug in early
boot stages, before CAS. When a hotplug occurs, the event is logged
in an internal RTAS event log queue and an IRQ pulse is fired. In
regular conditions, the guest handles the interrupt by executing
check_exception, fetching the generated hotplug event and enabling
the device for use.
In early boot, this IRQ isn't caught (SLOF does not handle hotplug
events), leaving the event in the rtas event log queue. If the guest
executes check_exception due to another hotplug event, the re-assertion
of the IRQ ends up de-queuing the first hotplug event as well. In short,
a device hotplugged before CAS is considered coldplugged by SLOF.
This leads to device misbehavior and, in some cases, guest kernel
Ooops when trying to unplug the device.
A proper fix would be to turn every device hotplugged before CAS
as a colplugged device. This is not trivial to do with the current
code base though - the FDT is written in the guest memory at
ppc_spapr_reset and can't be retrieved without adding extra state
(fdt_size for example) that will need to managed and migrated. Adding
the hotplugged DT in the middle of CAS negotiation via the updated DT
tree works with CPU devs, but panics the guest kernel at boot. Additional
analysis would be necessary for LMBs and PCI devices. There are
questions to be made in QEMU/SLOF/kernel level about how we can make
this change in a sustainable way.
With Linux guests, a fix would be the kernel executing check_exception
at boot time, de-queueing the events that happened in early boot and
processing them. However, even if/when the newer kernels start
fetching these events at boot time, we need to take care of older
kernels that won't be doing that.
This patch works around the situation by issuing a CAS reset if a hotplugged
device is detected during CAS:
- the DRC conditions that warrant a CAS reset is the same as those that
triggers a DRC migration - the DRC must have a device attached and
the DRC state is not equal to its ready_state. With that in mind, this
patch makes use of 'spapr_drc_needed' to determine if a CAS reset
is needed.
- In the middle of CAS negotiations, the function
'spapr_hotplugged_dev_before_cas' goes through all the DRCs to see
if there are any DRC that requires a reset, using spapr_drc_needed. If
that happens, returns '1' in 'spapr_h_cas_compose_response' which will set
spapr->cas_reboot to true, causing the machine to reboot.
No changes are made for coldplug devices.
[1] http://lists.nongnu.org/archive/html/qemu-devel/2017-08/msg02855.html
Signed-off-by: Daniel Henrique Barboza <danielhb@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2017-08-30 20:21:41 +02:00
|
|
|
static bool spapr_hotplugged_dev_before_cas(void)
|
|
|
|
{
|
|
|
|
Object *drc_container, *obj;
|
|
|
|
ObjectProperty *prop;
|
|
|
|
ObjectPropertyIterator iter;
|
|
|
|
|
|
|
|
drc_container = container_get(object_get_root(), "/dr-connector");
|
|
|
|
object_property_iter_init(&iter, drc_container);
|
|
|
|
while ((prop = object_property_iter_next(&iter))) {
|
|
|
|
if (!strstart(prop->type, "link<", NULL)) {
|
|
|
|
continue;
|
|
|
|
}
|
|
|
|
obj = object_property_get_link(drc_container, prop->name, NULL);
|
|
|
|
if (spapr_drc_needed(obj)) {
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2015-07-13 02:34:00 +02:00
|
|
|
int spapr_h_cas_compose_response(sPAPRMachineState *spapr,
|
|
|
|
target_ulong addr, target_ulong size,
|
spapr: add option vector handling in CAS-generated resets
In some cases, ibm,client-architecture-support calls can fail. This
could happen in the current code for situations where the modified
device tree segment exceeds the buffer size provided by the guest
via the call parameters. In these cases, QEMU will reset, allowing
an opportunity to regenerate the device tree from scratch via
boot-time handling. There are potentially other scenarios as well,
not currently reachable in the current code, but possible in theory,
such as cases where device-tree properties or nodes need to be removed.
We currently don't handle either of these properly for option vector
capabilities however. Instead of carrying the negotiated capability
beyond the reset and creating the boot-time device tree accordingly,
we start from scratch, generating the same boot-time device tree as we
did prior to the CAS-generated and the same device tree updates as we
did before. This could (in theory) cause us to get stuck in a reset
loop. This hasn't been observed, but depending on the extensiveness
of CAS-induced device tree updates in the future, could eventually
become an issue.
Address this by pulling capability-related device tree
updates resulting from CAS calls into a common routine,
spapr_dt_cas_updates(), and adding an sPAPROptionVector*
parameter that allows us to test for newly-negotiated capabilities.
We invoke it as follows:
1) When ibm,client-architecture-support gets called, we
call spapr_dt_cas_updates() with the set of capabilities
added since the previous call to ibm,client-architecture-support.
For the initial boot, or a system reset generated by something
other than the CAS call itself, this set will consist of *all*
options supported both the platform and the guest. For calls
to ibm,client-architecture-support immediately after a CAS-induced
reset, we call spapr_dt_cas_updates() with only the set
of capabilities added since the previous call, since the other
capabilities will have already been addressed by the boot-time
device-tree this time around. In the unlikely event that
capabilities are *removed* since the previous CAS, we will
generate a CAS-induced reset. In the unlikely event that we
cannot fit the device-tree updates into the buffer provided
by the guest, well generate a CAS-induced reset.
2) When a CAS update results in the need to reset the machine and
include the updates in the boot-time device tree, we call the
spapr_dt_cas_updates() using the full set of negotiated
capabilities as part of the reset path. At initial boot, or after
a reset generated by something other than the CAS call itself,
this set will be empty, resulting in what should be the same
boot-time device-tree as we generated prior to this patch. For
CAS-induced reset, this routine will be called with the full set of
capabilities negotiated by the platform/guest in the previous
CAS call, which should result in CAS updates from previous call
being accounted for in the initial boot-time device tree.
Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
[dwg: Changed an int -> bool conversion to be more explicit]
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2016-10-25 06:47:29 +02:00
|
|
|
sPAPROptionVector *ov5_updates)
|
2015-07-13 02:34:00 +02:00
|
|
|
{
|
|
|
|
void *fdt, *fdt_skel;
|
|
|
|
sPAPRDeviceTreeUpdateHeader hdr = { .version_id = 1 };
|
|
|
|
|
hw/ppc: CAS reset on early device hotplug
This patch is a follow up on the discussions made in patch
"hw/ppc: disable hotplug before CAS is completed" that can be
found at [1].
At this moment, we do not support CPU/memory hotplug in early
boot stages, before CAS. When a hotplug occurs, the event is logged
in an internal RTAS event log queue and an IRQ pulse is fired. In
regular conditions, the guest handles the interrupt by executing
check_exception, fetching the generated hotplug event and enabling
the device for use.
In early boot, this IRQ isn't caught (SLOF does not handle hotplug
events), leaving the event in the rtas event log queue. If the guest
executes check_exception due to another hotplug event, the re-assertion
of the IRQ ends up de-queuing the first hotplug event as well. In short,
a device hotplugged before CAS is considered coldplugged by SLOF.
This leads to device misbehavior and, in some cases, guest kernel
Ooops when trying to unplug the device.
A proper fix would be to turn every device hotplugged before CAS
as a colplugged device. This is not trivial to do with the current
code base though - the FDT is written in the guest memory at
ppc_spapr_reset and can't be retrieved without adding extra state
(fdt_size for example) that will need to managed and migrated. Adding
the hotplugged DT in the middle of CAS negotiation via the updated DT
tree works with CPU devs, but panics the guest kernel at boot. Additional
analysis would be necessary for LMBs and PCI devices. There are
questions to be made in QEMU/SLOF/kernel level about how we can make
this change in a sustainable way.
With Linux guests, a fix would be the kernel executing check_exception
at boot time, de-queueing the events that happened in early boot and
processing them. However, even if/when the newer kernels start
fetching these events at boot time, we need to take care of older
kernels that won't be doing that.
This patch works around the situation by issuing a CAS reset if a hotplugged
device is detected during CAS:
- the DRC conditions that warrant a CAS reset is the same as those that
triggers a DRC migration - the DRC must have a device attached and
the DRC state is not equal to its ready_state. With that in mind, this
patch makes use of 'spapr_drc_needed' to determine if a CAS reset
is needed.
- In the middle of CAS negotiations, the function
'spapr_hotplugged_dev_before_cas' goes through all the DRCs to see
if there are any DRC that requires a reset, using spapr_drc_needed. If
that happens, returns '1' in 'spapr_h_cas_compose_response' which will set
spapr->cas_reboot to true, causing the machine to reboot.
No changes are made for coldplug devices.
[1] http://lists.nongnu.org/archive/html/qemu-devel/2017-08/msg02855.html
Signed-off-by: Daniel Henrique Barboza <danielhb@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2017-08-30 20:21:41 +02:00
|
|
|
if (spapr_hotplugged_dev_before_cas()) {
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
|
2017-10-04 11:02:31 +02:00
|
|
|
if (size < sizeof(hdr) || size > FW_MAX_SIZE) {
|
|
|
|
error_report("SLOF provided an unexpected CAS buffer size "
|
|
|
|
TARGET_FMT_lu " (min: %zu, max: %u)",
|
|
|
|
size, sizeof(hdr), FW_MAX_SIZE);
|
|
|
|
exit(EXIT_FAILURE);
|
|
|
|
}
|
|
|
|
|
2015-07-13 02:34:00 +02:00
|
|
|
size -= sizeof(hdr);
|
|
|
|
|
hw/ppc: CAS reset on early device hotplug
This patch is a follow up on the discussions made in patch
"hw/ppc: disable hotplug before CAS is completed" that can be
found at [1].
At this moment, we do not support CPU/memory hotplug in early
boot stages, before CAS. When a hotplug occurs, the event is logged
in an internal RTAS event log queue and an IRQ pulse is fired. In
regular conditions, the guest handles the interrupt by executing
check_exception, fetching the generated hotplug event and enabling
the device for use.
In early boot, this IRQ isn't caught (SLOF does not handle hotplug
events), leaving the event in the rtas event log queue. If the guest
executes check_exception due to another hotplug event, the re-assertion
of the IRQ ends up de-queuing the first hotplug event as well. In short,
a device hotplugged before CAS is considered coldplugged by SLOF.
This leads to device misbehavior and, in some cases, guest kernel
Ooops when trying to unplug the device.
A proper fix would be to turn every device hotplugged before CAS
as a colplugged device. This is not trivial to do with the current
code base though - the FDT is written in the guest memory at
ppc_spapr_reset and can't be retrieved without adding extra state
(fdt_size for example) that will need to managed and migrated. Adding
the hotplugged DT in the middle of CAS negotiation via the updated DT
tree works with CPU devs, but panics the guest kernel at boot. Additional
analysis would be necessary for LMBs and PCI devices. There are
questions to be made in QEMU/SLOF/kernel level about how we can make
this change in a sustainable way.
With Linux guests, a fix would be the kernel executing check_exception
at boot time, de-queueing the events that happened in early boot and
processing them. However, even if/when the newer kernels start
fetching these events at boot time, we need to take care of older
kernels that won't be doing that.
This patch works around the situation by issuing a CAS reset if a hotplugged
device is detected during CAS:
- the DRC conditions that warrant a CAS reset is the same as those that
triggers a DRC migration - the DRC must have a device attached and
the DRC state is not equal to its ready_state. With that in mind, this
patch makes use of 'spapr_drc_needed' to determine if a CAS reset
is needed.
- In the middle of CAS negotiations, the function
'spapr_hotplugged_dev_before_cas' goes through all the DRCs to see
if there are any DRC that requires a reset, using spapr_drc_needed. If
that happens, returns '1' in 'spapr_h_cas_compose_response' which will set
spapr->cas_reboot to true, causing the machine to reboot.
No changes are made for coldplug devices.
[1] http://lists.nongnu.org/archive/html/qemu-devel/2017-08/msg02855.html
Signed-off-by: Daniel Henrique Barboza <danielhb@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2017-08-30 20:21:41 +02:00
|
|
|
/* Create skeleton */
|
2015-07-13 02:34:00 +02:00
|
|
|
fdt_skel = g_malloc0(size);
|
|
|
|
_FDT((fdt_create(fdt_skel, size)));
|
2018-04-05 04:07:38 +02:00
|
|
|
_FDT((fdt_finish_reservemap(fdt_skel)));
|
2015-07-13 02:34:00 +02:00
|
|
|
_FDT((fdt_begin_node(fdt_skel, "")));
|
|
|
|
_FDT((fdt_end_node(fdt_skel)));
|
|
|
|
_FDT((fdt_finish(fdt_skel)));
|
|
|
|
fdt = g_malloc0(size);
|
|
|
|
_FDT((fdt_open_into(fdt_skel, fdt, size)));
|
|
|
|
g_free(fdt_skel);
|
|
|
|
|
|
|
|
/* Fixup cpu nodes */
|
2016-10-28 15:01:05 +02:00
|
|
|
_FDT((spapr_fixup_cpu_dt(fdt, spapr)));
|
2015-07-13 02:34:00 +02:00
|
|
|
|
spapr: add option vector handling in CAS-generated resets
In some cases, ibm,client-architecture-support calls can fail. This
could happen in the current code for situations where the modified
device tree segment exceeds the buffer size provided by the guest
via the call parameters. In these cases, QEMU will reset, allowing
an opportunity to regenerate the device tree from scratch via
boot-time handling. There are potentially other scenarios as well,
not currently reachable in the current code, but possible in theory,
such as cases where device-tree properties or nodes need to be removed.
We currently don't handle either of these properly for option vector
capabilities however. Instead of carrying the negotiated capability
beyond the reset and creating the boot-time device tree accordingly,
we start from scratch, generating the same boot-time device tree as we
did prior to the CAS-generated and the same device tree updates as we
did before. This could (in theory) cause us to get stuck in a reset
loop. This hasn't been observed, but depending on the extensiveness
of CAS-induced device tree updates in the future, could eventually
become an issue.
Address this by pulling capability-related device tree
updates resulting from CAS calls into a common routine,
spapr_dt_cas_updates(), and adding an sPAPROptionVector*
parameter that allows us to test for newly-negotiated capabilities.
We invoke it as follows:
1) When ibm,client-architecture-support gets called, we
call spapr_dt_cas_updates() with the set of capabilities
added since the previous call to ibm,client-architecture-support.
For the initial boot, or a system reset generated by something
other than the CAS call itself, this set will consist of *all*
options supported both the platform and the guest. For calls
to ibm,client-architecture-support immediately after a CAS-induced
reset, we call spapr_dt_cas_updates() with only the set
of capabilities added since the previous call, since the other
capabilities will have already been addressed by the boot-time
device-tree this time around. In the unlikely event that
capabilities are *removed* since the previous CAS, we will
generate a CAS-induced reset. In the unlikely event that we
cannot fit the device-tree updates into the buffer provided
by the guest, well generate a CAS-induced reset.
2) When a CAS update results in the need to reset the machine and
include the updates in the boot-time device tree, we call the
spapr_dt_cas_updates() using the full set of negotiated
capabilities as part of the reset path. At initial boot, or after
a reset generated by something other than the CAS call itself,
this set will be empty, resulting in what should be the same
boot-time device-tree as we generated prior to this patch. For
CAS-induced reset, this routine will be called with the full set of
capabilities negotiated by the platform/guest in the previous
CAS call, which should result in CAS updates from previous call
being accounted for in the initial boot-time device tree.
Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
[dwg: Changed an int -> bool conversion to be more explicit]
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2016-10-25 06:47:29 +02:00
|
|
|
if (spapr_dt_cas_updates(spapr, fdt, ov5_updates)) {
|
|
|
|
return -1;
|
2015-07-13 02:34:00 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
/* Pack resulting tree */
|
|
|
|
_FDT((fdt_pack(fdt)));
|
|
|
|
|
|
|
|
if (fdt_totalsize(fdt) + sizeof(hdr) > size) {
|
|
|
|
trace_spapr_cas_failed(size);
|
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
|
|
|
|
cpu_physical_memory_write(addr, &hdr, sizeof(hdr));
|
|
|
|
cpu_physical_memory_write(addr + sizeof(hdr), fdt, fdt_totalsize(fdt));
|
|
|
|
trace_spapr_cas_continue(fdt_totalsize(fdt) + sizeof(hdr));
|
|
|
|
g_free(fdt);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2016-10-20 06:55:36 +02:00
|
|
|
static void spapr_dt_rtas(sPAPRMachineState *spapr, void *fdt)
|
|
|
|
{
|
|
|
|
int rtas;
|
|
|
|
GString *hypertas = g_string_sized_new(256);
|
|
|
|
GString *qemu_hypertas = g_string_sized_new(256);
|
|
|
|
uint32_t refpoints[] = { cpu_to_be32(0x4), cpu_to_be32(0x4) };
|
2018-04-23 18:51:25 +02:00
|
|
|
uint64_t max_device_addr = MACHINE(spapr)->device_memory->base +
|
2018-04-23 18:51:17 +02:00
|
|
|
memory_region_size(&MACHINE(spapr)->device_memory->mr);
|
2016-10-20 06:55:36 +02:00
|
|
|
uint32_t lrdr_capacity[] = {
|
2018-04-23 18:51:25 +02:00
|
|
|
cpu_to_be32(max_device_addr >> 32),
|
|
|
|
cpu_to_be32(max_device_addr & 0xffffffff),
|
2016-10-20 06:55:36 +02:00
|
|
|
0, cpu_to_be32(SPAPR_MEMORY_BLOCK_SIZE),
|
|
|
|
cpu_to_be32(max_cpus / smp_threads),
|
|
|
|
};
|
2018-04-11 20:41:59 +02:00
|
|
|
uint32_t maxdomains[] = {
|
|
|
|
cpu_to_be32(4),
|
|
|
|
cpu_to_be32(0),
|
|
|
|
cpu_to_be32(0),
|
|
|
|
cpu_to_be32(0),
|
|
|
|
cpu_to_be32(nb_numa_nodes ? nb_numa_nodes - 1 : 0),
|
|
|
|
};
|
2016-10-20 06:55:36 +02:00
|
|
|
|
|
|
|
_FDT(rtas = fdt_add_subnode(fdt, 0, "rtas"));
|
|
|
|
|
|
|
|
/* hypertas */
|
|
|
|
add_str(hypertas, "hcall-pft");
|
|
|
|
add_str(hypertas, "hcall-term");
|
|
|
|
add_str(hypertas, "hcall-dabr");
|
|
|
|
add_str(hypertas, "hcall-interrupt");
|
|
|
|
add_str(hypertas, "hcall-tce");
|
|
|
|
add_str(hypertas, "hcall-vio");
|
|
|
|
add_str(hypertas, "hcall-splpar");
|
|
|
|
add_str(hypertas, "hcall-bulk");
|
|
|
|
add_str(hypertas, "hcall-set-mode");
|
|
|
|
add_str(hypertas, "hcall-sprg0");
|
|
|
|
add_str(hypertas, "hcall-copy");
|
|
|
|
add_str(hypertas, "hcall-debug");
|
|
|
|
add_str(qemu_hypertas, "hcall-memop1");
|
|
|
|
|
|
|
|
if (!kvm_enabled() || kvmppc_spapr_use_multitce()) {
|
|
|
|
add_str(hypertas, "hcall-multi-tce");
|
|
|
|
}
|
2017-05-12 07:46:11 +02:00
|
|
|
|
|
|
|
if (spapr->resize_hpt != SPAPR_RESIZE_HPT_DISABLED) {
|
|
|
|
add_str(hypertas, "hcall-hpt-resize");
|
|
|
|
}
|
|
|
|
|
2016-10-20 06:55:36 +02:00
|
|
|
_FDT(fdt_setprop(fdt, rtas, "ibm,hypertas-functions",
|
|
|
|
hypertas->str, hypertas->len));
|
|
|
|
g_string_free(hypertas, TRUE);
|
|
|
|
_FDT(fdt_setprop(fdt, rtas, "qemu,hypertas-functions",
|
|
|
|
qemu_hypertas->str, qemu_hypertas->len));
|
|
|
|
g_string_free(qemu_hypertas, TRUE);
|
|
|
|
|
|
|
|
_FDT(fdt_setprop(fdt, rtas, "ibm,associativity-reference-points",
|
|
|
|
refpoints, sizeof(refpoints)));
|
|
|
|
|
2018-04-11 20:41:59 +02:00
|
|
|
_FDT(fdt_setprop(fdt, rtas, "ibm,max-associativity-domains",
|
|
|
|
maxdomains, sizeof(maxdomains)));
|
|
|
|
|
2016-10-20 06:55:36 +02:00
|
|
|
_FDT(fdt_setprop_cell(fdt, rtas, "rtas-error-log-max",
|
|
|
|
RTAS_ERROR_LOG_MAX));
|
|
|
|
_FDT(fdt_setprop_cell(fdt, rtas, "rtas-event-scan-rate",
|
|
|
|
RTAS_EVENT_SCAN_RATE));
|
|
|
|
|
2017-12-08 04:11:49 +01:00
|
|
|
g_assert(msi_nonbroken);
|
|
|
|
_FDT(fdt_setprop(fdt, rtas, "ibm,change-msix-capable", NULL, 0));
|
2016-10-20 06:55:36 +02:00
|
|
|
|
|
|
|
/*
|
|
|
|
* According to PAPR, rtas ibm,os-term does not guarantee a return
|
|
|
|
* back to the guest cpu.
|
|
|
|
*
|
|
|
|
* While an additional ibm,extended-os-term property indicates
|
|
|
|
* that rtas call return will always occur. Set this property.
|
|
|
|
*/
|
|
|
|
_FDT(fdt_setprop(fdt, rtas, "ibm,extended-os-term", NULL, 0));
|
|
|
|
|
|
|
|
_FDT(fdt_setprop(fdt, rtas, "ibm,lrdr-capacity",
|
|
|
|
lrdr_capacity, sizeof(lrdr_capacity)));
|
|
|
|
|
|
|
|
spapr_dt_rtas_tokens(fdt, rtas);
|
|
|
|
}
|
|
|
|
|
2017-03-23 04:46:00 +01:00
|
|
|
/* Prepare ibm,arch-vec-5-platform-support, which indicates the MMU features
|
|
|
|
* that the guest may request and thus the valid values for bytes 24..26 of
|
|
|
|
* option vector 5: */
|
|
|
|
static void spapr_dt_ov5_platform_support(void *fdt, int chosen)
|
|
|
|
{
|
2017-05-02 08:37:18 +02:00
|
|
|
PowerPCCPU *first_ppc_cpu = POWERPC_CPU(first_cpu);
|
|
|
|
|
2017-07-05 19:13:14 +02:00
|
|
|
char val[2 * 4] = {
|
2017-09-08 16:33:42 +02:00
|
|
|
23, 0x00, /* Xive mode, filled in below. */
|
2017-03-23 04:46:00 +01:00
|
|
|
24, 0x00, /* Hash/Radix, filled in below. */
|
|
|
|
25, 0x00, /* Hash options: Segment Tables == no, GTSE == no. */
|
|
|
|
26, 0x40, /* Radix options: GTSE == yes. */
|
|
|
|
};
|
|
|
|
|
2017-11-17 06:39:00 +01:00
|
|
|
if (!ppc_check_compat(first_ppc_cpu, CPU_POWERPC_LOGICAL_3_00, 0,
|
|
|
|
first_ppc_cpu->compat_pvr)) {
|
|
|
|
/* If we're in a pre POWER9 compat mode then the guest should do hash */
|
|
|
|
val[3] = 0x00; /* Hash */
|
|
|
|
} else if (kvm_enabled()) {
|
2017-03-23 04:46:00 +01:00
|
|
|
if (kvmppc_has_cap_mmu_radix() && kvmppc_has_cap_mmu_hash_v3()) {
|
2017-07-05 19:13:14 +02:00
|
|
|
val[3] = 0x80; /* OV5_MMU_BOTH */
|
2017-03-23 04:46:00 +01:00
|
|
|
} else if (kvmppc_has_cap_mmu_radix()) {
|
2017-07-05 19:13:14 +02:00
|
|
|
val[3] = 0x40; /* OV5_MMU_RADIX_300 */
|
2017-03-23 04:46:00 +01:00
|
|
|
} else {
|
2017-07-05 19:13:14 +02:00
|
|
|
val[3] = 0x00; /* Hash */
|
2017-03-23 04:46:00 +01:00
|
|
|
}
|
|
|
|
} else {
|
2017-11-17 06:39:00 +01:00
|
|
|
/* V3 MMU supports both hash and radix in tcg (with dynamic switching) */
|
|
|
|
val[3] = 0xC0;
|
2017-03-23 04:46:00 +01:00
|
|
|
}
|
|
|
|
_FDT(fdt_setprop(fdt, chosen, "ibm,arch-vec-5-platform-support",
|
|
|
|
val, sizeof(val)));
|
|
|
|
}
|
|
|
|
|
2016-10-24 03:05:57 +02:00
|
|
|
static void spapr_dt_chosen(sPAPRMachineState *spapr, void *fdt)
|
|
|
|
{
|
|
|
|
MachineState *machine = MACHINE(spapr);
|
|
|
|
int chosen;
|
|
|
|
const char *boot_device = machine->boot_order;
|
|
|
|
char *stdout_path = spapr_vio_stdout_path(spapr->vio_bus);
|
|
|
|
size_t cb = 0;
|
2018-08-10 14:40:27 +02:00
|
|
|
char *bootlist = get_boot_devices_list(&cb);
|
2016-10-24 03:05:57 +02:00
|
|
|
|
|
|
|
_FDT(chosen = fdt_add_subnode(fdt, 0, "chosen"));
|
|
|
|
|
|
|
|
_FDT(fdt_setprop_string(fdt, chosen, "bootargs", machine->kernel_cmdline));
|
|
|
|
_FDT(fdt_setprop_cell(fdt, chosen, "linux,initrd-start",
|
|
|
|
spapr->initrd_base));
|
|
|
|
_FDT(fdt_setprop_cell(fdt, chosen, "linux,initrd-end",
|
|
|
|
spapr->initrd_base + spapr->initrd_size));
|
|
|
|
|
|
|
|
if (spapr->kernel_size) {
|
|
|
|
uint64_t kprop[2] = { cpu_to_be64(KERNEL_LOAD_ADDR),
|
|
|
|
cpu_to_be64(spapr->kernel_size) };
|
|
|
|
|
|
|
|
_FDT(fdt_setprop(fdt, chosen, "qemu,boot-kernel",
|
|
|
|
&kprop, sizeof(kprop)));
|
|
|
|
if (spapr->kernel_le) {
|
|
|
|
_FDT(fdt_setprop(fdt, chosen, "qemu,boot-kernel-le", NULL, 0));
|
|
|
|
}
|
|
|
|
}
|
|
|
|
if (boot_menu) {
|
|
|
|
_FDT((fdt_setprop_cell(fdt, chosen, "qemu,boot-menu", boot_menu)));
|
|
|
|
}
|
|
|
|
_FDT(fdt_setprop_cell(fdt, chosen, "qemu,graphic-width", graphic_width));
|
|
|
|
_FDT(fdt_setprop_cell(fdt, chosen, "qemu,graphic-height", graphic_height));
|
|
|
|
_FDT(fdt_setprop_cell(fdt, chosen, "qemu,graphic-depth", graphic_depth));
|
|
|
|
|
|
|
|
if (cb && bootlist) {
|
|
|
|
int i;
|
|
|
|
|
|
|
|
for (i = 0; i < cb; i++) {
|
|
|
|
if (bootlist[i] == '\n') {
|
|
|
|
bootlist[i] = ' ';
|
|
|
|
}
|
|
|
|
}
|
|
|
|
_FDT(fdt_setprop_string(fdt, chosen, "qemu,boot-list", bootlist));
|
|
|
|
}
|
|
|
|
|
|
|
|
if (boot_device && strlen(boot_device)) {
|
|
|
|
_FDT(fdt_setprop_string(fdt, chosen, "qemu,boot-device", boot_device));
|
|
|
|
}
|
|
|
|
|
|
|
|
if (!spapr->has_graphics && stdout_path) {
|
2018-03-01 07:05:50 +01:00
|
|
|
/*
|
|
|
|
* "linux,stdout-path" and "stdout" properties are deprecated by linux
|
|
|
|
* kernel. New platforms should only use the "stdout-path" property. Set
|
|
|
|
* the new property and continue using older property to remain
|
|
|
|
* compatible with the existing firmware.
|
|
|
|
*/
|
2016-10-24 03:05:57 +02:00
|
|
|
_FDT(fdt_setprop_string(fdt, chosen, "linux,stdout-path", stdout_path));
|
2018-03-01 07:05:50 +01:00
|
|
|
_FDT(fdt_setprop_string(fdt, chosen, "stdout-path", stdout_path));
|
2016-10-24 03:05:57 +02:00
|
|
|
}
|
|
|
|
|
2017-03-23 04:46:00 +01:00
|
|
|
spapr_dt_ov5_platform_support(fdt, chosen);
|
|
|
|
|
2016-10-24 03:05:57 +02:00
|
|
|
g_free(stdout_path);
|
|
|
|
g_free(bootlist);
|
|
|
|
}
|
|
|
|
|
2016-10-20 06:59:36 +02:00
|
|
|
static void spapr_dt_hypervisor(sPAPRMachineState *spapr, void *fdt)
|
|
|
|
{
|
|
|
|
/* The /hypervisor node isn't in PAPR - this is a hack to allow PR
|
|
|
|
* KVM to work under pHyp with some guest co-operation */
|
|
|
|
int hypervisor;
|
|
|
|
uint8_t hypercall[16];
|
|
|
|
|
|
|
|
_FDT(hypervisor = fdt_add_subnode(fdt, 0, "hypervisor"));
|
|
|
|
/* indicate KVM hypercall interface */
|
|
|
|
_FDT(fdt_setprop_string(fdt, hypervisor, "compatible", "linux,kvm"));
|
|
|
|
if (kvmppc_has_cap_fixup_hcalls()) {
|
|
|
|
/*
|
|
|
|
* Older KVM versions with older guest kernels were broken
|
|
|
|
* with the magic page, don't allow the guest to map it.
|
|
|
|
*/
|
|
|
|
if (!kvmppc_get_hypercall(first_cpu->env_ptr, hypercall,
|
|
|
|
sizeof(hypercall))) {
|
|
|
|
_FDT(fdt_setprop(fdt, hypervisor, "hcall-instructions",
|
|
|
|
hypercall, sizeof(hypercall)));
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2016-10-25 02:51:33 +02:00
|
|
|
static void *spapr_build_fdt(sPAPRMachineState *spapr,
|
|
|
|
hwaddr rtas_addr,
|
|
|
|
hwaddr rtas_size)
|
Delay creation of pseries device tree until reset
At present, the 'pseries' machine creates a flattened device tree in the
machine->init function to pass to either the guest kernel or to firmware.
However, the machine->init function runs before processing of -device
command line options, which means that the device tree so created will
be (incorrectly) missing devices specified that way.
Supplying a correct device tree is, in any case, part of the required
platform entry conditions. Therefore, this patch moves the creation and
loading of the device tree from machine->init to a reset callback. The
setup of entry point address and initial register state moves with it,
which leads to a slight cleanup.
This is not, alas, quite enough to make a fully working reset for pseries.
For that we would need to reload the firmware images, which on this
machine are loaded into RAM. It's a step in the right direction, though.
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-04-05 07:12:10 +02:00
|
|
|
{
|
2017-09-06 20:43:05 +02:00
|
|
|
MachineState *machine = MACHINE(spapr);
|
2016-08-05 08:25:33 +02:00
|
|
|
MachineClass *mc = MACHINE_GET_CLASS(machine);
|
2015-09-01 03:22:35 +02:00
|
|
|
sPAPRMachineClass *smc = SPAPR_MACHINE_GET_CLASS(machine);
|
2016-10-24 03:05:57 +02:00
|
|
|
int ret;
|
Delay creation of pseries device tree until reset
At present, the 'pseries' machine creates a flattened device tree in the
machine->init function to pass to either the guest kernel or to firmware.
However, the machine->init function runs before processing of -device
command line options, which means that the device tree so created will
be (incorrectly) missing devices specified that way.
Supplying a correct device tree is, in any case, part of the required
platform entry conditions. Therefore, this patch moves the creation and
loading of the device tree from machine->init to a reset callback. The
setup of entry point address and initial register state moves with it,
which leads to a slight cleanup.
This is not, alas, quite enough to make a fully working reset for pseries.
For that we would need to reload the firmware images, which on this
machine are loaded into RAM. It's a step in the right direction, though.
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-04-05 07:12:10 +02:00
|
|
|
void *fdt;
|
2011-10-30 18:16:46 +01:00
|
|
|
sPAPRPHBState *phb;
|
2016-10-20 07:05:00 +02:00
|
|
|
char *buf;
|
Delay creation of pseries device tree until reset
At present, the 'pseries' machine creates a flattened device tree in the
machine->init function to pass to either the guest kernel or to firmware.
However, the machine->init function runs before processing of -device
command line options, which means that the device tree so created will
be (incorrectly) missing devices specified that way.
Supplying a correct device tree is, in any case, part of the required
platform entry conditions. Therefore, this patch moves the creation and
loading of the device tree from machine->init to a reset callback. The
setup of entry point address and initial register state moves with it,
which leads to a slight cleanup.
This is not, alas, quite enough to make a fully working reset for pseries.
For that we would need to reload the firmware images, which on this
machine are loaded into RAM. It's a step in the right direction, though.
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-04-05 07:12:10 +02:00
|
|
|
|
2016-10-20 07:05:00 +02:00
|
|
|
fdt = g_malloc0(FDT_MAX_SIZE);
|
|
|
|
_FDT((fdt_create_empty_tree(fdt, FDT_MAX_SIZE)));
|
Delay creation of pseries device tree until reset
At present, the 'pseries' machine creates a flattened device tree in the
machine->init function to pass to either the guest kernel or to firmware.
However, the machine->init function runs before processing of -device
command line options, which means that the device tree so created will
be (incorrectly) missing devices specified that way.
Supplying a correct device tree is, in any case, part of the required
platform entry conditions. Therefore, this patch moves the creation and
loading of the device tree from machine->init to a reset callback. The
setup of entry point address and initial register state moves with it,
which leads to a slight cleanup.
This is not, alas, quite enough to make a fully working reset for pseries.
For that we would need to reload the firmware images, which on this
machine are loaded into RAM. It's a step in the right direction, though.
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-04-05 07:12:10 +02:00
|
|
|
|
2016-10-20 07:05:00 +02:00
|
|
|
/* Root node */
|
|
|
|
_FDT(fdt_setprop_string(fdt, 0, "device_type", "chrp"));
|
|
|
|
_FDT(fdt_setprop_string(fdt, 0, "model", "IBM pSeries (emulated by qemu)"));
|
|
|
|
_FDT(fdt_setprop_string(fdt, 0, "compatible", "qemu,pseries"));
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Add info to guest to indentify which host is it being run on
|
|
|
|
* and what is the uuid of the guest
|
|
|
|
*/
|
|
|
|
if (kvmppc_get_host_model(&buf)) {
|
|
|
|
_FDT(fdt_setprop_string(fdt, 0, "host-model", buf));
|
|
|
|
g_free(buf);
|
|
|
|
}
|
|
|
|
if (kvmppc_get_host_serial(&buf)) {
|
|
|
|
_FDT(fdt_setprop_string(fdt, 0, "host-serial", buf));
|
|
|
|
g_free(buf);
|
|
|
|
}
|
|
|
|
|
|
|
|
buf = qemu_uuid_unparse_strdup(&qemu_uuid);
|
|
|
|
|
|
|
|
_FDT(fdt_setprop_string(fdt, 0, "vm,uuid", buf));
|
|
|
|
if (qemu_uuid_set) {
|
|
|
|
_FDT(fdt_setprop_string(fdt, 0, "system-id", buf));
|
|
|
|
}
|
|
|
|
g_free(buf);
|
|
|
|
|
|
|
|
if (qemu_get_vm_name()) {
|
|
|
|
_FDT(fdt_setprop_string(fdt, 0, "ibm,partition-name",
|
|
|
|
qemu_get_vm_name()));
|
|
|
|
}
|
|
|
|
|
|
|
|
_FDT(fdt_setprop_cell(fdt, 0, "#address-cells", 2));
|
|
|
|
_FDT(fdt_setprop_cell(fdt, 0, "#size-cells", 2));
|
2011-04-01 06:15:21 +02:00
|
|
|
|
2017-07-28 05:38:50 +02:00
|
|
|
/* /interrupt controller */
|
spapr: use spapr->vsmt to compute VCPU ids
Since the introduction of VSMT in 2.11, the spacing of VCPU ids
between cores is controllable through a machine property instead
of being only dictated by the SMT mode of the host:
cpu->vcpu_id = (cc->core_id * spapr->vsmt / smp_threads) + i
Until recently, the machine code would try to change the SMT mode
of the host to be equal to VSMT or exit. This allowed the rest of
the code to assume that kvmppc_smt_threads() == spapr->vsmt is
always true.
Recent commit "8904e5a75005 spapr: Adjust default VSMT value for
better migration compatibility" relaxed the rule. If the VSMT
mode cannot be set in KVM for some reasons, but the requested
CPU topology is compatible with the current SMT mode, then we
let the guest run with kvmppc_smt_threads() != spapr->vsmt.
This breaks quite a few places in the code, in particular when
calculating DRC indexes.
This is what happens on a POWER host with subcores-per-core=2 (ie,
supports up to SMT4) when passing the following topology:
-smp threads=4,maxcpus=16 \
-device host-spapr-cpu-core,core-id=4,id=core1 \
-device host-spapr-cpu-core,core-id=8,id=core2
qemu-system-ppc64: warning: Failed to set KVM's VSMT mode to 8 (errno -22)
This is expected since KVM is limited to SMT4, but the guest is started
anyway because this topology can run on SMT4 even with a VSMT8 spacing.
But when we look at the DT, things get nastier:
cpus {
...
ibm,drc-indexes = <0x4 0x10000000 0x10000004 0x10000008 0x1000000c>;
This means that we have the following association:
CPU core device | DRC | VCPU id
-----------------+------------+---------
boot core | 0x10000000 | 0
core1 | 0x10000004 | 4
core2 | 0x10000008 | 8
core3 | 0x1000000c | 12
But since the spacing of VCPU ids is 8, the DRC for core1 points to a
VCPU that doesn't exist, the DRC for core2 points to the first VCPU of
core1 and and so on...
...
PowerPC,POWER8@0 {
...
ibm,my-drc-index = <0x10000000>;
...
};
PowerPC,POWER8@8 {
...
ibm,my-drc-index = <0x10000008>;
...
};
PowerPC,POWER8@10 {
...
No ibm,my-drc-index property for this core since 0x10000010 doesn't
exist in ibm,drc-indexes above.
...
};
};
...
interrupt-controller {
...
ibm,interrupt-server-ranges = <0x0 0x10>;
With a spacing of 8, the highest VCPU id for the given topology should be:
16 * 8 / 4 = 32 and not 16
...
linux,phandle = <0x7e7323b8>;
interrupt-controller;
};
And CPU hot-plug/unplug is broken:
(qemu) device_del core1
pseries-hotplug-cpu: Cannot find CPU (drc index 10000004) to remove
(qemu) device_del core2
cpu 4 (hwid 8) Ready to die...
cpu 5 (hwid 9) Ready to die...
cpu 6 (hwid 10) Ready to die...
cpu 7 (hwid 11) Ready to die...
These are the VCPU ids of core1 actually
(qemu) device_add host-spapr-cpu-core,core-id=12,id=core3
(qemu) device_del core3
pseries-hotplug-cpu: Cannot find CPU (drc index 1000000c) to remove
This patches all the code in hw/ppc/spapr.c to assume the VSMT
spacing when manipulating VCPU ids.
Fixes: 8904e5a75005
Signed-off-by: Greg Kurz <groug@kaod.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2018-02-14 20:40:26 +01:00
|
|
|
spapr_dt_xics(xics_max_server_number(spapr), fdt, PHANDLE_XICP);
|
2017-07-28 05:38:50 +02:00
|
|
|
|
2015-08-03 07:35:41 +02:00
|
|
|
ret = spapr_populate_memory(spapr, fdt);
|
|
|
|
if (ret < 0) {
|
2016-08-02 19:38:00 +02:00
|
|
|
error_report("couldn't setup memory nodes in fdt");
|
2015-08-03 07:35:41 +02:00
|
|
|
exit(1);
|
2012-09-12 18:57:12 +02:00
|
|
|
}
|
|
|
|
|
2016-10-20 07:01:17 +02:00
|
|
|
/* /vdevice */
|
|
|
|
spapr_dt_vdevice(spapr->vio_bus, fdt);
|
2011-04-01 06:15:21 +02:00
|
|
|
|
ppc/spapr: Implement H_RANDOM hypercall in QEMU
The PAPR interface defines a hypercall to pass high-quality
hardware generated random numbers to guests. Recent kernels can
already provide this hypercall to the guest if the right hardware
random number generator is available. But in case the user wants
to use another source like EGD, or QEMU is running with an older
kernel, we should also have this call in QEMU, so that guests that
do not support virtio-rng yet can get good random numbers, too.
This patch now adds a new pseudo-device to QEMU that either
directly provides this hypercall to the guest or is able to
enable the in-kernel hypercall if available. The in-kernel
hypercall can be enabled with the use-kvm property, e.g.:
qemu-system-ppc64 -device spapr-rng,use-kvm=true
For handling the hypercall in QEMU instead, a "RngBackend" is
required since the hypercall should provide "good" random data
instead of pseudo-random (like from a "simple" library function
like rand() or g_random_int()). Since there are multiple RngBackends
available, the user must select an appropriate back-end via the
"rng" property of the device, e.g.:
qemu-system-ppc64 -object rng-random,filename=/dev/hwrng,id=gid0 \
-device spapr-rng,rng=gid0 ...
See http://wiki.qemu-project.org/Features-Done/VirtIORNG for
other example of specifying RngBackends.
Signed-off-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2015-09-17 10:49:41 +02:00
|
|
|
if (object_resolve_path_type("", TYPE_SPAPR_RNG, NULL)) {
|
|
|
|
ret = spapr_rng_populate_dt(fdt);
|
|
|
|
if (ret < 0) {
|
2016-08-02 19:38:00 +02:00
|
|
|
error_report("could not set up rng device in the fdt");
|
ppc/spapr: Implement H_RANDOM hypercall in QEMU
The PAPR interface defines a hypercall to pass high-quality
hardware generated random numbers to guests. Recent kernels can
already provide this hypercall to the guest if the right hardware
random number generator is available. But in case the user wants
to use another source like EGD, or QEMU is running with an older
kernel, we should also have this call in QEMU, so that guests that
do not support virtio-rng yet can get good random numbers, too.
This patch now adds a new pseudo-device to QEMU that either
directly provides this hypercall to the guest or is able to
enable the in-kernel hypercall if available. The in-kernel
hypercall can be enabled with the use-kvm property, e.g.:
qemu-system-ppc64 -device spapr-rng,use-kvm=true
For handling the hypercall in QEMU instead, a "RngBackend" is
required since the hypercall should provide "good" random data
instead of pseudo-random (like from a "simple" library function
like rand() or g_random_int()). Since there are multiple RngBackends
available, the user must select an appropriate back-end via the
"rng" property of the device, e.g.:
qemu-system-ppc64 -object rng-random,filename=/dev/hwrng,id=gid0 \
-device spapr-rng,rng=gid0 ...
See http://wiki.qemu-project.org/Features-Done/VirtIORNG for
other example of specifying RngBackends.
Signed-off-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2015-09-17 10:49:41 +02:00
|
|
|
exit(1);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2011-10-30 18:16:46 +01:00
|
|
|
QLIST_FOREACH(phb, &spapr->phbs, list) {
|
2012-06-13 20:40:06 +02:00
|
|
|
ret = spapr_populate_pci_dt(phb, PHANDLE_XICP, fdt);
|
2016-04-21 12:08:58 +02:00
|
|
|
if (ret < 0) {
|
|
|
|
error_report("couldn't setup PCI devices in fdt");
|
|
|
|
exit(1);
|
|
|
|
}
|
2011-10-30 18:16:46 +01:00
|
|
|
}
|
|
|
|
|
2015-07-02 08:23:17 +02:00
|
|
|
/* cpus */
|
|
|
|
spapr_populate_cpus_dt_node(fdt, spapr);
|
2011-12-12 19:24:30 +01:00
|
|
|
|
2015-09-01 03:22:35 +02:00
|
|
|
if (smc->dr_lmb_enabled) {
|
|
|
|
_FDT(spapr_drc_populate_dt(fdt, 0, NULL, SPAPR_DR_CONNECTOR_TYPE_LMB));
|
|
|
|
}
|
|
|
|
|
2017-02-10 11:20:57 +01:00
|
|
|
if (mc->has_hotpluggable_cpus) {
|
2016-06-10 02:59:04 +02:00
|
|
|
int offset = fdt_path_offset(fdt, "/cpus");
|
|
|
|
ret = spapr_drc_populate_dt(fdt, offset, NULL,
|
|
|
|
SPAPR_DR_CONNECTOR_TYPE_CPU);
|
|
|
|
if (ret < 0) {
|
|
|
|
error_report("Couldn't set up CPU DR device tree properties");
|
|
|
|
exit(1);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2016-10-20 06:56:48 +02:00
|
|
|
/* /event-sources */
|
2016-10-27 04:20:26 +02:00
|
|
|
spapr_dt_events(spapr, fdt);
|
2016-10-20 06:56:48 +02:00
|
|
|
|
2016-10-20 06:55:36 +02:00
|
|
|
/* /rtas */
|
|
|
|
spapr_dt_rtas(spapr, fdt);
|
|
|
|
|
2016-10-24 03:05:57 +02:00
|
|
|
/* /chosen */
|
|
|
|
spapr_dt_chosen(spapr, fdt);
|
2016-10-20 06:34:59 +02:00
|
|
|
|
2016-10-20 06:59:36 +02:00
|
|
|
/* /hypervisor */
|
|
|
|
if (kvm_enabled()) {
|
|
|
|
spapr_dt_hypervisor(spapr, fdt);
|
|
|
|
}
|
|
|
|
|
2016-10-20 06:34:59 +02:00
|
|
|
/* Build memory reserve map */
|
|
|
|
if (spapr->kernel_size) {
|
|
|
|
_FDT((fdt_add_mem_rsv(fdt, KERNEL_LOAD_ADDR, spapr->kernel_size)));
|
|
|
|
}
|
|
|
|
if (spapr->initrd_size) {
|
|
|
|
_FDT((fdt_add_mem_rsv(fdt, spapr->initrd_base, spapr->initrd_size)));
|
|
|
|
}
|
|
|
|
|
spapr: add option vector handling in CAS-generated resets
In some cases, ibm,client-architecture-support calls can fail. This
could happen in the current code for situations where the modified
device tree segment exceeds the buffer size provided by the guest
via the call parameters. In these cases, QEMU will reset, allowing
an opportunity to regenerate the device tree from scratch via
boot-time handling. There are potentially other scenarios as well,
not currently reachable in the current code, but possible in theory,
such as cases where device-tree properties or nodes need to be removed.
We currently don't handle either of these properly for option vector
capabilities however. Instead of carrying the negotiated capability
beyond the reset and creating the boot-time device tree accordingly,
we start from scratch, generating the same boot-time device tree as we
did prior to the CAS-generated and the same device tree updates as we
did before. This could (in theory) cause us to get stuck in a reset
loop. This hasn't been observed, but depending on the extensiveness
of CAS-induced device tree updates in the future, could eventually
become an issue.
Address this by pulling capability-related device tree
updates resulting from CAS calls into a common routine,
spapr_dt_cas_updates(), and adding an sPAPROptionVector*
parameter that allows us to test for newly-negotiated capabilities.
We invoke it as follows:
1) When ibm,client-architecture-support gets called, we
call spapr_dt_cas_updates() with the set of capabilities
added since the previous call to ibm,client-architecture-support.
For the initial boot, or a system reset generated by something
other than the CAS call itself, this set will consist of *all*
options supported both the platform and the guest. For calls
to ibm,client-architecture-support immediately after a CAS-induced
reset, we call spapr_dt_cas_updates() with only the set
of capabilities added since the previous call, since the other
capabilities will have already been addressed by the boot-time
device-tree this time around. In the unlikely event that
capabilities are *removed* since the previous CAS, we will
generate a CAS-induced reset. In the unlikely event that we
cannot fit the device-tree updates into the buffer provided
by the guest, well generate a CAS-induced reset.
2) When a CAS update results in the need to reset the machine and
include the updates in the boot-time device tree, we call the
spapr_dt_cas_updates() using the full set of negotiated
capabilities as part of the reset path. At initial boot, or after
a reset generated by something other than the CAS call itself,
this set will be empty, resulting in what should be the same
boot-time device-tree as we generated prior to this patch. For
CAS-induced reset, this routine will be called with the full set of
capabilities negotiated by the platform/guest in the previous
CAS call, which should result in CAS updates from previous call
being accounted for in the initial boot-time device tree.
Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
[dwg: Changed an int -> bool conversion to be more explicit]
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2016-10-25 06:47:29 +02:00
|
|
|
/* ibm,client-architecture-support updates */
|
|
|
|
ret = spapr_dt_cas_updates(spapr, fdt, spapr->ov5_cas);
|
|
|
|
if (ret < 0) {
|
|
|
|
error_report("couldn't setup CAS properties fdt");
|
|
|
|
exit(1);
|
|
|
|
}
|
|
|
|
|
2016-10-25 02:51:33 +02:00
|
|
|
return fdt;
|
2011-04-01 06:15:20 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
static uint64_t translate_kernel_address(void *opaque, uint64_t addr)
|
|
|
|
{
|
|
|
|
return (addr & 0x0fffffff) + KERNEL_LOAD_ADDR;
|
|
|
|
}
|
|
|
|
|
2016-10-28 13:06:21 +02:00
|
|
|
static void emulate_spapr_hypercall(PPCVirtualHypervisor *vhyp,
|
|
|
|
PowerPCCPU *cpu)
|
2011-04-01 06:15:20 +02:00
|
|
|
{
|
2012-05-03 06:03:45 +02:00
|
|
|
CPUPPCState *env = &cpu->env;
|
|
|
|
|
tcg: drop global lock during TCG code execution
This finally allows TCG to benefit from the iothread introduction: Drop
the global mutex while running pure TCG CPU code. Reacquire the lock
when entering MMIO or PIO emulation, or when leaving the TCG loop.
We have to revert a few optimization for the current TCG threading
model, namely kicking the TCG thread in qemu_mutex_lock_iothread and not
kicking it in qemu_cpu_kick. We also need to disable RAM block
reordering until we have a more efficient locking mechanism at hand.
Still, a Linux x86 UP guest and my Musicpal ARM model boot fine here.
These numbers demonstrate where we gain something:
20338 jan 20 0 331m 75m 6904 R 99 0.9 0:50.95 qemu-system-arm
20337 jan 20 0 331m 75m 6904 S 20 0.9 0:26.50 qemu-system-arm
The guest CPU was fully loaded, but the iothread could still run mostly
independent on a second core. Without the patch we don't get beyond
32206 jan 20 0 330m 73m 7036 R 82 0.9 1:06.00 qemu-system-arm
32204 jan 20 0 330m 73m 7036 S 21 0.9 0:17.03 qemu-system-arm
We don't benefit significantly, though, when the guest is not fully
loading a host CPU.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Message-Id: <1439220437-23957-10-git-send-email-fred.konrad@greensocs.com>
[FK: Rebase, fix qemu_devices_reset deadlock, rm address_space_* mutex]
Signed-off-by: KONRAD Frederic <fred.konrad@greensocs.com>
[EGC: fixed iothread lock for cpu-exec IRQ handling]
Signed-off-by: Emilio G. Cota <cota@braap.org>
[AJB: -smp single-threaded fix, clean commit msg, BQL fixes]
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Reviewed-by: Pranith Kumar <bobby.prani@gmail.com>
[PM: target-arm changes]
Acked-by: Peter Maydell <peter.maydell@linaro.org>
2017-02-23 19:29:11 +01:00
|
|
|
/* The TCG path should also be holding the BQL at this point */
|
|
|
|
g_assert(qemu_mutex_iothread_locked());
|
|
|
|
|
2012-09-25 19:12:20 +02:00
|
|
|
if (msr_pr) {
|
|
|
|
hcall_dprintf("Hypercall made with MSR[PR]=1\n");
|
|
|
|
env->gpr[3] = H_PRIVILEGE;
|
|
|
|
} else {
|
2012-05-03 06:13:14 +02:00
|
|
|
env->gpr[3] = spapr_hypercall(cpu, env->gpr[3], &env->gpr[4]);
|
2012-09-25 19:12:20 +02:00
|
|
|
}
|
2011-04-01 06:15:20 +02:00
|
|
|
}
|
|
|
|
|
2017-03-01 07:54:36 +01:00
|
|
|
static uint64_t spapr_get_patbe(PPCVirtualHypervisor *vhyp)
|
|
|
|
{
|
|
|
|
sPAPRMachineState *spapr = SPAPR_MACHINE(vhyp);
|
|
|
|
|
|
|
|
return spapr->patb_entry;
|
|
|
|
}
|
|
|
|
|
2014-11-17 05:12:30 +01:00
|
|
|
#define HPTE(_table, _i) (void *)(((uint64_t *)(_table)) + ((_i) * 2))
|
|
|
|
#define HPTE_VALID(_hpte) (tswap64(*((uint64_t *)(_hpte))) & HPTE64_V_VALID)
|
|
|
|
#define HPTE_DIRTY(_hpte) (tswap64(*((uint64_t *)(_hpte))) & HPTE64_V_HPTE_DIRTY)
|
|
|
|
#define CLEAN_HPTE(_hpte) ((*(uint64_t *)(_hpte)) &= tswap64(~HPTE64_V_HPTE_DIRTY))
|
|
|
|
#define DIRTY_HPTE(_hpte) ((*(uint64_t *)(_hpte)) |= tswap64(HPTE64_V_HPTE_DIRTY))
|
|
|
|
|
2016-02-09 00:28:58 +01:00
|
|
|
/*
|
|
|
|
* Get the fd to access the kernel htab, re-opening it if necessary
|
|
|
|
*/
|
|
|
|
static int get_htab_fd(sPAPRMachineState *spapr)
|
|
|
|
{
|
2017-09-15 15:16:20 +02:00
|
|
|
Error *local_err = NULL;
|
|
|
|
|
2016-02-09 00:28:58 +01:00
|
|
|
if (spapr->htab_fd >= 0) {
|
|
|
|
return spapr->htab_fd;
|
|
|
|
}
|
|
|
|
|
2017-09-15 15:16:20 +02:00
|
|
|
spapr->htab_fd = kvmppc_get_htab_fd(false, 0, &local_err);
|
2016-02-09 00:28:58 +01:00
|
|
|
if (spapr->htab_fd < 0) {
|
2017-09-15 15:16:20 +02:00
|
|
|
error_report_err(local_err);
|
2016-02-09 00:28:58 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
return spapr->htab_fd;
|
|
|
|
}
|
|
|
|
|
2017-03-20 00:46:46 +01:00
|
|
|
void close_htab_fd(sPAPRMachineState *spapr)
|
2016-02-09 00:28:58 +01:00
|
|
|
{
|
|
|
|
if (spapr->htab_fd >= 0) {
|
|
|
|
close(spapr->htab_fd);
|
|
|
|
}
|
|
|
|
spapr->htab_fd = -1;
|
|
|
|
}
|
|
|
|
|
2017-02-23 01:39:18 +01:00
|
|
|
static hwaddr spapr_hpt_mask(PPCVirtualHypervisor *vhyp)
|
|
|
|
{
|
|
|
|
sPAPRMachineState *spapr = SPAPR_MACHINE(vhyp);
|
|
|
|
|
|
|
|
return HTAB_SIZE(spapr) / HASH_PTEG_SIZE_64 - 1;
|
|
|
|
}
|
|
|
|
|
2017-09-25 13:00:02 +02:00
|
|
|
static target_ulong spapr_encode_hpt_for_kvm_pr(PPCVirtualHypervisor *vhyp)
|
|
|
|
{
|
|
|
|
sPAPRMachineState *spapr = SPAPR_MACHINE(vhyp);
|
|
|
|
|
|
|
|
assert(kvm_enabled());
|
|
|
|
|
|
|
|
if (!spapr->htab) {
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
return (target_ulong)(uintptr_t)spapr->htab | (spapr->htab_shift - 18);
|
|
|
|
}
|
|
|
|
|
2017-02-23 01:39:18 +01:00
|
|
|
static const ppc_hash_pte64_t *spapr_map_hptes(PPCVirtualHypervisor *vhyp,
|
|
|
|
hwaddr ptex, int n)
|
|
|
|
{
|
|
|
|
sPAPRMachineState *spapr = SPAPR_MACHINE(vhyp);
|
|
|
|
hwaddr pte_offset = ptex * HASH_PTE_SIZE_64;
|
|
|
|
|
|
|
|
if (!spapr->htab) {
|
|
|
|
/*
|
|
|
|
* HTAB is controlled by KVM. Fetch into temporary buffer
|
|
|
|
*/
|
|
|
|
ppc_hash_pte64_t *hptes = g_malloc(n * HASH_PTE_SIZE_64);
|
|
|
|
kvmppc_read_hptes(hptes, ptex, n);
|
|
|
|
return hptes;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* HTAB is controlled by QEMU. Just point to the internally
|
|
|
|
* accessible PTEG.
|
|
|
|
*/
|
|
|
|
return (const ppc_hash_pte64_t *)(spapr->htab + pte_offset);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void spapr_unmap_hptes(PPCVirtualHypervisor *vhyp,
|
|
|
|
const ppc_hash_pte64_t *hptes,
|
|
|
|
hwaddr ptex, int n)
|
|
|
|
{
|
|
|
|
sPAPRMachineState *spapr = SPAPR_MACHINE(vhyp);
|
|
|
|
|
|
|
|
if (!spapr->htab) {
|
|
|
|
g_free((void *)hptes);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Nothing to do for qemu managed HPT */
|
|
|
|
}
|
|
|
|
|
|
|
|
static void spapr_store_hpte(PPCVirtualHypervisor *vhyp, hwaddr ptex,
|
|
|
|
uint64_t pte0, uint64_t pte1)
|
|
|
|
{
|
|
|
|
sPAPRMachineState *spapr = SPAPR_MACHINE(vhyp);
|
|
|
|
hwaddr offset = ptex * HASH_PTE_SIZE_64;
|
|
|
|
|
|
|
|
if (!spapr->htab) {
|
|
|
|
kvmppc_write_hpte(ptex, pte0, pte1);
|
|
|
|
} else {
|
|
|
|
stq_p(spapr->htab + offset, pte0);
|
|
|
|
stq_p(spapr->htab + offset + HASH_PTE_SIZE_64 / 2, pte1);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
pseries: Implement HPT resizing
This patch implements hypercalls allowing a PAPR guest to resize its own
hash page table. This will eventually allow for more flexible memory
hotplug.
The implementation is partially asynchronous, handled in a special thread
running the hpt_prepare_thread() function. The state of a pending resize
is stored in SPAPR_MACHINE->pending_hpt.
The H_RESIZE_HPT_PREPARE hypercall will kick off creation of a new HPT, or,
if one is already in progress, monitor it for completion. If there is an
existing HPT resize in progress that doesn't match the size specified in
the call, it will cancel it, replacing it with a new one matching the
given size.
The H_RESIZE_HPT_COMMIT completes transition to a resized HPT, and can only
be called successfully once H_RESIZE_HPT_PREPARE has successfully
completed initialization of a new HPT. The guest must ensure that there
are no concurrent accesses to the existing HPT while this is called (this
effectively means stop_machine() for Linux guests).
For now H_RESIZE_HPT_COMMIT goes through the whole old HPT, rehashing each
HPTE into the new HPT. This can have quite high latency, but it seems to
be of the order of typical migration downtime latencies for HPTs of size
up to ~2GiB (which would be used in a 256GiB guest).
In future we probably want to move more of the rehashing to the "prepare"
phase, by having H_ENTER and other hcalls update both current and
pending HPTs. That's a project for another day, but should be possible
without any changes to the guest interface.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2017-05-12 07:46:49 +02:00
|
|
|
int spapr_hpt_shift_for_ramsize(uint64_t ramsize)
|
2016-02-09 01:15:12 +01:00
|
|
|
{
|
|
|
|
int shift;
|
|
|
|
|
|
|
|
/* We aim for a hash table of size 1/128 the size of RAM (rounded
|
|
|
|
* up). The PAPR recommendation is actually 1/64 of RAM size, but
|
|
|
|
* that's much more than is needed for Linux guests */
|
|
|
|
shift = ctz64(pow2ceil(ramsize)) - 7;
|
|
|
|
shift = MAX(shift, 18); /* Minimum architected size */
|
|
|
|
shift = MIN(shift, 46); /* Maximum architected size */
|
|
|
|
return shift;
|
|
|
|
}
|
|
|
|
|
2017-05-17 05:49:20 +02:00
|
|
|
void spapr_free_hpt(sPAPRMachineState *spapr)
|
|
|
|
{
|
|
|
|
g_free(spapr->htab);
|
|
|
|
spapr->htab = NULL;
|
|
|
|
spapr->htab_shift = 0;
|
|
|
|
close_htab_fd(spapr);
|
|
|
|
}
|
|
|
|
|
2017-07-12 09:56:06 +02:00
|
|
|
void spapr_reallocate_hpt(sPAPRMachineState *spapr, int shift,
|
|
|
|
Error **errp)
|
2012-09-12 18:57:12 +02:00
|
|
|
{
|
2016-02-09 01:21:56 +01:00
|
|
|
long rc;
|
|
|
|
|
|
|
|
/* Clean up any HPT info from a previous boot */
|
2017-05-17 05:49:20 +02:00
|
|
|
spapr_free_hpt(spapr);
|
2016-02-09 01:21:56 +01:00
|
|
|
|
|
|
|
rc = kvmppc_reset_htab(shift);
|
|
|
|
if (rc < 0) {
|
|
|
|
/* kernel-side HPT needed, but couldn't allocate one */
|
|
|
|
error_setg_errno(errp, errno,
|
|
|
|
"Failed to allocate KVM HPT of order %d (try smaller maxmem?)",
|
|
|
|
shift);
|
|
|
|
/* This is almost certainly fatal, but if the caller really
|
|
|
|
* wants to carry on with shift == 0, it's welcome to try */
|
|
|
|
} else if (rc > 0) {
|
|
|
|
/* kernel-side HPT allocated */
|
|
|
|
if (rc != shift) {
|
|
|
|
error_setg(errp,
|
|
|
|
"Requested order %d HPT, but kernel allocated order %ld (try smaller maxmem?)",
|
|
|
|
shift, rc);
|
2015-09-24 10:22:48 +02:00
|
|
|
}
|
|
|
|
|
2012-09-12 18:57:12 +02:00
|
|
|
spapr->htab_shift = shift;
|
2016-03-08 01:35:15 +01:00
|
|
|
spapr->htab = NULL;
|
2015-09-24 10:22:47 +02:00
|
|
|
} else {
|
2016-02-09 01:21:56 +01:00
|
|
|
/* kernel-side HPT not needed, allocate in userspace instead */
|
|
|
|
size_t size = 1ULL << shift;
|
|
|
|
int i;
|
2015-09-24 10:22:47 +02:00
|
|
|
|
2016-02-09 01:21:56 +01:00
|
|
|
spapr->htab = qemu_memalign(size, size);
|
|
|
|
if (!spapr->htab) {
|
|
|
|
error_setg_errno(errp, errno,
|
|
|
|
"Could not allocate HPT of order %d", shift);
|
|
|
|
return;
|
2015-09-24 10:22:48 +02:00
|
|
|
}
|
|
|
|
|
2016-02-09 01:21:56 +01:00
|
|
|
memset(spapr->htab, 0, size);
|
|
|
|
spapr->htab_shift = shift;
|
2014-11-17 05:12:30 +01:00
|
|
|
|
2016-02-09 01:21:56 +01:00
|
|
|
for (i = 0; i < size / HASH_PTE_SIZE_64; i++) {
|
|
|
|
DIRTY_HPTE(HPTE(spapr->htab, i));
|
2014-11-17 05:12:30 +01:00
|
|
|
}
|
2012-09-12 18:57:12 +02:00
|
|
|
}
|
2017-11-24 05:23:24 +01:00
|
|
|
/* We're setting up a hash table, so that means we're not radix */
|
|
|
|
spapr->patb_entry = 0;
|
2011-04-01 06:15:20 +02:00
|
|
|
}
|
|
|
|
|
2017-03-20 00:46:46 +01:00
|
|
|
void spapr_setup_hpt_and_vrma(sPAPRMachineState *spapr)
|
|
|
|
{
|
2017-07-12 09:56:06 +02:00
|
|
|
int hpt_shift;
|
|
|
|
|
|
|
|
if ((spapr->resize_hpt == SPAPR_RESIZE_HPT_DISABLED)
|
|
|
|
|| (spapr->cas_reboot
|
|
|
|
&& !spapr_ovec_test(spapr->ov5_cas, OV5_HPT_RESIZE))) {
|
|
|
|
hpt_shift = spapr_hpt_shift_for_ramsize(MACHINE(spapr)->maxram_size);
|
|
|
|
} else {
|
2017-12-01 06:05:33 +01:00
|
|
|
uint64_t current_ram_size;
|
|
|
|
|
|
|
|
current_ram_size = MACHINE(spapr)->ram_size + get_plugged_memory_size();
|
|
|
|
hpt_shift = spapr_hpt_shift_for_ramsize(current_ram_size);
|
2017-07-12 09:56:06 +02:00
|
|
|
}
|
|
|
|
spapr_reallocate_hpt(spapr, hpt_shift, &error_fatal);
|
|
|
|
|
2017-03-20 00:46:46 +01:00
|
|
|
if (spapr->vrma_adjust) {
|
2017-09-06 20:43:05 +02:00
|
|
|
spapr->rma_size = kvmppc_rma_size(spapr_node0_size(MACHINE(spapr)),
|
2017-03-20 00:46:46 +01:00
|
|
|
spapr->htab_shift);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2017-11-17 13:56:48 +01:00
|
|
|
static int spapr_reset_drcs(Object *child, void *opaque)
|
|
|
|
{
|
|
|
|
sPAPRDRConnector *drc =
|
|
|
|
(sPAPRDRConnector *) object_dynamic_cast(child,
|
|
|
|
TYPE_SPAPR_DR_CONNECTOR);
|
|
|
|
|
|
|
|
if (drc) {
|
|
|
|
spapr_drc_reset(drc);
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2017-12-08 02:47:34 +01:00
|
|
|
static void spapr_machine_reset(void)
|
Delay creation of pseries device tree until reset
At present, the 'pseries' machine creates a flattened device tree in the
machine->init function to pass to either the guest kernel or to firmware.
However, the machine->init function runs before processing of -device
command line options, which means that the device tree so created will
be (incorrectly) missing devices specified that way.
Supplying a correct device tree is, in any case, part of the required
platform entry conditions. Therefore, this patch moves the creation and
loading of the device tree from machine->init to a reset callback. The
setup of entry point address and initial register state moves with it,
which leads to a slight cleanup.
This is not, alas, quite enough to make a fully working reset for pseries.
For that we would need to reload the firmware images, which on this
machine are loaded into RAM. It's a step in the right direction, though.
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-04-05 07:12:10 +02:00
|
|
|
{
|
2016-02-09 01:21:56 +01:00
|
|
|
MachineState *machine = MACHINE(qdev_get_machine());
|
|
|
|
sPAPRMachineState *spapr = SPAPR_MACHINE(machine);
|
2013-05-29 22:29:20 +02:00
|
|
|
PowerPCCPU *first_ppc_cpu;
|
spapr: Locate RTAS and device-tree based on real RMA
We currently calculate the final RTAS and FDT location based on
the early estimate of the RMA size, cropped to 256M on KVM since
we only know the real RMA size at reset time which happens much
later in the boot process.
This means the FDT and RTAS end up right below 256M while they
could be much higher, using precious RMA space and limiting
what the OS bootloader can put there which has proved to be
a problem with some OSes (such as when using very large initrd's)
Fortunately, we do the actual copy of the device-tree into guest
memory much later, during reset, late enough to be able to do it
using the final RMA value, we just need to move the calculation
to the right place.
However, RTAS is still loaded too early, so we change the code to
load the tiny blob into qemu memory early on, and then copy it into
guest memory at reset time. It's small enough that the memory usage
doesn't matter.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
[aik: fixed errors from checkpatch.pl, defined RTAS_MAX_ADDR]
Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
[agraf: fix compilation on 32bit hosts]
Signed-off-by: Alexander Graf <agraf@suse.de>
2014-07-21 05:02:04 +02:00
|
|
|
uint32_t rtas_limit;
|
2016-10-20 06:30:53 +02:00
|
|
|
hwaddr rtas_addr, fdt_addr;
|
2016-10-25 02:51:33 +02:00
|
|
|
void *fdt;
|
|
|
|
int rc;
|
2013-01-17 18:51:17 +01:00
|
|
|
|
2018-06-14 08:37:28 +02:00
|
|
|
spapr_caps_apply(spapr);
|
spapr: Capabilities infrastructure
Because PAPR is a paravirtual environment access to certain CPU (or other)
facilities can be blocked by the hypervisor. PAPR provides ways to
advertise in the device tree whether or not those features are available to
the guest.
In some places we automatically determine whether to make a feature
available based on whether our host can support it, in most cases this is
based on limitations in the available KVM implementation.
Although we correctly advertise this to the guest, it means that host
factors might make changes to the guest visible environment which is bad:
as well as generaly reducing reproducibility, it means that a migration
between different host environments can easily go bad.
We've mostly gotten away with it because the environments considered mature
enough to be well supported (basically, KVM on POWER8) have had consistent
feature availability. But, it's still not right and some limitations on
POWER9 is going to make it more of an issue in future.
This introduces an infrastructure for defining "sPAPR capabilities". These
are set by default based on the machine version, masked by the capabilities
of the chosen cpu, but can be overriden with machine properties.
The intention is at reset time we verify that the requested capabilities
can be supported on the host (considering TCG, KVM and/or host cpu
limitations). If not we simply fail, rather than silently modifying the
advertised featureset to the guest.
This does mean that certain configurations that "worked" may now fail, but
such configurations were already more subtly broken.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Reviewed-by: Greg Kurz <groug@kaod.org>
2017-12-08 00:35:35 +01:00
|
|
|
|
2017-12-14 19:09:48 +01:00
|
|
|
first_ppc_cpu = POWERPC_CPU(first_cpu);
|
|
|
|
if (kvm_enabled() && kvmppc_has_cap_mmu_radix() &&
|
2018-06-14 08:33:58 +02:00
|
|
|
ppc_type_check_compat(machine->cpu_type, CPU_POWERPC_LOGICAL_3_00, 0,
|
|
|
|
spapr->max_compat_pvr)) {
|
2017-03-20 00:46:46 +01:00
|
|
|
/* If using KVM with radix mode available, VCPUs can be started
|
|
|
|
* without a HPT because KVM will start them in radix mode.
|
|
|
|
* Set the GR bit in PATB so that we know there is no HPT. */
|
|
|
|
spapr->patb_entry = PATBE1_GR;
|
|
|
|
} else {
|
|
|
|
spapr_setup_hpt_and_vrma(spapr);
|
2016-02-09 01:21:56 +01:00
|
|
|
}
|
Delay creation of pseries device tree until reset
At present, the 'pseries' machine creates a flattened device tree in the
machine->init function to pass to either the guest kernel or to firmware.
However, the machine->init function runs before processing of -device
command line options, which means that the device tree so created will
be (incorrectly) missing devices specified that way.
Supplying a correct device tree is, in any case, part of the required
platform entry conditions. Therefore, this patch moves the creation and
loading of the device tree from machine->init to a reset callback. The
setup of entry point address and initial register state moves with it,
which leads to a slight cleanup.
This is not, alas, quite enough to make a fully working reset for pseries.
For that we would need to reload the firmware images, which on this
machine are loaded into RAM. It's a step in the right direction, though.
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-04-05 07:12:10 +02:00
|
|
|
|
spapr: fix device tree properties when using compatibility mode
Commit 51f84465dd98 changed the compatility mode setting logic:
- machine reset only sets compatibility mode for the boot CPU
- compatibility mode is set for other CPUs when they are put online
by the guest with the "start-cpu" RTAS call
This causes a regression for machines started with max-compat-cpu:
the device tree nodes related to secondary CPU cores contain wrong
"cpu-version" and "ibm,pa-features" values, as shown below.
Guest started on a POWER8 host with:
-smp cores=2 -machine pseries,max-cpu-compat=compat7
ibm,pa-features = [18 00 f6 3f c7 c0 80 f0 80 00
00 00 00 00 00 00 00 00 80 00 80 00 80 00 00 00];
cpu-version = <0x4d0200>;
^^^
second CPU core
ibm,pa-features = <0x600f63f 0xc70080c0>;
cpu-version = <0xf000003>;
^^^
boot CPU core
The second core is advertised in raw POWER8 mode. This happens because
CAS assumes all CPUs to have the same compatibility mode. Since the
boot CPU already has the requested compatibility mode, the CAS code
does not set it for the secondary one, and exposes the bogus device
tree properties in in the CAS response to the guest.
A similar situation is observed when hot-plugging a CPU core. The
related device tree properties are generated and exposed to guest
with the "ibm,configure-connector" RTAS before "start-cpu" is called.
The CPU core is advertised to the guest in raw mode as well.
It both cases, it boils down to the fact that "start-cpu" happens too
late. This can be fixed globally by propagating the compatibility mode
of the boot CPU to the other CPUs during reset. For this to work, the
compatibility mode of the boot CPU must be set before the machine code
actually resets all CPUs.
It is not needed to set the compatibility mode in "start-cpu" anymore,
so the code is dropped.
Fixes: 51f84465dd98
Signed-off-by: Greg Kurz <groug@kaod.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2018-01-17 10:20:42 +01:00
|
|
|
/* if this reset wasn't generated by CAS, we should reset our
|
|
|
|
* negotiated options and start from scratch */
|
|
|
|
if (!spapr->cas_reboot) {
|
|
|
|
spapr_ovec_cleanup(spapr->ov5_cas);
|
|
|
|
spapr->ov5_cas = spapr_ovec_new();
|
|
|
|
|
|
|
|
ppc_set_compat(first_ppc_cpu, spapr->max_compat_pvr, &error_fatal);
|
|
|
|
}
|
|
|
|
|
2018-07-30 16:11:32 +02:00
|
|
|
if (!SPAPR_MACHINE_GET_CLASS(spapr)->legacy_irq_allocation) {
|
|
|
|
spapr_irq_msi_reset(spapr);
|
|
|
|
}
|
|
|
|
|
2012-09-12 18:57:11 +02:00
|
|
|
qemu_devices_reset();
|
2017-11-17 13:56:48 +01:00
|
|
|
|
|
|
|
/* DRC reset may cause a device to be unplugged. This will cause troubles
|
|
|
|
* if this device is used by another device (eg, a running vhost backend
|
|
|
|
* will crash QEMU if the DIMM holding the vring goes away). To avoid such
|
|
|
|
* situations, we reset DRCs after all devices have been reset.
|
|
|
|
*/
|
|
|
|
object_child_foreach_recursive(object_get_root(), spapr_reset_drcs, NULL);
|
|
|
|
|
2017-08-30 20:21:40 +02:00
|
|
|
spapr_clear_pending_events(spapr);
|
Delay creation of pseries device tree until reset
At present, the 'pseries' machine creates a flattened device tree in the
machine->init function to pass to either the guest kernel or to firmware.
However, the machine->init function runs before processing of -device
command line options, which means that the device tree so created will
be (incorrectly) missing devices specified that way.
Supplying a correct device tree is, in any case, part of the required
platform entry conditions. Therefore, this patch moves the creation and
loading of the device tree from machine->init to a reset callback. The
setup of entry point address and initial register state moves with it,
which leads to a slight cleanup.
This is not, alas, quite enough to make a fully working reset for pseries.
For that we would need to reload the firmware images, which on this
machine are loaded into RAM. It's a step in the right direction, though.
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-04-05 07:12:10 +02:00
|
|
|
|
spapr: Locate RTAS and device-tree based on real RMA
We currently calculate the final RTAS and FDT location based on
the early estimate of the RMA size, cropped to 256M on KVM since
we only know the real RMA size at reset time which happens much
later in the boot process.
This means the FDT and RTAS end up right below 256M while they
could be much higher, using precious RMA space and limiting
what the OS bootloader can put there which has proved to be
a problem with some OSes (such as when using very large initrd's)
Fortunately, we do the actual copy of the device-tree into guest
memory much later, during reset, late enough to be able to do it
using the final RMA value, we just need to move the calculation
to the right place.
However, RTAS is still loaded too early, so we change the code to
load the tiny blob into qemu memory early on, and then copy it into
guest memory at reset time. It's small enough that the memory usage
doesn't matter.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
[aik: fixed errors from checkpatch.pl, defined RTAS_MAX_ADDR]
Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
[agraf: fix compilation on 32bit hosts]
Signed-off-by: Alexander Graf <agraf@suse.de>
2014-07-21 05:02:04 +02:00
|
|
|
/*
|
|
|
|
* We place the device tree and RTAS just below either the top of the RMA,
|
|
|
|
* or just below 2GB, whichever is lowere, so that it can be
|
|
|
|
* processed with 32-bit real mode code if necessary
|
|
|
|
*/
|
|
|
|
rtas_limit = MIN(spapr->rma_size, RTAS_MAX_ADDR);
|
2016-10-20 06:30:53 +02:00
|
|
|
rtas_addr = rtas_limit - RTAS_MAX_SIZE;
|
|
|
|
fdt_addr = rtas_addr - FDT_MAX_SIZE;
|
spapr: Locate RTAS and device-tree based on real RMA
We currently calculate the final RTAS and FDT location based on
the early estimate of the RMA size, cropped to 256M on KVM since
we only know the real RMA size at reset time which happens much
later in the boot process.
This means the FDT and RTAS end up right below 256M while they
could be much higher, using precious RMA space and limiting
what the OS bootloader can put there which has proved to be
a problem with some OSes (such as when using very large initrd's)
Fortunately, we do the actual copy of the device-tree into guest
memory much later, during reset, late enough to be able to do it
using the final RMA value, we just need to move the calculation
to the right place.
However, RTAS is still loaded too early, so we change the code to
load the tiny blob into qemu memory early on, and then copy it into
guest memory at reset time. It's small enough that the memory usage
doesn't matter.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
[aik: fixed errors from checkpatch.pl, defined RTAS_MAX_ADDR]
Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
[agraf: fix compilation on 32bit hosts]
Signed-off-by: Alexander Graf <agraf@suse.de>
2014-07-21 05:02:04 +02:00
|
|
|
|
2016-10-20 06:30:53 +02:00
|
|
|
fdt = spapr_build_fdt(spapr, rtas_addr, spapr->rtas_size);
|
Delay creation of pseries device tree until reset
At present, the 'pseries' machine creates a flattened device tree in the
machine->init function to pass to either the guest kernel or to firmware.
However, the machine->init function runs before processing of -device
command line options, which means that the device tree so created will
be (incorrectly) missing devices specified that way.
Supplying a correct device tree is, in any case, part of the required
platform entry conditions. Therefore, this patch moves the creation and
loading of the device tree from machine->init to a reset callback. The
setup of entry point address and initial register state moves with it,
which leads to a slight cleanup.
This is not, alas, quite enough to make a fully working reset for pseries.
For that we would need to reload the firmware images, which on this
machine are loaded into RAM. It's a step in the right direction, though.
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-04-05 07:12:10 +02:00
|
|
|
|
2016-10-20 06:37:41 +02:00
|
|
|
spapr_load_rtas(spapr, fdt, rtas_addr);
|
spapr: Locate RTAS and device-tree based on real RMA
We currently calculate the final RTAS and FDT location based on
the early estimate of the RMA size, cropped to 256M on KVM since
we only know the real RMA size at reset time which happens much
later in the boot process.
This means the FDT and RTAS end up right below 256M while they
could be much higher, using precious RMA space and limiting
what the OS bootloader can put there which has proved to be
a problem with some OSes (such as when using very large initrd's)
Fortunately, we do the actual copy of the device-tree into guest
memory much later, during reset, late enough to be able to do it
using the final RMA value, we just need to move the calculation
to the right place.
However, RTAS is still loaded too early, so we change the code to
load the tiny blob into qemu memory early on, and then copy it into
guest memory at reset time. It's small enough that the memory usage
doesn't matter.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
[aik: fixed errors from checkpatch.pl, defined RTAS_MAX_ADDR]
Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
[agraf: fix compilation on 32bit hosts]
Signed-off-by: Alexander Graf <agraf@suse.de>
2014-07-21 05:02:04 +02:00
|
|
|
|
2016-10-25 02:51:33 +02:00
|
|
|
rc = fdt_pack(fdt);
|
|
|
|
|
|
|
|
/* Should only fail if we've built a corrupted tree */
|
|
|
|
assert(rc == 0);
|
|
|
|
|
|
|
|
if (fdt_totalsize(fdt) > FDT_MAX_SIZE) {
|
|
|
|
error_report("FDT too big ! 0x%x bytes (max is 0x%x)",
|
|
|
|
fdt_totalsize(fdt), FDT_MAX_SIZE);
|
|
|
|
exit(1);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Load the fdt */
|
|
|
|
qemu_fdt_dumpdtb(fdt, fdt_totalsize(fdt));
|
2016-10-20 06:30:53 +02:00
|
|
|
cpu_physical_memory_write(fdt_addr, fdt, fdt_totalsize(fdt));
|
2016-10-25 02:51:33 +02:00
|
|
|
g_free(fdt);
|
|
|
|
|
Delay creation of pseries device tree until reset
At present, the 'pseries' machine creates a flattened device tree in the
machine->init function to pass to either the guest kernel or to firmware.
However, the machine->init function runs before processing of -device
command line options, which means that the device tree so created will
be (incorrectly) missing devices specified that way.
Supplying a correct device tree is, in any case, part of the required
platform entry conditions. Therefore, this patch moves the creation and
loading of the device tree from machine->init to a reset callback. The
setup of entry point address and initial register state moves with it,
which leads to a slight cleanup.
This is not, alas, quite enough to make a fully working reset for pseries.
For that we would need to reload the firmware images, which on this
machine are loaded into RAM. It's a step in the right direction, though.
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-04-05 07:12:10 +02:00
|
|
|
/* Set up the entry state */
|
2018-05-01 08:22:49 +02:00
|
|
|
spapr_cpu_set_entry_state(first_ppc_cpu, SPAPR_ENTRY_POINT, fdt_addr);
|
2013-05-29 22:29:20 +02:00
|
|
|
first_ppc_cpu->env.gpr[5] = 0;
|
Delay creation of pseries device tree until reset
At present, the 'pseries' machine creates a flattened device tree in the
machine->init function to pass to either the guest kernel or to firmware.
However, the machine->init function runs before processing of -device
command line options, which means that the device tree so created will
be (incorrectly) missing devices specified that way.
Supplying a correct device tree is, in any case, part of the required
platform entry conditions. Therefore, this patch moves the creation and
loading of the device tree from machine->init to a reset callback. The
setup of entry point address and initial register state moves with it,
which leads to a slight cleanup.
This is not, alas, quite enough to make a fully working reset for pseries.
For that we would need to reload the firmware images, which on this
machine are loaded into RAM. It's a step in the right direction, though.
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-04-05 07:12:10 +02:00
|
|
|
|
spapr: add option vector handling in CAS-generated resets
In some cases, ibm,client-architecture-support calls can fail. This
could happen in the current code for situations where the modified
device tree segment exceeds the buffer size provided by the guest
via the call parameters. In these cases, QEMU will reset, allowing
an opportunity to regenerate the device tree from scratch via
boot-time handling. There are potentially other scenarios as well,
not currently reachable in the current code, but possible in theory,
such as cases where device-tree properties or nodes need to be removed.
We currently don't handle either of these properly for option vector
capabilities however. Instead of carrying the negotiated capability
beyond the reset and creating the boot-time device tree accordingly,
we start from scratch, generating the same boot-time device tree as we
did prior to the CAS-generated and the same device tree updates as we
did before. This could (in theory) cause us to get stuck in a reset
loop. This hasn't been observed, but depending on the extensiveness
of CAS-induced device tree updates in the future, could eventually
become an issue.
Address this by pulling capability-related device tree
updates resulting from CAS calls into a common routine,
spapr_dt_cas_updates(), and adding an sPAPROptionVector*
parameter that allows us to test for newly-negotiated capabilities.
We invoke it as follows:
1) When ibm,client-architecture-support gets called, we
call spapr_dt_cas_updates() with the set of capabilities
added since the previous call to ibm,client-architecture-support.
For the initial boot, or a system reset generated by something
other than the CAS call itself, this set will consist of *all*
options supported both the platform and the guest. For calls
to ibm,client-architecture-support immediately after a CAS-induced
reset, we call spapr_dt_cas_updates() with only the set
of capabilities added since the previous call, since the other
capabilities will have already been addressed by the boot-time
device-tree this time around. In the unlikely event that
capabilities are *removed* since the previous CAS, we will
generate a CAS-induced reset. In the unlikely event that we
cannot fit the device-tree updates into the buffer provided
by the guest, well generate a CAS-induced reset.
2) When a CAS update results in the need to reset the machine and
include the updates in the boot-time device tree, we call the
spapr_dt_cas_updates() using the full set of negotiated
capabilities as part of the reset path. At initial boot, or after
a reset generated by something other than the CAS call itself,
this set will be empty, resulting in what should be the same
boot-time device-tree as we generated prior to this patch. For
CAS-induced reset, this routine will be called with the full set of
capabilities negotiated by the platform/guest in the previous
CAS call, which should result in CAS updates from previous call
being accounted for in the initial boot-time device tree.
Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
[dwg: Changed an int -> bool conversion to be more explicit]
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2016-10-25 06:47:29 +02:00
|
|
|
spapr->cas_reboot = false;
|
Delay creation of pseries device tree until reset
At present, the 'pseries' machine creates a flattened device tree in the
machine->init function to pass to either the guest kernel or to firmware.
However, the machine->init function runs before processing of -device
command line options, which means that the device tree so created will
be (incorrectly) missing devices specified that way.
Supplying a correct device tree is, in any case, part of the required
platform entry conditions. Therefore, this patch moves the creation and
loading of the device tree from machine->init to a reset callback. The
setup of entry point address and initial register state moves with it,
which leads to a slight cleanup.
This is not, alas, quite enough to make a fully working reset for pseries.
For that we would need to reload the firmware images, which on this
machine are loaded into RAM. It's a step in the right direction, though.
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-04-05 07:12:10 +02:00
|
|
|
}
|
|
|
|
|
2015-07-02 08:23:04 +02:00
|
|
|
static void spapr_create_nvram(sPAPRMachineState *spapr)
|
2012-11-12 17:46:57 +01:00
|
|
|
{
|
2013-07-04 15:09:22 +02:00
|
|
|
DeviceState *dev = qdev_create(&spapr->vio_bus->bus, "spapr-nvram");
|
2013-11-22 10:27:40 +01:00
|
|
|
DriveInfo *dinfo = drive_get(IF_PFLASH, 0, 0);
|
2012-11-12 17:46:57 +01:00
|
|
|
|
2013-11-22 10:27:40 +01:00
|
|
|
if (dinfo) {
|
2015-12-10 17:29:15 +01:00
|
|
|
qdev_prop_set_drive(dev, "drive", blk_by_legacy_dinfo(dinfo),
|
|
|
|
&error_fatal);
|
2012-11-12 17:46:57 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
qdev_init_nofail(dev);
|
|
|
|
|
|
|
|
spapr->nvram = (struct sPAPRNVRAM *)dev;
|
|
|
|
}
|
|
|
|
|
2015-07-02 08:23:04 +02:00
|
|
|
static void spapr_rtc_create(sPAPRMachineState *spapr)
|
2015-02-06 04:55:51 +01:00
|
|
|
{
|
2017-03-07 10:23:40 +01:00
|
|
|
object_initialize(&spapr->rtc, sizeof(spapr->rtc), TYPE_SPAPR_RTC);
|
|
|
|
object_property_add_child(OBJECT(spapr), "rtc", OBJECT(&spapr->rtc),
|
|
|
|
&error_fatal);
|
|
|
|
object_property_set_bool(OBJECT(&spapr->rtc), true, "realized",
|
|
|
|
&error_fatal);
|
|
|
|
object_property_add_alias(OBJECT(spapr), "rtc-time", OBJECT(&spapr->rtc),
|
|
|
|
"date", &error_fatal);
|
2015-02-06 04:55:51 +01:00
|
|
|
}
|
|
|
|
|
2012-08-14 13:11:49 +02:00
|
|
|
/* Returns whether we want to use VGA or not */
|
2016-01-20 02:58:39 +01:00
|
|
|
static bool spapr_vga_init(PCIBus *pci_bus, Error **errp)
|
2012-08-06 18:42:00 +02:00
|
|
|
{
|
2012-08-14 13:11:49 +02:00
|
|
|
switch (vga_interface_type) {
|
|
|
|
case VGA_NONE:
|
2014-03-10 15:37:41 +01:00
|
|
|
return false;
|
|
|
|
case VGA_DEVICE:
|
|
|
|
return true;
|
2012-09-08 12:40:45 +02:00
|
|
|
case VGA_STD:
|
2015-09-15 07:51:29 +02:00
|
|
|
case VGA_VIRTIO:
|
2012-09-08 12:40:45 +02:00
|
|
|
return pci_vga_init(pci_bus) != NULL;
|
2012-08-14 13:11:49 +02:00
|
|
|
default:
|
2016-01-20 02:58:39 +01:00
|
|
|
error_setg(errp,
|
|
|
|
"Unsupported VGA mode, only -vga std or -vga virtio is supported");
|
|
|
|
return false;
|
2012-08-06 18:42:00 +02:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2018-01-12 06:33:43 +01:00
|
|
|
static int spapr_pre_load(void *opaque)
|
|
|
|
{
|
|
|
|
int rc;
|
|
|
|
|
|
|
|
rc = spapr_caps_pre_load(opaque);
|
|
|
|
if (rc) {
|
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2015-02-06 04:55:52 +01:00
|
|
|
static int spapr_post_load(void *opaque, int version_id)
|
|
|
|
{
|
2015-07-02 08:23:04 +02:00
|
|
|
sPAPRMachineState *spapr = (sPAPRMachineState *)opaque;
|
2015-02-06 04:55:52 +01:00
|
|
|
int err = 0;
|
|
|
|
|
2017-12-11 05:09:37 +01:00
|
|
|
err = spapr_caps_post_migration(spapr);
|
|
|
|
if (err) {
|
|
|
|
return err;
|
|
|
|
}
|
|
|
|
|
2017-02-27 15:29:31 +01:00
|
|
|
if (!object_dynamic_cast(OBJECT(spapr->ics), TYPE_ICS_KVM)) {
|
2017-04-03 09:45:58 +02:00
|
|
|
CPUState *cs;
|
|
|
|
CPU_FOREACH(cs) {
|
|
|
|
PowerPCCPU *cpu = POWERPC_CPU(cs);
|
|
|
|
icp_resend(ICP(cpu->intc));
|
2017-02-27 15:29:31 +01:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2015-04-09 20:32:39 +02:00
|
|
|
/* In earlier versions, there was no separate qdev for the PAPR
|
2015-02-06 04:55:52 +01:00
|
|
|
* RTC, so the RTC offset was stored directly in sPAPREnvironment.
|
|
|
|
* So when migrating from those versions, poke the incoming offset
|
|
|
|
* value into the RTC device */
|
|
|
|
if (version_id < 3) {
|
2017-03-07 10:23:40 +01:00
|
|
|
err = spapr_rtc_import_offset(&spapr->rtc, spapr->rtc_offset);
|
2015-02-06 04:55:52 +01:00
|
|
|
}
|
|
|
|
|
2017-11-28 18:43:10 +01:00
|
|
|
if (kvm_enabled() && spapr->patb_entry) {
|
2017-06-12 07:32:35 +02:00
|
|
|
PowerPCCPU *cpu = POWERPC_CPU(first_cpu);
|
|
|
|
bool radix = !!(spapr->patb_entry & PATBE1_GR);
|
|
|
|
bool gtse = !!(cpu->env.spr[SPR_LPCR] & LPCR_GTSE);
|
|
|
|
|
|
|
|
err = kvmppc_configure_v3_mmu(cpu, radix, gtse, spapr->patb_entry);
|
|
|
|
if (err) {
|
|
|
|
error_report("Process table config unsupported by the host");
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2015-02-06 04:55:52 +01:00
|
|
|
return err;
|
|
|
|
}
|
|
|
|
|
2018-01-12 06:33:43 +01:00
|
|
|
static int spapr_pre_save(void *opaque)
|
|
|
|
{
|
|
|
|
int rc;
|
|
|
|
|
|
|
|
rc = spapr_caps_pre_save(opaque);
|
|
|
|
if (rc) {
|
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2015-02-06 04:55:52 +01:00
|
|
|
static bool version_before_3(void *opaque, int version_id)
|
|
|
|
{
|
|
|
|
return version_id < 3;
|
|
|
|
}
|
|
|
|
|
2017-07-11 20:07:55 +02:00
|
|
|
static bool spapr_pending_events_needed(void *opaque)
|
|
|
|
{
|
|
|
|
sPAPRMachineState *spapr = (sPAPRMachineState *)opaque;
|
|
|
|
return !QTAILQ_EMPTY(&spapr->pending_events);
|
|
|
|
}
|
|
|
|
|
|
|
|
static const VMStateDescription vmstate_spapr_event_entry = {
|
|
|
|
.name = "spapr_event_log_entry",
|
|
|
|
.version_id = 1,
|
|
|
|
.minimum_version_id = 1,
|
|
|
|
.fields = (VMStateField[]) {
|
2017-07-12 03:55:53 +02:00
|
|
|
VMSTATE_UINT32(summary, sPAPREventLogEntry),
|
|
|
|
VMSTATE_UINT32(extended_length, sPAPREventLogEntry),
|
2017-07-11 20:07:55 +02:00
|
|
|
VMSTATE_VBUFFER_ALLOC_UINT32(extended_log, sPAPREventLogEntry, 0,
|
2017-07-12 03:55:53 +02:00
|
|
|
NULL, extended_length),
|
2017-07-11 20:07:55 +02:00
|
|
|
VMSTATE_END_OF_LIST()
|
|
|
|
},
|
|
|
|
};
|
|
|
|
|
|
|
|
static const VMStateDescription vmstate_spapr_pending_events = {
|
|
|
|
.name = "spapr_pending_events",
|
|
|
|
.version_id = 1,
|
|
|
|
.minimum_version_id = 1,
|
|
|
|
.needed = spapr_pending_events_needed,
|
|
|
|
.fields = (VMStateField[]) {
|
|
|
|
VMSTATE_QTAILQ_V(pending_events, sPAPRMachineState, 1,
|
|
|
|
vmstate_spapr_event_entry, sPAPREventLogEntry, next),
|
|
|
|
VMSTATE_END_OF_LIST()
|
|
|
|
},
|
|
|
|
};
|
|
|
|
|
2016-11-18 02:40:27 +01:00
|
|
|
static bool spapr_ov5_cas_needed(void *opaque)
|
|
|
|
{
|
|
|
|
sPAPRMachineState *spapr = opaque;
|
|
|
|
sPAPROptionVector *ov5_mask = spapr_ovec_new();
|
|
|
|
sPAPROptionVector *ov5_legacy = spapr_ovec_new();
|
|
|
|
sPAPROptionVector *ov5_removed = spapr_ovec_new();
|
|
|
|
bool cas_needed;
|
|
|
|
|
|
|
|
/* Prior to the introduction of sPAPROptionVector, we had two option
|
|
|
|
* vectors we dealt with: OV5_FORM1_AFFINITY, and OV5_DRCONF_MEMORY.
|
|
|
|
* Both of these options encode machine topology into the device-tree
|
|
|
|
* in such a way that the now-booted OS should still be able to interact
|
|
|
|
* appropriately with QEMU regardless of what options were actually
|
|
|
|
* negotiatied on the source side.
|
|
|
|
*
|
|
|
|
* As such, we can avoid migrating the CAS-negotiated options if these
|
|
|
|
* are the only options available on the current machine/platform.
|
|
|
|
* Since these are the only options available for pseries-2.7 and
|
|
|
|
* earlier, this allows us to maintain old->new/new->old migration
|
|
|
|
* compatibility.
|
|
|
|
*
|
|
|
|
* For QEMU 2.8+, there are additional CAS-negotiatable options available
|
|
|
|
* via default pseries-2.8 machines and explicit command-line parameters.
|
|
|
|
* Some of these options, like OV5_HP_EVT, *do* require QEMU to be aware
|
|
|
|
* of the actual CAS-negotiated values to continue working properly. For
|
|
|
|
* example, availability of memory unplug depends on knowing whether
|
|
|
|
* OV5_HP_EVT was negotiated via CAS.
|
|
|
|
*
|
|
|
|
* Thus, for any cases where the set of available CAS-negotiatable
|
|
|
|
* options extends beyond OV5_FORM1_AFFINITY and OV5_DRCONF_MEMORY, we
|
2018-05-03 23:16:48 +02:00
|
|
|
* include the CAS-negotiated options in the migration stream, unless
|
|
|
|
* if they affect boot time behaviour only.
|
2016-11-18 02:40:27 +01:00
|
|
|
*/
|
|
|
|
spapr_ovec_set(ov5_mask, OV5_FORM1_AFFINITY);
|
|
|
|
spapr_ovec_set(ov5_mask, OV5_DRCONF_MEMORY);
|
2018-05-03 23:16:48 +02:00
|
|
|
spapr_ovec_set(ov5_mask, OV5_DRMEM_V2);
|
2016-11-18 02:40:27 +01:00
|
|
|
|
|
|
|
/* spapr_ovec_diff returns true if bits were removed. we avoid using
|
|
|
|
* the mask itself since in the future it's possible "legacy" bits may be
|
|
|
|
* removed via machine options, which could generate a false positive
|
|
|
|
* that breaks migration.
|
|
|
|
*/
|
|
|
|
spapr_ovec_intersect(ov5_legacy, spapr->ov5, ov5_mask);
|
|
|
|
cas_needed = spapr_ovec_diff(ov5_removed, spapr->ov5, ov5_legacy);
|
|
|
|
|
|
|
|
spapr_ovec_cleanup(ov5_mask);
|
|
|
|
spapr_ovec_cleanup(ov5_legacy);
|
|
|
|
spapr_ovec_cleanup(ov5_removed);
|
|
|
|
|
|
|
|
return cas_needed;
|
|
|
|
}
|
|
|
|
|
|
|
|
static const VMStateDescription vmstate_spapr_ov5_cas = {
|
|
|
|
.name = "spapr_option_vector_ov5_cas",
|
|
|
|
.version_id = 1,
|
|
|
|
.minimum_version_id = 1,
|
|
|
|
.needed = spapr_ov5_cas_needed,
|
|
|
|
.fields = (VMStateField[]) {
|
|
|
|
VMSTATE_STRUCT_POINTER_V(ov5_cas, sPAPRMachineState, 1,
|
|
|
|
vmstate_spapr_ovec, sPAPROptionVector),
|
|
|
|
VMSTATE_END_OF_LIST()
|
|
|
|
},
|
|
|
|
};
|
|
|
|
|
2017-03-01 07:54:36 +01:00
|
|
|
static bool spapr_patb_entry_needed(void *opaque)
|
|
|
|
{
|
|
|
|
sPAPRMachineState *spapr = opaque;
|
|
|
|
|
|
|
|
return !!spapr->patb_entry;
|
|
|
|
}
|
|
|
|
|
|
|
|
static const VMStateDescription vmstate_spapr_patb_entry = {
|
|
|
|
.name = "spapr_patb_entry",
|
|
|
|
.version_id = 1,
|
|
|
|
.minimum_version_id = 1,
|
|
|
|
.needed = spapr_patb_entry_needed,
|
|
|
|
.fields = (VMStateField[]) {
|
|
|
|
VMSTATE_UINT64(patb_entry, sPAPRMachineState),
|
|
|
|
VMSTATE_END_OF_LIST()
|
|
|
|
},
|
|
|
|
};
|
|
|
|
|
2018-07-30 16:11:32 +02:00
|
|
|
static bool spapr_irq_map_needed(void *opaque)
|
|
|
|
{
|
|
|
|
sPAPRMachineState *spapr = opaque;
|
|
|
|
|
|
|
|
return spapr->irq_map && !bitmap_empty(spapr->irq_map, spapr->irq_map_nr);
|
|
|
|
}
|
|
|
|
|
|
|
|
static const VMStateDescription vmstate_spapr_irq_map = {
|
|
|
|
.name = "spapr_irq_map",
|
|
|
|
.version_id = 1,
|
|
|
|
.minimum_version_id = 1,
|
|
|
|
.needed = spapr_irq_map_needed,
|
|
|
|
.fields = (VMStateField[]) {
|
|
|
|
VMSTATE_BITMAP(irq_map, sPAPRMachineState, 0, irq_map_nr),
|
|
|
|
VMSTATE_END_OF_LIST()
|
|
|
|
},
|
|
|
|
};
|
|
|
|
|
2013-07-18 21:33:01 +02:00
|
|
|
static const VMStateDescription vmstate_spapr = {
|
|
|
|
.name = "spapr",
|
2015-02-06 04:55:52 +01:00
|
|
|
.version_id = 3,
|
2013-07-18 21:33:01 +02:00
|
|
|
.minimum_version_id = 1,
|
2018-01-12 06:33:43 +01:00
|
|
|
.pre_load = spapr_pre_load,
|
2015-02-06 04:55:52 +01:00
|
|
|
.post_load = spapr_post_load,
|
2018-01-12 06:33:43 +01:00
|
|
|
.pre_save = spapr_pre_save,
|
2014-04-16 15:24:04 +02:00
|
|
|
.fields = (VMStateField[]) {
|
2015-02-06 04:55:52 +01:00
|
|
|
/* used to be @next_irq */
|
|
|
|
VMSTATE_UNUSED_BUFFER(version_before_3, 0, 4),
|
2013-07-18 21:33:01 +02:00
|
|
|
|
|
|
|
/* RTC offset */
|
2015-07-02 08:23:04 +02:00
|
|
|
VMSTATE_UINT64_TEST(rtc_offset, sPAPRMachineState, version_before_3),
|
2015-02-06 04:55:52 +01:00
|
|
|
|
2015-07-02 08:23:04 +02:00
|
|
|
VMSTATE_PPC_TIMEBASE_V(tb, sPAPRMachineState, 2),
|
2013-07-18 21:33:01 +02:00
|
|
|
VMSTATE_END_OF_LIST()
|
|
|
|
},
|
2016-11-18 02:40:27 +01:00
|
|
|
.subsections = (const VMStateDescription*[]) {
|
|
|
|
&vmstate_spapr_ov5_cas,
|
2017-03-01 07:54:36 +01:00
|
|
|
&vmstate_spapr_patb_entry,
|
2017-07-11 20:07:55 +02:00
|
|
|
&vmstate_spapr_pending_events,
|
2018-01-12 06:33:43 +01:00
|
|
|
&vmstate_spapr_cap_htm,
|
|
|
|
&vmstate_spapr_cap_vsx,
|
|
|
|
&vmstate_spapr_cap_dfp,
|
2018-01-19 06:00:02 +01:00
|
|
|
&vmstate_spapr_cap_cfpc,
|
2018-01-19 06:00:03 +01:00
|
|
|
&vmstate_spapr_cap_sbbc,
|
2018-01-19 06:00:04 +01:00
|
|
|
&vmstate_spapr_cap_ibs,
|
2018-07-30 16:11:32 +02:00
|
|
|
&vmstate_spapr_irq_map,
|
2016-11-18 02:40:27 +01:00
|
|
|
NULL
|
|
|
|
}
|
2013-07-18 21:33:01 +02:00
|
|
|
};
|
|
|
|
|
|
|
|
static int htab_save_setup(QEMUFile *f, void *opaque)
|
|
|
|
{
|
2015-07-02 08:23:04 +02:00
|
|
|
sPAPRMachineState *spapr = opaque;
|
2013-07-18 21:33:01 +02:00
|
|
|
|
|
|
|
/* "Iteration" header */
|
2017-06-12 07:32:34 +02:00
|
|
|
if (!spapr->htab_shift) {
|
|
|
|
qemu_put_be32(f, -1);
|
|
|
|
} else {
|
|
|
|
qemu_put_be32(f, spapr->htab_shift);
|
|
|
|
}
|
2013-07-18 21:33:01 +02:00
|
|
|
|
2013-07-18 21:33:03 +02:00
|
|
|
if (spapr->htab) {
|
|
|
|
spapr->htab_save_index = 0;
|
|
|
|
spapr->htab_first_pass = true;
|
|
|
|
} else {
|
2017-06-12 07:32:34 +02:00
|
|
|
if (spapr->htab_shift) {
|
|
|
|
assert(kvm_enabled());
|
|
|
|
}
|
2013-07-18 21:33:03 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
2013-07-18 21:33:01 +02:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2017-09-19 16:11:07 +02:00
|
|
|
static void htab_save_chunk(QEMUFile *f, sPAPRMachineState *spapr,
|
|
|
|
int chunkstart, int n_valid, int n_invalid)
|
|
|
|
{
|
|
|
|
qemu_put_be32(f, chunkstart);
|
|
|
|
qemu_put_be16(f, n_valid);
|
|
|
|
qemu_put_be16(f, n_invalid);
|
|
|
|
qemu_put_buffer(f, HPTE(spapr->htab, chunkstart),
|
|
|
|
HASH_PTE_SIZE_64 * n_valid);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void htab_save_end_marker(QEMUFile *f)
|
|
|
|
{
|
|
|
|
qemu_put_be32(f, 0);
|
|
|
|
qemu_put_be16(f, 0);
|
|
|
|
qemu_put_be16(f, 0);
|
|
|
|
}
|
|
|
|
|
2015-07-02 08:23:04 +02:00
|
|
|
static void htab_save_first_pass(QEMUFile *f, sPAPRMachineState *spapr,
|
2013-07-18 21:33:01 +02:00
|
|
|
int64_t max_ns)
|
|
|
|
{
|
2016-02-11 01:40:44 +01:00
|
|
|
bool has_timeout = max_ns != -1;
|
2013-07-18 21:33:01 +02:00
|
|
|
int htabslots = HTAB_SIZE(spapr) / HASH_PTE_SIZE_64;
|
|
|
|
int index = spapr->htab_save_index;
|
2013-08-21 17:03:08 +02:00
|
|
|
int64_t starttime = qemu_clock_get_ns(QEMU_CLOCK_REALTIME);
|
2013-07-18 21:33:01 +02:00
|
|
|
|
|
|
|
assert(spapr->htab_first_pass);
|
|
|
|
|
|
|
|
do {
|
|
|
|
int chunkstart;
|
|
|
|
|
|
|
|
/* Consume invalid HPTEs */
|
|
|
|
while ((index < htabslots)
|
|
|
|
&& !HPTE_VALID(HPTE(spapr->htab, index))) {
|
|
|
|
CLEAN_HPTE(HPTE(spapr->htab, index));
|
2017-03-23 11:04:55 +01:00
|
|
|
index++;
|
2013-07-18 21:33:01 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
/* Consume valid HPTEs */
|
|
|
|
chunkstart = index;
|
2014-11-17 05:12:29 +01:00
|
|
|
while ((index < htabslots) && (index - chunkstart < USHRT_MAX)
|
2013-07-18 21:33:01 +02:00
|
|
|
&& HPTE_VALID(HPTE(spapr->htab, index))) {
|
|
|
|
CLEAN_HPTE(HPTE(spapr->htab, index));
|
2017-03-23 11:04:55 +01:00
|
|
|
index++;
|
2013-07-18 21:33:01 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
if (index > chunkstart) {
|
|
|
|
int n_valid = index - chunkstart;
|
|
|
|
|
2017-09-19 16:11:07 +02:00
|
|
|
htab_save_chunk(f, spapr, chunkstart, n_valid, 0);
|
2013-07-18 21:33:01 +02:00
|
|
|
|
2016-02-11 01:40:44 +01:00
|
|
|
if (has_timeout &&
|
|
|
|
(qemu_clock_get_ns(QEMU_CLOCK_REALTIME) - starttime) > max_ns) {
|
2013-07-18 21:33:01 +02:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
} while ((index < htabslots) && !qemu_file_rate_limit(f));
|
|
|
|
|
|
|
|
if (index >= htabslots) {
|
|
|
|
assert(index == htabslots);
|
|
|
|
index = 0;
|
|
|
|
spapr->htab_first_pass = false;
|
|
|
|
}
|
|
|
|
spapr->htab_save_index = index;
|
|
|
|
}
|
|
|
|
|
2015-07-02 08:23:04 +02:00
|
|
|
static int htab_save_later_pass(QEMUFile *f, sPAPRMachineState *spapr,
|
2013-07-18 21:33:03 +02:00
|
|
|
int64_t max_ns)
|
2013-07-18 21:33:01 +02:00
|
|
|
{
|
|
|
|
bool final = max_ns < 0;
|
|
|
|
int htabslots = HTAB_SIZE(spapr) / HASH_PTE_SIZE_64;
|
|
|
|
int examined = 0, sent = 0;
|
|
|
|
int index = spapr->htab_save_index;
|
2013-08-21 17:03:08 +02:00
|
|
|
int64_t starttime = qemu_clock_get_ns(QEMU_CLOCK_REALTIME);
|
2013-07-18 21:33:01 +02:00
|
|
|
|
|
|
|
assert(!spapr->htab_first_pass);
|
|
|
|
|
|
|
|
do {
|
|
|
|
int chunkstart, invalidstart;
|
|
|
|
|
|
|
|
/* Consume non-dirty HPTEs */
|
|
|
|
while ((index < htabslots)
|
|
|
|
&& !HPTE_DIRTY(HPTE(spapr->htab, index))) {
|
|
|
|
index++;
|
|
|
|
examined++;
|
|
|
|
}
|
|
|
|
|
|
|
|
chunkstart = index;
|
|
|
|
/* Consume valid dirty HPTEs */
|
2014-11-17 05:12:29 +01:00
|
|
|
while ((index < htabslots) && (index - chunkstart < USHRT_MAX)
|
2013-07-18 21:33:01 +02:00
|
|
|
&& HPTE_DIRTY(HPTE(spapr->htab, index))
|
|
|
|
&& HPTE_VALID(HPTE(spapr->htab, index))) {
|
|
|
|
CLEAN_HPTE(HPTE(spapr->htab, index));
|
|
|
|
index++;
|
|
|
|
examined++;
|
|
|
|
}
|
|
|
|
|
|
|
|
invalidstart = index;
|
|
|
|
/* Consume invalid dirty HPTEs */
|
2014-11-17 05:12:29 +01:00
|
|
|
while ((index < htabslots) && (index - invalidstart < USHRT_MAX)
|
2013-07-18 21:33:01 +02:00
|
|
|
&& HPTE_DIRTY(HPTE(spapr->htab, index))
|
|
|
|
&& !HPTE_VALID(HPTE(spapr->htab, index))) {
|
|
|
|
CLEAN_HPTE(HPTE(spapr->htab, index));
|
|
|
|
index++;
|
|
|
|
examined++;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (index > chunkstart) {
|
|
|
|
int n_valid = invalidstart - chunkstart;
|
|
|
|
int n_invalid = index - invalidstart;
|
|
|
|
|
2017-09-19 16:11:07 +02:00
|
|
|
htab_save_chunk(f, spapr, chunkstart, n_valid, n_invalid);
|
2013-07-18 21:33:01 +02:00
|
|
|
sent += index - chunkstart;
|
|
|
|
|
2013-08-21 17:03:08 +02:00
|
|
|
if (!final && (qemu_clock_get_ns(QEMU_CLOCK_REALTIME) - starttime) > max_ns) {
|
2013-07-18 21:33:01 +02:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
if (examined >= htabslots) {
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (index >= htabslots) {
|
|
|
|
assert(index == htabslots);
|
|
|
|
index = 0;
|
|
|
|
}
|
|
|
|
} while ((examined < htabslots) && (!qemu_file_rate_limit(f) || final));
|
|
|
|
|
|
|
|
if (index >= htabslots) {
|
|
|
|
assert(index == htabslots);
|
|
|
|
index = 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
spapr->htab_save_index = index;
|
|
|
|
|
2013-07-18 21:33:03 +02:00
|
|
|
return (examined >= htabslots) && (sent == 0) ? 1 : 0;
|
2013-07-18 21:33:01 +02:00
|
|
|
}
|
|
|
|
|
2013-07-18 21:33:03 +02:00
|
|
|
#define MAX_ITERATION_NS 5000000 /* 5 ms */
|
|
|
|
#define MAX_KVM_BUF_SIZE 2048
|
|
|
|
|
2013-07-18 21:33:01 +02:00
|
|
|
static int htab_save_iterate(QEMUFile *f, void *opaque)
|
|
|
|
{
|
2015-07-02 08:23:04 +02:00
|
|
|
sPAPRMachineState *spapr = opaque;
|
2016-02-09 00:28:58 +01:00
|
|
|
int fd;
|
2013-07-18 21:33:03 +02:00
|
|
|
int rc = 0;
|
2013-07-18 21:33:01 +02:00
|
|
|
|
|
|
|
/* Iteration header */
|
2017-06-12 07:32:34 +02:00
|
|
|
if (!spapr->htab_shift) {
|
|
|
|
qemu_put_be32(f, -1);
|
2017-07-18 12:16:32 +02:00
|
|
|
return 1;
|
2017-06-12 07:32:34 +02:00
|
|
|
} else {
|
|
|
|
qemu_put_be32(f, 0);
|
|
|
|
}
|
2013-07-18 21:33:01 +02:00
|
|
|
|
2013-07-18 21:33:03 +02:00
|
|
|
if (!spapr->htab) {
|
|
|
|
assert(kvm_enabled());
|
|
|
|
|
2016-02-09 00:28:58 +01:00
|
|
|
fd = get_htab_fd(spapr);
|
|
|
|
if (fd < 0) {
|
|
|
|
return fd;
|
2014-11-17 05:12:28 +01:00
|
|
|
}
|
|
|
|
|
2016-02-09 00:28:58 +01:00
|
|
|
rc = kvmppc_save_htab(f, fd, MAX_KVM_BUF_SIZE, MAX_ITERATION_NS);
|
2013-07-18 21:33:03 +02:00
|
|
|
if (rc < 0) {
|
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
} else if (spapr->htab_first_pass) {
|
2013-07-18 21:33:01 +02:00
|
|
|
htab_save_first_pass(f, spapr, MAX_ITERATION_NS);
|
|
|
|
} else {
|
2013-07-18 21:33:03 +02:00
|
|
|
rc = htab_save_later_pass(f, spapr, MAX_ITERATION_NS);
|
2013-07-18 21:33:01 +02:00
|
|
|
}
|
|
|
|
|
2017-09-19 16:11:07 +02:00
|
|
|
htab_save_end_marker(f);
|
2013-07-18 21:33:01 +02:00
|
|
|
|
2013-07-18 21:33:03 +02:00
|
|
|
return rc;
|
2013-07-18 21:33:01 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
static int htab_save_complete(QEMUFile *f, void *opaque)
|
|
|
|
{
|
2015-07-02 08:23:04 +02:00
|
|
|
sPAPRMachineState *spapr = opaque;
|
2016-02-09 00:28:58 +01:00
|
|
|
int fd;
|
2013-07-18 21:33:01 +02:00
|
|
|
|
|
|
|
/* Iteration header */
|
2017-06-12 07:32:34 +02:00
|
|
|
if (!spapr->htab_shift) {
|
|
|
|
qemu_put_be32(f, -1);
|
|
|
|
return 0;
|
|
|
|
} else {
|
|
|
|
qemu_put_be32(f, 0);
|
|
|
|
}
|
2013-07-18 21:33:01 +02:00
|
|
|
|
2013-07-18 21:33:03 +02:00
|
|
|
if (!spapr->htab) {
|
|
|
|
int rc;
|
|
|
|
|
|
|
|
assert(kvm_enabled());
|
|
|
|
|
2016-02-09 00:28:58 +01:00
|
|
|
fd = get_htab_fd(spapr);
|
|
|
|
if (fd < 0) {
|
|
|
|
return fd;
|
2014-11-17 05:12:28 +01:00
|
|
|
}
|
|
|
|
|
2016-02-09 00:28:58 +01:00
|
|
|
rc = kvmppc_save_htab(f, fd, MAX_KVM_BUF_SIZE, -1);
|
2013-07-18 21:33:03 +02:00
|
|
|
if (rc < 0) {
|
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
} else {
|
2016-02-11 01:40:44 +01:00
|
|
|
if (spapr->htab_first_pass) {
|
|
|
|
htab_save_first_pass(f, spapr, -1);
|
|
|
|
}
|
2013-07-18 21:33:03 +02:00
|
|
|
htab_save_later_pass(f, spapr, -1);
|
|
|
|
}
|
2013-07-18 21:33:01 +02:00
|
|
|
|
|
|
|
/* End marker */
|
2017-09-19 16:11:07 +02:00
|
|
|
htab_save_end_marker(f);
|
2013-07-18 21:33:01 +02:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int htab_load(QEMUFile *f, void *opaque, int version_id)
|
|
|
|
{
|
2015-07-02 08:23:04 +02:00
|
|
|
sPAPRMachineState *spapr = opaque;
|
2013-07-18 21:33:01 +02:00
|
|
|
uint32_t section_hdr;
|
2013-07-18 21:33:03 +02:00
|
|
|
int fd = -1;
|
2017-09-15 15:16:20 +02:00
|
|
|
Error *local_err = NULL;
|
2013-07-18 21:33:01 +02:00
|
|
|
|
|
|
|
if (version_id < 1 || version_id > 1) {
|
2016-01-20 02:59:05 +01:00
|
|
|
error_report("htab_load() bad version");
|
2013-07-18 21:33:01 +02:00
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
section_hdr = qemu_get_be32(f);
|
|
|
|
|
2017-06-12 07:32:34 +02:00
|
|
|
if (section_hdr == -1) {
|
|
|
|
spapr_free_hpt(spapr);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2013-07-18 21:33:01 +02:00
|
|
|
if (section_hdr) {
|
2016-02-09 01:21:56 +01:00
|
|
|
/* First section gives the htab size */
|
|
|
|
spapr_reallocate_hpt(spapr, section_hdr, &local_err);
|
|
|
|
if (local_err) {
|
|
|
|
error_report_err(local_err);
|
2013-07-18 21:33:01 +02:00
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2013-07-18 21:33:03 +02:00
|
|
|
if (!spapr->htab) {
|
|
|
|
assert(kvm_enabled());
|
|
|
|
|
2017-09-15 15:16:20 +02:00
|
|
|
fd = kvmppc_get_htab_fd(true, 0, &local_err);
|
2013-07-18 21:33:03 +02:00
|
|
|
if (fd < 0) {
|
2017-09-15 15:16:20 +02:00
|
|
|
error_report_err(local_err);
|
2017-09-15 15:16:10 +02:00
|
|
|
return fd;
|
2013-07-18 21:33:03 +02:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2013-07-18 21:33:01 +02:00
|
|
|
while (true) {
|
|
|
|
uint32_t index;
|
|
|
|
uint16_t n_valid, n_invalid;
|
|
|
|
|
|
|
|
index = qemu_get_be32(f);
|
|
|
|
n_valid = qemu_get_be16(f);
|
|
|
|
n_invalid = qemu_get_be16(f);
|
|
|
|
|
|
|
|
if ((index == 0) && (n_valid == 0) && (n_invalid == 0)) {
|
|
|
|
/* End of Stream */
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
2013-07-18 21:33:03 +02:00
|
|
|
if ((index + n_valid + n_invalid) >
|
2013-07-18 21:33:01 +02:00
|
|
|
(HTAB_SIZE(spapr) / HASH_PTE_SIZE_64)) {
|
|
|
|
/* Bad index in stream */
|
2016-01-20 02:59:05 +01:00
|
|
|
error_report(
|
|
|
|
"htab_load() bad index %d (%hd+%hd entries) in htab stream (htab_shift=%d)",
|
|
|
|
index, n_valid, n_invalid, spapr->htab_shift);
|
2013-07-18 21:33:01 +02:00
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2013-07-18 21:33:03 +02:00
|
|
|
if (spapr->htab) {
|
|
|
|
if (n_valid) {
|
|
|
|
qemu_get_buffer(f, HPTE(spapr->htab, index),
|
|
|
|
HASH_PTE_SIZE_64 * n_valid);
|
|
|
|
}
|
|
|
|
if (n_invalid) {
|
|
|
|
memset(HPTE(spapr->htab, index + n_valid), 0,
|
|
|
|
HASH_PTE_SIZE_64 * n_invalid);
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
int rc;
|
|
|
|
|
|
|
|
assert(fd >= 0);
|
|
|
|
|
|
|
|
rc = kvmppc_load_htab_chunk(f, fd, index, n_valid, n_invalid);
|
|
|
|
if (rc < 0) {
|
|
|
|
return rc;
|
|
|
|
}
|
2013-07-18 21:33:01 +02:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2013-07-18 21:33:03 +02:00
|
|
|
if (!spapr->htab) {
|
|
|
|
assert(fd >= 0);
|
|
|
|
close(fd);
|
|
|
|
}
|
|
|
|
|
2013-07-18 21:33:01 +02:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2017-06-28 11:52:25 +02:00
|
|
|
static void htab_save_cleanup(void *opaque)
|
2016-07-21 11:21:34 +02:00
|
|
|
{
|
|
|
|
sPAPRMachineState *spapr = opaque;
|
|
|
|
|
|
|
|
close_htab_fd(spapr);
|
|
|
|
}
|
|
|
|
|
2013-07-18 21:33:01 +02:00
|
|
|
static SaveVMHandlers savevm_htab_handlers = {
|
2017-06-28 11:52:24 +02:00
|
|
|
.save_setup = htab_save_setup,
|
2013-07-18 21:33:01 +02:00
|
|
|
.save_live_iterate = htab_save_iterate,
|
2015-11-05 19:10:41 +01:00
|
|
|
.save_live_complete_precopy = htab_save_complete,
|
2017-06-28 11:52:25 +02:00
|
|
|
.save_cleanup = htab_save_cleanup,
|
2013-07-18 21:33:01 +02:00
|
|
|
.load_state = htab_load,
|
|
|
|
};
|
|
|
|
|
2015-03-18 13:30:44 +01:00
|
|
|
static void spapr_boot_set(void *opaque, const char *boot_device,
|
|
|
|
Error **errp)
|
|
|
|
{
|
2017-09-06 20:43:05 +02:00
|
|
|
MachineState *machine = MACHINE(opaque);
|
2015-03-18 13:30:44 +01:00
|
|
|
machine->boot_order = g_strdup(boot_device);
|
|
|
|
}
|
|
|
|
|
2015-08-12 05:16:48 +02:00
|
|
|
static void spapr_create_lmb_dr_connectors(sPAPRMachineState *spapr)
|
|
|
|
{
|
|
|
|
MachineState *machine = MACHINE(spapr);
|
|
|
|
uint64_t lmb_size = SPAPR_MEMORY_BLOCK_SIZE;
|
2015-08-03 07:35:41 +02:00
|
|
|
uint32_t nr_lmbs = (machine->maxram_size - machine->ram_size)/lmb_size;
|
2015-08-12 05:16:48 +02:00
|
|
|
int i;
|
|
|
|
|
|
|
|
for (i = 0; i < nr_lmbs; i++) {
|
|
|
|
uint64_t addr;
|
|
|
|
|
2018-04-23 18:51:17 +02:00
|
|
|
addr = i * lmb_size + machine->device_memory->base;
|
2017-06-08 14:18:34 +02:00
|
|
|
spapr_dr_connector_new(OBJECT(spapr), TYPE_SPAPR_DRC_LMB,
|
|
|
|
addr / lmb_size);
|
2015-08-12 05:16:48 +02:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* If RAM size, maxmem size and individual node mem sizes aren't aligned
|
|
|
|
* to SPAPR_MEMORY_BLOCK_SIZE(256MB), then refuse to start the guest
|
|
|
|
* since we can't support such unaligned sizes with DRCONF_MEMORY.
|
|
|
|
*/
|
2016-01-25 12:46:47 +01:00
|
|
|
static void spapr_validate_node_memory(MachineState *machine, Error **errp)
|
2015-08-12 05:16:48 +02:00
|
|
|
{
|
|
|
|
int i;
|
|
|
|
|
2016-01-25 12:46:47 +01:00
|
|
|
if (machine->ram_size % SPAPR_MEMORY_BLOCK_SIZE) {
|
|
|
|
error_setg(errp, "Memory size 0x" RAM_ADDR_FMT
|
2018-06-25 14:42:24 +02:00
|
|
|
" is not aligned to %" PRIu64 " MiB",
|
2016-01-25 12:46:47 +01:00
|
|
|
machine->ram_size,
|
2018-06-25 14:41:57 +02:00
|
|
|
SPAPR_MEMORY_BLOCK_SIZE / MiB);
|
2016-01-25 12:46:47 +01:00
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (machine->maxram_size % SPAPR_MEMORY_BLOCK_SIZE) {
|
|
|
|
error_setg(errp, "Maximum memory size 0x" RAM_ADDR_FMT
|
2018-06-25 14:42:24 +02:00
|
|
|
" is not aligned to %" PRIu64 " MiB",
|
2016-01-25 12:46:47 +01:00
|
|
|
machine->ram_size,
|
2018-06-25 14:41:57 +02:00
|
|
|
SPAPR_MEMORY_BLOCK_SIZE / MiB);
|
2016-01-25 12:46:47 +01:00
|
|
|
return;
|
2015-08-12 05:16:48 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
for (i = 0; i < nb_numa_nodes; i++) {
|
|
|
|
if (numa_info[i].node_mem % SPAPR_MEMORY_BLOCK_SIZE) {
|
2016-01-25 12:46:47 +01:00
|
|
|
error_setg(errp,
|
|
|
|
"Node %d memory size 0x%" PRIx64
|
2018-06-25 14:42:24 +02:00
|
|
|
" is not aligned to %" PRIu64 " MiB",
|
2016-01-25 12:46:47 +01:00
|
|
|
i, numa_info[i].node_mem,
|
2018-06-25 14:41:57 +02:00
|
|
|
SPAPR_MEMORY_BLOCK_SIZE / MiB);
|
2016-01-25 12:46:47 +01:00
|
|
|
return;
|
2015-08-12 05:16:48 +02:00
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2017-02-10 11:18:49 +01:00
|
|
|
/* find cpu slot in machine->possible_cpus by core_id */
|
|
|
|
static CPUArchId *spapr_find_cpu_slot(MachineState *ms, uint32_t id, int *idx)
|
|
|
|
{
|
|
|
|
int index = id / smp_threads;
|
|
|
|
|
|
|
|
if (index >= ms->possible_cpus->len) {
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
if (idx) {
|
|
|
|
*idx = index;
|
|
|
|
}
|
|
|
|
return &ms->possible_cpus->cpus[index];
|
|
|
|
}
|
|
|
|
|
2017-08-18 07:50:22 +02:00
|
|
|
static void spapr_set_vsmt_mode(sPAPRMachineState *spapr, Error **errp)
|
|
|
|
{
|
|
|
|
Error *local_err = NULL;
|
|
|
|
bool vsmt_user = !!spapr->vsmt;
|
|
|
|
int kvm_smt = kvmppc_smt_threads();
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
if (!kvm_enabled() && (smp_threads > 1)) {
|
|
|
|
error_setg(&local_err, "TCG cannot support more than 1 thread/core "
|
|
|
|
"on a pseries machine");
|
|
|
|
goto out;
|
|
|
|
}
|
|
|
|
if (!is_power_of_2(smp_threads)) {
|
|
|
|
error_setg(&local_err, "Cannot support %d threads/core on a pseries "
|
|
|
|
"machine because it must be a power of 2", smp_threads);
|
|
|
|
goto out;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Detemine the VSMT mode to use: */
|
|
|
|
if (vsmt_user) {
|
|
|
|
if (spapr->vsmt < smp_threads) {
|
|
|
|
error_setg(&local_err, "Cannot support VSMT mode %d"
|
|
|
|
" because it must be >= threads/core (%d)",
|
|
|
|
spapr->vsmt, smp_threads);
|
|
|
|
goto out;
|
|
|
|
}
|
|
|
|
/* In this case, spapr->vsmt has been set by the command line */
|
|
|
|
} else {
|
spapr: Adjust default VSMT value for better migration compatibility
fa98fbfc "PC: KVM: Support machine option to set VSMT mode" introduced the
"vsmt" parameter for the pseries machine type, which controls the spacing
of the vcpu ids of thread 0 for each virtual core. This was done to bring
some consistency and stability to how that was done, while still allowing
backwards compatibility for migration and otherwise.
The default value we used for vsmt was set to the max of the host's
advertised default number of threads and the number of vthreads per vcore
in the guest. This was done to continue running without extra parameters
on older KVM versions which don't allow the VSMT value to be changed.
Unfortunately, even that smaller than before leakage of host configuration
into guest visible configuration still breaks things. Specifically a guest
with 4 (or less) vthread/vcore will get a different vsmt value when
running on a POWER8 (vsmt==8) and POWER9 (vsmt==4) host. That means the
vcpu ids don't line up so you can't migrate between them, though you should
be able to.
Long term we really want to make vsmt == smp_threads for sufficiently
new machine types. However, that means that qemu will then require a
sufficiently recent KVM (one which supports changing VSMT) - that's still
not widely enough deployed to be really comfortable to do.
In the meantime we need some default that will work as often as
possible. This patch changes that default to 8 in all circumstances.
This does change guest visible behaviour (including for existing
machine versions) for many cases - just not the most common/important
case.
Following is case by case justification for why this is still the least
worst option. Note that any of the old behaviours can still be duplicated
after this patch, it's just that it requires manual intervention by
setting the vsmt property on the command line.
KVM HV on POWER8 host:
This is the overwhelmingly common case in production setups, and is
unchanged by design. POWER8 hosts will advertise a default VSMT mode
of 8, and > 8 vthreads/vcore isn't permitted
KVM HV on POWER7 host:
Will break, but POWER7s allowing KVM were never released to the public.
KVM HV on POWER9 host:
Not yet released to the public, breaking this now will reduce other
breakage later.
KVM HV on PowerPC 970:
Will theoretically break it, but it was barely supported to begin with
and already required various user visible hacks to work. Also so old
that I just don't care.
TCG:
This is the nastiest one; it means migration of TCG guests (without
manual vsmt setting) will break. Since TCG is rarely used in production
I think this is worth it for the other benefits. It does also remove
one more barrier to TCG<->KVM migration which could be interesting for
debugging applications.
KVM PR:
As with TCG, this will break migration of existing configurations,
without adding extra manual vsmt options. As with TCG, it is rare in
production so I think the benefits outweigh breakages.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Reviewed-by: Laurent Vivier <lvivier@redhat.com>
Reviewed-by: Jose Ricardo Ziviani <joserz@linux.vnet.ibm.com>
Reviewed-by: Greg Kurz <groug@kaod.org>
2018-01-15 07:51:33 +01:00
|
|
|
/*
|
|
|
|
* Default VSMT value is tricky, because we need it to be as
|
|
|
|
* consistent as possible (for migration), but this requires
|
|
|
|
* changing it for at least some existing cases. We pick 8 as
|
|
|
|
* the value that we'd get with KVM on POWER8, the
|
|
|
|
* overwhelmingly common case in production systems.
|
|
|
|
*/
|
2018-02-09 09:18:58 +01:00
|
|
|
spapr->vsmt = MAX(8, smp_threads);
|
2017-08-18 07:50:22 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
/* KVM: If necessary, set the SMT mode: */
|
|
|
|
if (kvm_enabled() && (spapr->vsmt != kvm_smt)) {
|
|
|
|
ret = kvmppc_set_smt_threads(spapr->vsmt);
|
|
|
|
if (ret) {
|
2018-01-16 05:37:37 +01:00
|
|
|
/* Looks like KVM isn't able to change VSMT mode */
|
2017-08-18 07:50:22 +02:00
|
|
|
error_setg(&local_err,
|
|
|
|
"Failed to set KVM's VSMT mode to %d (errno %d)",
|
|
|
|
spapr->vsmt, ret);
|
2018-01-16 05:37:37 +01:00
|
|
|
/* We can live with that if the default one is big enough
|
|
|
|
* for the number of threads, and a submultiple of the one
|
|
|
|
* we want. In this case we'll waste some vcpu ids, but
|
|
|
|
* behaviour will be correct */
|
|
|
|
if ((kvm_smt >= smp_threads) && ((spapr->vsmt % kvm_smt) == 0)) {
|
|
|
|
warn_report_err(local_err);
|
|
|
|
local_err = NULL;
|
|
|
|
goto out;
|
|
|
|
} else {
|
|
|
|
if (!vsmt_user) {
|
|
|
|
error_append_hint(&local_err,
|
|
|
|
"On PPC, a VM with %d threads/core"
|
|
|
|
" on a host with %d threads/core"
|
|
|
|
" requires the use of VSMT mode %d.\n",
|
|
|
|
smp_threads, kvm_smt, spapr->vsmt);
|
|
|
|
}
|
|
|
|
kvmppc_hint_smt_possible(&local_err);
|
|
|
|
goto out;
|
2017-08-18 07:50:22 +02:00
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
/* else TCG: nothing to do currently */
|
|
|
|
out:
|
|
|
|
error_propagate(errp, local_err);
|
|
|
|
}
|
|
|
|
|
2018-02-27 16:23:07 +01:00
|
|
|
static void spapr_init_cpus(sPAPRMachineState *spapr)
|
|
|
|
{
|
|
|
|
MachineState *machine = MACHINE(spapr);
|
|
|
|
MachineClass *mc = MACHINE_GET_CLASS(machine);
|
|
|
|
sPAPRMachineClass *smc = SPAPR_MACHINE_GET_CLASS(machine);
|
|
|
|
const char *type = spapr_get_cpu_core_type(machine->cpu_type);
|
|
|
|
const CPUArchIdList *possible_cpus;
|
|
|
|
int boot_cores_nr = smp_cpus / smp_threads;
|
|
|
|
int i;
|
|
|
|
|
|
|
|
possible_cpus = mc->possible_cpu_arch_ids(machine);
|
|
|
|
if (mc->has_hotpluggable_cpus) {
|
|
|
|
if (smp_cpus % smp_threads) {
|
|
|
|
error_report("smp_cpus (%u) must be multiple of threads (%u)",
|
|
|
|
smp_cpus, smp_threads);
|
|
|
|
exit(1);
|
|
|
|
}
|
|
|
|
if (max_cpus % smp_threads) {
|
|
|
|
error_report("max_cpus (%u) must be multiple of threads (%u)",
|
|
|
|
max_cpus, smp_threads);
|
|
|
|
exit(1);
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
if (max_cpus != smp_cpus) {
|
|
|
|
error_report("This machine version does not support CPU hotplug");
|
|
|
|
exit(1);
|
|
|
|
}
|
|
|
|
boot_cores_nr = possible_cpus->len;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* VSMT must be set in order to be able to compute VCPU ids, ie to
|
|
|
|
* call xics_max_server_number() or spapr_vcpu_id().
|
|
|
|
*/
|
|
|
|
spapr_set_vsmt_mode(spapr, &error_fatal);
|
|
|
|
|
|
|
|
if (smc->pre_2_10_has_unused_icps) {
|
|
|
|
int i;
|
|
|
|
|
|
|
|
for (i = 0; i < xics_max_server_number(spapr); i++) {
|
|
|
|
/* Dummy entries get deregistered when real ICPState objects
|
|
|
|
* are registered during CPU core hotplug.
|
|
|
|
*/
|
|
|
|
pre_2_10_vmstate_register_dummy_icp(i);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
for (i = 0; i < possible_cpus->len; i++) {
|
|
|
|
int core_id = i * smp_threads;
|
|
|
|
|
|
|
|
if (mc->has_hotpluggable_cpus) {
|
|
|
|
spapr_dr_connector_new(OBJECT(spapr), TYPE_SPAPR_DRC_CPU,
|
|
|
|
spapr_vcpu_id(spapr, core_id));
|
|
|
|
}
|
|
|
|
|
|
|
|
if (i < boot_cores_nr) {
|
|
|
|
Object *core = object_new(type);
|
|
|
|
int nr_threads = smp_threads;
|
|
|
|
|
|
|
|
/* Handle the partially filled core for older machine types */
|
|
|
|
if ((i + 1) * smp_threads >= smp_cpus) {
|
|
|
|
nr_threads = smp_cpus - i * smp_threads;
|
|
|
|
}
|
|
|
|
|
|
|
|
object_property_set_int(core, nr_threads, "nr-threads",
|
|
|
|
&error_fatal);
|
|
|
|
object_property_set_int(core, core_id, CPU_CORE_PROP_CORE_ID,
|
|
|
|
&error_fatal);
|
|
|
|
object_property_set_bool(core, true, "realized", &error_fatal);
|
2018-08-30 07:54:40 +02:00
|
|
|
|
|
|
|
object_unref(core);
|
2018-02-27 16:23:07 +01:00
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2011-04-01 06:15:20 +02:00
|
|
|
/* pSeries LPAR / sPAPR hardware init */
|
2017-12-08 02:47:34 +01:00
|
|
|
static void spapr_machine_init(MachineState *machine)
|
2011-04-01 06:15:20 +02:00
|
|
|
{
|
2015-07-02 08:23:04 +02:00
|
|
|
sPAPRMachineState *spapr = SPAPR_MACHINE(machine);
|
2015-08-12 05:16:48 +02:00
|
|
|
sPAPRMachineClass *smc = SPAPR_MACHINE_GET_CLASS(machine);
|
2014-05-07 16:42:57 +02:00
|
|
|
const char *kernel_filename = machine->kernel_filename;
|
|
|
|
const char *initrd_filename = machine->initrd_filename;
|
2012-08-20 19:08:05 +02:00
|
|
|
PCIHostState *phb;
|
2011-04-01 06:15:20 +02:00
|
|
|
int i;
|
2011-10-03 12:56:38 +02:00
|
|
|
MemoryRegion *sysmem = get_system_memory();
|
|
|
|
MemoryRegion *ram = g_new(MemoryRegion, 1);
|
2017-09-06 20:43:05 +02:00
|
|
|
hwaddr node0_size = spapr_node0_size(machine);
|
spapr: Locate RTAS and device-tree based on real RMA
We currently calculate the final RTAS and FDT location based on
the early estimate of the RMA size, cropped to 256M on KVM since
we only know the real RMA size at reset time which happens much
later in the boot process.
This means the FDT and RTAS end up right below 256M while they
could be much higher, using precious RMA space and limiting
what the OS bootloader can put there which has proved to be
a problem with some OSes (such as when using very large initrd's)
Fortunately, we do the actual copy of the device-tree into guest
memory much later, during reset, late enough to be able to do it
using the final RMA value, we just need to move the calculation
to the right place.
However, RTAS is still loaded too early, so we change the code to
load the tiny blob into qemu memory early on, and then copy it into
guest memory at reset time. It's small enough that the memory usage
doesn't matter.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
[aik: fixed errors from checkpatch.pl, defined RTAS_MAX_ADDR]
Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
[agraf: fix compilation on 32bit hosts]
Signed-off-by: Alexander Graf <agraf@suse.de>
2014-07-21 05:02:04 +02:00
|
|
|
long load_limit, fw_size;
|
2011-04-01 06:15:23 +02:00
|
|
|
char *filename;
|
2017-05-12 07:46:11 +02:00
|
|
|
Error *resize_hpt_err = NULL;
|
2011-04-01 06:15:20 +02:00
|
|
|
|
2016-03-04 10:24:28 +01:00
|
|
|
msi_nonbroken = true;
|
2012-08-07 18:10:37 +02:00
|
|
|
|
2011-11-01 17:49:05 +01:00
|
|
|
QLIST_INIT(&spapr->phbs);
|
2017-05-24 09:01:48 +02:00
|
|
|
QTAILQ_INIT(&spapr->pending_dimm_unplugs);
|
2011-11-01 17:49:05 +01:00
|
|
|
|
2018-06-14 08:37:28 +02:00
|
|
|
/* Determine capabilities to run with */
|
|
|
|
spapr_caps_init(spapr);
|
|
|
|
|
2017-05-12 07:46:11 +02:00
|
|
|
kvmppc_check_papr_resize_hpt(&resize_hpt_err);
|
|
|
|
if (spapr->resize_hpt == SPAPR_RESIZE_HPT_DEFAULT) {
|
|
|
|
/*
|
|
|
|
* If the user explicitly requested a mode we should either
|
|
|
|
* supply it, or fail completely (which we do below). But if
|
|
|
|
* it's not set explicitly, we reset our mode to something
|
|
|
|
* that works
|
|
|
|
*/
|
|
|
|
if (resize_hpt_err) {
|
|
|
|
spapr->resize_hpt = SPAPR_RESIZE_HPT_DISABLED;
|
|
|
|
error_free(resize_hpt_err);
|
|
|
|
resize_hpt_err = NULL;
|
|
|
|
} else {
|
|
|
|
spapr->resize_hpt = smc->resize_hpt_default;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
assert(spapr->resize_hpt != SPAPR_RESIZE_HPT_DEFAULT);
|
|
|
|
|
|
|
|
if ((spapr->resize_hpt != SPAPR_RESIZE_HPT_DISABLED) && resize_hpt_err) {
|
|
|
|
/*
|
|
|
|
* User requested HPT resize, but this host can't supply it. Bail out
|
|
|
|
*/
|
|
|
|
error_report_err(resize_hpt_err);
|
|
|
|
exit(1);
|
|
|
|
}
|
|
|
|
|
2018-05-03 08:52:40 +02:00
|
|
|
spapr->rma_size = node0_size;
|
2011-09-29 23:39:11 +02:00
|
|
|
|
2018-05-03 08:52:40 +02:00
|
|
|
/* With KVM, we don't actually know whether KVM supports an
|
|
|
|
* unbounded RMA (PR KVM) or is limited by the hash table size
|
|
|
|
* (HV KVM using VRMA), so we always assume the latter
|
|
|
|
*
|
|
|
|
* In that case, we also limit the initial allocations for RTAS
|
|
|
|
* etc... to 256M since we have no way to know what the VRMA size
|
|
|
|
* is going to be as it depends on the size of the hash table
|
|
|
|
* which isn't determined yet.
|
|
|
|
*/
|
|
|
|
if (kvm_enabled()) {
|
|
|
|
spapr->vrma_adjust = 1;
|
|
|
|
spapr->rma_size = MIN(spapr->rma_size, 0x10000000);
|
2011-09-29 23:39:11 +02:00
|
|
|
}
|
2012-09-12 18:57:12 +02:00
|
|
|
|
2018-05-03 08:52:40 +02:00
|
|
|
/* Actually we don't support unbounded RMA anymore since we added
|
|
|
|
* proper emulation of HV mode. The max we can get is 16G which
|
|
|
|
* also happens to be what we configure for PAPR mode so make sure
|
|
|
|
* we don't do anything bigger than that
|
|
|
|
*/
|
|
|
|
spapr->rma_size = MIN(spapr->rma_size, 0x400000000ull);
|
2011-09-29 23:39:11 +02:00
|
|
|
|
2013-11-25 04:14:50 +01:00
|
|
|
if (spapr->rma_size > node0_size) {
|
2016-01-20 02:58:55 +01:00
|
|
|
error_report("Numa node 0 has to span the RMA (%#08"HWADDR_PRIx")",
|
|
|
|
spapr->rma_size);
|
2013-11-25 04:14:50 +01:00
|
|
|
exit(1);
|
|
|
|
}
|
|
|
|
|
spapr: Locate RTAS and device-tree based on real RMA
We currently calculate the final RTAS and FDT location based on
the early estimate of the RMA size, cropped to 256M on KVM since
we only know the real RMA size at reset time which happens much
later in the boot process.
This means the FDT and RTAS end up right below 256M while they
could be much higher, using precious RMA space and limiting
what the OS bootloader can put there which has proved to be
a problem with some OSes (such as when using very large initrd's)
Fortunately, we do the actual copy of the device-tree into guest
memory much later, during reset, late enough to be able to do it
using the final RMA value, we just need to move the calculation
to the right place.
However, RTAS is still loaded too early, so we change the code to
load the tiny blob into qemu memory early on, and then copy it into
guest memory at reset time. It's small enough that the memory usage
doesn't matter.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
[aik: fixed errors from checkpatch.pl, defined RTAS_MAX_ADDR]
Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
[agraf: fix compilation on 32bit hosts]
Signed-off-by: Alexander Graf <agraf@suse.de>
2014-07-21 05:02:04 +02:00
|
|
|
/* Setup a load limit for the ramdisk leaving room for SLOF and FDT */
|
|
|
|
load_limit = MIN(spapr->rma_size, RTAS_MAX_ADDR) - FW_OVERHEAD;
|
2011-04-01 06:15:20 +02:00
|
|
|
|
2013-03-13 16:53:28 +01:00
|
|
|
/* Set up Interrupt Controller before we create the VCPUs */
|
2018-07-30 16:11:33 +02:00
|
|
|
smc->irq->init(spapr, &error_fatal);
|
2013-03-13 16:53:28 +01:00
|
|
|
|
2017-10-04 10:43:18 +02:00
|
|
|
/* Set up containers for ibm,client-architecture-support negotiated options
|
|
|
|
*/
|
2016-10-25 06:47:28 +02:00
|
|
|
spapr->ov5 = spapr_ovec_new();
|
|
|
|
spapr->ov5_cas = spapr_ovec_new();
|
|
|
|
|
2015-08-12 05:16:48 +02:00
|
|
|
if (smc->dr_lmb_enabled) {
|
2016-10-25 06:47:28 +02:00
|
|
|
spapr_ovec_set(spapr->ov5, OV5_DRCONF_MEMORY);
|
2016-01-25 12:46:47 +01:00
|
|
|
spapr_validate_node_memory(machine, &error_fatal);
|
2015-08-12 05:16:48 +02:00
|
|
|
}
|
|
|
|
|
2016-10-25 06:47:30 +02:00
|
|
|
spapr_ovec_set(spapr->ov5, OV5_FORM1_AFFINITY);
|
|
|
|
|
2016-10-27 04:20:26 +02:00
|
|
|
/* advertise support for dedicated HP event source to guests */
|
|
|
|
if (spapr->use_hotplug_event_source) {
|
|
|
|
spapr_ovec_set(spapr->ov5, OV5_HP_EVT);
|
|
|
|
}
|
|
|
|
|
2017-07-12 09:56:06 +02:00
|
|
|
/* advertise support for HPT resizing */
|
|
|
|
if (spapr->resize_hpt != SPAPR_RESIZE_HPT_DISABLED) {
|
|
|
|
spapr_ovec_set(spapr->ov5, OV5_HPT_RESIZE);
|
|
|
|
}
|
|
|
|
|
2018-04-19 08:47:35 +02:00
|
|
|
/* advertise support for ibm,dyamic-memory-v2 */
|
|
|
|
spapr_ovec_set(spapr->ov5, OV5_DRMEM_V2);
|
|
|
|
|
2011-04-01 06:15:20 +02:00
|
|
|
/* init CPUs */
|
2016-11-08 06:33:32 +01:00
|
|
|
spapr_init_cpus(spapr);
|
2011-04-01 06:15:20 +02:00
|
|
|
|
2018-05-03 23:16:59 +02:00
|
|
|
if ((!kvm_enabled() || kvmppc_has_cap_mmu_radix()) &&
|
2018-06-14 08:33:58 +02:00
|
|
|
ppc_type_check_compat(machine->cpu_type, CPU_POWERPC_LOGICAL_3_00, 0,
|
|
|
|
spapr->max_compat_pvr)) {
|
2018-05-03 23:16:59 +02:00
|
|
|
/* KVM and TCG always allow GTSE with radix... */
|
|
|
|
spapr_ovec_set(spapr->ov5, OV5_MMU_RADIX_GTSE);
|
|
|
|
}
|
|
|
|
/* ... but not with hash (currently). */
|
|
|
|
|
2015-05-07 07:33:59 +02:00
|
|
|
if (kvm_enabled()) {
|
|
|
|
/* Enable H_LOGICAL_CI_* so SLOF can talk to in-kernel devices */
|
|
|
|
kvmppc_enable_logical_ci_hcalls();
|
2015-09-08 03:25:13 +02:00
|
|
|
kvmppc_enable_set_mode_hcall();
|
2016-08-30 03:02:47 +02:00
|
|
|
|
|
|
|
/* H_CLEAR_MOD/_REF are mandatory in PAPR, but off by default */
|
|
|
|
kvmppc_enable_clear_ref_mod_hcalls();
|
2015-05-07 07:33:59 +02:00
|
|
|
}
|
|
|
|
|
2011-04-01 06:15:20 +02:00
|
|
|
/* allocate RAM */
|
2014-07-10 17:03:42 +02:00
|
|
|
memory_region_allocate_system_memory(ram, NULL, "ppc_spapr.ram",
|
2015-07-02 08:23:05 +02:00
|
|
|
machine->ram_size);
|
2014-07-10 17:03:42 +02:00
|
|
|
memory_region_add_subregion(sysmem, 0, ram);
|
2011-04-01 06:15:20 +02:00
|
|
|
|
2018-04-23 18:51:17 +02:00
|
|
|
/* always allocate the device memory information */
|
|
|
|
machine->device_memory = g_malloc0(sizeof(*machine->device_memory));
|
|
|
|
|
2015-06-29 10:44:27 +02:00
|
|
|
/* initialize hotplug memory address space */
|
|
|
|
if (machine->ram_size < machine->maxram_size) {
|
2018-04-23 18:51:25 +02:00
|
|
|
ram_addr_t device_mem_size = machine->maxram_size - machine->ram_size;
|
2016-06-02 16:07:37 +02:00
|
|
|
/*
|
|
|
|
* Limit the number of hotpluggable memory slots to half the number
|
|
|
|
* slots that KVM supports, leaving the other half for PCI and other
|
|
|
|
* devices. However ensure that number of slots doesn't drop below 32.
|
|
|
|
*/
|
|
|
|
int max_memslots = kvm_enabled() ? kvm_get_max_memslots() / 2 :
|
|
|
|
SPAPR_MAX_RAM_SLOTS;
|
2015-06-29 10:44:27 +02:00
|
|
|
|
2016-06-02 16:07:37 +02:00
|
|
|
if (max_memslots < SPAPR_MAX_RAM_SLOTS) {
|
|
|
|
max_memslots = SPAPR_MAX_RAM_SLOTS;
|
|
|
|
}
|
|
|
|
if (machine->ram_slots > max_memslots) {
|
2016-01-20 02:58:55 +01:00
|
|
|
error_report("Specified number of memory slots %"
|
|
|
|
PRIu64" exceeds max supported %d",
|
2016-06-02 16:07:37 +02:00
|
|
|
machine->ram_slots, max_memslots);
|
2016-01-20 02:58:55 +01:00
|
|
|
exit(1);
|
2015-06-29 10:44:27 +02:00
|
|
|
}
|
|
|
|
|
2018-04-23 18:51:17 +02:00
|
|
|
machine->device_memory->base = ROUND_UP(machine->ram_size,
|
2018-04-23 18:51:25 +02:00
|
|
|
SPAPR_DEVICE_MEM_ALIGN);
|
2018-04-23 18:51:17 +02:00
|
|
|
memory_region_init(&machine->device_memory->mr, OBJECT(spapr),
|
2018-04-23 18:51:25 +02:00
|
|
|
"device-memory", device_mem_size);
|
2018-04-23 18:51:17 +02:00
|
|
|
memory_region_add_subregion(sysmem, machine->device_memory->base,
|
|
|
|
&machine->device_memory->mr);
|
2015-06-29 10:44:27 +02:00
|
|
|
}
|
|
|
|
|
2015-08-12 05:16:48 +02:00
|
|
|
if (smc->dr_lmb_enabled) {
|
|
|
|
spapr_create_lmb_dr_connectors(spapr);
|
|
|
|
}
|
|
|
|
|
2011-04-01 06:15:23 +02:00
|
|
|
filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, "spapr-rtas.bin");
|
2015-03-14 16:29:09 +01:00
|
|
|
if (!filename) {
|
2015-05-07 07:33:41 +02:00
|
|
|
error_report("Could not find LPAR rtas '%s'", "spapr-rtas.bin");
|
2015-03-14 16:29:09 +01:00
|
|
|
exit(1);
|
|
|
|
}
|
spapr: Locate RTAS and device-tree based on real RMA
We currently calculate the final RTAS and FDT location based on
the early estimate of the RMA size, cropped to 256M on KVM since
we only know the real RMA size at reset time which happens much
later in the boot process.
This means the FDT and RTAS end up right below 256M while they
could be much higher, using precious RMA space and limiting
what the OS bootloader can put there which has proved to be
a problem with some OSes (such as when using very large initrd's)
Fortunately, we do the actual copy of the device-tree into guest
memory much later, during reset, late enough to be able to do it
using the final RMA value, we just need to move the calculation
to the right place.
However, RTAS is still loaded too early, so we change the code to
load the tiny blob into qemu memory early on, and then copy it into
guest memory at reset time. It's small enough that the memory usage
doesn't matter.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
[aik: fixed errors from checkpatch.pl, defined RTAS_MAX_ADDR]
Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
[agraf: fix compilation on 32bit hosts]
Signed-off-by: Alexander Graf <agraf@suse.de>
2014-07-21 05:02:04 +02:00
|
|
|
spapr->rtas_size = get_image_size(filename);
|
2016-04-25 17:36:06 +02:00
|
|
|
if (spapr->rtas_size < 0) {
|
|
|
|
error_report("Could not get size of LPAR rtas '%s'", filename);
|
|
|
|
exit(1);
|
|
|
|
}
|
spapr: Locate RTAS and device-tree based on real RMA
We currently calculate the final RTAS and FDT location based on
the early estimate of the RMA size, cropped to 256M on KVM since
we only know the real RMA size at reset time which happens much
later in the boot process.
This means the FDT and RTAS end up right below 256M while they
could be much higher, using precious RMA space and limiting
what the OS bootloader can put there which has proved to be
a problem with some OSes (such as when using very large initrd's)
Fortunately, we do the actual copy of the device-tree into guest
memory much later, during reset, late enough to be able to do it
using the final RMA value, we just need to move the calculation
to the right place.
However, RTAS is still loaded too early, so we change the code to
load the tiny blob into qemu memory early on, and then copy it into
guest memory at reset time. It's small enough that the memory usage
doesn't matter.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
[aik: fixed errors from checkpatch.pl, defined RTAS_MAX_ADDR]
Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
[agraf: fix compilation on 32bit hosts]
Signed-off-by: Alexander Graf <agraf@suse.de>
2014-07-21 05:02:04 +02:00
|
|
|
spapr->rtas_blob = g_malloc(spapr->rtas_size);
|
|
|
|
if (load_image_size(filename, spapr->rtas_blob, spapr->rtas_size) < 0) {
|
2015-05-07 07:33:41 +02:00
|
|
|
error_report("Could not load LPAR rtas '%s'", filename);
|
2011-04-01 06:15:23 +02:00
|
|
|
exit(1);
|
|
|
|
}
|
2012-01-11 20:46:28 +01:00
|
|
|
if (spapr->rtas_size > RTAS_MAX_SIZE) {
|
2015-05-07 07:33:41 +02:00
|
|
|
error_report("RTAS too big ! 0x%zx bytes (max is 0x%x)",
|
|
|
|
(size_t)spapr->rtas_size, RTAS_MAX_SIZE);
|
2012-01-11 20:46:28 +01:00
|
|
|
exit(1);
|
|
|
|
}
|
2011-08-21 05:09:37 +02:00
|
|
|
g_free(filename);
|
2011-04-01 06:15:23 +02:00
|
|
|
|
2016-10-27 04:20:26 +02:00
|
|
|
/* Set up RTAS event infrastructure */
|
2012-10-08 20:17:39 +02:00
|
|
|
spapr_events_init(spapr);
|
|
|
|
|
2015-02-06 04:55:47 +01:00
|
|
|
/* Set up the RTC RTAS interfaces */
|
2015-02-06 04:55:51 +01:00
|
|
|
spapr_rtc_create(spapr);
|
2015-02-06 04:55:47 +01:00
|
|
|
|
Implement the PAPR (pSeries) virtualized interrupt controller (xics)
PAPR defines an interrupt control architecture which is logically divided
into ICS (Interrupt Control Presentation, each unit is responsible for
presenting interrupts to a particular "interrupt server", i.e. CPU) and
ICS (Interrupt Control Source, each unit responsible for one or more
hardware interrupts as numbered globally across the system). All PAPR
virtual IO devices expect to deliver interrupts via this mechanism. In
Linux, this interrupt controller system is handled by the "xics" driver.
On pSeries systems, access to the interrupt controller is virtualized via
hypercalls and RTAS methods. However, the virtualized interface is very
similar to the underlying interrupt controller hardware, and similar PICs
exist un-virtualized in some other systems.
This patch implements both the ICP and ICS sides of the PAPR interrupt
controller. For now, only the hypercall virtualized interface is provided,
however it would be relatively straightforward to graft an emulated
register interface onto the underlying interrupt logic if we want to add
a machine with a hardware ICS/ICP system in the future.
There are some limitations in this implementation: it is assumed for now
that only one instance of the ICS exists, although a full xics system can
have several, each responsible for a different group of hardware irqs.
ICP/ICS can handle both level-sensitve (LSI) and message signalled (MSI)
interrupt inputs. For now, this implementation supports only MSI
interrupts, since that is used by PAPR virtual IO devices.
Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-04-01 06:15:25 +02:00
|
|
|
/* Set up VIO bus */
|
2011-04-01 06:15:21 +02:00
|
|
|
spapr->vio_bus = spapr_vio_bus_init();
|
|
|
|
|
2018-04-20 16:52:49 +02:00
|
|
|
for (i = 0; i < serial_max_hds(); i++) {
|
2018-04-20 16:52:43 +02:00
|
|
|
if (serial_hd(i)) {
|
|
|
|
spapr_vty_create(spapr->vio_bus, serial_hd(i));
|
2011-04-01 06:15:21 +02:00
|
|
|
}
|
|
|
|
}
|
2011-04-01 06:15:20 +02:00
|
|
|
|
2012-11-12 17:46:57 +01:00
|
|
|
/* We always have at least the nvram device on VIO */
|
|
|
|
spapr_create_nvram(spapr);
|
|
|
|
|
2011-10-30 18:16:46 +01:00
|
|
|
/* Set up PCI */
|
2012-08-07 18:10:33 +02:00
|
|
|
spapr_pci_rtas_init();
|
|
|
|
|
2013-03-13 16:53:25 +01:00
|
|
|
phb = spapr_create_phb(spapr, 0);
|
2011-10-30 18:16:46 +01:00
|
|
|
|
2011-05-26 11:52:44 +02:00
|
|
|
for (i = 0; i < nb_nics; i++) {
|
2011-04-01 06:15:29 +02:00
|
|
|
NICInfo *nd = &nd_table[i];
|
|
|
|
|
|
|
|
if (!nd->model) {
|
2018-03-09 08:01:38 +01:00
|
|
|
nd->model = g_strdup("spapr-vlan");
|
2011-04-01 06:15:29 +02:00
|
|
|
}
|
|
|
|
|
2018-03-09 08:01:38 +01:00
|
|
|
if (g_str_equal(nd->model, "spapr-vlan") ||
|
|
|
|
g_str_equal(nd->model, "ibmveth")) {
|
2012-04-25 19:55:41 +02:00
|
|
|
spapr_vlan_create(spapr->vio_bus, nd);
|
2011-04-01 06:15:29 +02:00
|
|
|
} else {
|
2013-06-06 10:48:51 +02:00
|
|
|
pci_nic_init_nofail(&nd_table[i], phb->bus, nd->model, NULL);
|
2011-04-01 06:15:29 +02:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2011-04-01 06:15:31 +02:00
|
|
|
for (i = 0; i <= drive_get_max_bus(IF_SCSI); i++) {
|
2012-04-25 19:55:41 +02:00
|
|
|
spapr_vscsi_create(spapr->vio_bus);
|
2011-04-01 06:15:31 +02:00
|
|
|
}
|
|
|
|
|
2012-08-06 18:42:00 +02:00
|
|
|
/* Graphics */
|
2016-01-20 02:58:39 +01:00
|
|
|
if (spapr_vga_init(phb->bus, &error_fatal)) {
|
2012-08-14 13:22:13 +02:00
|
|
|
spapr->has_graphics = true;
|
2015-03-23 18:05:28 +01:00
|
|
|
machine->usb |= defaults_enabled() && !machine->usb_disabled;
|
2012-08-06 18:42:00 +02:00
|
|
|
}
|
|
|
|
|
2015-01-06 14:29:16 +01:00
|
|
|
if (machine->usb) {
|
2015-12-09 13:34:13 +01:00
|
|
|
if (smc->use_ohci_by_default) {
|
|
|
|
pci_create_simple(phb->bus, -1, "pci-ohci");
|
|
|
|
} else {
|
|
|
|
pci_create_simple(phb->bus, -1, "nec-usb-xhci");
|
|
|
|
}
|
2015-02-04 13:28:14 +01:00
|
|
|
|
2012-08-16 04:03:56 +02:00
|
|
|
if (spapr->has_graphics) {
|
2015-02-04 13:28:14 +01:00
|
|
|
USBBus *usb_bus = usb_bus_find(-1);
|
|
|
|
|
|
|
|
usb_create_simple(usb_bus, "usb-kbd");
|
|
|
|
usb_create_simple(usb_bus, "usb-mouse");
|
2012-08-16 04:03:56 +02:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2018-06-25 14:42:24 +02:00
|
|
|
if (spapr->rma_size < (MIN_RMA_SLOF * MiB)) {
|
2016-01-20 02:58:55 +01:00
|
|
|
error_report(
|
|
|
|
"pSeries SLOF firmware requires >= %ldM guest RMA (Real Mode Area memory)",
|
|
|
|
MIN_RMA_SLOF);
|
2012-01-11 20:46:28 +01:00
|
|
|
exit(1);
|
|
|
|
}
|
|
|
|
|
2011-04-01 06:15:20 +02:00
|
|
|
if (kernel_filename) {
|
|
|
|
uint64_t lowaddr = 0;
|
|
|
|
|
2016-10-20 06:31:45 +02:00
|
|
|
spapr->kernel_size = load_elf(kernel_filename, translate_kernel_address,
|
|
|
|
NULL, NULL, &lowaddr, NULL, 1,
|
|
|
|
PPC_ELF_MACHINE, 0, 0);
|
|
|
|
if (spapr->kernel_size == ELF_LOAD_WRONG_ENDIAN) {
|
|
|
|
spapr->kernel_size = load_elf(kernel_filename,
|
|
|
|
translate_kernel_address, NULL, NULL,
|
|
|
|
&lowaddr, NULL, 0, PPC_ELF_MACHINE,
|
|
|
|
0, 0);
|
|
|
|
spapr->kernel_le = spapr->kernel_size > 0;
|
2013-09-25 09:40:15 +02:00
|
|
|
}
|
2016-10-20 06:31:45 +02:00
|
|
|
if (spapr->kernel_size < 0) {
|
|
|
|
error_report("error loading %s: %s", kernel_filename,
|
|
|
|
load_elf_strerror(spapr->kernel_size));
|
2011-04-01 06:15:20 +02:00
|
|
|
exit(1);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* load initrd */
|
|
|
|
if (initrd_filename) {
|
2012-01-11 20:46:28 +01:00
|
|
|
/* Try to locate the initrd in the gap between the kernel
|
|
|
|
* and the firmware. Add a bit of space just in case
|
|
|
|
*/
|
2016-10-20 06:31:45 +02:00
|
|
|
spapr->initrd_base = (KERNEL_LOAD_ADDR + spapr->kernel_size
|
|
|
|
+ 0x1ffff) & ~0xffff;
|
|
|
|
spapr->initrd_size = load_image_targphys(initrd_filename,
|
|
|
|
spapr->initrd_base,
|
|
|
|
load_limit
|
|
|
|
- spapr->initrd_base);
|
|
|
|
if (spapr->initrd_size < 0) {
|
2016-01-20 02:58:55 +01:00
|
|
|
error_report("could not load initial ram disk '%s'",
|
|
|
|
initrd_filename);
|
2011-04-01 06:15:20 +02:00
|
|
|
exit(1);
|
|
|
|
}
|
|
|
|
}
|
2012-01-11 20:46:28 +01:00
|
|
|
}
|
Delay creation of pseries device tree until reset
At present, the 'pseries' machine creates a flattened device tree in the
machine->init function to pass to either the guest kernel or to firmware.
However, the machine->init function runs before processing of -device
command line options, which means that the device tree so created will
be (incorrectly) missing devices specified that way.
Supplying a correct device tree is, in any case, part of the required
platform entry conditions. Therefore, this patch moves the creation and
loading of the device tree from machine->init to a reset callback. The
setup of entry point address and initial register state moves with it,
which leads to a slight cleanup.
This is not, alas, quite enough to make a fully working reset for pseries.
For that we would need to reload the firmware images, which on this
machine are loaded into RAM. It's a step in the right direction, though.
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-04-05 07:12:10 +02:00
|
|
|
|
2013-07-03 21:26:50 +02:00
|
|
|
if (bios_name == NULL) {
|
|
|
|
bios_name = FW_FILE_NAME;
|
|
|
|
}
|
|
|
|
filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
|
2015-03-14 16:29:09 +01:00
|
|
|
if (!filename) {
|
2015-05-07 07:33:40 +02:00
|
|
|
error_report("Could not find LPAR firmware '%s'", bios_name);
|
2015-03-14 16:29:09 +01:00
|
|
|
exit(1);
|
|
|
|
}
|
2012-01-11 20:46:28 +01:00
|
|
|
fw_size = load_image_targphys(filename, 0, FW_MAX_SIZE);
|
2015-05-07 07:33:40 +02:00
|
|
|
if (fw_size <= 0) {
|
|
|
|
error_report("Could not load LPAR firmware '%s'", filename);
|
2012-01-11 20:46:28 +01:00
|
|
|
exit(1);
|
|
|
|
}
|
|
|
|
g_free(filename);
|
|
|
|
|
2015-07-02 08:23:04 +02:00
|
|
|
/* FIXME: Should register things through the MachineState's qdev
|
|
|
|
* interface, this is a legacy from the sPAPREnvironment structure
|
|
|
|
* which predated MachineState but had a similar function */
|
2013-07-18 21:33:01 +02:00
|
|
|
vmstate_register(NULL, 0, &vmstate_spapr, spapr);
|
|
|
|
register_savevm_live(NULL, "spapr/htab", -1, 1,
|
|
|
|
&savevm_htab_handlers, spapr);
|
|
|
|
|
2015-03-18 13:30:44 +01:00
|
|
|
qemu_register_boot_set(spapr_boot_set, spapr);
|
2017-01-27 13:24:58 +01:00
|
|
|
|
|
|
|
if (kvm_enabled()) {
|
2017-03-27 07:22:19 +02:00
|
|
|
/* to stop and start vmclock */
|
2017-01-27 13:24:58 +01:00
|
|
|
qemu_add_vm_change_state_handler(cpu_ppc_clock_vm_state_change,
|
|
|
|
&spapr->tb);
|
2017-03-27 07:22:19 +02:00
|
|
|
|
|
|
|
kvmppc_spapr_enable_inkernel_multitce();
|
2017-01-27 13:24:58 +01:00
|
|
|
}
|
2011-04-01 06:15:20 +02:00
|
|
|
}
|
|
|
|
|
2013-12-23 16:40:40 +01:00
|
|
|
static int spapr_kvm_type(const char *vm_type)
|
|
|
|
{
|
|
|
|
if (!vm_type) {
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (!strcmp(vm_type, "HV")) {
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (!strcmp(vm_type, "PR")) {
|
|
|
|
return 2;
|
|
|
|
}
|
|
|
|
|
|
|
|
error_report("Unknown kvm-type specified '%s'", vm_type);
|
|
|
|
exit(1);
|
|
|
|
}
|
|
|
|
|
2014-03-17 03:40:27 +01:00
|
|
|
/*
|
2015-01-19 04:45:12 +01:00
|
|
|
* Implementation of an interface to adjust firmware path
|
2014-03-17 03:40:27 +01:00
|
|
|
* for the bootindex property handling.
|
|
|
|
*/
|
|
|
|
static char *spapr_get_fw_dev_path(FWPathProvider *p, BusState *bus,
|
|
|
|
DeviceState *dev)
|
|
|
|
{
|
|
|
|
#define CAST(type, obj, name) \
|
|
|
|
((type *)object_dynamic_cast(OBJECT(obj), (name)))
|
|
|
|
SCSIDevice *d = CAST(SCSIDevice, dev, TYPE_SCSI_DEVICE);
|
|
|
|
sPAPRPHBState *phb = CAST(sPAPRPHBState, dev, TYPE_SPAPR_PCI_HOST_BRIDGE);
|
2017-06-05 17:55:18 +02:00
|
|
|
VHostSCSICommon *vsc = CAST(VHostSCSICommon, dev, TYPE_VHOST_SCSI_COMMON);
|
2014-03-17 03:40:27 +01:00
|
|
|
|
|
|
|
if (d) {
|
|
|
|
void *spapr = CAST(void, bus->parent, "spapr-vscsi");
|
|
|
|
VirtIOSCSI *virtio = CAST(VirtIOSCSI, bus->parent, TYPE_VIRTIO_SCSI);
|
|
|
|
USBDevice *usb = CAST(USBDevice, bus->parent, TYPE_USB_DEVICE);
|
|
|
|
|
|
|
|
if (spapr) {
|
|
|
|
/*
|
|
|
|
* Replace "channel@0/disk@0,0" with "disk@8000000000000000":
|
|
|
|
* We use SRP luns of the form 8000 | (bus << 8) | (id << 5) | lun
|
|
|
|
* in the top 16 bits of the 64-bit LUN
|
|
|
|
*/
|
|
|
|
unsigned id = 0x8000 | (d->id << 8) | d->lun;
|
|
|
|
return g_strdup_printf("%s@%"PRIX64, qdev_fw_name(dev),
|
|
|
|
(uint64_t)id << 48);
|
|
|
|
} else if (virtio) {
|
|
|
|
/*
|
|
|
|
* We use SRP luns of the form 01000000 | (target << 8) | lun
|
|
|
|
* in the top 32 bits of the 64-bit LUN
|
|
|
|
* Note: the quote above is from SLOF and it is wrong,
|
|
|
|
* the actual binding is:
|
|
|
|
* swap 0100 or 10 << or 20 << ( target lun-id -- srplun )
|
|
|
|
*/
|
|
|
|
unsigned id = 0x1000000 | (d->id << 16) | d->lun;
|
2017-11-20 08:44:38 +01:00
|
|
|
if (d->lun >= 256) {
|
|
|
|
/* Use the LUN "flat space addressing method" */
|
|
|
|
id |= 0x4000;
|
|
|
|
}
|
2014-03-17 03:40:27 +01:00
|
|
|
return g_strdup_printf("%s@%"PRIX64, qdev_fw_name(dev),
|
|
|
|
(uint64_t)id << 32);
|
|
|
|
} else if (usb) {
|
|
|
|
/*
|
|
|
|
* We use SRP luns of the form 01000000 | (usb-port << 16) | lun
|
|
|
|
* in the top 32 bits of the 64-bit LUN
|
|
|
|
*/
|
|
|
|
unsigned usb_port = atoi(usb->port->path);
|
|
|
|
unsigned id = 0x1000000 | (usb_port << 16) | d->lun;
|
|
|
|
return g_strdup_printf("%s@%"PRIX64, qdev_fw_name(dev),
|
|
|
|
(uint64_t)id << 32);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
hw/ppc/spapr: Fix boot path of usb-host storage devices
When passing through an USB storage device to a pseries guest, it
is currently not possible to automatically boot from the device
if the "bootindex" property has been specified, too (e.g. when using
"-device nec-usb-xhci -device usb-host,hostbus=1,hostaddr=2,bootindex=0"
at the command line). The problem is that QEMU builds a device tree path
like "/pci@800000020000000/usb@0/usb-host@1" and passes it to SLOF
in the /chosen/qemu,boot-list property. SLOF, however, probes the
USB device, recognizes that it is a storage device and thus changes
its name to "storage", and additionally adds a child node for the
SCSI LUN, so the correct boot path in SLOF is something like
"/pci@800000020000000/usb@0/storage@1/disk@101000000000000" instead.
So when we detect an USB mass storage device with SCSI interface,
we've got to adjust the firmware boot-device path properly that
SLOF can automatically boot from the device.
Buglink: https://bugzilla.redhat.com/show_bug.cgi?id=1354177
Signed-off-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2016-12-14 22:44:17 +01:00
|
|
|
/*
|
|
|
|
* SLOF probes the USB devices, and if it recognizes that the device is a
|
|
|
|
* storage device, it changes its name to "storage" instead of "usb-host",
|
|
|
|
* and additionally adds a child node for the SCSI LUN, so the correct
|
|
|
|
* boot path in SLOF is something like .../storage@1/disk@xxx" instead.
|
|
|
|
*/
|
|
|
|
if (strcmp("usb-host", qdev_fw_name(dev)) == 0) {
|
|
|
|
USBDevice *usbdev = CAST(USBDevice, dev, TYPE_USB_DEVICE);
|
|
|
|
if (usb_host_dev_is_scsi_storage(usbdev)) {
|
|
|
|
return g_strdup_printf("storage@%s/disk", usbdev->port->path);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2014-03-17 03:40:27 +01:00
|
|
|
if (phb) {
|
|
|
|
/* Replace "pci" with "pci@800000020000000" */
|
|
|
|
return g_strdup_printf("pci@%"PRIX64, phb->buid);
|
|
|
|
}
|
|
|
|
|
2017-06-05 17:55:18 +02:00
|
|
|
if (vsc) {
|
|
|
|
/* Same logic as virtio above */
|
|
|
|
unsigned id = 0x1000000 | (vsc->target << 16) | vsc->lun;
|
|
|
|
return g_strdup_printf("disk@%"PRIX64, (uint64_t)id << 32);
|
|
|
|
}
|
|
|
|
|
2017-06-07 10:20:27 +02:00
|
|
|
if (g_str_equal("pci-bridge", qdev_fw_name(dev))) {
|
|
|
|
/* SLOF uses "pci" instead of "pci-bridge" for PCI bridges */
|
|
|
|
PCIDevice *pcidev = CAST(PCIDevice, dev, TYPE_PCI_DEVICE);
|
|
|
|
return g_strdup_printf("pci@%x", PCI_SLOT(pcidev->devfn));
|
|
|
|
}
|
|
|
|
|
2014-03-17 03:40:27 +01:00
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
|
2014-05-30 23:24:32 +02:00
|
|
|
static char *spapr_get_kvm_type(Object *obj, Error **errp)
|
|
|
|
{
|
2015-07-02 08:23:04 +02:00
|
|
|
sPAPRMachineState *spapr = SPAPR_MACHINE(obj);
|
2014-05-30 23:24:32 +02:00
|
|
|
|
2015-07-02 08:23:04 +02:00
|
|
|
return g_strdup(spapr->kvm_type);
|
2014-05-30 23:24:32 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
static void spapr_set_kvm_type(Object *obj, const char *value, Error **errp)
|
|
|
|
{
|
2015-07-02 08:23:04 +02:00
|
|
|
sPAPRMachineState *spapr = SPAPR_MACHINE(obj);
|
2014-05-30 23:24:32 +02:00
|
|
|
|
2015-07-02 08:23:04 +02:00
|
|
|
g_free(spapr->kvm_type);
|
|
|
|
spapr->kvm_type = g_strdup(value);
|
2014-05-30 23:24:32 +02:00
|
|
|
}
|
|
|
|
|
spapr: add hotplug interrupt machine options
This adds machine options of the form:
-machine pseries,modern-hotplug-events=true
-machine pseries,modern-hotplug-events=false
If false, QEMU will force the use of "legacy" style hotplug events,
which are surfaced through EPOW events instead of a dedicated
hot plug event source, and lack certain features necessary, mainly,
for memory unplug support.
If true, QEMU will enable support for "modern" dedicated hot plug
event source. Note that we will still default to "legacy" style unless
the guest advertises support for the "modern" hotplug events via
ibm,client-architecture-support hcall during early boot.
For pseries-2.7 and earlier we default to false, for newer machine
types we default to true.
Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2016-10-27 04:20:27 +02:00
|
|
|
static bool spapr_get_modern_hotplug_events(Object *obj, Error **errp)
|
|
|
|
{
|
|
|
|
sPAPRMachineState *spapr = SPAPR_MACHINE(obj);
|
|
|
|
|
|
|
|
return spapr->use_hotplug_event_source;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void spapr_set_modern_hotplug_events(Object *obj, bool value,
|
|
|
|
Error **errp)
|
|
|
|
{
|
|
|
|
sPAPRMachineState *spapr = SPAPR_MACHINE(obj);
|
|
|
|
|
|
|
|
spapr->use_hotplug_event_source = value;
|
|
|
|
}
|
|
|
|
|
2018-03-13 18:17:31 +01:00
|
|
|
static bool spapr_get_msix_emulation(Object *obj, Error **errp)
|
|
|
|
{
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
2017-05-12 07:46:11 +02:00
|
|
|
static char *spapr_get_resize_hpt(Object *obj, Error **errp)
|
|
|
|
{
|
|
|
|
sPAPRMachineState *spapr = SPAPR_MACHINE(obj);
|
|
|
|
|
|
|
|
switch (spapr->resize_hpt) {
|
|
|
|
case SPAPR_RESIZE_HPT_DEFAULT:
|
|
|
|
return g_strdup("default");
|
|
|
|
case SPAPR_RESIZE_HPT_DISABLED:
|
|
|
|
return g_strdup("disabled");
|
|
|
|
case SPAPR_RESIZE_HPT_ENABLED:
|
|
|
|
return g_strdup("enabled");
|
|
|
|
case SPAPR_RESIZE_HPT_REQUIRED:
|
|
|
|
return g_strdup("required");
|
|
|
|
}
|
|
|
|
g_assert_not_reached();
|
|
|
|
}
|
|
|
|
|
|
|
|
static void spapr_set_resize_hpt(Object *obj, const char *value, Error **errp)
|
|
|
|
{
|
|
|
|
sPAPRMachineState *spapr = SPAPR_MACHINE(obj);
|
|
|
|
|
|
|
|
if (strcmp(value, "default") == 0) {
|
|
|
|
spapr->resize_hpt = SPAPR_RESIZE_HPT_DEFAULT;
|
|
|
|
} else if (strcmp(value, "disabled") == 0) {
|
|
|
|
spapr->resize_hpt = SPAPR_RESIZE_HPT_DISABLED;
|
|
|
|
} else if (strcmp(value, "enabled") == 0) {
|
|
|
|
spapr->resize_hpt = SPAPR_RESIZE_HPT_ENABLED;
|
|
|
|
} else if (strcmp(value, "required") == 0) {
|
|
|
|
spapr->resize_hpt = SPAPR_RESIZE_HPT_REQUIRED;
|
|
|
|
} else {
|
|
|
|
error_setg(errp, "Bad value for \"resize-hpt\" property");
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2017-08-18 07:50:22 +02:00
|
|
|
static void spapr_get_vsmt(Object *obj, Visitor *v, const char *name,
|
|
|
|
void *opaque, Error **errp)
|
|
|
|
{
|
|
|
|
visit_type_uint32(v, name, (uint32_t *)opaque, errp);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void spapr_set_vsmt(Object *obj, Visitor *v, const char *name,
|
|
|
|
void *opaque, Error **errp)
|
|
|
|
{
|
|
|
|
visit_type_uint32(v, name, (uint32_t *)opaque, errp);
|
|
|
|
}
|
|
|
|
|
2017-12-08 02:47:34 +01:00
|
|
|
static void spapr_instance_init(Object *obj)
|
2014-05-30 23:24:32 +02:00
|
|
|
{
|
2016-02-09 00:28:58 +01:00
|
|
|
sPAPRMachineState *spapr = SPAPR_MACHINE(obj);
|
|
|
|
|
|
|
|
spapr->htab_fd = -1;
|
spapr: add hotplug interrupt machine options
This adds machine options of the form:
-machine pseries,modern-hotplug-events=true
-machine pseries,modern-hotplug-events=false
If false, QEMU will force the use of "legacy" style hotplug events,
which are surfaced through EPOW events instead of a dedicated
hot plug event source, and lack certain features necessary, mainly,
for memory unplug support.
If true, QEMU will enable support for "modern" dedicated hot plug
event source. Note that we will still default to "legacy" style unless
the guest advertises support for the "modern" hotplug events via
ibm,client-architecture-support hcall during early boot.
For pseries-2.7 and earlier we default to false, for newer machine
types we default to true.
Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2016-10-27 04:20:27 +02:00
|
|
|
spapr->use_hotplug_event_source = true;
|
2014-05-30 23:24:32 +02:00
|
|
|
object_property_add_str(obj, "kvm-type",
|
|
|
|
spapr_get_kvm_type, spapr_set_kvm_type, NULL);
|
2014-12-16 17:58:05 +01:00
|
|
|
object_property_set_description(obj, "kvm-type",
|
|
|
|
"Specifies the KVM virtualization mode (HV, PR)",
|
|
|
|
NULL);
|
spapr: add hotplug interrupt machine options
This adds machine options of the form:
-machine pseries,modern-hotplug-events=true
-machine pseries,modern-hotplug-events=false
If false, QEMU will force the use of "legacy" style hotplug events,
which are surfaced through EPOW events instead of a dedicated
hot plug event source, and lack certain features necessary, mainly,
for memory unplug support.
If true, QEMU will enable support for "modern" dedicated hot plug
event source. Note that we will still default to "legacy" style unless
the guest advertises support for the "modern" hotplug events via
ibm,client-architecture-support hcall during early boot.
For pseries-2.7 and earlier we default to false, for newer machine
types we default to true.
Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2016-10-27 04:20:27 +02:00
|
|
|
object_property_add_bool(obj, "modern-hotplug-events",
|
|
|
|
spapr_get_modern_hotplug_events,
|
|
|
|
spapr_set_modern_hotplug_events,
|
|
|
|
NULL);
|
|
|
|
object_property_set_description(obj, "modern-hotplug-events",
|
|
|
|
"Use dedicated hotplug event mechanism in"
|
|
|
|
" place of standard EPOW events when possible"
|
|
|
|
" (required for memory hot-unplug support)",
|
|
|
|
NULL);
|
2017-06-11 14:33:59 +02:00
|
|
|
ppc_compat_add_property(obj, "max-cpu-compat", &spapr->max_compat_pvr,
|
|
|
|
"Maximum permitted CPU compatibility mode",
|
|
|
|
&error_fatal);
|
2017-05-12 07:46:11 +02:00
|
|
|
|
|
|
|
object_property_add_str(obj, "resize-hpt",
|
|
|
|
spapr_get_resize_hpt, spapr_set_resize_hpt, NULL);
|
|
|
|
object_property_set_description(obj, "resize-hpt",
|
|
|
|
"Resizing of the Hash Page Table (enabled, disabled, required)",
|
|
|
|
NULL);
|
2017-08-18 07:50:22 +02:00
|
|
|
object_property_add(obj, "vsmt", "uint32", spapr_get_vsmt,
|
|
|
|
spapr_set_vsmt, NULL, &spapr->vsmt, &error_abort);
|
|
|
|
object_property_set_description(obj, "vsmt",
|
|
|
|
"Virtual SMT: KVM behaves as if this were"
|
|
|
|
" the host's SMT mode", &error_abort);
|
2018-03-13 18:17:31 +01:00
|
|
|
object_property_add_bool(obj, "vfio-no-msix-emulation",
|
|
|
|
spapr_get_msix_emulation, NULL, NULL);
|
2014-05-30 23:24:32 +02:00
|
|
|
}
|
|
|
|
|
2015-12-28 07:38:26 +01:00
|
|
|
static void spapr_machine_finalizefn(Object *obj)
|
|
|
|
{
|
|
|
|
sPAPRMachineState *spapr = SPAPR_MACHINE(obj);
|
|
|
|
|
|
|
|
g_free(spapr->kvm_type);
|
|
|
|
}
|
|
|
|
|
2016-12-05 06:50:21 +01:00
|
|
|
void spapr_do_system_reset_on_cpu(CPUState *cs, run_on_cpu_data arg)
|
2014-08-20 14:16:36 +02:00
|
|
|
{
|
|
|
|
cpu_synchronize_state(cs);
|
|
|
|
ppc_cpu_do_system_reset(cs);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void spapr_nmi(NMIState *n, int cpu_index, Error **errp)
|
|
|
|
{
|
|
|
|
CPUState *cs;
|
|
|
|
|
|
|
|
CPU_FOREACH(cs) {
|
2016-12-05 06:50:21 +01:00
|
|
|
async_run_on_cpu(cs, spapr_do_system_reset_on_cpu, RUN_ON_CPU_NULL);
|
2014-08-20 14:16:36 +02:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2016-10-27 04:20:29 +02:00
|
|
|
static void spapr_add_lmbs(DeviceState *dev, uint64_t addr_start, uint64_t size,
|
|
|
|
uint32_t node, bool dedicated_hp_event_source,
|
|
|
|
Error **errp)
|
2015-09-01 03:22:35 +02:00
|
|
|
{
|
|
|
|
sPAPRDRConnector *drc;
|
|
|
|
uint32_t nr_lmbs = size/SPAPR_MEMORY_BLOCK_SIZE;
|
|
|
|
int i, fdt_offset, fdt_size;
|
|
|
|
void *fdt;
|
2016-10-27 04:20:29 +02:00
|
|
|
uint64_t addr = addr_start;
|
spapr: Treat devices added before inbound migration as coldplugged
When migrating a guest which has already had devices hotplugged,
libvirt typically starts the destination qemu with -incoming defer,
adds those hotplugged devices with qmp, then initiates the incoming
migration.
This causes problems for the management of spapr DRC state. Because
the device is treated as hotplugged, it goes into a DRC state for a
device immediately after it's plugged, but before the guest has
acknowledged its presence. However, chances are the guest on the
source machine *has* acknowledged the device's presence and configured
it.
If the source has fully configured the device, then DRC state won't be
sent in the migration stream: for maximum migration compatibility with
earlier versions we don't migrate DRCs in coldplug-equivalent state.
That means that the DRC effectively changes state over the migrate,
causing problems later on.
In addition, logging hotplug events for these devices isn't what we
want because a) those events should already have been issued on the
source host and b) the event queue should get wiped out by the
incoming state anyway.
In short, what we really want is to treat devices added before an
incoming migration as if they were coldplugged.
To do this, we first add a spapr_drc_hotplugged() helper which
determines if the device is hotplugged in the sense relevant for DRC
state management. We only send hotplug events when this is true.
Second, when we add a device which isn't hotplugged in this sense, we
force a reset of the DRC state - this ensures the DRC is in a
coldplug-equivalent state (there isn't usually a system reset between
these device adds and the incoming migration).
This is based on an earlier patch by Laurent Vivier, cleaned up and
extended.
Signed-off-by: Laurent Vivier <lvivier@redhat.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Reviewed-by: Greg Kurz <groug@kaod.org>
Tested-by: Daniel Barboza <danielhb@linux.vnet.ibm.com>
2017-06-09 13:08:10 +02:00
|
|
|
bool hotplugged = spapr_drc_hotplugged(dev);
|
2017-07-03 16:54:36 +02:00
|
|
|
Error *local_err = NULL;
|
2015-09-01 03:22:35 +02:00
|
|
|
|
|
|
|
for (i = 0; i < nr_lmbs; i++) {
|
2017-06-04 12:26:03 +02:00
|
|
|
drc = spapr_drc_by_id(TYPE_SPAPR_DRC_LMB,
|
|
|
|
addr / SPAPR_MEMORY_BLOCK_SIZE);
|
2015-09-01 03:22:35 +02:00
|
|
|
g_assert(drc);
|
|
|
|
|
|
|
|
fdt = create_device_tree(&fdt_size);
|
|
|
|
fdt_offset = spapr_populate_memory_node(fdt, node, addr,
|
|
|
|
SPAPR_MEMORY_BLOCK_SIZE);
|
|
|
|
|
2017-07-03 16:54:36 +02:00
|
|
|
spapr_drc_attach(drc, dev, fdt, fdt_offset, &local_err);
|
|
|
|
if (local_err) {
|
|
|
|
while (addr > addr_start) {
|
|
|
|
addr -= SPAPR_MEMORY_BLOCK_SIZE;
|
|
|
|
drc = spapr_drc_by_id(TYPE_SPAPR_DRC_LMB,
|
|
|
|
addr / SPAPR_MEMORY_BLOCK_SIZE);
|
2017-07-04 13:07:14 +02:00
|
|
|
spapr_drc_detach(drc);
|
2017-07-03 16:54:36 +02:00
|
|
|
}
|
|
|
|
g_free(fdt);
|
|
|
|
error_propagate(errp, local_err);
|
|
|
|
return;
|
|
|
|
}
|
spapr: Treat devices added before inbound migration as coldplugged
When migrating a guest which has already had devices hotplugged,
libvirt typically starts the destination qemu with -incoming defer,
adds those hotplugged devices with qmp, then initiates the incoming
migration.
This causes problems for the management of spapr DRC state. Because
the device is treated as hotplugged, it goes into a DRC state for a
device immediately after it's plugged, but before the guest has
acknowledged its presence. However, chances are the guest on the
source machine *has* acknowledged the device's presence and configured
it.
If the source has fully configured the device, then DRC state won't be
sent in the migration stream: for maximum migration compatibility with
earlier versions we don't migrate DRCs in coldplug-equivalent state.
That means that the DRC effectively changes state over the migrate,
causing problems later on.
In addition, logging hotplug events for these devices isn't what we
want because a) those events should already have been issued on the
source host and b) the event queue should get wiped out by the
incoming state anyway.
In short, what we really want is to treat devices added before an
incoming migration as if they were coldplugged.
To do this, we first add a spapr_drc_hotplugged() helper which
determines if the device is hotplugged in the sense relevant for DRC
state management. We only send hotplug events when this is true.
Second, when we add a device which isn't hotplugged in this sense, we
force a reset of the DRC state - this ensures the DRC is in a
coldplug-equivalent state (there isn't usually a system reset between
these device adds and the incoming migration).
This is based on an earlier patch by Laurent Vivier, cleaned up and
extended.
Signed-off-by: Laurent Vivier <lvivier@redhat.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Reviewed-by: Greg Kurz <groug@kaod.org>
Tested-by: Daniel Barboza <danielhb@linux.vnet.ibm.com>
2017-06-09 13:08:10 +02:00
|
|
|
if (!hotplugged) {
|
|
|
|
spapr_drc_reset(drc);
|
|
|
|
}
|
2015-09-01 03:22:35 +02:00
|
|
|
addr += SPAPR_MEMORY_BLOCK_SIZE;
|
|
|
|
}
|
2016-05-24 19:55:04 +02:00
|
|
|
/* send hotplug notification to the
|
|
|
|
* guest only in case of hotplugged memory
|
|
|
|
*/
|
spapr: Treat devices added before inbound migration as coldplugged
When migrating a guest which has already had devices hotplugged,
libvirt typically starts the destination qemu with -incoming defer,
adds those hotplugged devices with qmp, then initiates the incoming
migration.
This causes problems for the management of spapr DRC state. Because
the device is treated as hotplugged, it goes into a DRC state for a
device immediately after it's plugged, but before the guest has
acknowledged its presence. However, chances are the guest on the
source machine *has* acknowledged the device's presence and configured
it.
If the source has fully configured the device, then DRC state won't be
sent in the migration stream: for maximum migration compatibility with
earlier versions we don't migrate DRCs in coldplug-equivalent state.
That means that the DRC effectively changes state over the migrate,
causing problems later on.
In addition, logging hotplug events for these devices isn't what we
want because a) those events should already have been issued on the
source host and b) the event queue should get wiped out by the
incoming state anyway.
In short, what we really want is to treat devices added before an
incoming migration as if they were coldplugged.
To do this, we first add a spapr_drc_hotplugged() helper which
determines if the device is hotplugged in the sense relevant for DRC
state management. We only send hotplug events when this is true.
Second, when we add a device which isn't hotplugged in this sense, we
force a reset of the DRC state - this ensures the DRC is in a
coldplug-equivalent state (there isn't usually a system reset between
these device adds and the incoming migration).
This is based on an earlier patch by Laurent Vivier, cleaned up and
extended.
Signed-off-by: Laurent Vivier <lvivier@redhat.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Reviewed-by: Greg Kurz <groug@kaod.org>
Tested-by: Daniel Barboza <danielhb@linux.vnet.ibm.com>
2017-06-09 13:08:10 +02:00
|
|
|
if (hotplugged) {
|
2016-10-27 04:20:29 +02:00
|
|
|
if (dedicated_hp_event_source) {
|
2017-06-04 12:26:03 +02:00
|
|
|
drc = spapr_drc_by_id(TYPE_SPAPR_DRC_LMB,
|
|
|
|
addr_start / SPAPR_MEMORY_BLOCK_SIZE);
|
2016-10-27 04:20:29 +02:00
|
|
|
spapr_hotplug_req_add_by_count_indexed(SPAPR_DR_CONNECTOR_TYPE_LMB,
|
|
|
|
nr_lmbs,
|
2017-06-02 05:49:20 +02:00
|
|
|
spapr_drc_index(drc));
|
2016-10-27 04:20:29 +02:00
|
|
|
} else {
|
|
|
|
spapr_hotplug_req_add_by_count(SPAPR_DR_CONNECTOR_TYPE_LMB,
|
|
|
|
nr_lmbs);
|
|
|
|
}
|
2016-05-24 19:55:04 +02:00
|
|
|
}
|
2015-09-01 03:22:35 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
static void spapr_memory_plug(HotplugHandler *hotplug_dev, DeviceState *dev,
|
2018-06-08 14:48:12 +02:00
|
|
|
Error **errp)
|
2015-09-01 03:22:35 +02:00
|
|
|
{
|
|
|
|
Error *local_err = NULL;
|
|
|
|
sPAPRMachineState *ms = SPAPR_MACHINE(hotplug_dev);
|
|
|
|
PCDIMMDevice *dimm = PC_DIMM(dev);
|
|
|
|
PCDIMMDeviceClass *ddc = PC_DIMM_GET_CLASS(dimm);
|
2018-06-19 15:41:41 +02:00
|
|
|
MemoryRegion *mr = ddc->get_memory_region(dimm, &error_abort);
|
2018-08-01 15:34:44 +02:00
|
|
|
uint64_t size, addr;
|
2018-06-08 14:48:12 +02:00
|
|
|
uint32_t node;
|
2017-08-21 08:30:29 +02:00
|
|
|
|
|
|
|
size = memory_region_size(mr);
|
2017-02-15 10:21:44 +01:00
|
|
|
|
2018-08-01 15:34:44 +02:00
|
|
|
pc_dimm_plug(dev, MACHINE(ms), &local_err);
|
2015-09-01 03:22:35 +02:00
|
|
|
if (local_err) {
|
|
|
|
goto out;
|
|
|
|
}
|
|
|
|
|
2017-06-07 18:36:13 +02:00
|
|
|
addr = object_property_get_uint(OBJECT(dimm),
|
|
|
|
PC_DIMM_ADDR_PROP, &local_err);
|
2015-09-01 03:22:35 +02:00
|
|
|
if (local_err) {
|
2017-07-03 16:54:36 +02:00
|
|
|
goto out_unplug;
|
2015-09-01 03:22:35 +02:00
|
|
|
}
|
|
|
|
|
2018-06-08 14:48:12 +02:00
|
|
|
node = object_property_get_uint(OBJECT(dev), PC_DIMM_NODE_PROP,
|
|
|
|
&error_abort);
|
2016-10-27 04:20:29 +02:00
|
|
|
spapr_add_lmbs(dev, addr, size, node,
|
|
|
|
spapr_ovec_test(ms->ov5_cas, OV5_HP_EVT),
|
2017-07-03 16:54:36 +02:00
|
|
|
&local_err);
|
|
|
|
if (local_err) {
|
|
|
|
goto out_unplug;
|
|
|
|
}
|
|
|
|
|
|
|
|
return;
|
2015-09-01 03:22:35 +02:00
|
|
|
|
2017-07-03 16:54:36 +02:00
|
|
|
out_unplug:
|
2018-06-19 15:41:32 +02:00
|
|
|
pc_dimm_unplug(dev, MACHINE(ms));
|
2015-09-01 03:22:35 +02:00
|
|
|
out:
|
|
|
|
error_propagate(errp, local_err);
|
|
|
|
}
|
|
|
|
|
2017-05-23 13:18:09 +02:00
|
|
|
static void spapr_memory_pre_plug(HotplugHandler *hotplug_dev, DeviceState *dev,
|
|
|
|
Error **errp)
|
|
|
|
{
|
2018-06-08 14:48:13 +02:00
|
|
|
const sPAPRMachineClass *smc = SPAPR_MACHINE_GET_CLASS(hotplug_dev);
|
2018-04-18 06:21:45 +02:00
|
|
|
sPAPRMachineState *spapr = SPAPR_MACHINE(hotplug_dev);
|
2017-05-23 13:18:09 +02:00
|
|
|
PCDIMMDevice *dimm = PC_DIMM(dev);
|
|
|
|
PCDIMMDeviceClass *ddc = PC_DIMM_GET_CLASS(dimm);
|
2018-08-01 15:34:41 +02:00
|
|
|
Error *local_err = NULL;
|
2017-08-21 08:30:29 +02:00
|
|
|
MemoryRegion *mr;
|
|
|
|
uint64_t size;
|
2018-04-18 06:21:45 +02:00
|
|
|
Object *memdev;
|
|
|
|
hwaddr pagesize;
|
2017-05-23 13:18:09 +02:00
|
|
|
|
2018-06-08 14:48:13 +02:00
|
|
|
if (!smc->dr_lmb_enabled) {
|
|
|
|
error_setg(errp, "Memory hotplug not supported for this machine");
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2017-08-21 08:30:29 +02:00
|
|
|
mr = ddc->get_memory_region(dimm, errp);
|
|
|
|
if (!mr) {
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
size = memory_region_size(mr);
|
|
|
|
|
2017-05-23 13:18:09 +02:00
|
|
|
if (size % SPAPR_MEMORY_BLOCK_SIZE) {
|
|
|
|
error_setg(errp, "Hotplugged memory size must be a multiple of "
|
2018-06-25 14:42:24 +02:00
|
|
|
"%" PRIu64 " MB", SPAPR_MEMORY_BLOCK_SIZE / MiB);
|
2017-05-23 13:18:09 +02:00
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2018-04-18 06:21:45 +02:00
|
|
|
memdev = object_property_get_link(OBJECT(dimm), PC_DIMM_MEMDEV_PROP,
|
|
|
|
&error_abort);
|
|
|
|
pagesize = host_memory_backend_pagesize(MEMORY_BACKEND(memdev));
|
2018-08-01 15:34:41 +02:00
|
|
|
spapr_check_pagesize(spapr, pagesize, &local_err);
|
|
|
|
if (local_err) {
|
|
|
|
error_propagate(errp, local_err);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2018-08-01 15:34:44 +02:00
|
|
|
pc_dimm_pre_plug(dev, MACHINE(hotplug_dev), NULL, errp);
|
2017-05-23 13:18:09 +02:00
|
|
|
}
|
|
|
|
|
2017-05-24 09:01:48 +02:00
|
|
|
struct sPAPRDIMMState {
|
|
|
|
PCDIMMDevice *dimm;
|
2016-10-27 04:20:30 +02:00
|
|
|
uint32_t nr_lmbs;
|
2017-05-24 09:01:48 +02:00
|
|
|
QTAILQ_ENTRY(sPAPRDIMMState) next;
|
|
|
|
};
|
|
|
|
|
|
|
|
static sPAPRDIMMState *spapr_pending_dimm_unplugs_find(sPAPRMachineState *s,
|
|
|
|
PCDIMMDevice *dimm)
|
|
|
|
{
|
|
|
|
sPAPRDIMMState *dimm_state = NULL;
|
|
|
|
|
|
|
|
QTAILQ_FOREACH(dimm_state, &s->pending_dimm_unplugs, next) {
|
|
|
|
if (dimm_state->dimm == dimm) {
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
return dimm_state;
|
|
|
|
}
|
|
|
|
|
2017-07-21 06:51:06 +02:00
|
|
|
static sPAPRDIMMState *spapr_pending_dimm_unplugs_add(sPAPRMachineState *spapr,
|
|
|
|
uint32_t nr_lmbs,
|
|
|
|
PCDIMMDevice *dimm)
|
2017-05-24 09:01:48 +02:00
|
|
|
{
|
2017-07-21 06:51:06 +02:00
|
|
|
sPAPRDIMMState *ds = NULL;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* If this request is for a DIMM whose removal had failed earlier
|
|
|
|
* (due to guest's refusal to remove the LMBs), we would have this
|
|
|
|
* dimm already in the pending_dimm_unplugs list. In that
|
|
|
|
* case don't add again.
|
|
|
|
*/
|
|
|
|
ds = spapr_pending_dimm_unplugs_find(spapr, dimm);
|
|
|
|
if (!ds) {
|
|
|
|
ds = g_malloc0(sizeof(sPAPRDIMMState));
|
|
|
|
ds->nr_lmbs = nr_lmbs;
|
|
|
|
ds->dimm = dimm;
|
|
|
|
QTAILQ_INSERT_HEAD(&spapr->pending_dimm_unplugs, ds, next);
|
|
|
|
}
|
|
|
|
return ds;
|
2017-05-24 09:01:48 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
static void spapr_pending_dimm_unplugs_remove(sPAPRMachineState *spapr,
|
|
|
|
sPAPRDIMMState *dimm_state)
|
|
|
|
{
|
|
|
|
QTAILQ_REMOVE(&spapr->pending_dimm_unplugs, dimm_state, next);
|
|
|
|
g_free(dimm_state);
|
|
|
|
}
|
2016-10-27 04:20:30 +02:00
|
|
|
|
2017-05-22 21:35:50 +02:00
|
|
|
static sPAPRDIMMState *spapr_recover_pending_dimm_state(sPAPRMachineState *ms,
|
|
|
|
PCDIMMDevice *dimm)
|
|
|
|
{
|
|
|
|
sPAPRDRConnector *drc;
|
|
|
|
PCDIMMDeviceClass *ddc = PC_DIMM_GET_CLASS(dimm);
|
2017-08-21 08:30:29 +02:00
|
|
|
MemoryRegion *mr = ddc->get_memory_region(dimm, &error_abort);
|
2017-05-22 21:35:50 +02:00
|
|
|
uint64_t size = memory_region_size(mr);
|
|
|
|
uint32_t nr_lmbs = size / SPAPR_MEMORY_BLOCK_SIZE;
|
|
|
|
uint32_t avail_lmbs = 0;
|
|
|
|
uint64_t addr_start, addr;
|
|
|
|
int i;
|
|
|
|
|
|
|
|
addr_start = object_property_get_int(OBJECT(dimm), PC_DIMM_ADDR_PROP,
|
|
|
|
&error_abort);
|
|
|
|
|
|
|
|
addr = addr_start;
|
|
|
|
for (i = 0; i < nr_lmbs; i++) {
|
2017-06-04 12:26:03 +02:00
|
|
|
drc = spapr_drc_by_id(TYPE_SPAPR_DRC_LMB,
|
|
|
|
addr / SPAPR_MEMORY_BLOCK_SIZE);
|
2017-05-22 21:35:50 +02:00
|
|
|
g_assert(drc);
|
2017-06-06 09:01:21 +02:00
|
|
|
if (drc->dev) {
|
2017-05-22 21:35:50 +02:00
|
|
|
avail_lmbs++;
|
|
|
|
}
|
|
|
|
addr += SPAPR_MEMORY_BLOCK_SIZE;
|
|
|
|
}
|
|
|
|
|
2017-07-21 06:51:06 +02:00
|
|
|
return spapr_pending_dimm_unplugs_add(ms, avail_lmbs, dimm);
|
2017-05-22 21:35:50 +02:00
|
|
|
}
|
|
|
|
|
2017-05-22 21:35:48 +02:00
|
|
|
/* Callback to be called during DRC release. */
|
|
|
|
void spapr_lmb_release(DeviceState *dev)
|
2016-10-27 04:20:30 +02:00
|
|
|
{
|
2018-06-08 14:48:15 +02:00
|
|
|
HotplugHandler *hotplug_ctrl = qdev_get_hotplug_handler(dev);
|
|
|
|
sPAPRMachineState *spapr = SPAPR_MACHINE(hotplug_ctrl);
|
2017-05-24 09:01:48 +02:00
|
|
|
sPAPRDIMMState *ds = spapr_pending_dimm_unplugs_find(spapr, PC_DIMM(dev));
|
2016-10-27 04:20:30 +02:00
|
|
|
|
2017-05-22 21:35:50 +02:00
|
|
|
/* This information will get lost if a migration occurs
|
|
|
|
* during the unplug process. In this case recover it. */
|
|
|
|
if (ds == NULL) {
|
|
|
|
ds = spapr_recover_pending_dimm_state(spapr, PC_DIMM(dev));
|
2017-07-21 06:51:06 +02:00
|
|
|
g_assert(ds);
|
2017-06-06 09:01:21 +02:00
|
|
|
/* The DRC being examined by the caller at least must be counted */
|
|
|
|
g_assert(ds->nr_lmbs);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (--ds->nr_lmbs) {
|
2016-10-27 04:20:30 +02:00
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Now that all the LMBs have been removed by the guest, call the
|
2018-06-08 14:48:15 +02:00
|
|
|
* unplug handler chain. This can never fail.
|
2016-10-27 04:20:30 +02:00
|
|
|
*/
|
2018-06-08 14:48:15 +02:00
|
|
|
hotplug_handler_unplug(hotplug_ctrl, dev, &error_abort);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void spapr_memory_unplug(HotplugHandler *hotplug_dev, DeviceState *dev)
|
|
|
|
{
|
|
|
|
sPAPRMachineState *spapr = SPAPR_MACHINE(hotplug_dev);
|
|
|
|
sPAPRDIMMState *ds = spapr_pending_dimm_unplugs_find(spapr, PC_DIMM(dev));
|
|
|
|
|
2018-06-19 15:41:32 +02:00
|
|
|
pc_dimm_unplug(dev, MACHINE(hotplug_dev));
|
2016-10-27 04:20:30 +02:00
|
|
|
object_unparent(OBJECT(dev));
|
hw/ppc/spapr.c: abort unplug_request if previous unplug isn't done
LMB removal is completed only when the spapr_lmb_release callback
is called after all DRCs of the dimm are detached. During this
time, it is possible that a unplug request for the same dimm
arrives, trying to detach DRCs that were detached by the guest
in the first unplug_request.
BQL doesn't help in this case - the lock will prevent any concurrent
removal from happening until the end of spapr_memory_unplug_request
only. What happens is that the second unplug_request ends up calling
spapr_drc_detach in a DRC that were detached already, causing an
assert error in spapr_drc_detach (e.g
https://bugs.launchpad.net/qemu/+bug/1718118).
spapr_lmb_release uses a structure called sPAPRDIMMState, stored in the
spapr->pending_dimm_unplugs QTAIL, to track how many LMB DRCs are left
to be detached by the guest. When there are no more DRCs left, this
structure is deleted and the pc-dimm unplug handler is called to
finish the process.
This patch reuses the sPAPRDIMMState to allow unplug_request to know
if there is an ongoing unplug process for a given dimm, aborting the
unplug request in this case, by doing the following changes:
- in spapr_lmb_release callback, move the dimm state removal to the
end, after pc-dimm unplug handler. With this change we can check for
the existence of the dimm state to see if the unplug process is
done.
- use spapr_pending_dimm_unplugs_find in spapr_memory_unplug_request
to check if the dimm state exists. If positive, there is an unplug
operation already in progress for this dimm, meaning that we should
abort it and warn the user about it.
Fixes: https://bugs.launchpad.net/qemu/+bug/1718118
Signed-off-by: Daniel Henrique Barboza <danielhb@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2017-10-09 23:11:36 +02:00
|
|
|
spapr_pending_dimm_unplugs_remove(spapr, ds);
|
2016-10-27 04:20:30 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
static void spapr_memory_unplug_request(HotplugHandler *hotplug_dev,
|
|
|
|
DeviceState *dev, Error **errp)
|
|
|
|
{
|
2017-05-24 09:01:48 +02:00
|
|
|
sPAPRMachineState *spapr = SPAPR_MACHINE(hotplug_dev);
|
2016-10-27 04:20:30 +02:00
|
|
|
Error *local_err = NULL;
|
|
|
|
PCDIMMDevice *dimm = PC_DIMM(dev);
|
|
|
|
PCDIMMDeviceClass *ddc = PC_DIMM_GET_CLASS(dimm);
|
2018-06-19 15:41:41 +02:00
|
|
|
MemoryRegion *mr = ddc->get_memory_region(dimm, &error_abort);
|
2017-08-21 08:30:29 +02:00
|
|
|
uint32_t nr_lmbs;
|
|
|
|
uint64_t size, addr_start, addr;
|
2017-05-24 09:01:48 +02:00
|
|
|
int i;
|
|
|
|
sPAPRDRConnector *drc;
|
2017-08-21 08:30:29 +02:00
|
|
|
|
|
|
|
size = memory_region_size(mr);
|
|
|
|
nr_lmbs = size / SPAPR_MEMORY_BLOCK_SIZE;
|
|
|
|
|
2017-06-07 18:36:13 +02:00
|
|
|
addr_start = object_property_get_uint(OBJECT(dimm), PC_DIMM_ADDR_PROP,
|
2017-05-24 09:01:48 +02:00
|
|
|
&local_err);
|
2016-10-27 04:20:30 +02:00
|
|
|
if (local_err) {
|
|
|
|
goto out;
|
|
|
|
}
|
|
|
|
|
hw/ppc/spapr.c: abort unplug_request if previous unplug isn't done
LMB removal is completed only when the spapr_lmb_release callback
is called after all DRCs of the dimm are detached. During this
time, it is possible that a unplug request for the same dimm
arrives, trying to detach DRCs that were detached by the guest
in the first unplug_request.
BQL doesn't help in this case - the lock will prevent any concurrent
removal from happening until the end of spapr_memory_unplug_request
only. What happens is that the second unplug_request ends up calling
spapr_drc_detach in a DRC that were detached already, causing an
assert error in spapr_drc_detach (e.g
https://bugs.launchpad.net/qemu/+bug/1718118).
spapr_lmb_release uses a structure called sPAPRDIMMState, stored in the
spapr->pending_dimm_unplugs QTAIL, to track how many LMB DRCs are left
to be detached by the guest. When there are no more DRCs left, this
structure is deleted and the pc-dimm unplug handler is called to
finish the process.
This patch reuses the sPAPRDIMMState to allow unplug_request to know
if there is an ongoing unplug process for a given dimm, aborting the
unplug request in this case, by doing the following changes:
- in spapr_lmb_release callback, move the dimm state removal to the
end, after pc-dimm unplug handler. With this change we can check for
the existence of the dimm state to see if the unplug process is
done.
- use spapr_pending_dimm_unplugs_find in spapr_memory_unplug_request
to check if the dimm state exists. If positive, there is an unplug
operation already in progress for this dimm, meaning that we should
abort it and warn the user about it.
Fixes: https://bugs.launchpad.net/qemu/+bug/1718118
Signed-off-by: Daniel Henrique Barboza <danielhb@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2017-10-09 23:11:36 +02:00
|
|
|
/*
|
|
|
|
* An existing pending dimm state for this DIMM means that there is an
|
|
|
|
* unplug operation in progress, waiting for the spapr_lmb_release
|
|
|
|
* callback to complete the job (BQL can't cover that far). In this case,
|
|
|
|
* bail out to avoid detaching DRCs that were already released.
|
|
|
|
*/
|
|
|
|
if (spapr_pending_dimm_unplugs_find(spapr, dimm)) {
|
|
|
|
error_setg(&local_err,
|
|
|
|
"Memory unplug already in progress for device %s",
|
|
|
|
dev->id);
|
|
|
|
goto out;
|
|
|
|
}
|
|
|
|
|
2017-07-21 06:51:06 +02:00
|
|
|
spapr_pending_dimm_unplugs_add(spapr, nr_lmbs, dimm);
|
2017-05-24 09:01:48 +02:00
|
|
|
|
|
|
|
addr = addr_start;
|
|
|
|
for (i = 0; i < nr_lmbs; i++) {
|
2017-06-04 12:26:03 +02:00
|
|
|
drc = spapr_drc_by_id(TYPE_SPAPR_DRC_LMB,
|
|
|
|
addr / SPAPR_MEMORY_BLOCK_SIZE);
|
2017-05-24 09:01:48 +02:00
|
|
|
g_assert(drc);
|
|
|
|
|
2017-07-04 13:07:14 +02:00
|
|
|
spapr_drc_detach(drc);
|
2017-05-24 09:01:48 +02:00
|
|
|
addr += SPAPR_MEMORY_BLOCK_SIZE;
|
|
|
|
}
|
|
|
|
|
2017-06-04 12:26:03 +02:00
|
|
|
drc = spapr_drc_by_id(TYPE_SPAPR_DRC_LMB,
|
|
|
|
addr_start / SPAPR_MEMORY_BLOCK_SIZE);
|
2017-05-24 09:01:48 +02:00
|
|
|
spapr_hotplug_req_remove_by_count_indexed(SPAPR_DR_CONNECTOR_TYPE_LMB,
|
2017-06-02 05:49:20 +02:00
|
|
|
nr_lmbs, spapr_drc_index(drc));
|
2016-10-27 04:20:30 +02:00
|
|
|
out:
|
|
|
|
error_propagate(errp, local_err);
|
|
|
|
}
|
|
|
|
|
2017-06-30 15:18:10 +02:00
|
|
|
static void *spapr_populate_hotplug_cpu_dt(CPUState *cs, int *fdt_offset,
|
|
|
|
sPAPRMachineState *spapr)
|
2016-06-10 02:59:04 +02:00
|
|
|
{
|
|
|
|
PowerPCCPU *cpu = POWERPC_CPU(cs);
|
|
|
|
DeviceClass *dc = DEVICE_GET_CLASS(cs);
|
2018-02-14 20:40:44 +01:00
|
|
|
int id = spapr_get_vcpu_id(cpu);
|
2016-06-10 02:59:04 +02:00
|
|
|
void *fdt;
|
|
|
|
int offset, fdt_size;
|
|
|
|
char *nodename;
|
|
|
|
|
|
|
|
fdt = create_device_tree(&fdt_size);
|
|
|
|
nodename = g_strdup_printf("%s@%x", dc->fw_name, id);
|
|
|
|
offset = fdt_add_subnode(fdt, 0, nodename);
|
|
|
|
|
|
|
|
spapr_populate_cpu_dt(cs, fdt, offset, spapr);
|
|
|
|
g_free(nodename);
|
|
|
|
|
|
|
|
*fdt_offset = offset;
|
|
|
|
return fdt;
|
|
|
|
}
|
|
|
|
|
2017-07-13 02:45:35 +02:00
|
|
|
/* Callback to be called during DRC release. */
|
|
|
|
void spapr_core_release(DeviceState *dev)
|
2017-02-02 16:02:34 +01:00
|
|
|
{
|
2018-06-08 14:48:16 +02:00
|
|
|
HotplugHandler *hotplug_ctrl = qdev_get_hotplug_handler(dev);
|
|
|
|
|
|
|
|
/* Call the unplug handler chain. This can never fail. */
|
|
|
|
hotplug_handler_unplug(hotplug_ctrl, dev, &error_abort);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void spapr_core_unplug(HotplugHandler *hotplug_dev, DeviceState *dev)
|
|
|
|
{
|
|
|
|
MachineState *ms = MACHINE(hotplug_dev);
|
2017-06-14 15:29:19 +02:00
|
|
|
sPAPRMachineClass *smc = SPAPR_MACHINE_GET_CLASS(ms);
|
2017-02-02 16:02:34 +01:00
|
|
|
CPUCore *cc = CPU_CORE(dev);
|
2017-02-10 11:18:49 +01:00
|
|
|
CPUArchId *core_slot = spapr_find_cpu_slot(ms, cc->core_id, NULL);
|
2017-02-02 16:02:34 +01:00
|
|
|
|
2017-06-14 15:29:19 +02:00
|
|
|
if (smc->pre_2_10_has_unused_icps) {
|
|
|
|
sPAPRCPUCore *sc = SPAPR_CPU_CORE(OBJECT(dev));
|
|
|
|
int i;
|
|
|
|
|
|
|
|
for (i = 0; i < cc->nr_threads; i++) {
|
2017-11-20 10:19:54 +01:00
|
|
|
CPUState *cs = CPU(sc->threads[i]);
|
2017-06-14 15:29:19 +02:00
|
|
|
|
|
|
|
pre_2_10_vmstate_register_dummy_icp(cs->cpu_index);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2017-05-18 15:58:31 +02:00
|
|
|
assert(core_slot);
|
2017-02-10 11:18:49 +01:00
|
|
|
core_slot->cpu = NULL;
|
2017-02-02 16:02:34 +01:00
|
|
|
object_unparent(OBJECT(dev));
|
|
|
|
}
|
|
|
|
|
2017-02-02 16:02:35 +01:00
|
|
|
static
|
|
|
|
void spapr_core_unplug_request(HotplugHandler *hotplug_dev, DeviceState *dev,
|
|
|
|
Error **errp)
|
2017-02-02 16:02:34 +01:00
|
|
|
{
|
spapr: use spapr->vsmt to compute VCPU ids
Since the introduction of VSMT in 2.11, the spacing of VCPU ids
between cores is controllable through a machine property instead
of being only dictated by the SMT mode of the host:
cpu->vcpu_id = (cc->core_id * spapr->vsmt / smp_threads) + i
Until recently, the machine code would try to change the SMT mode
of the host to be equal to VSMT or exit. This allowed the rest of
the code to assume that kvmppc_smt_threads() == spapr->vsmt is
always true.
Recent commit "8904e5a75005 spapr: Adjust default VSMT value for
better migration compatibility" relaxed the rule. If the VSMT
mode cannot be set in KVM for some reasons, but the requested
CPU topology is compatible with the current SMT mode, then we
let the guest run with kvmppc_smt_threads() != spapr->vsmt.
This breaks quite a few places in the code, in particular when
calculating DRC indexes.
This is what happens on a POWER host with subcores-per-core=2 (ie,
supports up to SMT4) when passing the following topology:
-smp threads=4,maxcpus=16 \
-device host-spapr-cpu-core,core-id=4,id=core1 \
-device host-spapr-cpu-core,core-id=8,id=core2
qemu-system-ppc64: warning: Failed to set KVM's VSMT mode to 8 (errno -22)
This is expected since KVM is limited to SMT4, but the guest is started
anyway because this topology can run on SMT4 even with a VSMT8 spacing.
But when we look at the DT, things get nastier:
cpus {
...
ibm,drc-indexes = <0x4 0x10000000 0x10000004 0x10000008 0x1000000c>;
This means that we have the following association:
CPU core device | DRC | VCPU id
-----------------+------------+---------
boot core | 0x10000000 | 0
core1 | 0x10000004 | 4
core2 | 0x10000008 | 8
core3 | 0x1000000c | 12
But since the spacing of VCPU ids is 8, the DRC for core1 points to a
VCPU that doesn't exist, the DRC for core2 points to the first VCPU of
core1 and and so on...
...
PowerPC,POWER8@0 {
...
ibm,my-drc-index = <0x10000000>;
...
};
PowerPC,POWER8@8 {
...
ibm,my-drc-index = <0x10000008>;
...
};
PowerPC,POWER8@10 {
...
No ibm,my-drc-index property for this core since 0x10000010 doesn't
exist in ibm,drc-indexes above.
...
};
};
...
interrupt-controller {
...
ibm,interrupt-server-ranges = <0x0 0x10>;
With a spacing of 8, the highest VCPU id for the given topology should be:
16 * 8 / 4 = 32 and not 16
...
linux,phandle = <0x7e7323b8>;
interrupt-controller;
};
And CPU hot-plug/unplug is broken:
(qemu) device_del core1
pseries-hotplug-cpu: Cannot find CPU (drc index 10000004) to remove
(qemu) device_del core2
cpu 4 (hwid 8) Ready to die...
cpu 5 (hwid 9) Ready to die...
cpu 6 (hwid 10) Ready to die...
cpu 7 (hwid 11) Ready to die...
These are the VCPU ids of core1 actually
(qemu) device_add host-spapr-cpu-core,core-id=12,id=core3
(qemu) device_del core3
pseries-hotplug-cpu: Cannot find CPU (drc index 1000000c) to remove
This patches all the code in hw/ppc/spapr.c to assume the VSMT
spacing when manipulating VCPU ids.
Fixes: 8904e5a75005
Signed-off-by: Greg Kurz <groug@kaod.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2018-02-14 20:40:26 +01:00
|
|
|
sPAPRMachineState *spapr = SPAPR_MACHINE(OBJECT(hotplug_dev));
|
2017-02-10 11:18:49 +01:00
|
|
|
int index;
|
|
|
|
sPAPRDRConnector *drc;
|
|
|
|
CPUCore *cc = CPU_CORE(dev);
|
2017-02-02 16:02:34 +01:00
|
|
|
|
2017-02-10 11:18:49 +01:00
|
|
|
if (!spapr_find_cpu_slot(MACHINE(hotplug_dev), cc->core_id, &index)) {
|
|
|
|
error_setg(errp, "Unable to find CPU core with core-id: %d",
|
|
|
|
cc->core_id);
|
|
|
|
return;
|
|
|
|
}
|
2017-02-02 16:02:34 +01:00
|
|
|
if (index == 0) {
|
|
|
|
error_setg(errp, "Boot CPU core may not be unplugged");
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2018-02-14 20:40:53 +01:00
|
|
|
drc = spapr_drc_by_id(TYPE_SPAPR_DRC_CPU,
|
|
|
|
spapr_vcpu_id(spapr, cc->core_id));
|
2017-02-02 16:02:34 +01:00
|
|
|
g_assert(drc);
|
|
|
|
|
2017-07-04 13:07:14 +02:00
|
|
|
spapr_drc_detach(drc);
|
2017-02-02 16:02:34 +01:00
|
|
|
|
|
|
|
spapr_hotplug_req_remove_by_index(drc);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void spapr_core_plug(HotplugHandler *hotplug_dev, DeviceState *dev,
|
|
|
|
Error **errp)
|
|
|
|
{
|
|
|
|
sPAPRMachineState *spapr = SPAPR_MACHINE(OBJECT(hotplug_dev));
|
|
|
|
MachineClass *mc = MACHINE_GET_CLASS(spapr);
|
2017-06-14 15:29:19 +02:00
|
|
|
sPAPRMachineClass *smc = SPAPR_MACHINE_CLASS(mc);
|
2017-02-02 16:02:34 +01:00
|
|
|
sPAPRCPUCore *core = SPAPR_CPU_CORE(OBJECT(dev));
|
|
|
|
CPUCore *cc = CPU_CORE(dev);
|
2017-11-20 10:19:54 +01:00
|
|
|
CPUState *cs = CPU(core->threads[0]);
|
2017-02-02 16:02:34 +01:00
|
|
|
sPAPRDRConnector *drc;
|
|
|
|
Error *local_err = NULL;
|
2017-02-10 11:18:49 +01:00
|
|
|
CPUArchId *core_slot;
|
|
|
|
int index;
|
spapr: Treat devices added before inbound migration as coldplugged
When migrating a guest which has already had devices hotplugged,
libvirt typically starts the destination qemu with -incoming defer,
adds those hotplugged devices with qmp, then initiates the incoming
migration.
This causes problems for the management of spapr DRC state. Because
the device is treated as hotplugged, it goes into a DRC state for a
device immediately after it's plugged, but before the guest has
acknowledged its presence. However, chances are the guest on the
source machine *has* acknowledged the device's presence and configured
it.
If the source has fully configured the device, then DRC state won't be
sent in the migration stream: for maximum migration compatibility with
earlier versions we don't migrate DRCs in coldplug-equivalent state.
That means that the DRC effectively changes state over the migrate,
causing problems later on.
In addition, logging hotplug events for these devices isn't what we
want because a) those events should already have been issued on the
source host and b) the event queue should get wiped out by the
incoming state anyway.
In short, what we really want is to treat devices added before an
incoming migration as if they were coldplugged.
To do this, we first add a spapr_drc_hotplugged() helper which
determines if the device is hotplugged in the sense relevant for DRC
state management. We only send hotplug events when this is true.
Second, when we add a device which isn't hotplugged in this sense, we
force a reset of the DRC state - this ensures the DRC is in a
coldplug-equivalent state (there isn't usually a system reset between
these device adds and the incoming migration).
This is based on an earlier patch by Laurent Vivier, cleaned up and
extended.
Signed-off-by: Laurent Vivier <lvivier@redhat.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Reviewed-by: Greg Kurz <groug@kaod.org>
Tested-by: Daniel Barboza <danielhb@linux.vnet.ibm.com>
2017-06-09 13:08:10 +02:00
|
|
|
bool hotplugged = spapr_drc_hotplugged(dev);
|
2017-02-02 16:02:34 +01:00
|
|
|
|
2017-02-10 11:18:49 +01:00
|
|
|
core_slot = spapr_find_cpu_slot(MACHINE(hotplug_dev), cc->core_id, &index);
|
|
|
|
if (!core_slot) {
|
|
|
|
error_setg(errp, "Unable to find CPU core with core-id: %d",
|
|
|
|
cc->core_id);
|
|
|
|
return;
|
|
|
|
}
|
2018-02-14 20:40:53 +01:00
|
|
|
drc = spapr_drc_by_id(TYPE_SPAPR_DRC_CPU,
|
|
|
|
spapr_vcpu_id(spapr, cc->core_id));
|
2017-02-02 16:02:34 +01:00
|
|
|
|
2017-02-10 11:20:57 +01:00
|
|
|
g_assert(drc || !mc->has_hotpluggable_cpus);
|
2017-02-02 16:02:34 +01:00
|
|
|
|
|
|
|
if (drc) {
|
2017-07-12 11:48:39 +02:00
|
|
|
void *fdt;
|
|
|
|
int fdt_offset;
|
|
|
|
|
|
|
|
fdt = spapr_populate_hotplug_cpu_dt(cs, &fdt_offset, spapr);
|
|
|
|
|
2017-06-19 07:16:21 +02:00
|
|
|
spapr_drc_attach(drc, dev, fdt, fdt_offset, &local_err);
|
2017-02-02 16:02:34 +01:00
|
|
|
if (local_err) {
|
|
|
|
g_free(fdt);
|
|
|
|
error_propagate(errp, local_err);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
spapr: Treat devices added before inbound migration as coldplugged
When migrating a guest which has already had devices hotplugged,
libvirt typically starts the destination qemu with -incoming defer,
adds those hotplugged devices with qmp, then initiates the incoming
migration.
This causes problems for the management of spapr DRC state. Because
the device is treated as hotplugged, it goes into a DRC state for a
device immediately after it's plugged, but before the guest has
acknowledged its presence. However, chances are the guest on the
source machine *has* acknowledged the device's presence and configured
it.
If the source has fully configured the device, then DRC state won't be
sent in the migration stream: for maximum migration compatibility with
earlier versions we don't migrate DRCs in coldplug-equivalent state.
That means that the DRC effectively changes state over the migrate,
causing problems later on.
In addition, logging hotplug events for these devices isn't what we
want because a) those events should already have been issued on the
source host and b) the event queue should get wiped out by the
incoming state anyway.
In short, what we really want is to treat devices added before an
incoming migration as if they were coldplugged.
To do this, we first add a spapr_drc_hotplugged() helper which
determines if the device is hotplugged in the sense relevant for DRC
state management. We only send hotplug events when this is true.
Second, when we add a device which isn't hotplugged in this sense, we
force a reset of the DRC state - this ensures the DRC is in a
coldplug-equivalent state (there isn't usually a system reset between
these device adds and the incoming migration).
This is based on an earlier patch by Laurent Vivier, cleaned up and
extended.
Signed-off-by: Laurent Vivier <lvivier@redhat.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Reviewed-by: Greg Kurz <groug@kaod.org>
Tested-by: Daniel Barboza <danielhb@linux.vnet.ibm.com>
2017-06-09 13:08:10 +02:00
|
|
|
if (hotplugged) {
|
|
|
|
/*
|
|
|
|
* Send hotplug notification interrupt to the guest only
|
|
|
|
* in case of hotplugged CPUs.
|
|
|
|
*/
|
|
|
|
spapr_hotplug_req_add_by_index(drc);
|
|
|
|
} else {
|
|
|
|
spapr_drc_reset(drc);
|
|
|
|
}
|
2017-02-02 16:02:34 +01:00
|
|
|
}
|
spapr: Treat devices added before inbound migration as coldplugged
When migrating a guest which has already had devices hotplugged,
libvirt typically starts the destination qemu with -incoming defer,
adds those hotplugged devices with qmp, then initiates the incoming
migration.
This causes problems for the management of spapr DRC state. Because
the device is treated as hotplugged, it goes into a DRC state for a
device immediately after it's plugged, but before the guest has
acknowledged its presence. However, chances are the guest on the
source machine *has* acknowledged the device's presence and configured
it.
If the source has fully configured the device, then DRC state won't be
sent in the migration stream: for maximum migration compatibility with
earlier versions we don't migrate DRCs in coldplug-equivalent state.
That means that the DRC effectively changes state over the migrate,
causing problems later on.
In addition, logging hotplug events for these devices isn't what we
want because a) those events should already have been issued on the
source host and b) the event queue should get wiped out by the
incoming state anyway.
In short, what we really want is to treat devices added before an
incoming migration as if they were coldplugged.
To do this, we first add a spapr_drc_hotplugged() helper which
determines if the device is hotplugged in the sense relevant for DRC
state management. We only send hotplug events when this is true.
Second, when we add a device which isn't hotplugged in this sense, we
force a reset of the DRC state - this ensures the DRC is in a
coldplug-equivalent state (there isn't usually a system reset between
these device adds and the incoming migration).
This is based on an earlier patch by Laurent Vivier, cleaned up and
extended.
Signed-off-by: Laurent Vivier <lvivier@redhat.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Reviewed-by: Greg Kurz <groug@kaod.org>
Tested-by: Daniel Barboza <danielhb@linux.vnet.ibm.com>
2017-06-09 13:08:10 +02:00
|
|
|
|
2017-02-10 11:18:49 +01:00
|
|
|
core_slot->cpu = OBJECT(dev);
|
2017-06-14 15:29:19 +02:00
|
|
|
|
|
|
|
if (smc->pre_2_10_has_unused_icps) {
|
|
|
|
int i;
|
|
|
|
|
|
|
|
for (i = 0; i < cc->nr_threads; i++) {
|
2018-01-17 10:20:27 +01:00
|
|
|
cs = CPU(core->threads[i]);
|
2017-06-14 15:29:19 +02:00
|
|
|
pre_2_10_vmstate_unregister_dummy_icp(cs->cpu_index);
|
|
|
|
}
|
|
|
|
}
|
2017-02-02 16:02:34 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
static void spapr_core_pre_plug(HotplugHandler *hotplug_dev, DeviceState *dev,
|
|
|
|
Error **errp)
|
|
|
|
{
|
|
|
|
MachineState *machine = MACHINE(OBJECT(hotplug_dev));
|
|
|
|
MachineClass *mc = MACHINE_GET_CLASS(hotplug_dev);
|
|
|
|
Error *local_err = NULL;
|
|
|
|
CPUCore *cc = CPU_CORE(dev);
|
2017-10-09 21:51:05 +02:00
|
|
|
const char *base_core_type = spapr_get_cpu_core_type(machine->cpu_type);
|
2017-02-02 16:02:34 +01:00
|
|
|
const char *type = object_get_typename(OBJECT(dev));
|
2017-02-10 11:18:49 +01:00
|
|
|
CPUArchId *core_slot;
|
|
|
|
int index;
|
2017-02-02 16:02:34 +01:00
|
|
|
|
2017-02-10 11:20:57 +01:00
|
|
|
if (dev->hotplugged && !mc->has_hotpluggable_cpus) {
|
2017-02-02 16:02:34 +01:00
|
|
|
error_setg(&local_err, "CPU hotplug not supported for this machine");
|
|
|
|
goto out;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (strcmp(base_core_type, type)) {
|
|
|
|
error_setg(&local_err, "CPU core type should be %s", base_core_type);
|
|
|
|
goto out;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (cc->core_id % smp_threads) {
|
|
|
|
error_setg(&local_err, "invalid core id %d", cc->core_id);
|
|
|
|
goto out;
|
|
|
|
}
|
|
|
|
|
2017-05-23 08:33:06 +02:00
|
|
|
/*
|
|
|
|
* In general we should have homogeneous threads-per-core, but old
|
|
|
|
* (pre hotplug support) machine types allow the last core to have
|
|
|
|
* reduced threads as a compatibility hack for when we allowed
|
|
|
|
* total vcpus not a multiple of threads-per-core.
|
|
|
|
*/
|
|
|
|
if (mc->has_hotpluggable_cpus && (cc->nr_threads != smp_threads)) {
|
2017-07-14 09:50:40 +02:00
|
|
|
error_setg(&local_err, "invalid nr-threads %d, must be %d",
|
2017-04-02 08:14:30 +02:00
|
|
|
cc->nr_threads, smp_threads);
|
2017-07-14 09:50:40 +02:00
|
|
|
goto out;
|
2017-04-02 08:14:30 +02:00
|
|
|
}
|
|
|
|
|
2017-02-10 11:18:49 +01:00
|
|
|
core_slot = spapr_find_cpu_slot(MACHINE(hotplug_dev), cc->core_id, &index);
|
|
|
|
if (!core_slot) {
|
2017-02-02 16:02:34 +01:00
|
|
|
error_setg(&local_err, "core id %d out of range", cc->core_id);
|
|
|
|
goto out;
|
|
|
|
}
|
|
|
|
|
2017-02-10 11:18:49 +01:00
|
|
|
if (core_slot->cpu) {
|
2017-02-02 16:02:34 +01:00
|
|
|
error_setg(&local_err, "core %d already populated", cc->core_id);
|
|
|
|
goto out;
|
|
|
|
}
|
|
|
|
|
2017-05-30 18:23:56 +02:00
|
|
|
numa_cpu_pre_plug(core_slot, dev, &local_err);
|
2017-05-10 13:29:46 +02:00
|
|
|
|
2017-02-02 16:02:34 +01:00
|
|
|
out:
|
|
|
|
error_propagate(errp, local_err);
|
|
|
|
}
|
|
|
|
|
2015-09-01 03:22:35 +02:00
|
|
|
static void spapr_machine_device_plug(HotplugHandler *hotplug_dev,
|
|
|
|
DeviceState *dev, Error **errp)
|
|
|
|
{
|
|
|
|
if (object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) {
|
2018-06-08 14:48:12 +02:00
|
|
|
spapr_memory_plug(hotplug_dev, dev, errp);
|
2016-06-10 02:59:04 +02:00
|
|
|
} else if (object_dynamic_cast(OBJECT(dev), TYPE_SPAPR_CPU_CORE)) {
|
|
|
|
spapr_core_plug(hotplug_dev, dev, errp);
|
2015-09-01 03:22:35 +02:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2018-06-08 14:48:14 +02:00
|
|
|
static void spapr_machine_device_unplug(HotplugHandler *hotplug_dev,
|
|
|
|
DeviceState *dev, Error **errp)
|
|
|
|
{
|
2018-06-08 14:48:15 +02:00
|
|
|
if (object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) {
|
|
|
|
spapr_memory_unplug(hotplug_dev, dev);
|
2018-06-08 14:48:16 +02:00
|
|
|
} else if (object_dynamic_cast(OBJECT(dev), TYPE_SPAPR_CPU_CORE)) {
|
|
|
|
spapr_core_unplug(hotplug_dev, dev);
|
2018-06-08 14:48:15 +02:00
|
|
|
}
|
2018-06-08 14:48:14 +02:00
|
|
|
}
|
|
|
|
|
2016-10-27 04:20:30 +02:00
|
|
|
static void spapr_machine_device_unplug_request(HotplugHandler *hotplug_dev,
|
|
|
|
DeviceState *dev, Error **errp)
|
|
|
|
{
|
2017-09-06 20:43:05 +02:00
|
|
|
sPAPRMachineState *sms = SPAPR_MACHINE(OBJECT(hotplug_dev));
|
|
|
|
MachineClass *mc = MACHINE_GET_CLASS(sms);
|
2016-10-27 04:20:30 +02:00
|
|
|
|
|
|
|
if (object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) {
|
|
|
|
if (spapr_ovec_test(sms->ov5_cas, OV5_HP_EVT)) {
|
|
|
|
spapr_memory_unplug_request(hotplug_dev, dev, errp);
|
|
|
|
} else {
|
|
|
|
/* NOTE: this means there is a window after guest reset, prior to
|
|
|
|
* CAS negotiation, where unplug requests will fail due to the
|
|
|
|
* capability not being detected yet. This is a bit different than
|
|
|
|
* the case with PCI unplug, where the events will be queued and
|
|
|
|
* eventually handled by the guest after boot
|
|
|
|
*/
|
|
|
|
error_setg(errp, "Memory hot unplug not supported for this guest");
|
|
|
|
}
|
2016-06-10 02:59:05 +02:00
|
|
|
} else if (object_dynamic_cast(OBJECT(dev), TYPE_SPAPR_CPU_CORE)) {
|
2017-02-10 11:20:57 +01:00
|
|
|
if (!mc->has_hotpluggable_cpus) {
|
2016-06-10 02:59:05 +02:00
|
|
|
error_setg(errp, "CPU hot unplug not supported on this machine");
|
|
|
|
return;
|
|
|
|
}
|
2017-02-02 16:02:35 +01:00
|
|
|
spapr_core_unplug_request(hotplug_dev, dev, errp);
|
2015-09-01 03:22:35 +02:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2016-06-10 02:59:03 +02:00
|
|
|
static void spapr_machine_device_pre_plug(HotplugHandler *hotplug_dev,
|
|
|
|
DeviceState *dev, Error **errp)
|
|
|
|
{
|
2017-05-23 13:18:09 +02:00
|
|
|
if (object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) {
|
|
|
|
spapr_memory_pre_plug(hotplug_dev, dev, errp);
|
|
|
|
} else if (object_dynamic_cast(OBJECT(dev), TYPE_SPAPR_CPU_CORE)) {
|
2016-06-10 02:59:03 +02:00
|
|
|
spapr_core_pre_plug(hotplug_dev, dev, errp);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2016-09-12 09:57:20 +02:00
|
|
|
static HotplugHandler *spapr_get_hotplug_handler(MachineState *machine,
|
|
|
|
DeviceState *dev)
|
2015-09-01 03:22:35 +02:00
|
|
|
{
|
2016-06-10 02:59:03 +02:00
|
|
|
if (object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM) ||
|
|
|
|
object_dynamic_cast(OBJECT(dev), TYPE_SPAPR_CPU_CORE)) {
|
2015-09-01 03:22:35 +02:00
|
|
|
return HOTPLUG_HANDLER(machine);
|
|
|
|
}
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
|
2017-05-10 13:29:45 +02:00
|
|
|
static CpuInstanceProperties
|
|
|
|
spapr_cpu_index_to_props(MachineState *machine, unsigned cpu_index)
|
2015-09-08 03:21:52 +02:00
|
|
|
{
|
2017-05-10 13:29:45 +02:00
|
|
|
CPUArchId *core_slot;
|
|
|
|
MachineClass *mc = MACHINE_GET_CLASS(machine);
|
|
|
|
|
|
|
|
/* make sure possible_cpu are intialized */
|
|
|
|
mc->possible_cpu_arch_ids(machine);
|
|
|
|
/* get CPU core slot containing thread that matches cpu_index */
|
|
|
|
core_slot = spapr_find_cpu_slot(machine, cpu_index, NULL);
|
|
|
|
assert(core_slot);
|
|
|
|
return core_slot->props;
|
2015-09-08 03:21:52 +02:00
|
|
|
}
|
|
|
|
|
2017-06-01 12:53:28 +02:00
|
|
|
static int64_t spapr_get_default_cpu_node_id(const MachineState *ms, int idx)
|
|
|
|
{
|
|
|
|
return idx / smp_cores % nb_numa_nodes;
|
|
|
|
}
|
|
|
|
|
2017-02-10 11:18:49 +01:00
|
|
|
static const CPUArchIdList *spapr_possible_cpu_arch_ids(MachineState *machine)
|
|
|
|
{
|
|
|
|
int i;
|
2018-01-10 16:22:50 +01:00
|
|
|
const char *core_type;
|
2017-02-10 11:18:49 +01:00
|
|
|
int spapr_max_cores = max_cpus / smp_threads;
|
|
|
|
MachineClass *mc = MACHINE_GET_CLASS(machine);
|
|
|
|
|
2017-02-10 11:20:57 +01:00
|
|
|
if (!mc->has_hotpluggable_cpus) {
|
2017-02-10 11:18:49 +01:00
|
|
|
spapr_max_cores = QEMU_ALIGN_UP(smp_cpus, smp_threads) / smp_threads;
|
|
|
|
}
|
|
|
|
if (machine->possible_cpus) {
|
|
|
|
assert(machine->possible_cpus->len == spapr_max_cores);
|
|
|
|
return machine->possible_cpus;
|
|
|
|
}
|
|
|
|
|
2018-01-10 16:22:50 +01:00
|
|
|
core_type = spapr_get_cpu_core_type(machine->cpu_type);
|
|
|
|
if (!core_type) {
|
|
|
|
error_report("Unable to find sPAPR CPU Core definition");
|
|
|
|
exit(1);
|
|
|
|
}
|
|
|
|
|
2017-02-10 11:18:49 +01:00
|
|
|
machine->possible_cpus = g_malloc0(sizeof(CPUArchIdList) +
|
|
|
|
sizeof(CPUArchId) * spapr_max_cores);
|
|
|
|
machine->possible_cpus->len = spapr_max_cores;
|
|
|
|
for (i = 0; i < machine->possible_cpus->len; i++) {
|
|
|
|
int core_id = i * smp_threads;
|
|
|
|
|
2018-01-10 16:22:50 +01:00
|
|
|
machine->possible_cpus->cpus[i].type = core_type;
|
2017-02-09 12:08:38 +01:00
|
|
|
machine->possible_cpus->cpus[i].vcpus_count = smp_threads;
|
2017-02-10 11:18:49 +01:00
|
|
|
machine->possible_cpus->cpus[i].arch_id = core_id;
|
|
|
|
machine->possible_cpus->cpus[i].props.has_core_id = true;
|
|
|
|
machine->possible_cpus->cpus[i].props.core_id = core_id;
|
|
|
|
}
|
|
|
|
return machine->possible_cpus;
|
|
|
|
}
|
|
|
|
|
spapr_pci: Delegate placement of PCI host bridges to machine type
The 'spapr-pci-host-bridge' represents the virtual PCI host bridge (PHB)
for a PAPR guest. Unlike on x86, it's routine on Power (both bare metal
and PAPR guests) to have numerous independent PHBs, each controlling a
separate PCI domain.
There are two ways of configuring the spapr-pci-host-bridge device: first
it can be done fully manually, specifying the locations and sizes of all
the IO windows. This gives the most control, but is very awkward with 6
mandatory parameters. Alternatively just an "index" can be specified
which essentially selects from an array of predefined PHB locations.
The PHB at index 0 is automatically created as the default PHB.
The current set of default locations causes some problems for guests with
large RAM (> 1 TiB) or PCI devices with very large BARs (e.g. big nVidia
GPGPU cards via VFIO). Obviously, for migration we can only change the
locations on a new machine type, however.
This is awkward, because the placement is currently decided within the
spapr-pci-host-bridge code, so it breaks abstraction to look inside the
machine type version.
So, this patch delegates the "default mode" PHB placement from the
spapr-pci-host-bridge device back to the machine type via a public method
in sPAPRMachineClass. It's still a bit ugly, but it's about the best we
can do.
For now, this just changes where the calculation is done. It doesn't
change the actual location of the host bridges, or any other behaviour.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Reviewed-by: Laurent Vivier <lvivier@redhat.com>
2016-10-13 01:26:09 +02:00
|
|
|
static void spapr_phb_placement(sPAPRMachineState *spapr, uint32_t index,
|
spapr_pci: Add a 64-bit MMIO window
On real hardware, and under pHyp, the PCI host bridges on Power machines
typically advertise two outbound MMIO windows from the guest's physical
memory space to PCI memory space:
- A 32-bit window which maps onto 2GiB..4GiB in the PCI address space
- A 64-bit window which maps onto a large region somewhere high in PCI
address space (traditionally this used an identity mapping from guest
physical address to PCI address, but that's not always the case)
The qemu implementation in spapr-pci-host-bridge, however, only supports a
single outbound MMIO window, however. At least some Linux versions expect
the two windows however, so we arranged this window to map onto the PCI
memory space from 2 GiB..~64 GiB, then advertised it as two contiguous
windows, the "32-bit" window from 2G..4G and the "64-bit" window from
4G..~64G.
This approach means, however, that the 64G window is not naturally aligned.
In turn this limits the size of the largest BAR we can map (which does have
to be naturally aligned) to roughly half of the total window. With some
large nVidia GPGPU cards which have huge memory BARs, this is starting to
be a problem.
This patch adds true support for separate 32-bit and 64-bit outbound MMIO
windows to the spapr-pci-host-bridge implementation, each of which can
be independently configured. The 32-bit window always maps to 2G.. in PCI
space, but the PCI address of the 64-bit window can be configured (it
defaults to the same as the guest physical address).
So as not to break possible existing configurations, as long as a 64-bit
window is not specified, a large single window can be specified. This
will appear the same way to the guest as the old approach, although it's
now implemented by two contiguous memory regions rather than a single one.
For now, this only adds the possibility of 64-bit windows. The default
configuration still uses the legacy mode.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Reviewed-by: Laurent Vivier <lvivier@redhat.com>
2016-10-11 05:23:33 +02:00
|
|
|
uint64_t *buid, hwaddr *pio,
|
|
|
|
hwaddr *mmio32, hwaddr *mmio64,
|
spapr_pci: Delegate placement of PCI host bridges to machine type
The 'spapr-pci-host-bridge' represents the virtual PCI host bridge (PHB)
for a PAPR guest. Unlike on x86, it's routine on Power (both bare metal
and PAPR guests) to have numerous independent PHBs, each controlling a
separate PCI domain.
There are two ways of configuring the spapr-pci-host-bridge device: first
it can be done fully manually, specifying the locations and sizes of all
the IO windows. This gives the most control, but is very awkward with 6
mandatory parameters. Alternatively just an "index" can be specified
which essentially selects from an array of predefined PHB locations.
The PHB at index 0 is automatically created as the default PHB.
The current set of default locations causes some problems for guests with
large RAM (> 1 TiB) or PCI devices with very large BARs (e.g. big nVidia
GPGPU cards via VFIO). Obviously, for migration we can only change the
locations on a new machine type, however.
This is awkward, because the placement is currently decided within the
spapr-pci-host-bridge code, so it breaks abstraction to look inside the
machine type version.
So, this patch delegates the "default mode" PHB placement from the
spapr-pci-host-bridge device back to the machine type via a public method
in sPAPRMachineClass. It's still a bit ugly, but it's about the best we
can do.
For now, this just changes where the calculation is done. It doesn't
change the actual location of the host bridges, or any other behaviour.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Reviewed-by: Laurent Vivier <lvivier@redhat.com>
2016-10-13 01:26:09 +02:00
|
|
|
unsigned n_dma, uint32_t *liobns, Error **errp)
|
|
|
|
{
|
2016-10-16 03:04:15 +02:00
|
|
|
/*
|
|
|
|
* New-style PHB window placement.
|
|
|
|
*
|
|
|
|
* Goals: Gives large (1TiB), naturally aligned 64-bit MMIO window
|
|
|
|
* for each PHB, in addition to 2GiB 32-bit MMIO and 64kiB PIO
|
|
|
|
* windows.
|
|
|
|
*
|
|
|
|
* Some guest kernels can't work with MMIO windows above 1<<46
|
|
|
|
* (64TiB), so we place up to 31 PHBs in the area 32TiB..64TiB
|
|
|
|
*
|
|
|
|
* 32TiB..(33TiB+1984kiB) contains the 64kiB PIO windows for each
|
|
|
|
* PHB stacked together. (32TiB+2GiB)..(32TiB+64GiB) contains the
|
|
|
|
* 2GiB 32-bit MMIO windows for each PHB. Then 33..64TiB has the
|
|
|
|
* 1TiB 64-bit MMIO windows for each PHB.
|
|
|
|
*/
|
spapr_pci: Delegate placement of PCI host bridges to machine type
The 'spapr-pci-host-bridge' represents the virtual PCI host bridge (PHB)
for a PAPR guest. Unlike on x86, it's routine on Power (both bare metal
and PAPR guests) to have numerous independent PHBs, each controlling a
separate PCI domain.
There are two ways of configuring the spapr-pci-host-bridge device: first
it can be done fully manually, specifying the locations and sizes of all
the IO windows. This gives the most control, but is very awkward with 6
mandatory parameters. Alternatively just an "index" can be specified
which essentially selects from an array of predefined PHB locations.
The PHB at index 0 is automatically created as the default PHB.
The current set of default locations causes some problems for guests with
large RAM (> 1 TiB) or PCI devices with very large BARs (e.g. big nVidia
GPGPU cards via VFIO). Obviously, for migration we can only change the
locations on a new machine type, however.
This is awkward, because the placement is currently decided within the
spapr-pci-host-bridge code, so it breaks abstraction to look inside the
machine type version.
So, this patch delegates the "default mode" PHB placement from the
spapr-pci-host-bridge device back to the machine type via a public method
in sPAPRMachineClass. It's still a bit ugly, but it's about the best we
can do.
For now, this just changes where the calculation is done. It doesn't
change the actual location of the host bridges, or any other behaviour.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Reviewed-by: Laurent Vivier <lvivier@redhat.com>
2016-10-13 01:26:09 +02:00
|
|
|
const uint64_t base_buid = 0x800000020000000ULL;
|
2017-01-27 17:27:16 +01:00
|
|
|
#define SPAPR_MAX_PHBS ((SPAPR_PCI_LIMIT - SPAPR_PCI_BASE) / \
|
|
|
|
SPAPR_PCI_MEM64_WIN_SIZE - 1)
|
spapr_pci: Delegate placement of PCI host bridges to machine type
The 'spapr-pci-host-bridge' represents the virtual PCI host bridge (PHB)
for a PAPR guest. Unlike on x86, it's routine on Power (both bare metal
and PAPR guests) to have numerous independent PHBs, each controlling a
separate PCI domain.
There are two ways of configuring the spapr-pci-host-bridge device: first
it can be done fully manually, specifying the locations and sizes of all
the IO windows. This gives the most control, but is very awkward with 6
mandatory parameters. Alternatively just an "index" can be specified
which essentially selects from an array of predefined PHB locations.
The PHB at index 0 is automatically created as the default PHB.
The current set of default locations causes some problems for guests with
large RAM (> 1 TiB) or PCI devices with very large BARs (e.g. big nVidia
GPGPU cards via VFIO). Obviously, for migration we can only change the
locations on a new machine type, however.
This is awkward, because the placement is currently decided within the
spapr-pci-host-bridge code, so it breaks abstraction to look inside the
machine type version.
So, this patch delegates the "default mode" PHB placement from the
spapr-pci-host-bridge device back to the machine type via a public method
in sPAPRMachineClass. It's still a bit ugly, but it's about the best we
can do.
For now, this just changes where the calculation is done. It doesn't
change the actual location of the host bridges, or any other behaviour.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Reviewed-by: Laurent Vivier <lvivier@redhat.com>
2016-10-13 01:26:09 +02:00
|
|
|
int i;
|
|
|
|
|
2016-10-16 03:04:15 +02:00
|
|
|
/* Sanity check natural alignments */
|
|
|
|
QEMU_BUILD_BUG_ON((SPAPR_PCI_BASE % SPAPR_PCI_MEM64_WIN_SIZE) != 0);
|
|
|
|
QEMU_BUILD_BUG_ON((SPAPR_PCI_LIMIT % SPAPR_PCI_MEM64_WIN_SIZE) != 0);
|
|
|
|
QEMU_BUILD_BUG_ON((SPAPR_PCI_MEM64_WIN_SIZE % SPAPR_PCI_MEM32_WIN_SIZE) != 0);
|
|
|
|
QEMU_BUILD_BUG_ON((SPAPR_PCI_MEM32_WIN_SIZE % SPAPR_PCI_IO_WIN_SIZE) != 0);
|
|
|
|
/* Sanity check bounds */
|
2017-01-27 17:27:16 +01:00
|
|
|
QEMU_BUILD_BUG_ON((SPAPR_MAX_PHBS * SPAPR_PCI_IO_WIN_SIZE) >
|
|
|
|
SPAPR_PCI_MEM32_WIN_SIZE);
|
|
|
|
QEMU_BUILD_BUG_ON((SPAPR_MAX_PHBS * SPAPR_PCI_MEM32_WIN_SIZE) >
|
|
|
|
SPAPR_PCI_MEM64_WIN_SIZE);
|
|
|
|
|
|
|
|
if (index >= SPAPR_MAX_PHBS) {
|
|
|
|
error_setg(errp, "\"index\" for PAPR PHB is too large (max %llu)",
|
|
|
|
SPAPR_MAX_PHBS - 1);
|
spapr_pci: Delegate placement of PCI host bridges to machine type
The 'spapr-pci-host-bridge' represents the virtual PCI host bridge (PHB)
for a PAPR guest. Unlike on x86, it's routine on Power (both bare metal
and PAPR guests) to have numerous independent PHBs, each controlling a
separate PCI domain.
There are two ways of configuring the spapr-pci-host-bridge device: first
it can be done fully manually, specifying the locations and sizes of all
the IO windows. This gives the most control, but is very awkward with 6
mandatory parameters. Alternatively just an "index" can be specified
which essentially selects from an array of predefined PHB locations.
The PHB at index 0 is automatically created as the default PHB.
The current set of default locations causes some problems for guests with
large RAM (> 1 TiB) or PCI devices with very large BARs (e.g. big nVidia
GPGPU cards via VFIO). Obviously, for migration we can only change the
locations on a new machine type, however.
This is awkward, because the placement is currently decided within the
spapr-pci-host-bridge code, so it breaks abstraction to look inside the
machine type version.
So, this patch delegates the "default mode" PHB placement from the
spapr-pci-host-bridge device back to the machine type via a public method
in sPAPRMachineClass. It's still a bit ugly, but it's about the best we
can do.
For now, this just changes where the calculation is done. It doesn't
change the actual location of the host bridges, or any other behaviour.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Reviewed-by: Laurent Vivier <lvivier@redhat.com>
2016-10-13 01:26:09 +02:00
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
*buid = base_buid + index;
|
|
|
|
for (i = 0; i < n_dma; ++i) {
|
|
|
|
liobns[i] = SPAPR_PCI_LIOBN(index, i);
|
|
|
|
}
|
|
|
|
|
2016-10-16 03:04:15 +02:00
|
|
|
*pio = SPAPR_PCI_BASE + index * SPAPR_PCI_IO_WIN_SIZE;
|
|
|
|
*mmio32 = SPAPR_PCI_BASE + (index + 1) * SPAPR_PCI_MEM32_WIN_SIZE;
|
|
|
|
*mmio64 = SPAPR_PCI_BASE + (index + 1) * SPAPR_PCI_MEM64_WIN_SIZE;
|
spapr_pci: Delegate placement of PCI host bridges to machine type
The 'spapr-pci-host-bridge' represents the virtual PCI host bridge (PHB)
for a PAPR guest. Unlike on x86, it's routine on Power (both bare metal
and PAPR guests) to have numerous independent PHBs, each controlling a
separate PCI domain.
There are two ways of configuring the spapr-pci-host-bridge device: first
it can be done fully manually, specifying the locations and sizes of all
the IO windows. This gives the most control, but is very awkward with 6
mandatory parameters. Alternatively just an "index" can be specified
which essentially selects from an array of predefined PHB locations.
The PHB at index 0 is automatically created as the default PHB.
The current set of default locations causes some problems for guests with
large RAM (> 1 TiB) or PCI devices with very large BARs (e.g. big nVidia
GPGPU cards via VFIO). Obviously, for migration we can only change the
locations on a new machine type, however.
This is awkward, because the placement is currently decided within the
spapr-pci-host-bridge code, so it breaks abstraction to look inside the
machine type version.
So, this patch delegates the "default mode" PHB placement from the
spapr-pci-host-bridge device back to the machine type via a public method
in sPAPRMachineClass. It's still a bit ugly, but it's about the best we
can do.
For now, this just changes where the calculation is done. It doesn't
change the actual location of the host bridges, or any other behaviour.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Reviewed-by: Laurent Vivier <lvivier@redhat.com>
2016-10-13 01:26:09 +02:00
|
|
|
}
|
|
|
|
|
2017-02-27 15:29:15 +01:00
|
|
|
static ICSState *spapr_ics_get(XICSFabric *dev, int irq)
|
|
|
|
{
|
|
|
|
sPAPRMachineState *spapr = SPAPR_MACHINE(dev);
|
|
|
|
|
|
|
|
return ics_valid_irq(spapr->ics, irq) ? spapr->ics : NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void spapr_ics_resend(XICSFabric *dev)
|
|
|
|
{
|
|
|
|
sPAPRMachineState *spapr = SPAPR_MACHINE(dev);
|
|
|
|
|
|
|
|
ics_resend(spapr->ics);
|
|
|
|
}
|
|
|
|
|
2017-08-03 08:28:44 +02:00
|
|
|
static ICPState *spapr_icp_get(XICSFabric *xi, int vcpu_id)
|
2017-02-27 15:29:21 +01:00
|
|
|
{
|
2017-08-09 07:38:56 +02:00
|
|
|
PowerPCCPU *cpu = spapr_find_cpu(vcpu_id);
|
2017-02-27 15:29:21 +01:00
|
|
|
|
2017-04-03 09:45:58 +02:00
|
|
|
return cpu ? ICP(cpu->intc) : NULL;
|
2017-02-27 15:29:21 +01:00
|
|
|
}
|
|
|
|
|
2017-02-27 15:29:32 +01:00
|
|
|
static void spapr_pic_print_info(InterruptStatsProvider *obj,
|
|
|
|
Monitor *mon)
|
|
|
|
{
|
|
|
|
sPAPRMachineState *spapr = SPAPR_MACHINE(obj);
|
2018-07-30 16:11:33 +02:00
|
|
|
sPAPRMachineClass *smc = SPAPR_MACHINE_GET_CLASS(spapr);
|
2017-02-27 15:29:32 +01:00
|
|
|
|
2018-07-30 16:11:33 +02:00
|
|
|
smc->irq->print_info(spapr, mon);
|
2017-02-27 15:29:32 +01:00
|
|
|
}
|
|
|
|
|
2018-02-14 20:40:44 +01:00
|
|
|
int spapr_get_vcpu_id(PowerPCCPU *cpu)
|
2017-08-09 07:38:56 +02:00
|
|
|
{
|
spapr: fix missing CPU core nodes in DT when running with TCG
Commit 5d0fb1508e2d "spapr: consolidate the VCPU id numbering logic
in a single place" introduced a helper to detect thread0 of a virtual
core based on its VCPU id. This is used to create CPU core nodes in
the DT, but it is broken in TCG.
$ qemu-system-ppc64 -nographic -accel tcg -machine dumpdtb=dtb.bin \
-smp cores=16,maxcpus=16,threads=1
$ dtc -f -O dts dtb.bin | grep POWER8
PowerPC,POWER8@0 {
PowerPC,POWER8@8 {
instead of the expected 16 cores that we get with KVM:
$ dtc -f -O dts dtb.bin | grep POWER8
PowerPC,POWER8@0 {
PowerPC,POWER8@8 {
PowerPC,POWER8@10 {
PowerPC,POWER8@18 {
PowerPC,POWER8@20 {
PowerPC,POWER8@28 {
PowerPC,POWER8@30 {
PowerPC,POWER8@38 {
PowerPC,POWER8@40 {
PowerPC,POWER8@48 {
PowerPC,POWER8@50 {
PowerPC,POWER8@58 {
PowerPC,POWER8@60 {
PowerPC,POWER8@68 {
PowerPC,POWER8@70 {
PowerPC,POWER8@78 {
This happens because spapr_get_vcpu_id() maps VCPU ids to
cs->cpu_index in TCG mode. This confuses the code in
spapr_is_thread0_in_vcore(), since it assumes thread0 VCPU
ids to have a spapr->vsmt spacing.
spapr_get_vcpu_id(cpu) % spapr->vsmt == 0
Actually, there's no real reason to expose cs->cpu_index instead
of the VCPU id, since we also generate it with TCG. Also we already
set it explicitly in spapr_set_vcpu_id(), so there's no real reason
either to call kvm_arch_vcpu_id() with KVM.
This patch unifies spapr_get_vcpu_id() to always return the computed
VCPU id both in TCG and KVM. This is one step forward towards KVM<->TCG
migration.
Fixes: 5d0fb1508e2d
Reported-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Greg Kurz <groug@kaod.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2018-02-16 19:58:06 +01:00
|
|
|
return cpu->vcpu_id;
|
2017-08-09 07:38:56 +02:00
|
|
|
}
|
|
|
|
|
2018-02-14 20:40:35 +01:00
|
|
|
void spapr_set_vcpu_id(PowerPCCPU *cpu, int cpu_index, Error **errp)
|
|
|
|
{
|
|
|
|
sPAPRMachineState *spapr = SPAPR_MACHINE(qdev_get_machine());
|
|
|
|
int vcpu_id;
|
|
|
|
|
2018-02-14 20:40:53 +01:00
|
|
|
vcpu_id = spapr_vcpu_id(spapr, cpu_index);
|
2018-02-14 20:40:35 +01:00
|
|
|
|
|
|
|
if (kvm_enabled() && !kvm_vcpu_id_is_valid(vcpu_id)) {
|
|
|
|
error_setg(errp, "Can't create CPU with id %d in KVM", vcpu_id);
|
|
|
|
error_append_hint(errp, "Adjust the number of cpus to %d "
|
|
|
|
"or try to raise the number of threads per core\n",
|
|
|
|
vcpu_id * smp_threads / spapr->vsmt);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
cpu->vcpu_id = vcpu_id;
|
|
|
|
}
|
|
|
|
|
2017-08-09 07:38:56 +02:00
|
|
|
PowerPCCPU *spapr_find_cpu(int vcpu_id)
|
|
|
|
{
|
|
|
|
CPUState *cs;
|
|
|
|
|
|
|
|
CPU_FOREACH(cs) {
|
|
|
|
PowerPCCPU *cpu = POWERPC_CPU(cs);
|
|
|
|
|
2018-02-14 20:40:44 +01:00
|
|
|
if (spapr_get_vcpu_id(cpu) == vcpu_id) {
|
2017-08-09 07:38:56 +02:00
|
|
|
return cpu;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
|
2014-03-17 03:40:26 +01:00
|
|
|
static void spapr_machine_class_init(ObjectClass *oc, void *data)
|
|
|
|
{
|
|
|
|
MachineClass *mc = MACHINE_CLASS(oc);
|
2015-08-12 05:16:48 +02:00
|
|
|
sPAPRMachineClass *smc = SPAPR_MACHINE_CLASS(oc);
|
2014-03-17 03:40:27 +01:00
|
|
|
FWPathProviderClass *fwc = FW_PATH_PROVIDER_CLASS(oc);
|
2014-08-20 14:16:36 +02:00
|
|
|
NMIClass *nc = NMI_CLASS(oc);
|
2015-09-01 03:22:35 +02:00
|
|
|
HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(oc);
|
2016-10-28 13:06:21 +02:00
|
|
|
PPCVirtualHypervisorClass *vhc = PPC_VIRTUAL_HYPERVISOR_CLASS(oc);
|
2017-02-27 15:29:15 +01:00
|
|
|
XICSFabricClass *xic = XICS_FABRIC_CLASS(oc);
|
2017-02-27 15:29:32 +01:00
|
|
|
InterruptStatsProviderClass *ispc = INTERRUPT_STATS_PROVIDER_CLASS(oc);
|
2014-04-09 19:34:53 +02:00
|
|
|
|
2015-12-07 04:29:35 +01:00
|
|
|
mc->desc = "pSeries Logical Partition (PAPR compliant)";
|
2018-08-10 14:40:27 +02:00
|
|
|
mc->ignore_boot_device_suffixes = true;
|
2015-12-07 04:27:21 +01:00
|
|
|
|
|
|
|
/*
|
|
|
|
* We set up the default / latest behaviour here. The class_init
|
|
|
|
* functions for the specific versioned machine types can override
|
|
|
|
* these details for backwards compatibility
|
|
|
|
*/
|
2017-12-08 02:47:34 +01:00
|
|
|
mc->init = spapr_machine_init;
|
|
|
|
mc->reset = spapr_machine_reset;
|
2014-04-09 19:34:53 +02:00
|
|
|
mc->block_default_type = IF_SCSI;
|
2017-02-24 05:55:31 +01:00
|
|
|
mc->max_cpus = 1024;
|
2014-04-09 19:34:53 +02:00
|
|
|
mc->no_parallel = 1;
|
2015-03-18 13:30:44 +01:00
|
|
|
mc->default_boot_order = "";
|
2018-06-25 14:41:57 +02:00
|
|
|
mc->default_ram_size = 512 * MiB;
|
2018-07-02 21:13:45 +02:00
|
|
|
mc->default_display = "std";
|
2014-04-09 19:34:53 +02:00
|
|
|
mc->kvm_type = spapr_kvm_type;
|
2017-11-25 16:16:08 +01:00
|
|
|
machine_class_allow_dynamic_sysbus_dev(mc, TYPE_SPAPR_PCI_HOST_BRIDGE);
|
2015-07-24 10:35:13 +02:00
|
|
|
mc->pci_allow_0_address = true;
|
2018-05-10 19:10:56 +02:00
|
|
|
assert(!mc->get_hotplug_handler);
|
2016-09-12 09:57:20 +02:00
|
|
|
mc->get_hotplug_handler = spapr_get_hotplug_handler;
|
2016-06-10 02:59:03 +02:00
|
|
|
hc->pre_plug = spapr_machine_device_pre_plug;
|
2015-09-01 03:22:35 +02:00
|
|
|
hc->plug = spapr_machine_device_plug;
|
2017-05-10 13:29:45 +02:00
|
|
|
mc->cpu_index_to_instance_props = spapr_cpu_index_to_props;
|
2017-06-01 12:53:28 +02:00
|
|
|
mc->get_default_cpu_node_id = spapr_get_default_cpu_node_id;
|
2017-02-10 11:18:49 +01:00
|
|
|
mc->possible_cpu_arch_ids = spapr_possible_cpu_arch_ids;
|
2016-10-27 04:20:30 +02:00
|
|
|
hc->unplug_request = spapr_machine_device_unplug_request;
|
2018-06-08 14:48:14 +02:00
|
|
|
hc->unplug = spapr_machine_device_unplug;
|
2014-04-09 19:34:50 +02:00
|
|
|
|
2015-12-07 04:27:21 +01:00
|
|
|
smc->dr_lmb_enabled = true;
|
2017-10-09 21:51:05 +02:00
|
|
|
mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("power8_v2.0");
|
2017-02-10 11:20:57 +01:00
|
|
|
mc->has_hotpluggable_cpus = true;
|
2017-07-12 09:53:17 +02:00
|
|
|
smc->resize_hpt_default = SPAPR_RESIZE_HPT_ENABLED;
|
2014-03-17 03:40:27 +01:00
|
|
|
fwc->get_dev_path = spapr_get_fw_dev_path;
|
2014-08-20 14:16:36 +02:00
|
|
|
nc->nmi_monitor_handler = spapr_nmi;
|
spapr_pci: Delegate placement of PCI host bridges to machine type
The 'spapr-pci-host-bridge' represents the virtual PCI host bridge (PHB)
for a PAPR guest. Unlike on x86, it's routine on Power (both bare metal
and PAPR guests) to have numerous independent PHBs, each controlling a
separate PCI domain.
There are two ways of configuring the spapr-pci-host-bridge device: first
it can be done fully manually, specifying the locations and sizes of all
the IO windows. This gives the most control, but is very awkward with 6
mandatory parameters. Alternatively just an "index" can be specified
which essentially selects from an array of predefined PHB locations.
The PHB at index 0 is automatically created as the default PHB.
The current set of default locations causes some problems for guests with
large RAM (> 1 TiB) or PCI devices with very large BARs (e.g. big nVidia
GPGPU cards via VFIO). Obviously, for migration we can only change the
locations on a new machine type, however.
This is awkward, because the placement is currently decided within the
spapr-pci-host-bridge code, so it breaks abstraction to look inside the
machine type version.
So, this patch delegates the "default mode" PHB placement from the
spapr-pci-host-bridge device back to the machine type via a public method
in sPAPRMachineClass. It's still a bit ugly, but it's about the best we
can do.
For now, this just changes where the calculation is done. It doesn't
change the actual location of the host bridges, or any other behaviour.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Reviewed-by: Laurent Vivier <lvivier@redhat.com>
2016-10-13 01:26:09 +02:00
|
|
|
smc->phb_placement = spapr_phb_placement;
|
2016-10-28 13:06:21 +02:00
|
|
|
vhc->hypercall = emulate_spapr_hypercall;
|
2017-02-23 01:39:18 +01:00
|
|
|
vhc->hpt_mask = spapr_hpt_mask;
|
|
|
|
vhc->map_hptes = spapr_map_hptes;
|
|
|
|
vhc->unmap_hptes = spapr_unmap_hptes;
|
|
|
|
vhc->store_hpte = spapr_store_hpte;
|
2017-03-01 07:54:36 +01:00
|
|
|
vhc->get_patbe = spapr_get_patbe;
|
2017-09-25 13:00:02 +02:00
|
|
|
vhc->encode_hpt_for_kvm_pr = spapr_encode_hpt_for_kvm_pr;
|
2017-02-27 15:29:15 +01:00
|
|
|
xic->ics_get = spapr_ics_get;
|
|
|
|
xic->ics_resend = spapr_ics_resend;
|
2017-02-27 15:29:21 +01:00
|
|
|
xic->icp_get = spapr_icp_get;
|
2017-02-27 15:29:32 +01:00
|
|
|
ispc->print_info = spapr_pic_print_info;
|
2017-03-21 11:25:42 +01:00
|
|
|
/* Force NUMA node memory size to be a multiple of
|
|
|
|
* SPAPR_MEMORY_BLOCK_SIZE (256M) since that's the granularity
|
|
|
|
* in which LMBs are represented and hot-added
|
|
|
|
*/
|
|
|
|
mc->numa_mem_align_shift = 28;
|
spapr: Capabilities infrastructure
Because PAPR is a paravirtual environment access to certain CPU (or other)
facilities can be blocked by the hypervisor. PAPR provides ways to
advertise in the device tree whether or not those features are available to
the guest.
In some places we automatically determine whether to make a feature
available based on whether our host can support it, in most cases this is
based on limitations in the available KVM implementation.
Although we correctly advertise this to the guest, it means that host
factors might make changes to the guest visible environment which is bad:
as well as generaly reducing reproducibility, it means that a migration
between different host environments can easily go bad.
We've mostly gotten away with it because the environments considered mature
enough to be well supported (basically, KVM on POWER8) have had consistent
feature availability. But, it's still not right and some limitations on
POWER9 is going to make it more of an issue in future.
This introduces an infrastructure for defining "sPAPR capabilities". These
are set by default based on the machine version, masked by the capabilities
of the chosen cpu, but can be overriden with machine properties.
The intention is at reset time we verify that the requested capabilities
can be supported on the host (considering TCG, KVM and/or host cpu
limitations). If not we simply fail, rather than silently modifying the
advertised featureset to the guest.
This does mean that certain configurations that "worked" may now fail, but
such configurations were already more subtly broken.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Reviewed-by: Greg Kurz <groug@kaod.org>
2017-12-08 00:35:35 +01:00
|
|
|
|
2018-01-12 06:33:43 +01:00
|
|
|
smc->default_caps.caps[SPAPR_CAP_HTM] = SPAPR_CAP_OFF;
|
|
|
|
smc->default_caps.caps[SPAPR_CAP_VSX] = SPAPR_CAP_ON;
|
|
|
|
smc->default_caps.caps[SPAPR_CAP_DFP] = SPAPR_CAP_ON;
|
2018-01-19 06:00:02 +01:00
|
|
|
smc->default_caps.caps[SPAPR_CAP_CFPC] = SPAPR_CAP_BROKEN;
|
2018-01-19 06:00:03 +01:00
|
|
|
smc->default_caps.caps[SPAPR_CAP_SBBC] = SPAPR_CAP_BROKEN;
|
2018-01-19 06:00:04 +01:00
|
|
|
smc->default_caps.caps[SPAPR_CAP_IBS] = SPAPR_CAP_BROKEN;
|
2018-03-16 09:19:13 +01:00
|
|
|
smc->default_caps.caps[SPAPR_CAP_HPT_MAXPAGESIZE] = 16; /* 64kiB */
|
spapr: Capabilities infrastructure
Because PAPR is a paravirtual environment access to certain CPU (or other)
facilities can be blocked by the hypervisor. PAPR provides ways to
advertise in the device tree whether or not those features are available to
the guest.
In some places we automatically determine whether to make a feature
available based on whether our host can support it, in most cases this is
based on limitations in the available KVM implementation.
Although we correctly advertise this to the guest, it means that host
factors might make changes to the guest visible environment which is bad:
as well as generaly reducing reproducibility, it means that a migration
between different host environments can easily go bad.
We've mostly gotten away with it because the environments considered mature
enough to be well supported (basically, KVM on POWER8) have had consistent
feature availability. But, it's still not right and some limitations on
POWER9 is going to make it more of an issue in future.
This introduces an infrastructure for defining "sPAPR capabilities". These
are set by default based on the machine version, masked by the capabilities
of the chosen cpu, but can be overriden with machine properties.
The intention is at reset time we verify that the requested capabilities
can be supported on the host (considering TCG, KVM and/or host cpu
limitations). If not we simply fail, rather than silently modifying the
advertised featureset to the guest.
This does mean that certain configurations that "worked" may now fail, but
such configurations were already more subtly broken.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Reviewed-by: Greg Kurz <groug@kaod.org>
2017-12-08 00:35:35 +01:00
|
|
|
spapr_caps_add_properties(smc, &error_abort);
|
2018-07-30 16:11:33 +02:00
|
|
|
smc->irq = &spapr_irq_xics;
|
2014-03-17 03:40:26 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
static const TypeInfo spapr_machine_info = {
|
|
|
|
.name = TYPE_SPAPR_MACHINE,
|
|
|
|
.parent = TYPE_MACHINE,
|
2014-09-08 07:30:31 +02:00
|
|
|
.abstract = true,
|
2014-06-25 06:10:24 +02:00
|
|
|
.instance_size = sizeof(sPAPRMachineState),
|
2017-12-08 02:47:34 +01:00
|
|
|
.instance_init = spapr_instance_init,
|
2015-12-28 07:38:26 +01:00
|
|
|
.instance_finalize = spapr_machine_finalizefn,
|
2015-07-02 08:23:07 +02:00
|
|
|
.class_size = sizeof(sPAPRMachineClass),
|
2014-03-17 03:40:26 +01:00
|
|
|
.class_init = spapr_machine_class_init,
|
2014-03-17 03:40:27 +01:00
|
|
|
.interfaces = (InterfaceInfo[]) {
|
|
|
|
{ TYPE_FW_PATH_PROVIDER },
|
2014-08-20 14:16:36 +02:00
|
|
|
{ TYPE_NMI },
|
2015-09-01 03:22:35 +02:00
|
|
|
{ TYPE_HOTPLUG_HANDLER },
|
2016-10-28 13:06:21 +02:00
|
|
|
{ TYPE_PPC_VIRTUAL_HYPERVISOR },
|
2017-02-27 15:29:15 +01:00
|
|
|
{ TYPE_XICS_FABRIC },
|
2017-02-27 15:29:32 +01:00
|
|
|
{ TYPE_INTERRUPT_STATS_PROVIDER },
|
2014-03-17 03:40:27 +01:00
|
|
|
{ }
|
|
|
|
},
|
2014-03-17 03:40:26 +01:00
|
|
|
};
|
|
|
|
|
2015-12-07 04:25:50 +01:00
|
|
|
#define DEFINE_SPAPR_MACHINE(suffix, verstr, latest) \
|
2015-12-07 04:23:20 +01:00
|
|
|
static void spapr_machine_##suffix##_class_init(ObjectClass *oc, \
|
|
|
|
void *data) \
|
|
|
|
{ \
|
|
|
|
MachineClass *mc = MACHINE_CLASS(oc); \
|
|
|
|
spapr_machine_##suffix##_class_options(mc); \
|
2015-12-07 04:25:50 +01:00
|
|
|
if (latest) { \
|
|
|
|
mc->alias = "pseries"; \
|
|
|
|
mc->is_default = 1; \
|
|
|
|
} \
|
2015-12-07 04:23:20 +01:00
|
|
|
} \
|
|
|
|
static void spapr_machine_##suffix##_instance_init(Object *obj) \
|
|
|
|
{ \
|
|
|
|
MachineState *machine = MACHINE(obj); \
|
|
|
|
spapr_machine_##suffix##_instance_options(machine); \
|
|
|
|
} \
|
|
|
|
static const TypeInfo spapr_machine_##suffix##_info = { \
|
|
|
|
.name = MACHINE_TYPE_NAME("pseries-" verstr), \
|
|
|
|
.parent = TYPE_SPAPR_MACHINE, \
|
|
|
|
.class_init = spapr_machine_##suffix##_class_init, \
|
|
|
|
.instance_init = spapr_machine_##suffix##_instance_init, \
|
|
|
|
}; \
|
|
|
|
static void spapr_machine_register_##suffix(void) \
|
|
|
|
{ \
|
|
|
|
type_register(&spapr_machine_##suffix##_info); \
|
|
|
|
} \
|
2016-02-16 21:59:04 +01:00
|
|
|
type_init(spapr_machine_register_##suffix)
|
2015-12-07 04:23:20 +01:00
|
|
|
|
2018-07-30 16:11:31 +02:00
|
|
|
/*
|
|
|
|
* pseries-3.1
|
|
|
|
*/
|
|
|
|
static void spapr_machine_3_1_instance_options(MachineState *machine)
|
|
|
|
{
|
|
|
|
}
|
|
|
|
|
|
|
|
static void spapr_machine_3_1_class_options(MachineClass *mc)
|
|
|
|
{
|
|
|
|
/* Defaults for the latest behaviour inherited from the base class */
|
|
|
|
}
|
|
|
|
|
|
|
|
DEFINE_SPAPR_MACHINE(3_1, "3.1", true);
|
|
|
|
|
2018-03-29 09:34:22 +02:00
|
|
|
/*
|
2018-05-22 12:39:59 +02:00
|
|
|
* pseries-3.0
|
2018-03-29 09:34:22 +02:00
|
|
|
*/
|
2018-07-30 16:11:31 +02:00
|
|
|
#define SPAPR_COMPAT_3_0 \
|
|
|
|
HW_COMPAT_3_0
|
|
|
|
|
2018-05-22 12:39:59 +02:00
|
|
|
static void spapr_machine_3_0_instance_options(MachineState *machine)
|
2018-03-29 09:34:22 +02:00
|
|
|
{
|
2018-07-30 16:11:31 +02:00
|
|
|
spapr_machine_3_1_instance_options(machine);
|
2018-03-29 09:34:22 +02:00
|
|
|
}
|
|
|
|
|
2018-05-22 12:39:59 +02:00
|
|
|
static void spapr_machine_3_0_class_options(MachineClass *mc)
|
2018-03-29 09:34:22 +02:00
|
|
|
{
|
2018-07-30 16:11:32 +02:00
|
|
|
sPAPRMachineClass *smc = SPAPR_MACHINE_CLASS(mc);
|
|
|
|
|
2018-07-30 16:11:31 +02:00
|
|
|
spapr_machine_3_1_class_options(mc);
|
|
|
|
SET_MACHINE_COMPAT(mc, SPAPR_COMPAT_3_0);
|
2018-07-30 16:11:32 +02:00
|
|
|
|
|
|
|
smc->legacy_irq_allocation = true;
|
2018-03-29 09:34:22 +02:00
|
|
|
}
|
|
|
|
|
2018-07-30 16:11:31 +02:00
|
|
|
DEFINE_SPAPR_MACHINE(3_0, "3.0", false);
|
2018-03-29 09:34:22 +02:00
|
|
|
|
2017-11-13 06:50:40 +01:00
|
|
|
/*
|
|
|
|
* pseries-2.12
|
|
|
|
*/
|
2018-03-29 09:34:22 +02:00
|
|
|
#define SPAPR_COMPAT_2_12 \
|
2018-03-29 09:29:38 +02:00
|
|
|
HW_COMPAT_2_12 \
|
|
|
|
{ \
|
|
|
|
.driver = TYPE_POWERPC_CPU, \
|
2018-06-18 14:26:35 +02:00
|
|
|
.property = "pre-3.0-migration", \
|
|
|
|
.value = "on", \
|
|
|
|
}, \
|
|
|
|
{ \
|
|
|
|
.driver = TYPE_SPAPR_CPU_CORE, \
|
|
|
|
.property = "pre-3.0-migration", \
|
2018-03-29 09:29:38 +02:00
|
|
|
.value = "on", \
|
|
|
|
},
|
2018-03-29 09:34:22 +02:00
|
|
|
|
2017-11-13 06:50:40 +01:00
|
|
|
static void spapr_machine_2_12_instance_options(MachineState *machine)
|
|
|
|
{
|
2018-05-22 12:39:59 +02:00
|
|
|
spapr_machine_3_0_instance_options(machine);
|
2017-11-13 06:50:40 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
static void spapr_machine_2_12_class_options(MachineClass *mc)
|
|
|
|
{
|
2018-03-16 09:19:13 +01:00
|
|
|
sPAPRMachineClass *smc = SPAPR_MACHINE_CLASS(mc);
|
|
|
|
|
2018-05-22 12:39:59 +02:00
|
|
|
spapr_machine_3_0_class_options(mc);
|
2018-03-29 09:34:22 +02:00
|
|
|
SET_MACHINE_COMPAT(mc, SPAPR_COMPAT_2_12);
|
2018-03-16 09:19:13 +01:00
|
|
|
|
2018-07-02 10:54:56 +02:00
|
|
|
/* We depend on kvm_enabled() to choose a default value for the
|
|
|
|
* hpt-max-page-size capability. Of course we can't do it here
|
|
|
|
* because this is too early and the HW accelerator isn't initialzed
|
|
|
|
* yet. Postpone this to machine init (see default_caps_with_cpu()).
|
|
|
|
*/
|
|
|
|
smc->default_caps.caps[SPAPR_CAP_HPT_MAXPAGESIZE] = 0;
|
2017-11-13 06:50:40 +01:00
|
|
|
}
|
|
|
|
|
2018-03-29 09:34:22 +02:00
|
|
|
DEFINE_SPAPR_MACHINE(2_12, "2.12", false);
|
2017-11-13 06:50:40 +01:00
|
|
|
|
2018-03-01 07:38:04 +01:00
|
|
|
static void spapr_machine_2_12_sxxm_instance_options(MachineState *machine)
|
|
|
|
{
|
|
|
|
spapr_machine_2_12_instance_options(machine);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void spapr_machine_2_12_sxxm_class_options(MachineClass *mc)
|
|
|
|
{
|
|
|
|
sPAPRMachineClass *smc = SPAPR_MACHINE_CLASS(mc);
|
|
|
|
|
|
|
|
spapr_machine_2_12_class_options(mc);
|
|
|
|
smc->default_caps.caps[SPAPR_CAP_CFPC] = SPAPR_CAP_WORKAROUND;
|
|
|
|
smc->default_caps.caps[SPAPR_CAP_SBBC] = SPAPR_CAP_WORKAROUND;
|
|
|
|
smc->default_caps.caps[SPAPR_CAP_IBS] = SPAPR_CAP_FIXED_CCD;
|
|
|
|
}
|
|
|
|
|
|
|
|
DEFINE_SPAPR_MACHINE(2_12_sxxm, "2.12-sxxm", false);
|
|
|
|
|
2017-07-25 20:01:12 +02:00
|
|
|
/*
|
|
|
|
* pseries-2.11
|
|
|
|
*/
|
2017-11-13 06:50:40 +01:00
|
|
|
#define SPAPR_COMPAT_2_11 \
|
|
|
|
HW_COMPAT_2_11
|
|
|
|
|
2017-07-25 20:01:12 +02:00
|
|
|
static void spapr_machine_2_11_instance_options(MachineState *machine)
|
|
|
|
{
|
2017-11-13 06:50:40 +01:00
|
|
|
spapr_machine_2_12_instance_options(machine);
|
2017-07-25 20:01:12 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
static void spapr_machine_2_11_class_options(MachineClass *mc)
|
|
|
|
{
|
2017-12-11 03:10:44 +01:00
|
|
|
sPAPRMachineClass *smc = SPAPR_MACHINE_CLASS(mc);
|
|
|
|
|
2017-11-13 06:50:40 +01:00
|
|
|
spapr_machine_2_12_class_options(mc);
|
2018-01-12 06:33:43 +01:00
|
|
|
smc->default_caps.caps[SPAPR_CAP_HTM] = SPAPR_CAP_ON;
|
2017-11-13 06:50:40 +01:00
|
|
|
SET_MACHINE_COMPAT(mc, SPAPR_COMPAT_2_11);
|
2017-07-25 20:01:12 +02:00
|
|
|
}
|
|
|
|
|
2017-11-13 06:50:40 +01:00
|
|
|
DEFINE_SPAPR_MACHINE(2_11, "2.11", false);
|
2017-07-25 20:01:12 +02:00
|
|
|
|
2017-03-07 01:02:28 +01:00
|
|
|
/*
|
|
|
|
* pseries-2.10
|
|
|
|
*/
|
2017-07-25 20:01:12 +02:00
|
|
|
#define SPAPR_COMPAT_2_10 \
|
2017-11-13 06:50:40 +01:00
|
|
|
HW_COMPAT_2_10
|
2017-07-25 20:01:12 +02:00
|
|
|
|
2017-03-07 01:02:28 +01:00
|
|
|
static void spapr_machine_2_10_instance_options(MachineState *machine)
|
|
|
|
{
|
2017-11-13 06:50:40 +01:00
|
|
|
spapr_machine_2_11_instance_options(machine);
|
2017-03-07 01:02:28 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
static void spapr_machine_2_10_class_options(MachineClass *mc)
|
|
|
|
{
|
2017-07-25 20:01:12 +02:00
|
|
|
spapr_machine_2_11_class_options(mc);
|
|
|
|
SET_MACHINE_COMPAT(mc, SPAPR_COMPAT_2_10);
|
2017-03-07 01:02:28 +01:00
|
|
|
}
|
|
|
|
|
2017-07-25 20:01:12 +02:00
|
|
|
DEFINE_SPAPR_MACHINE(2_10, "2.10", false);
|
2017-03-07 01:02:28 +01:00
|
|
|
|
2016-12-08 06:39:18 +01:00
|
|
|
/*
|
|
|
|
* pseries-2.9
|
|
|
|
*/
|
2017-03-07 01:02:28 +01:00
|
|
|
#define SPAPR_COMPAT_2_9 \
|
ppc: Rework CPU compatibility testing across migration
Migrating between different CPU versions is a bit complicated for ppc.
A long time ago, we ensured identical CPU versions at either end by
checking the PVR had the same value. However, this breaks under KVM
HV, because we always have to use the host's PVR - it's not
virtualized. That would mean we couldn't migrate between hosts with
different PVRs, even if the CPUs are close enough to compatible in
practice (sometimes identical cores with different surrounding logic
have different PVRs, so this happens in practice quite often).
So, we removed the PVR check, but instead checked that several flags
indicating supported instructions matched. This turns out to be a bad
idea, because those instruction masks are not architected information, but
essentially a TCG implementation detail. So changes to qemu internal CPU
modelling can break migration - this happened between qemu-2.6 and
qemu-2.7. That was addressed by 146c11f1 "target-ppc: Allow eventual
removal of old migration mistakes".
Now, verification of CPU compatibility across a migration basically doesn't
happen. We simply ignore the PVR of the incoming migration, and hope the
cpu on the destination is close enough to work.
Now that we've cleaned up handling of processor compatibility modes
for pseries machine type, we can do better. For new machine types
(pseries-2.10+) We allow migration if:
* The source and destination PVRs are for the same type of CPU, as
determined by CPU class's pvr_match function
OR * When the source was in a compatibility mode, and the destination CPU
supports the same compatibility mode
For older machine types we retain the existing behaviour - current CAS
code will usually set a compat mode which would break backwards
migration if we made them use the new behaviour. [Fixed from an
earlier version by Greg Kurz].
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Greg Kurz <groug@kaod.org>
Reviewed-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com>
Tested-by: Andrea Bolognani <abologna@redhat.com>
2017-06-02 04:26:11 +02:00
|
|
|
HW_COMPAT_2_9 \
|
|
|
|
{ \
|
|
|
|
.driver = TYPE_POWERPC_CPU, \
|
|
|
|
.property = "pre-2.10-migration", \
|
|
|
|
.value = "on", \
|
|
|
|
}, \
|
2017-03-07 01:02:28 +01:00
|
|
|
|
2016-12-08 06:39:18 +01:00
|
|
|
static void spapr_machine_2_9_instance_options(MachineState *machine)
|
|
|
|
{
|
2017-03-07 01:02:28 +01:00
|
|
|
spapr_machine_2_10_instance_options(machine);
|
2016-12-08 06:39:18 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
static void spapr_machine_2_9_class_options(MachineClass *mc)
|
|
|
|
{
|
2017-06-14 15:29:19 +02:00
|
|
|
sPAPRMachineClass *smc = SPAPR_MACHINE_CLASS(mc);
|
|
|
|
|
2017-03-07 01:02:28 +01:00
|
|
|
spapr_machine_2_10_class_options(mc);
|
|
|
|
SET_MACHINE_COMPAT(mc, SPAPR_COMPAT_2_9);
|
2017-05-02 18:29:55 +02:00
|
|
|
mc->numa_auto_assign_ram = numa_legacy_auto_assign_ram;
|
2017-06-14 15:29:19 +02:00
|
|
|
smc->pre_2_10_has_unused_icps = true;
|
2017-07-12 09:53:17 +02:00
|
|
|
smc->resize_hpt_default = SPAPR_RESIZE_HPT_DISABLED;
|
2016-12-08 06:39:18 +01:00
|
|
|
}
|
|
|
|
|
2017-03-07 01:02:28 +01:00
|
|
|
DEFINE_SPAPR_MACHINE(2_9, "2.9", false);
|
2016-12-08 06:39:18 +01:00
|
|
|
|
2016-09-28 06:31:55 +02:00
|
|
|
/*
|
|
|
|
* pseries-2.8
|
|
|
|
*/
|
2017-03-14 01:54:17 +01:00
|
|
|
#define SPAPR_COMPAT_2_8 \
|
|
|
|
HW_COMPAT_2_8 \
|
|
|
|
{ \
|
|
|
|
.driver = TYPE_SPAPR_PCI_HOST_BRIDGE, \
|
|
|
|
.property = "pcie-extended-configuration-space", \
|
|
|
|
.value = "off", \
|
|
|
|
},
|
2016-12-08 06:39:18 +01:00
|
|
|
|
2016-09-28 06:31:55 +02:00
|
|
|
static void spapr_machine_2_8_instance_options(MachineState *machine)
|
|
|
|
{
|
2016-12-08 06:39:18 +01:00
|
|
|
spapr_machine_2_9_instance_options(machine);
|
2016-09-28 06:31:55 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
static void spapr_machine_2_8_class_options(MachineClass *mc)
|
|
|
|
{
|
2016-12-08 06:39:18 +01:00
|
|
|
spapr_machine_2_9_class_options(mc);
|
|
|
|
SET_MACHINE_COMPAT(mc, SPAPR_COMPAT_2_8);
|
2017-03-21 11:25:42 +01:00
|
|
|
mc->numa_mem_align_shift = 23;
|
2016-09-28 06:31:55 +02:00
|
|
|
}
|
|
|
|
|
2016-12-08 06:39:18 +01:00
|
|
|
DEFINE_SPAPR_MACHINE(2_8, "2.8", false);
|
2016-09-28 06:31:55 +02:00
|
|
|
|
2016-06-03 07:49:42 +02:00
|
|
|
/*
|
|
|
|
* pseries-2.7
|
|
|
|
*/
|
2016-10-16 03:04:15 +02:00
|
|
|
#define SPAPR_COMPAT_2_7 \
|
|
|
|
HW_COMPAT_2_7 \
|
|
|
|
{ \
|
|
|
|
.driver = TYPE_SPAPR_PCI_HOST_BRIDGE, \
|
|
|
|
.property = "mem_win_size", \
|
|
|
|
.value = stringify(SPAPR_PCI_2_7_MMIO_WIN_SIZE),\
|
|
|
|
}, \
|
|
|
|
{ \
|
|
|
|
.driver = TYPE_SPAPR_PCI_HOST_BRIDGE, \
|
|
|
|
.property = "mem64_win_size", \
|
|
|
|
.value = "0", \
|
2016-11-21 06:29:30 +01:00
|
|
|
}, \
|
|
|
|
{ \
|
|
|
|
.driver = TYPE_POWERPC_CPU, \
|
|
|
|
.property = "pre-2.8-migration", \
|
|
|
|
.value = "on", \
|
2016-11-23 00:26:38 +01:00
|
|
|
}, \
|
|
|
|
{ \
|
|
|
|
.driver = TYPE_SPAPR_PCI_HOST_BRIDGE, \
|
|
|
|
.property = "pre-2.8-migration", \
|
|
|
|
.value = "on", \
|
2016-10-16 03:04:15 +02:00
|
|
|
},
|
|
|
|
|
|
|
|
static void phb_placement_2_7(sPAPRMachineState *spapr, uint32_t index,
|
|
|
|
uint64_t *buid, hwaddr *pio,
|
|
|
|
hwaddr *mmio32, hwaddr *mmio64,
|
|
|
|
unsigned n_dma, uint32_t *liobns, Error **errp)
|
|
|
|
{
|
|
|
|
/* Legacy PHB placement for pseries-2.7 and earlier machine types */
|
|
|
|
const uint64_t base_buid = 0x800000020000000ULL;
|
|
|
|
const hwaddr phb_spacing = 0x1000000000ULL; /* 64 GiB */
|
|
|
|
const hwaddr mmio_offset = 0xa0000000; /* 2 GiB + 512 MiB */
|
|
|
|
const hwaddr pio_offset = 0x80000000; /* 2 GiB */
|
|
|
|
const uint32_t max_index = 255;
|
|
|
|
const hwaddr phb0_alignment = 0x10000000000ULL; /* 1 TiB */
|
|
|
|
|
|
|
|
uint64_t ram_top = MACHINE(spapr)->ram_size;
|
|
|
|
hwaddr phb0_base, phb_base;
|
|
|
|
int i;
|
|
|
|
|
2018-04-23 18:51:25 +02:00
|
|
|
/* Do we have device memory? */
|
2016-10-16 03:04:15 +02:00
|
|
|
if (MACHINE(spapr)->maxram_size > ram_top) {
|
|
|
|
/* Can't just use maxram_size, because there may be an
|
2018-04-23 18:51:25 +02:00
|
|
|
* alignment gap between normal and device memory regions
|
|
|
|
*/
|
2018-04-23 18:51:17 +02:00
|
|
|
ram_top = MACHINE(spapr)->device_memory->base +
|
|
|
|
memory_region_size(&MACHINE(spapr)->device_memory->mr);
|
2016-10-16 03:04:15 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
phb0_base = QEMU_ALIGN_UP(ram_top, phb0_alignment);
|
|
|
|
|
|
|
|
if (index > max_index) {
|
|
|
|
error_setg(errp, "\"index\" for PAPR PHB is too large (max %u)",
|
|
|
|
max_index);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
*buid = base_buid + index;
|
|
|
|
for (i = 0; i < n_dma; ++i) {
|
|
|
|
liobns[i] = SPAPR_PCI_LIOBN(index, i);
|
|
|
|
}
|
|
|
|
|
|
|
|
phb_base = phb0_base + index * phb_spacing;
|
|
|
|
*pio = phb_base + pio_offset;
|
|
|
|
*mmio32 = phb_base + mmio_offset;
|
|
|
|
/*
|
|
|
|
* We don't set the 64-bit MMIO window, relying on the PHB's
|
|
|
|
* fallback behaviour of automatically splitting a large "32-bit"
|
|
|
|
* window into contiguous 32-bit and 64-bit windows
|
|
|
|
*/
|
|
|
|
}
|
2016-09-28 06:31:55 +02:00
|
|
|
|
2016-06-03 07:49:42 +02:00
|
|
|
static void spapr_machine_2_7_instance_options(MachineState *machine)
|
|
|
|
{
|
spapr: add hotplug interrupt machine options
This adds machine options of the form:
-machine pseries,modern-hotplug-events=true
-machine pseries,modern-hotplug-events=false
If false, QEMU will force the use of "legacy" style hotplug events,
which are surfaced through EPOW events instead of a dedicated
hot plug event source, and lack certain features necessary, mainly,
for memory unplug support.
If true, QEMU will enable support for "modern" dedicated hot plug
event source. Note that we will still default to "legacy" style unless
the guest advertises support for the "modern" hotplug events via
ibm,client-architecture-support hcall during early boot.
For pseries-2.7 and earlier we default to false, for newer machine
types we default to true.
Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2016-10-27 04:20:27 +02:00
|
|
|
sPAPRMachineState *spapr = SPAPR_MACHINE(machine);
|
|
|
|
|
2016-10-13 01:13:53 +02:00
|
|
|
spapr_machine_2_8_instance_options(machine);
|
spapr: add hotplug interrupt machine options
This adds machine options of the form:
-machine pseries,modern-hotplug-events=true
-machine pseries,modern-hotplug-events=false
If false, QEMU will force the use of "legacy" style hotplug events,
which are surfaced through EPOW events instead of a dedicated
hot plug event source, and lack certain features necessary, mainly,
for memory unplug support.
If true, QEMU will enable support for "modern" dedicated hot plug
event source. Note that we will still default to "legacy" style unless
the guest advertises support for the "modern" hotplug events via
ibm,client-architecture-support hcall during early boot.
For pseries-2.7 and earlier we default to false, for newer machine
types we default to true.
Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2016-10-27 04:20:27 +02:00
|
|
|
spapr->use_hotplug_event_source = false;
|
2016-06-03 07:49:42 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
static void spapr_machine_2_7_class_options(MachineClass *mc)
|
|
|
|
{
|
2016-10-05 09:44:51 +02:00
|
|
|
sPAPRMachineClass *smc = SPAPR_MACHINE_CLASS(mc);
|
|
|
|
|
2016-09-28 06:31:55 +02:00
|
|
|
spapr_machine_2_8_class_options(mc);
|
2017-10-09 21:51:05 +02:00
|
|
|
mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("power7_v2.3");
|
2016-09-28 06:31:55 +02:00
|
|
|
SET_MACHINE_COMPAT(mc, SPAPR_COMPAT_2_7);
|
2016-10-16 03:04:15 +02:00
|
|
|
smc->phb_placement = phb_placement_2_7;
|
2016-06-03 07:49:42 +02:00
|
|
|
}
|
|
|
|
|
2016-09-28 06:31:55 +02:00
|
|
|
DEFINE_SPAPR_MACHINE(2_7, "2.7", false);
|
2016-06-03 07:49:42 +02:00
|
|
|
|
2015-12-07 04:28:15 +01:00
|
|
|
/*
|
|
|
|
* pseries-2.6
|
|
|
|
*/
|
2016-06-03 07:49:42 +02:00
|
|
|
#define SPAPR_COMPAT_2_6 \
|
2016-07-04 05:33:07 +02:00
|
|
|
HW_COMPAT_2_6 \
|
|
|
|
{ \
|
|
|
|
.driver = TYPE_SPAPR_PCI_HOST_BRIDGE,\
|
|
|
|
.property = "ddw",\
|
|
|
|
.value = stringify(off),\
|
|
|
|
},
|
2016-06-03 07:49:42 +02:00
|
|
|
|
2015-12-07 04:28:15 +01:00
|
|
|
static void spapr_machine_2_6_instance_options(MachineState *machine)
|
|
|
|
{
|
2016-10-13 01:13:53 +02:00
|
|
|
spapr_machine_2_7_instance_options(machine);
|
2015-12-07 04:28:15 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
static void spapr_machine_2_6_class_options(MachineClass *mc)
|
|
|
|
{
|
2016-06-03 07:49:42 +02:00
|
|
|
spapr_machine_2_7_class_options(mc);
|
2017-02-10 11:20:57 +01:00
|
|
|
mc->has_hotpluggable_cpus = false;
|
2016-06-03 07:49:42 +02:00
|
|
|
SET_MACHINE_COMPAT(mc, SPAPR_COMPAT_2_6);
|
2015-12-07 04:28:15 +01:00
|
|
|
}
|
|
|
|
|
2016-06-03 07:49:42 +02:00
|
|
|
DEFINE_SPAPR_MACHINE(2_6, "2.6", false);
|
2015-12-07 04:28:15 +01:00
|
|
|
|
2015-12-03 07:34:10 +01:00
|
|
|
/*
|
|
|
|
* pseries-2.5
|
|
|
|
*/
|
2015-12-07 04:28:15 +01:00
|
|
|
#define SPAPR_COMPAT_2_5 \
|
2016-03-21 17:25:24 +01:00
|
|
|
HW_COMPAT_2_5 \
|
|
|
|
{ \
|
|
|
|
.driver = "spapr-vlan", \
|
|
|
|
.property = "use-rx-buffer-pools", \
|
|
|
|
.value = "off", \
|
|
|
|
},
|
2015-12-07 04:28:15 +01:00
|
|
|
|
2015-12-07 04:23:20 +01:00
|
|
|
static void spapr_machine_2_5_instance_options(MachineState *machine)
|
2015-12-03 07:34:10 +01:00
|
|
|
{
|
2016-10-13 01:13:53 +02:00
|
|
|
spapr_machine_2_6_instance_options(machine);
|
2015-12-07 04:23:20 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
static void spapr_machine_2_5_class_options(MachineClass *mc)
|
|
|
|
{
|
2015-12-09 13:34:13 +01:00
|
|
|
sPAPRMachineClass *smc = SPAPR_MACHINE_CLASS(mc);
|
|
|
|
|
2015-12-07 04:28:15 +01:00
|
|
|
spapr_machine_2_6_class_options(mc);
|
2015-12-09 13:34:13 +01:00
|
|
|
smc->use_ohci_by_default = true;
|
2015-12-07 04:28:15 +01:00
|
|
|
SET_MACHINE_COMPAT(mc, SPAPR_COMPAT_2_5);
|
2015-12-03 07:34:10 +01:00
|
|
|
}
|
|
|
|
|
2015-12-07 04:28:15 +01:00
|
|
|
DEFINE_SPAPR_MACHINE(2_5, "2.5", false);
|
2015-12-03 07:34:10 +01:00
|
|
|
|
|
|
|
/*
|
|
|
|
* pseries-2.4
|
|
|
|
*/
|
2015-10-16 12:25:53 +02:00
|
|
|
#define SPAPR_COMPAT_2_4 \
|
|
|
|
HW_COMPAT_2_4
|
|
|
|
|
2015-12-07 04:23:20 +01:00
|
|
|
static void spapr_machine_2_4_instance_options(MachineState *machine)
|
2015-12-03 07:34:10 +01:00
|
|
|
{
|
2015-12-07 04:23:20 +01:00
|
|
|
spapr_machine_2_5_instance_options(machine);
|
|
|
|
}
|
2015-12-03 07:34:10 +01:00
|
|
|
|
2015-12-07 04:23:20 +01:00
|
|
|
static void spapr_machine_2_4_class_options(MachineClass *mc)
|
|
|
|
{
|
2015-12-07 04:27:21 +01:00
|
|
|
sPAPRMachineClass *smc = SPAPR_MACHINE_CLASS(mc);
|
|
|
|
|
|
|
|
spapr_machine_2_5_class_options(mc);
|
|
|
|
smc->dr_lmb_enabled = false;
|
2015-12-03 07:47:22 +01:00
|
|
|
SET_MACHINE_COMPAT(mc, SPAPR_COMPAT_2_4);
|
2015-12-03 07:34:10 +01:00
|
|
|
}
|
|
|
|
|
2015-12-07 04:25:50 +01:00
|
|
|
DEFINE_SPAPR_MACHINE(2_4, "2.4", false);
|
2015-12-03 07:34:10 +01:00
|
|
|
|
|
|
|
/*
|
|
|
|
* pseries-2.3
|
|
|
|
*/
|
2015-05-14 20:53:05 +02:00
|
|
|
#define SPAPR_COMPAT_2_3 \
|
2015-05-07 07:33:52 +02:00
|
|
|
HW_COMPAT_2_3 \
|
|
|
|
{\
|
|
|
|
.driver = "spapr-pci-host-bridge",\
|
|
|
|
.property = "dynamic-reconfiguration",\
|
|
|
|
.value = "off",\
|
|
|
|
},
|
2015-05-14 20:53:05 +02:00
|
|
|
|
2015-12-07 04:23:20 +01:00
|
|
|
static void spapr_machine_2_3_instance_options(MachineState *machine)
|
2015-04-23 08:21:37 +02:00
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{
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2015-12-07 04:23:20 +01:00
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spapr_machine_2_4_instance_options(machine);
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2015-04-23 08:21:37 +02:00
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}
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2015-12-07 04:23:20 +01:00
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static void spapr_machine_2_3_class_options(MachineClass *mc)
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2014-06-25 06:08:45 +02:00
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{
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2015-12-07 04:27:21 +01:00
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spapr_machine_2_4_class_options(mc);
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2015-12-03 07:47:22 +01:00
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SET_MACHINE_COMPAT(mc, SPAPR_COMPAT_2_3);
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2014-06-25 06:08:45 +02:00
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}
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2015-12-07 04:25:50 +01:00
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DEFINE_SPAPR_MACHINE(2_3, "2.3", false);
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2014-06-25 06:08:45 +02:00
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2015-12-03 07:34:10 +01:00
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/*
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* pseries-2.2
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*/
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#define SPAPR_COMPAT_2_2 \
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HW_COMPAT_2_2 \
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{\
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.driver = TYPE_SPAPR_PCI_HOST_BRIDGE,\
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.property = "mem_win_size",\
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.value = "0x20000000",\
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},
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2015-12-07 04:23:20 +01:00
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static void spapr_machine_2_2_instance_options(MachineState *machine)
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2015-12-03 07:34:10 +01:00
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{
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2015-12-07 04:23:20 +01:00
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spapr_machine_2_3_instance_options(machine);
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2016-02-23 17:47:59 +01:00
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machine->suppress_vmdesc = true;
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2015-12-03 07:34:10 +01:00
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}
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2015-12-07 04:23:20 +01:00
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static void spapr_machine_2_2_class_options(MachineClass *mc)
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2014-09-08 07:30:31 +02:00
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{
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2015-12-07 04:27:21 +01:00
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spapr_machine_2_3_class_options(mc);
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2015-12-03 07:47:22 +01:00
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SET_MACHINE_COMPAT(mc, SPAPR_COMPAT_2_2);
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2014-09-08 07:30:31 +02:00
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}
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2015-12-07 04:25:50 +01:00
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DEFINE_SPAPR_MACHINE(2_2, "2.2", false);
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2014-09-08 07:30:31 +02:00
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2015-12-03 07:34:10 +01:00
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/*
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* pseries-2.1
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*/
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#define SPAPR_COMPAT_2_1 \
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HW_COMPAT_2_1
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2015-01-30 02:53:18 +01:00
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2015-12-07 04:23:20 +01:00
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static void spapr_machine_2_1_instance_options(MachineState *machine)
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2015-12-03 07:34:10 +01:00
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{
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2015-12-07 04:23:20 +01:00
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spapr_machine_2_2_instance_options(machine);
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2015-12-03 07:34:10 +01:00
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}
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2015-04-23 08:21:37 +02:00
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2015-12-07 04:23:20 +01:00
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static void spapr_machine_2_1_class_options(MachineClass *mc)
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2015-04-23 08:21:37 +02:00
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{
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2015-12-07 04:27:21 +01:00
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spapr_machine_2_2_class_options(mc);
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2015-12-03 07:47:22 +01:00
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SET_MACHINE_COMPAT(mc, SPAPR_COMPAT_2_1);
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2015-04-23 08:21:37 +02:00
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}
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2015-12-07 04:25:50 +01:00
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DEFINE_SPAPR_MACHINE(2_1, "2.1", false);
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2015-08-12 05:15:56 +02:00
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2014-03-17 03:40:26 +01:00
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static void spapr_machine_register_types(void)
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2011-04-01 06:15:20 +02:00
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{
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2014-03-17 03:40:26 +01:00
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type_register_static(&spapr_machine_info);
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2011-04-01 06:15:20 +02:00
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}
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2014-03-17 03:40:26 +01:00
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type_init(spapr_machine_register_types)
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