2003-08-09 01:58:05 +02:00
|
|
|
/*
|
|
|
|
* Software MMU support
|
2007-09-16 23:08:06 +02:00
|
|
|
*
|
2011-09-21 22:00:18 +02:00
|
|
|
* Generate inline load/store functions for one MMU mode and data
|
|
|
|
* size.
|
|
|
|
*
|
2015-01-20 16:19:34 +01:00
|
|
|
* Generate a store function as well as signed and unsigned loads.
|
2011-09-21 22:00:18 +02:00
|
|
|
*
|
2014-03-28 19:11:26 +01:00
|
|
|
* Not used directly but included from cpu_ldst.h.
|
2011-09-21 22:00:18 +02:00
|
|
|
*
|
2003-08-09 01:58:05 +02:00
|
|
|
* Copyright (c) 2003 Fabrice Bellard
|
|
|
|
*
|
|
|
|
* This library is free software; you can redistribute it and/or
|
|
|
|
* modify it under the terms of the GNU Lesser General Public
|
|
|
|
* License as published by the Free Software Foundation; either
|
|
|
|
* version 2 of the License, or (at your option) any later version.
|
|
|
|
*
|
|
|
|
* This library is distributed in the hope that it will be useful,
|
|
|
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
|
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
|
|
|
* Lesser General Public License for more details.
|
|
|
|
*
|
|
|
|
* You should have received a copy of the GNU Lesser General Public
|
2009-07-16 22:47:01 +02:00
|
|
|
* License along with this library; if not, see <http://www.gnu.org/licenses/>.
|
2003-08-09 01:58:05 +02:00
|
|
|
*/
|
2016-06-09 19:31:47 +02:00
|
|
|
|
|
|
|
#if !defined(SOFTMMU_CODE_ACCESS)
|
2017-01-25 17:14:15 +01:00
|
|
|
#include "trace-root.h"
|
2016-06-09 19:31:47 +02:00
|
|
|
#endif
|
|
|
|
|
|
|
|
#include "trace/mem.h"
|
|
|
|
|
2003-08-09 01:58:05 +02:00
|
|
|
#if DATA_SIZE == 8
|
|
|
|
#define SUFFIX q
|
2003-10-27 22:22:23 +01:00
|
|
|
#define USUFFIX q
|
2003-08-09 01:58:05 +02:00
|
|
|
#define DATA_TYPE uint64_t
|
2015-07-10 11:56:50 +02:00
|
|
|
#define SHIFT 3
|
2003-08-09 01:58:05 +02:00
|
|
|
#elif DATA_SIZE == 4
|
|
|
|
#define SUFFIX l
|
2003-10-27 22:22:23 +01:00
|
|
|
#define USUFFIX l
|
2003-08-09 01:58:05 +02:00
|
|
|
#define DATA_TYPE uint32_t
|
2015-07-10 11:56:50 +02:00
|
|
|
#define SHIFT 2
|
2003-08-09 01:58:05 +02:00
|
|
|
#elif DATA_SIZE == 2
|
|
|
|
#define SUFFIX w
|
2003-10-27 22:22:23 +01:00
|
|
|
#define USUFFIX uw
|
2003-08-09 01:58:05 +02:00
|
|
|
#define DATA_TYPE uint16_t
|
|
|
|
#define DATA_STYPE int16_t
|
2015-07-10 11:56:50 +02:00
|
|
|
#define SHIFT 1
|
2003-08-09 01:58:05 +02:00
|
|
|
#elif DATA_SIZE == 1
|
|
|
|
#define SUFFIX b
|
2003-10-27 22:22:23 +01:00
|
|
|
#define USUFFIX ub
|
2003-08-09 01:58:05 +02:00
|
|
|
#define DATA_TYPE uint8_t
|
|
|
|
#define DATA_STYPE int8_t
|
2015-07-10 11:56:50 +02:00
|
|
|
#define SHIFT 0
|
2003-08-09 01:58:05 +02:00
|
|
|
#else
|
|
|
|
#error unsupported data size
|
|
|
|
#endif
|
|
|
|
|
|
|
|
#if DATA_SIZE == 8
|
|
|
|
#define RES_TYPE uint64_t
|
|
|
|
#else
|
2010-06-01 22:12:32 +02:00
|
|
|
#define RES_TYPE uint32_t
|
2003-08-09 01:58:05 +02:00
|
|
|
#endif
|
|
|
|
|
2014-03-28 11:15:30 +01:00
|
|
|
#ifdef SOFTMMU_CODE_ACCESS
|
2005-11-28 22:19:04 +01:00
|
|
|
#define ADDR_READ addr_code
|
2014-03-28 11:18:14 +01:00
|
|
|
#define MMUSUFFIX _cmmu
|
2019-10-21 17:09:10 +02:00
|
|
|
#define URETSUFFIX USUFFIX
|
|
|
|
#define SRETSUFFIX glue(s, SUFFIX)
|
2005-11-28 22:19:04 +01:00
|
|
|
#else
|
|
|
|
#define ADDR_READ addr_read
|
2014-03-28 11:18:14 +01:00
|
|
|
#define MMUSUFFIX _mmu
|
2015-07-10 11:56:50 +02:00
|
|
|
#define URETSUFFIX USUFFIX
|
|
|
|
#define SRETSUFFIX glue(s, SUFFIX)
|
2005-11-28 22:19:04 +01:00
|
|
|
#endif
|
2003-08-09 01:58:05 +02:00
|
|
|
|
2004-01-04 19:15:29 +01:00
|
|
|
/* generic load/store macros */
|
|
|
|
|
2011-09-18 16:55:46 +02:00
|
|
|
static inline RES_TYPE
|
2015-07-10 11:56:50 +02:00
|
|
|
glue(glue(glue(cpu_ld, USUFFIX), MEMSUFFIX), _ra)(CPUArchState *env,
|
|
|
|
target_ulong ptr,
|
|
|
|
uintptr_t retaddr)
|
2003-08-09 01:58:05 +02:00
|
|
|
{
|
2018-10-09 19:51:25 +02:00
|
|
|
CPUTLBEntry *entry;
|
2003-08-09 01:58:05 +02:00
|
|
|
RES_TYPE res;
|
2005-01-04 00:35:10 +01:00
|
|
|
target_ulong addr;
|
2007-10-14 09:07:08 +02:00
|
|
|
int mmu_idx;
|
2015-07-10 11:56:50 +02:00
|
|
|
TCGMemOpIdx oi;
|
2003-10-27 22:22:23 +01:00
|
|
|
|
2016-06-09 19:31:47 +02:00
|
|
|
#if !defined(SOFTMMU_CODE_ACCESS)
|
|
|
|
trace_guest_mem_before_exec(
|
2019-03-23 00:07:18 +01:00
|
|
|
env_cpu(env), ptr,
|
2016-06-09 19:31:47 +02:00
|
|
|
trace_mem_build_info(SHIFT, false, MO_TE, false));
|
|
|
|
#endif
|
|
|
|
|
2005-01-04 00:35:10 +01:00
|
|
|
addr = ptr;
|
2007-10-14 09:07:08 +02:00
|
|
|
mmu_idx = CPU_MMU_INDEX;
|
2018-10-09 19:51:25 +02:00
|
|
|
entry = tlb_entry(env, mmu_idx, addr);
|
|
|
|
if (unlikely(entry->ADDR_READ !=
|
2008-07-03 19:57:36 +02:00
|
|
|
(addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))))) {
|
2015-07-10 11:56:50 +02:00
|
|
|
oi = make_memop_idx(SHIFT, mmu_idx);
|
|
|
|
res = glue(glue(helper_ret_ld, URETSUFFIX), MMUSUFFIX)(env, addr,
|
|
|
|
oi, retaddr);
|
2003-08-09 01:58:05 +02:00
|
|
|
} else {
|
2018-10-09 19:51:25 +02:00
|
|
|
uintptr_t hostaddr = addr + entry->addend;
|
2015-01-20 16:19:34 +01:00
|
|
|
res = glue(glue(ld, USUFFIX), _p)((uint8_t *)hostaddr);
|
2003-08-09 01:58:05 +02:00
|
|
|
}
|
|
|
|
return res;
|
|
|
|
}
|
|
|
|
|
2015-07-10 11:56:50 +02:00
|
|
|
static inline RES_TYPE
|
|
|
|
glue(glue(cpu_ld, USUFFIX), MEMSUFFIX)(CPUArchState *env, target_ulong ptr)
|
|
|
|
{
|
|
|
|
return glue(glue(glue(cpu_ld, USUFFIX), MEMSUFFIX), _ra)(env, ptr, 0);
|
|
|
|
}
|
|
|
|
|
2003-08-09 01:58:05 +02:00
|
|
|
#if DATA_SIZE <= 2
|
2011-09-18 16:55:46 +02:00
|
|
|
static inline int
|
2015-07-10 11:56:50 +02:00
|
|
|
glue(glue(glue(cpu_lds, SUFFIX), MEMSUFFIX), _ra)(CPUArchState *env,
|
|
|
|
target_ulong ptr,
|
|
|
|
uintptr_t retaddr)
|
2003-08-09 01:58:05 +02:00
|
|
|
{
|
2018-10-09 19:51:25 +02:00
|
|
|
CPUTLBEntry *entry;
|
|
|
|
int res;
|
2005-01-04 00:35:10 +01:00
|
|
|
target_ulong addr;
|
2007-10-14 09:07:08 +02:00
|
|
|
int mmu_idx;
|
2015-07-10 11:56:50 +02:00
|
|
|
TCGMemOpIdx oi;
|
2003-10-27 22:22:23 +01:00
|
|
|
|
2016-06-09 19:31:47 +02:00
|
|
|
#if !defined(SOFTMMU_CODE_ACCESS)
|
|
|
|
trace_guest_mem_before_exec(
|
2019-03-23 00:07:18 +01:00
|
|
|
env_cpu(env), ptr,
|
2016-06-09 19:31:47 +02:00
|
|
|
trace_mem_build_info(SHIFT, true, MO_TE, false));
|
|
|
|
#endif
|
|
|
|
|
2005-01-04 00:35:10 +01:00
|
|
|
addr = ptr;
|
2007-10-14 09:07:08 +02:00
|
|
|
mmu_idx = CPU_MMU_INDEX;
|
2018-10-09 19:51:25 +02:00
|
|
|
entry = tlb_entry(env, mmu_idx, addr);
|
|
|
|
if (unlikely(entry->ADDR_READ !=
|
2008-07-03 19:57:36 +02:00
|
|
|
(addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))))) {
|
2015-07-10 11:56:50 +02:00
|
|
|
oi = make_memop_idx(SHIFT, mmu_idx);
|
|
|
|
res = (DATA_STYPE)glue(glue(helper_ret_ld, SRETSUFFIX),
|
|
|
|
MMUSUFFIX)(env, addr, oi, retaddr);
|
2003-08-09 01:58:05 +02:00
|
|
|
} else {
|
2018-10-09 19:51:25 +02:00
|
|
|
uintptr_t hostaddr = addr + entry->addend;
|
2015-01-20 16:19:34 +01:00
|
|
|
res = glue(glue(lds, SUFFIX), _p)((uint8_t *)hostaddr);
|
2003-08-09 01:58:05 +02:00
|
|
|
}
|
|
|
|
return res;
|
|
|
|
}
|
2015-07-10 11:56:50 +02:00
|
|
|
|
|
|
|
static inline int
|
|
|
|
glue(glue(cpu_lds, SUFFIX), MEMSUFFIX)(CPUArchState *env, target_ulong ptr)
|
|
|
|
{
|
|
|
|
return glue(glue(glue(cpu_lds, SUFFIX), MEMSUFFIX), _ra)(env, ptr, 0);
|
|
|
|
}
|
2003-08-09 01:58:05 +02:00
|
|
|
#endif
|
|
|
|
|
2014-03-28 11:15:30 +01:00
|
|
|
#ifndef SOFTMMU_CODE_ACCESS
|
2005-11-28 22:19:04 +01:00
|
|
|
|
2004-01-04 19:15:29 +01:00
|
|
|
/* generic store macro */
|
|
|
|
|
2011-09-18 16:55:46 +02:00
|
|
|
static inline void
|
2015-07-10 11:56:50 +02:00
|
|
|
glue(glue(glue(cpu_st, SUFFIX), MEMSUFFIX), _ra)(CPUArchState *env,
|
|
|
|
target_ulong ptr,
|
|
|
|
RES_TYPE v, uintptr_t retaddr)
|
2003-08-09 01:58:05 +02:00
|
|
|
{
|
2018-10-09 19:51:25 +02:00
|
|
|
CPUTLBEntry *entry;
|
2005-01-04 00:35:10 +01:00
|
|
|
target_ulong addr;
|
2007-10-14 09:07:08 +02:00
|
|
|
int mmu_idx;
|
2015-07-10 11:56:50 +02:00
|
|
|
TCGMemOpIdx oi;
|
2003-10-27 22:22:23 +01:00
|
|
|
|
2016-06-09 19:31:47 +02:00
|
|
|
#if !defined(SOFTMMU_CODE_ACCESS)
|
|
|
|
trace_guest_mem_before_exec(
|
2019-03-23 00:07:18 +01:00
|
|
|
env_cpu(env), ptr,
|
2016-06-09 19:31:47 +02:00
|
|
|
trace_mem_build_info(SHIFT, false, MO_TE, true));
|
|
|
|
#endif
|
|
|
|
|
2005-01-04 00:35:10 +01:00
|
|
|
addr = ptr;
|
2007-10-14 09:07:08 +02:00
|
|
|
mmu_idx = CPU_MMU_INDEX;
|
2018-10-09 19:51:25 +02:00
|
|
|
entry = tlb_entry(env, mmu_idx, addr);
|
cputlb: read CPUTLBEntry.addr_write atomically
Updates can come from other threads, so readers that do not
take tlb_lock must use atomic_read to avoid undefined
behaviour (UB).
This completes the conversion to tlb_lock. This conversion results
on average in no performance loss, as the following experiments
(run on an Intel i7-6700K CPU @ 4.00GHz) show.
1. aarch64 bootup+shutdown test:
- Before:
Performance counter stats for 'taskset -c 0 ../img/aarch64/die.sh' (10 runs):
7487.087786 task-clock (msec) # 0.998 CPUs utilized ( +- 0.12% )
31,574,905,303 cycles # 4.217 GHz ( +- 0.12% )
57,097,908,812 instructions # 1.81 insns per cycle ( +- 0.08% )
10,255,415,367 branches # 1369.747 M/sec ( +- 0.08% )
173,278,962 branch-misses # 1.69% of all branches ( +- 0.18% )
7.504481349 seconds time elapsed ( +- 0.14% )
- After:
Performance counter stats for 'taskset -c 0 ../img/aarch64/die.sh' (10 runs):
7462.441328 task-clock (msec) # 0.998 CPUs utilized ( +- 0.07% )
31,478,476,520 cycles # 4.218 GHz ( +- 0.07% )
57,017,330,084 instructions # 1.81 insns per cycle ( +- 0.05% )
10,251,929,667 branches # 1373.804 M/sec ( +- 0.05% )
173,023,787 branch-misses # 1.69% of all branches ( +- 0.11% )
7.474970463 seconds time elapsed ( +- 0.07% )
2. SPEC06int:
SPEC06int (test set)
[Y axis: Speedup over master]
1.15 +-+----+------+------+------+------+------+-------+------+------+------+------+------+------+----+-+
| |
1.1 +-+.................................+++.............................+ tlb-lock-v2 (m+++x) +-+
| +++ | +++ tlb-lock-v3 (spinl|ck) |
| +++ | | +++ +++ | | |
1.05 +-+....+++...........####.........|####.+++.|......|.....###....+++...........+++....###.........+-+
| ### ++#| # |# |# ***### +++### +++#+# | +++ | #|# ### |
1 +-+++***+#++++####+++#++#++++++++++#++#+*+*++#++++#+#+****+#++++###++++###++++###++++#+#++++#+#+++-+
| *+* # #++# *** # #### *** # * *++# ****+# *| * # ****|# |# # #|# #+# # # |
0.95 +-+..*.*.#....#..#.*|*..#...#..#.*|*..#.*.*..#.*|.*.#.*++*.#.*++*+#.****.#....#+#....#.#..++#.#..+-+
| * * # # # *|* # # # *|* # * * # *++* # * * # * * # * |* # ++# # # # *** # |
| * * # ++# # *+* # # # *|* # * * # * * # * * # * * # *++* # **** # ++# # * * # |
0.9 +-+..*.*.#...|#..#.*.*..#.++#..#.*|*..#.*.*..#.*..*.#.*..*.#.*..*.#.*..*.#.*.|*.#...|#.#..*.*.#..+-+
| * * # *** # * * # |# # *+* # * * # * * # * * # * * # * * # *++* # |# # * * # |
0.85 +-+..*.*.#..*|*..#.*.*..#.***..#.*.*..#.*.*..#.*..*.#.*..*.#.*..*.#.*..*.#.*..*.#.****.#..*.*.#..+-+
| * * # *+* # * * # *|* # * * # * * # * * # * * # * * # * * # * * # * |* # * * # |
| * * # * * # * * # *+* # * * # * * # * * # * * # * * # * * # * * # * |* # * * # |
0.8 +-+..*.*.#..*.*..#.*.*..#.*.*..#.*.*..#.*.*..#.*..*.#.*..*.#.*..*.#.*..*.#.*..*.#.*++*.#..*.*.#..+-+
| * * # * * # * * # * * # * * # * * # * * # * * # * * # * * # * * # * * # * * # |
0.75 +-+--***##--***###-***###-***###-***###-***###-****##-****##-****##-****##-****##-****##--***##--+-+
400.perlben401.bzip2403.gcc429.m445.gob456.hmme45462.libqua464.h26471.omnet473483.xalancbmkgeomean
png: https://imgur.com/a/BHzpPTW
Notes:
- tlb-lock-v2 corresponds to an implementation with a mutex.
- tlb-lock-v3 corresponds to the current implementation, i.e.
a spinlock and a single lock acquisition in tlb_set_page_with_attrs.
Signed-off-by: Emilio G. Cota <cota@braap.org>
Message-Id: <20181016153840.25877-1-cota@braap.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-10-16 17:38:40 +02:00
|
|
|
if (unlikely(tlb_addr_write(entry) !=
|
2008-07-03 19:57:36 +02:00
|
|
|
(addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))))) {
|
2015-07-10 11:56:50 +02:00
|
|
|
oi = make_memop_idx(SHIFT, mmu_idx);
|
|
|
|
glue(glue(helper_ret_st, SUFFIX), MMUSUFFIX)(env, addr, v, oi,
|
|
|
|
retaddr);
|
2003-08-09 01:58:05 +02:00
|
|
|
} else {
|
2018-10-09 19:51:25 +02:00
|
|
|
uintptr_t hostaddr = addr + entry->addend;
|
2015-01-20 16:19:34 +01:00
|
|
|
glue(glue(st, SUFFIX), _p)((uint8_t *)hostaddr, v);
|
2003-08-09 01:58:05 +02:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2015-07-10 11:56:50 +02:00
|
|
|
static inline void
|
|
|
|
glue(glue(cpu_st, SUFFIX), MEMSUFFIX)(CPUArchState *env, target_ulong ptr,
|
|
|
|
RES_TYPE v)
|
|
|
|
{
|
|
|
|
glue(glue(glue(cpu_st, SUFFIX), MEMSUFFIX), _ra)(env, ptr, v, 0);
|
|
|
|
}
|
|
|
|
|
2014-03-28 11:15:30 +01:00
|
|
|
#endif /* !SOFTMMU_CODE_ACCESS */
|
2005-11-28 22:19:04 +01:00
|
|
|
|
2003-08-09 01:58:05 +02:00
|
|
|
#undef RES_TYPE
|
|
|
|
#undef DATA_TYPE
|
|
|
|
#undef DATA_STYPE
|
|
|
|
#undef SUFFIX
|
2003-10-27 22:22:23 +01:00
|
|
|
#undef USUFFIX
|
2003-08-09 01:58:05 +02:00
|
|
|
#undef DATA_SIZE
|
2003-10-27 22:22:23 +01:00
|
|
|
#undef MMUSUFFIX
|
2005-11-28 22:19:04 +01:00
|
|
|
#undef ADDR_READ
|
2015-07-10 11:56:50 +02:00
|
|
|
#undef URETSUFFIX
|
|
|
|
#undef SRETSUFFIX
|
|
|
|
#undef SHIFT
|