2007-11-17 18:14:51 +01:00
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/* Declarations for use by board files for creating devices. */
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#ifndef HW_BOARDS_H
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#define HW_BOARDS_H
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2019-08-12 07:23:46 +02:00
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#include "exec/memory.h"
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2020-02-19 17:08:36 +01:00
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#include "sysemu/hostmem.h"
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2012-12-17 18:20:04 +01:00
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#include "sysemu/blockdev.h"
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2014-09-26 22:45:31 +02:00
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#include "sysemu/accel.h"
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2019-06-19 22:10:41 +02:00
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#include "qapi/qapi-types-machine.h"
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2019-05-23 16:35:07 +02:00
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#include "qemu/module.h"
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2014-03-05 18:30:45 +01:00
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#include "qom/object.h"
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2019-07-09 17:20:52 +02:00
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#include "hw/core/cpu.h"
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2009-07-15 13:48:21 +02:00
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2014-05-14 11:43:15 +02:00
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#define TYPE_MACHINE_SUFFIX "-machine"
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2015-08-20 23:54:27 +02:00
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/* Machine class name that needs to be used for class-name-based machine
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* type lookup to work.
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*/
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#define MACHINE_TYPE_NAME(machinename) (machinename TYPE_MACHINE_SUFFIX)
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2014-03-05 18:30:45 +01:00
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#define TYPE_MACHINE "machine"
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2014-03-18 16:26:35 +01:00
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#undef MACHINE /* BSD defines it and QEMU does not use it */
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2014-03-05 18:30:45 +01:00
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#define MACHINE(obj) \
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OBJECT_CHECK(MachineState, (obj), TYPE_MACHINE)
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#define MACHINE_GET_CLASS(obj) \
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OBJECT_GET_CLASS(MachineClass, (obj), TYPE_MACHINE)
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#define MACHINE_CLASS(klass) \
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OBJECT_CLASS_CHECK(MachineClass, (klass), TYPE_MACHINE)
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2014-03-05 18:30:47 +01:00
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extern MachineState *current_machine;
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2017-05-10 13:29:58 +02:00
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void machine_run_board_init(MachineState *machine);
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2015-01-06 14:29:13 +01:00
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bool machine_usb(MachineState *machine);
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2015-02-04 16:43:53 +01:00
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int machine_phandle_start(MachineState *machine);
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2015-02-04 16:43:54 +01:00
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bool machine_dump_guest_core(MachineState *machine);
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2015-02-04 16:43:55 +01:00
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bool machine_mem_merge(MachineState *machine);
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2017-02-09 12:08:38 +01:00
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HotpluggableCPUList *machine_query_hotpluggable_cpus(MachineState *machine);
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2017-05-10 13:29:50 +02:00
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void machine_set_cpu_numa_node(MachineState *machine,
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const CpuInstanceProperties *props,
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Error **errp);
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2015-01-06 14:29:13 +01:00
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2017-11-25 16:16:05 +01:00
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void machine_class_allow_dynamic_sysbus_dev(MachineClass *mc, const char *type);
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2020-02-19 17:08:38 +01:00
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/*
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* Checks that backend isn't used, preps it for exclusive usage and
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* returns migratable MemoryRegion provided by backend.
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*/
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MemoryRegion *machine_consume_memdev(MachineState *machine,
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HostMemoryBackend *backend);
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2017-11-25 16:16:05 +01:00
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2016-03-03 15:28:56 +01:00
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/**
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* CPUArchId:
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* @arch_id - architecture-dependent CPU ID of present or possible CPU
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* @cpu - pointer to corresponding CPU object if it's present on NULL otherwise
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2018-01-10 16:22:50 +01:00
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* @type - QOM class name of possible @cpu object
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2017-02-09 12:08:34 +01:00
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* @props - CPU object properties, initialized by board
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2017-02-09 12:08:38 +01:00
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* #vcpus_count - number of threads provided by @cpu object
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2016-03-03 15:28:56 +01:00
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*/
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2019-08-12 07:23:53 +02:00
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typedef struct CPUArchId {
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2016-03-03 15:28:56 +01:00
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uint64_t arch_id;
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2017-02-09 12:08:38 +01:00
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int64_t vcpus_count;
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2017-02-09 12:08:34 +01:00
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CpuInstanceProperties props;
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2017-02-09 12:08:36 +01:00
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Object *cpu;
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2018-01-10 16:22:50 +01:00
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const char *type;
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2016-03-03 15:28:56 +01:00
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} CPUArchId;
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/**
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* CPUArchIdList:
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* @len - number of @CPUArchId items in @cpus array
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* @cpus - array of present or possible CPUs for current machine configuration
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*/
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typedef struct {
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int len;
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2020-03-04 16:38:16 +01:00
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CPUArchId cpus[];
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2016-03-03 15:28:56 +01:00
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} CPUArchIdList;
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2014-03-05 18:30:45 +01:00
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/**
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* MachineClass:
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2018-06-25 11:05:12 +02:00
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* @deprecation_reason: If set, the machine is marked as deprecated. The
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* string should provide some clear information about what to use instead.
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2017-11-13 14:55:27 +01:00
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* @max_cpus: maximum number of CPUs supported. Default: 1
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* @min_cpus: minimum number of CPUs supported. Default: 1
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* @default_cpus: number of CPUs instantiated if none are specified. Default: 1
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2020-02-07 17:19:47 +01:00
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* @is_default:
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* If true QEMU will use this machine by default if no '-M' option is given.
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2014-06-02 15:25:03 +02:00
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* @get_hotplug_handler: this function is called during bus-less
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* device hotplug. If defined it returns pointer to an instance
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* of HotplugHandler object, which handles hotplug operation
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* for a given @dev. It may return NULL if @dev doesn't require
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* any actions to be performed by hotplug handler.
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2017-05-10 13:29:45 +02:00
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* @cpu_index_to_instance_props:
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* used to provide @cpu_index to socket/core/thread number mapping, allowing
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* legacy code to perform maping from cpu_index to topology properties
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* Returns: tuple of socket/core/thread ids given cpu_index belongs to.
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2015-03-19 18:09:21 +01:00
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* used to provide @cpu_index to socket number mapping, allowing
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* a machine to group CPU threads belonging to the same socket/package
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* Returns: socket number given cpu_index belongs to.
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2015-11-12 18:29:54 +01:00
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* @hw_version:
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* Value of QEMU_VERSION when the machine was added to QEMU.
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* Set only by old machines because they need to keep
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* compatibility on code that exposed QEMU_VERSION to guests in
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* the past (and now use qemu_hw_version()).
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2016-03-03 15:28:56 +01:00
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* @possible_cpu_arch_ids:
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* Returns an array of @CPUArchId architecture-dependent CPU IDs
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* which includes CPU IDs for present and possible to hotplug CPUs.
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* Caller is responsible for freeing returned list.
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2017-06-01 12:53:28 +02:00
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* @get_default_cpu_node_id:
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* returns default board specific node_id value for CPU slot specified by
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* index @idx in @ms->possible_cpus[]
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2017-02-10 11:20:57 +01:00
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* @has_hotpluggable_cpus:
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* If true, board supports CPUs creation with -device/device_add.
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2017-09-13 18:04:55 +02:00
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* @default_cpu_type:
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* specifies default CPU_TYPE, which will be used for parsing target
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* specific features and for creating CPUs if CPU name wasn't provided
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* explicitly at CLI
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2016-10-24 17:26:49 +02:00
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* @minimum_page_bits:
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* If non-zero, the board promises never to create a CPU with a page size
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* smaller than this, so QEMU can use a more efficient larger page
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* size than the target architecture's minimum. (Attempting to create
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* such a CPU will fail.) Note that changing this is a migration
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* compatibility break for the machine.
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2017-09-07 14:54:54 +02:00
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* @ignore_memory_transaction_failures:
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* If this is flag is true then the CPU will ignore memory transaction
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* failures which should cause the CPU to take an exception due to an
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* access to an unassigned physical address; the transaction will instead
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* return zero (for a read) or be ignored (for a write). This should be
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* set only by legacy board models which rely on the old RAZ/WI behaviour
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* for handling devices that QEMU does not yet model. New board models
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* should instead use "unimplemented-device" for all memory ranges where
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* the guest will attempt to probe for a device that QEMU doesn't
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* implement and a stub device is required.
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2019-03-04 11:13:33 +01:00
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* @kvm_type:
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* Return the type of KVM corresponding to the kvm-type string option or
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* computed based on other criteria such as the host kernel capabilities.
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2019-06-10 15:10:07 +02:00
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* @numa_mem_supported:
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* true if '--numa node.mem' option is supported and false otherwise
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2019-06-20 07:45:24 +02:00
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* @smp_parse:
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* The function pointer to hook different machine specific functions for
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* parsing "smp-opts" from QemuOpts to MachineState::CpuTopology and more
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* machine specific topology fields, such as smp_dies for PCMachine.
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2019-09-16 10:07:16 +02:00
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* @hotplug_allowed:
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* If the hook is provided, then it'll be called for each device
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* hotplug to check whether the device hotplug is allowed. Return
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* true to grant allowance or false to reject the hotplug. When
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* false is returned, an error must be set to show the reason of
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* the rejection. If the hook is not provided, all hotplug will be
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* allowed.
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2020-02-19 17:08:37 +01:00
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* @default_ram_id:
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* Specifies inital RAM MemoryRegion name to be used for default backend
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* creation if user explicitly hasn't specified backend with "memory-backend"
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* property.
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* It also will be used as a way to optin into "-m" option support.
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* If it's not set by board, '-m' will be ignored and generic code will
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* not create default RAM MemoryRegion.
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2014-03-05 18:30:45 +01:00
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*/
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struct MachineClass {
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/*< private >*/
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ObjectClass parent_class;
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/*< public >*/
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well-defined listing order for machine types
Commit 261747f1 ("vl: Use MachineClass instead of global QEMUMachine
list") broke the ordering of the machine types in the user-visible output
of
qemu-system-XXXX -M \?
This occurred because registration was rebased from a manually maintained
linked list to GLib hash tables:
qemu_register_machine()
type_register()
type_register_internal()
type_table_add()
g_hash_table_insert()
and because the listing was rebased accordingly, from the traversal of the
list to the traversal of the hash table (rendered as an ad-hoc list):
machine_parse()
object_class_get_list(TYPE_MACHINE)
object_class_foreach()
g_hash_table_foreach()
The current order is a "random" one, for practical purposes, which is
annoying for users.
Introduce new members QEMUMachine.family and MachineClass.family, allowing
machine types to be "clustered". Introduce a comparator function that
establishes a total ordering between machine types, ordering machine types
in the same family next to each other. In machine_parse(), list the
supported machine types sorted with the comparator function.
The comparator function:
- sorts whole families before standalone machine types,
- sorts whole families between each other in alphabetically increasing
order,
- sorts machine types inside the same family in alphabetically decreasing
order,
- sorts standalone machine types between each other in alphabetically
increasing order.
After this patch, all machine types are considered standalone, and
accordingly, the output is alphabetically ascending. This will be refined
in the following patches.
Effects on the x86_64 output:
Before:
> Supported machines are:
> pc-0.13 Standard PC (i440FX + PIIX, 1996)
> pc-i440fx-2.0 Standard PC (i440FX + PIIX, 1996)
> pc-1.0 Standard PC (i440FX + PIIX, 1996)
> pc-i440fx-2.1 Standard PC (i440FX + PIIX, 1996)
> pc-q35-1.7 Standard PC (Q35 + ICH9, 2009)
> pc-1.1 Standard PC (i440FX + PIIX, 1996)
> pc-0.14 Standard PC (i440FX + PIIX, 1996)
> pc-q35-2.0 Standard PC (Q35 + ICH9, 2009)
> pc-i440fx-1.4 Standard PC (i440FX + PIIX, 1996)
> pc-i440fx-1.5 Standard PC (i440FX + PIIX, 1996)
> pc-0.15 Standard PC (i440FX + PIIX, 1996)
> pc-q35-1.4 Standard PC (Q35 + ICH9, 2009)
> isapc ISA-only PC
> pc Standard PC (i440FX + PIIX, 1996) (alias of pc-i440fx-2.2)
> pc-i440fx-2.2 Standard PC (i440FX + PIIX, 1996) (default)
> pc-1.2 Standard PC (i440FX + PIIX, 1996)
> pc-0.10 Standard PC (i440FX + PIIX, 1996)
> pc-0.11 Standard PC (i440FX + PIIX, 1996)
> pc-q35-2.1 Standard PC (Q35 + ICH9, 2009)
> q35 Standard PC (Q35 + ICH9, 2009) (alias of pc-q35-2.2)
> pc-q35-2.2 Standard PC (Q35 + ICH9, 2009)
> pc-i440fx-1.6 Standard PC (i440FX + PIIX, 1996)
> pc-i440fx-1.7 Standard PC (i440FX + PIIX, 1996)
> none empty machine
> pc-q35-1.5 Standard PC (Q35 + ICH9, 2009)
> pc-q35-1.6 Standard PC (Q35 + ICH9, 2009)
> pc-0.12 Standard PC (i440FX + PIIX, 1996)
> pc-1.3 Standard PC (i440FX + PIIX, 1996)
After:
> Supported machines are:
> isapc ISA-only PC
> none empty machine
> pc-0.10 Standard PC (i440FX + PIIX, 1996)
> pc-0.11 Standard PC (i440FX + PIIX, 1996)
> pc-0.12 Standard PC (i440FX + PIIX, 1996)
> pc-0.13 Standard PC (i440FX + PIIX, 1996)
> pc-0.14 Standard PC (i440FX + PIIX, 1996)
> pc-0.15 Standard PC (i440FX + PIIX, 1996)
> pc-1.0 Standard PC (i440FX + PIIX, 1996)
> pc-1.1 Standard PC (i440FX + PIIX, 1996)
> pc-1.2 Standard PC (i440FX + PIIX, 1996)
> pc-1.3 Standard PC (i440FX + PIIX, 1996)
> pc-i440fx-1.4 Standard PC (i440FX + PIIX, 1996)
> pc-i440fx-1.5 Standard PC (i440FX + PIIX, 1996)
> pc-i440fx-1.6 Standard PC (i440FX + PIIX, 1996)
> pc-i440fx-1.7 Standard PC (i440FX + PIIX, 1996)
> pc-i440fx-2.0 Standard PC (i440FX + PIIX, 1996)
> pc-i440fx-2.1 Standard PC (i440FX + PIIX, 1996)
> pc Standard PC (i440FX + PIIX, 1996) (alias of pc-i440fx-2.2)
> pc-i440fx-2.2 Standard PC (i440FX + PIIX, 1996) (default)
> pc-q35-1.4 Standard PC (Q35 + ICH9, 2009)
> pc-q35-1.5 Standard PC (Q35 + ICH9, 2009)
> pc-q35-1.6 Standard PC (Q35 + ICH9, 2009)
> pc-q35-1.7 Standard PC (Q35 + ICH9, 2009)
> pc-q35-2.0 Standard PC (Q35 + ICH9, 2009)
> pc-q35-2.1 Standard PC (Q35 + ICH9, 2009)
> q35 Standard PC (Q35 + ICH9, 2009) (alias of pc-q35-2.2)
> pc-q35-2.2 Standard PC (Q35 + ICH9, 2009)
Effects on the aarch64 output:
Before:
> Supported machines are:
> lm3s811evb Stellaris LM3S811EVB
> canon-a1100 Canon PowerShot A1100 IS
> vexpress-a15 ARM Versatile Express for Cortex-A15
> vexpress-a9 ARM Versatile Express for Cortex-A9
> xilinx-zynq-a9 Xilinx Zynq Platform Baseboard for Cortex-A9
> connex Gumstix Connex (PXA255)
> n800 Nokia N800 tablet aka. RX-34 (OMAP2420)
> lm3s6965evb Stellaris LM3S6965EVB
> versatileab ARM Versatile/AB (ARM926EJ-S)
> borzoi Borzoi PDA (PXA270)
> tosa Tosa PDA (PXA255)
> cheetah Palm Tungsten|E aka. Cheetah PDA (OMAP310)
> midway Calxeda Midway (ECX-2000)
> mainstone Mainstone II (PXA27x)
> n810 Nokia N810 tablet aka. RX-44 (OMAP2420)
> terrier Terrier PDA (PXA270)
> highbank Calxeda Highbank (ECX-1000)
> cubieboard cubietech cubieboard
> sx1-v1 Siemens SX1 (OMAP310) V1
> sx1 Siemens SX1 (OMAP310) V2
> realview-eb-mpcore ARM RealView Emulation Baseboard (ARM11MPCore)
> kzm ARM KZM Emulation Baseboard (ARM1136)
> akita Akita PDA (PXA270)
> z2 Zipit Z2 (PXA27x)
> musicpal Marvell 88w8618 / MusicPal (ARM926EJ-S)
> realview-pb-a8 ARM RealView Platform Baseboard for Cortex-A8
> versatilepb ARM Versatile/PB (ARM926EJ-S)
> realview-eb ARM RealView Emulation Baseboard (ARM926EJ-S)
> realview-pbx-a9 ARM RealView Platform Baseboard Explore for Cortex-A9
> spitz Spitz PDA (PXA270)
> none empty machine
> virt ARM Virtual Machine
> collie Collie PDA (SA-1110)
> smdkc210 Samsung SMDKC210 board (Exynos4210)
> verdex Gumstix Verdex (PXA270)
> nuri Samsung NURI board (Exynos4210)
> integratorcp ARM Integrator/CP (ARM926EJ-S)
After:
> Supported machines are:
> akita Akita PDA (PXA270)
> borzoi Borzoi PDA (PXA270)
> canon-a1100 Canon PowerShot A1100 IS
> cheetah Palm Tungsten|E aka. Cheetah PDA (OMAP310)
> collie Collie PDA (SA-1110)
> connex Gumstix Connex (PXA255)
> cubieboard cubietech cubieboard
> highbank Calxeda Highbank (ECX-1000)
> integratorcp ARM Integrator/CP (ARM926EJ-S)
> kzm ARM KZM Emulation Baseboard (ARM1136)
> lm3s6965evb Stellaris LM3S6965EVB
> lm3s811evb Stellaris LM3S811EVB
> mainstone Mainstone II (PXA27x)
> midway Calxeda Midway (ECX-2000)
> musicpal Marvell 88w8618 / MusicPal (ARM926EJ-S)
> n800 Nokia N800 tablet aka. RX-34 (OMAP2420)
> n810 Nokia N810 tablet aka. RX-44 (OMAP2420)
> none empty machine
> nuri Samsung NURI board (Exynos4210)
> realview-eb ARM RealView Emulation Baseboard (ARM926EJ-S)
> realview-eb-mpcore ARM RealView Emulation Baseboard (ARM11MPCore)
> realview-pb-a8 ARM RealView Platform Baseboard for Cortex-A8
> realview-pbx-a9 ARM RealView Platform Baseboard Explore for Cortex-A9
> smdkc210 Samsung SMDKC210 board (Exynos4210)
> spitz Spitz PDA (PXA270)
> sx1 Siemens SX1 (OMAP310) V2
> sx1-v1 Siemens SX1 (OMAP310) V1
> terrier Terrier PDA (PXA270)
> tosa Tosa PDA (PXA255)
> verdex Gumstix Verdex (PXA270)
> versatileab ARM Versatile/AB (ARM926EJ-S)
> versatilepb ARM Versatile/PB (ARM926EJ-S)
> vexpress-a15 ARM Versatile Express for Cortex-A15
> vexpress-a9 ARM Versatile Express for Cortex-A9
> virt ARM Virtual Machine
> xilinx-zynq-a9 Xilinx Zynq Platform Baseboard for Cortex-A9
> z2 Zipit Z2 (PXA27x)
RHBZ: https://bugzilla.redhat.com/show_bug.cgi?id=1145042
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Marcel Apfelbaum <marcel.a@redhat.com>
Acked-by: David Gibson <david@gibson.dropbear.id.au>
2014-09-22 22:38:35 +02:00
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|
|
const char *family; /* NULL iff @name identifies a standalone machtype */
|
2016-07-13 12:45:50 +02:00
|
|
|
char *name;
|
2014-04-09 19:34:50 +02:00
|
|
|
const char *alias;
|
|
|
|
const char *desc;
|
2018-06-25 11:05:12 +02:00
|
|
|
const char *deprecation_reason;
|
2014-04-09 19:34:50 +02:00
|
|
|
|
2014-05-07 16:42:57 +02:00
|
|
|
void (*init)(MachineState *state);
|
2019-05-18 22:54:20 +02:00
|
|
|
void (*reset)(MachineState *state);
|
2019-07-22 07:32:13 +02:00
|
|
|
void (*wakeup)(MachineState *state);
|
2019-05-18 22:54:20 +02:00
|
|
|
void (*hot_add_cpu)(MachineState *state, const int64_t id, Error **errp);
|
2019-03-04 11:13:33 +01:00
|
|
|
int (*kvm_type)(MachineState *machine, const char *arg);
|
2019-06-20 07:45:24 +02:00
|
|
|
void (*smp_parse)(MachineState *ms, QemuOpts *opts);
|
2014-04-09 19:34:50 +02:00
|
|
|
|
|
|
|
BlockInterfaceType block_default_type;
|
pc/vl: Add units-per-default-bus property
This patch adds the 'units_per_default_bus' property which
allows individual boards to declare their desired
index => (bus,unit) mapping for their default HBA, so that
boards such as Q35 can specify that its default if_ide HBA,
AHCI, only accepts one unit per bus.
This property only overrides the mapping for drives matching
the block_default_type interface.
This patch also adds this property to *all* past and present
Q35 machine types. This retroactive addition is justified
because the previous erroneous index=>(bus,unit) mappings
caused by lack of such a property were not utilized due to
lack of initialization code in the Q35 init routine.
Further, semantically, the Q35 board type has always had the
property that its default HBA, AHCI, only accepts one unit per
bus. The new code added to add devices to drives relies upon
the accuracy of this mapping. Thus, the property is applied
retroactively to reduce complexity of allowing IDE HBAs with
different units per bus.
Examples:
Prior to this patch, all IDE HBAs were assumed to use 2 units
per bus (Master, Slave). When using Q35 and AHCI, however, we
only allow one unit per bus.
-hdb foo.qcow2 would become index=1, or bus=0,unit=1.
-hdd foo.qcow2 would become index=3, or bus=1,unit=1.
-drive file=foo.qcow2,index=5 becomes bus=2,unit=1.
These are invalid for AHCI. They now become, under Q35 only:
-hdb foo.qcow2 --> index=1, bus=1, unit=0.
-hdd foo.qcow2 --> index=3, bus=3, unit=0.
-drive file=foo.qcow2,index=5 --> bus=5,unit=0.
The mapping is adjusted based on the fact that the default IF
for the Q35 machine type is IF_IDE, and units-per-default-bus
overrides the IDE mapping from its default of 2 units per bus
to just 1 unit per bus.
Signed-off-by: John Snow <jsnow@redhat.com>
Reviewed-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Message-id: 1412187569-23452-4-git-send-email-jsnow@redhat.com
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2014-10-01 20:19:26 +02:00
|
|
|
int units_per_default_bus;
|
2014-04-09 19:34:50 +02:00
|
|
|
int max_cpus;
|
2017-11-13 14:55:27 +01:00
|
|
|
int min_cpus;
|
|
|
|
int default_cpus;
|
2014-04-09 19:34:50 +02:00
|
|
|
unsigned int no_serial:1,
|
|
|
|
no_parallel:1,
|
|
|
|
no_floppy:1,
|
|
|
|
no_cdrom:1,
|
2014-07-01 16:14:41 +02:00
|
|
|
no_sdcard:1,
|
2016-04-07 16:12:58 +02:00
|
|
|
pci_allow_0_address:1,
|
|
|
|
legacy_fw_cfg_order:1;
|
2020-02-07 17:19:47 +01:00
|
|
|
bool is_default;
|
2014-04-09 19:34:50 +02:00
|
|
|
const char *default_machine_opts;
|
|
|
|
const char *default_boot_order;
|
2014-10-28 10:09:11 +01:00
|
|
|
const char *default_display;
|
2018-12-01 20:44:11 +01:00
|
|
|
GPtrArray *compat_props;
|
2014-04-09 19:34:50 +02:00
|
|
|
const char *hw_version;
|
2015-05-07 07:33:57 +02:00
|
|
|
ram_addr_t default_ram_size;
|
2017-09-13 18:04:55 +02:00
|
|
|
const char *default_cpu_type;
|
2018-12-20 06:40:35 +01:00
|
|
|
bool default_kernel_irqchip_split;
|
2015-12-01 23:58:08 +01:00
|
|
|
bool option_rom_has_mr;
|
|
|
|
bool rom_file_has_mr;
|
2016-10-24 17:26:49 +02:00
|
|
|
int minimum_page_bits;
|
2017-02-10 11:20:57 +01:00
|
|
|
bool has_hotpluggable_cpus;
|
2017-09-07 14:54:54 +02:00
|
|
|
bool ignore_memory_transaction_failures;
|
2017-03-21 11:25:42 +01:00
|
|
|
int numa_mem_align_shift;
|
2017-10-03 22:05:09 +02:00
|
|
|
const char **valid_cpu_types;
|
2017-11-25 16:16:05 +01:00
|
|
|
strList *allowed_dynamic_sysbus_devices;
|
2017-11-14 03:34:01 +01:00
|
|
|
bool auto_enable_numa_with_memhp;
|
2017-05-02 18:29:55 +02:00
|
|
|
void (*numa_auto_assign_ram)(MachineClass *mc, NodeInfo *nodes,
|
|
|
|
int nb_nodes, ram_addr_t size);
|
2018-08-10 14:40:27 +02:00
|
|
|
bool ignore_boot_device_suffixes;
|
2018-11-14 21:41:01 +01:00
|
|
|
bool smbus_no_migration_support;
|
2019-03-08 19:20:53 +01:00
|
|
|
bool nvdimm_supported;
|
2019-06-10 15:10:07 +02:00
|
|
|
bool numa_mem_supported;
|
2019-09-05 10:32:38 +02:00
|
|
|
bool auto_enable_numa;
|
2020-02-19 17:08:37 +01:00
|
|
|
const char *default_ram_id;
|
2014-06-02 15:25:03 +02:00
|
|
|
|
|
|
|
HotplugHandler *(*get_hotplug_handler)(MachineState *machine,
|
|
|
|
DeviceState *dev);
|
2019-09-16 10:07:16 +02:00
|
|
|
bool (*hotplug_allowed)(MachineState *state, DeviceState *dev,
|
|
|
|
Error **errp);
|
2017-05-10 13:29:45 +02:00
|
|
|
CpuInstanceProperties (*cpu_index_to_instance_props)(MachineState *machine,
|
|
|
|
unsigned cpu_index);
|
2017-01-18 18:13:20 +01:00
|
|
|
const CPUArchIdList *(*possible_cpu_arch_ids)(MachineState *machine);
|
2017-06-01 12:53:28 +02:00
|
|
|
int64_t (*get_default_cpu_node_id)(const MachineState *ms, int idx);
|
2014-03-05 18:30:45 +01:00
|
|
|
};
|
|
|
|
|
2018-04-23 18:51:17 +02:00
|
|
|
/**
|
2018-04-23 18:51:23 +02:00
|
|
|
* DeviceMemoryState:
|
2018-04-23 18:51:17 +02:00
|
|
|
* @base: address in guest physical address space where the memory
|
|
|
|
* address space for memory devices starts
|
|
|
|
* @mr: address space container for memory devices
|
|
|
|
*/
|
2018-04-23 18:51:23 +02:00
|
|
|
typedef struct DeviceMemoryState {
|
2018-04-23 18:51:17 +02:00
|
|
|
hwaddr base;
|
|
|
|
MemoryRegion mr;
|
2018-04-23 18:51:23 +02:00
|
|
|
} DeviceMemoryState;
|
2018-04-23 18:51:17 +02:00
|
|
|
|
2019-05-18 22:54:19 +02:00
|
|
|
/**
|
|
|
|
* CpuTopology:
|
|
|
|
* @cpus: the number of present logical processors on the machine
|
|
|
|
* @cores: the number of cores in one package
|
|
|
|
* @threads: the number of threads in one core
|
|
|
|
* @max_cpus: the maximum number of logical processors on the machine
|
|
|
|
*/
|
|
|
|
typedef struct CpuTopology {
|
|
|
|
unsigned int cpus;
|
|
|
|
unsigned int cores;
|
|
|
|
unsigned int threads;
|
|
|
|
unsigned int max_cpus;
|
|
|
|
} CpuTopology;
|
|
|
|
|
2014-03-05 18:30:45 +01:00
|
|
|
/**
|
|
|
|
* MachineState:
|
|
|
|
*/
|
|
|
|
struct MachineState {
|
|
|
|
/*< private >*/
|
|
|
|
Object parent_obj;
|
2014-07-01 16:14:41 +02:00
|
|
|
Notifier sysbus_notifier;
|
|
|
|
|
2014-03-05 18:30:45 +01:00
|
|
|
/*< public >*/
|
|
|
|
|
|
|
|
char *dtb;
|
|
|
|
char *dumpdtb;
|
|
|
|
int phandle_start;
|
|
|
|
char *dt_compatible;
|
|
|
|
bool dump_guest_core;
|
|
|
|
bool mem_merge;
|
|
|
|
bool usb;
|
2015-03-23 18:05:28 +01:00
|
|
|
bool usb_disabled;
|
2014-03-05 18:30:45 +01:00
|
|
|
char *firmware;
|
2014-08-16 07:55:40 +02:00
|
|
|
bool iommu;
|
2015-02-23 13:56:42 +01:00
|
|
|
bool suppress_vmdesc;
|
2016-02-18 12:32:25 +01:00
|
|
|
bool enforce_config_section;
|
2016-04-19 21:55:25 +02:00
|
|
|
bool enable_graphics;
|
2018-03-08 13:48:38 +01:00
|
|
|
char *memory_encryption;
|
2020-02-19 17:08:36 +01:00
|
|
|
char *ram_memdev_id;
|
2020-02-19 17:08:38 +01:00
|
|
|
/*
|
|
|
|
* convenience alias to ram_memdev_id backend memory region
|
|
|
|
* or to numa container memory region
|
|
|
|
*/
|
|
|
|
MemoryRegion *ram;
|
2018-04-23 18:51:23 +02:00
|
|
|
DeviceMemoryState *device_memory;
|
2014-03-05 18:30:45 +01:00
|
|
|
|
2014-05-07 16:42:57 +02:00
|
|
|
ram_addr_t ram_size;
|
2014-06-02 15:25:02 +02:00
|
|
|
ram_addr_t maxram_size;
|
|
|
|
uint64_t ram_slots;
|
2014-05-07 16:42:57 +02:00
|
|
|
const char *boot_order;
|
2014-05-26 14:40:58 +02:00
|
|
|
char *kernel_filename;
|
|
|
|
char *kernel_cmdline;
|
|
|
|
char *initrd_filename;
|
2017-09-13 18:04:55 +02:00
|
|
|
const char *cpu_type;
|
2014-09-26 22:45:31 +02:00
|
|
|
AccelState *accelerator;
|
2017-02-09 12:08:32 +01:00
|
|
|
CPUArchIdList *possible_cpus;
|
2019-05-18 22:54:19 +02:00
|
|
|
CpuTopology smp;
|
2019-03-08 19:20:53 +01:00
|
|
|
struct NVDIMMState *nvdimms_state;
|
2019-08-09 08:57:22 +02:00
|
|
|
struct NumaState *numa_state;
|
2014-03-05 18:30:45 +01:00
|
|
|
};
|
|
|
|
|
2015-09-04 20:37:06 +02:00
|
|
|
#define DEFINE_MACHINE(namestr, machine_initfn) \
|
|
|
|
static void machine_initfn##_class_init(ObjectClass *oc, void *data) \
|
|
|
|
{ \
|
|
|
|
MachineClass *mc = MACHINE_CLASS(oc); \
|
|
|
|
machine_initfn(mc); \
|
|
|
|
} \
|
|
|
|
static const TypeInfo machine_initfn##_typeinfo = { \
|
|
|
|
.name = MACHINE_TYPE_NAME(namestr), \
|
|
|
|
.parent = TYPE_MACHINE, \
|
|
|
|
.class_init = machine_initfn##_class_init, \
|
|
|
|
}; \
|
|
|
|
static void machine_initfn##_register_types(void) \
|
|
|
|
{ \
|
|
|
|
type_register_static(&machine_initfn##_typeinfo); \
|
|
|
|
} \
|
2016-02-16 21:59:04 +01:00
|
|
|
type_init(machine_initfn##_register_types)
|
2015-09-04 20:37:06 +02:00
|
|
|
|
2019-11-05 19:22:17 +01:00
|
|
|
extern GlobalProperty hw_compat_4_2[];
|
|
|
|
extern const size_t hw_compat_4_2_len;
|
|
|
|
|
2019-07-24 12:35:24 +02:00
|
|
|
extern GlobalProperty hw_compat_4_1[];
|
|
|
|
extern const size_t hw_compat_4_1_len;
|
|
|
|
|
2019-04-11 12:20:25 +02:00
|
|
|
extern GlobalProperty hw_compat_4_0[];
|
|
|
|
extern const size_t hw_compat_4_0_len;
|
|
|
|
|
2018-12-12 16:36:30 +01:00
|
|
|
extern GlobalProperty hw_compat_3_1[];
|
|
|
|
extern const size_t hw_compat_3_1_len;
|
|
|
|
|
2018-12-12 16:36:30 +01:00
|
|
|
extern GlobalProperty hw_compat_3_0[];
|
|
|
|
extern const size_t hw_compat_3_0_len;
|
|
|
|
|
2018-12-12 16:36:30 +01:00
|
|
|
extern GlobalProperty hw_compat_2_12[];
|
|
|
|
extern const size_t hw_compat_2_12_len;
|
|
|
|
|
2018-12-12 16:36:30 +01:00
|
|
|
extern GlobalProperty hw_compat_2_11[];
|
|
|
|
extern const size_t hw_compat_2_11_len;
|
|
|
|
|
2018-12-12 16:36:30 +01:00
|
|
|
extern GlobalProperty hw_compat_2_10[];
|
|
|
|
extern const size_t hw_compat_2_10_len;
|
|
|
|
|
2018-12-12 16:36:30 +01:00
|
|
|
extern GlobalProperty hw_compat_2_9[];
|
|
|
|
extern const size_t hw_compat_2_9_len;
|
|
|
|
|
2018-12-12 16:36:30 +01:00
|
|
|
extern GlobalProperty hw_compat_2_8[];
|
|
|
|
extern const size_t hw_compat_2_8_len;
|
|
|
|
|
2018-12-12 16:36:30 +01:00
|
|
|
extern GlobalProperty hw_compat_2_7[];
|
|
|
|
extern const size_t hw_compat_2_7_len;
|
|
|
|
|
2018-12-12 16:36:30 +01:00
|
|
|
extern GlobalProperty hw_compat_2_6[];
|
|
|
|
extern const size_t hw_compat_2_6_len;
|
|
|
|
|
2018-12-12 16:36:30 +01:00
|
|
|
extern GlobalProperty hw_compat_2_5[];
|
|
|
|
extern const size_t hw_compat_2_5_len;
|
|
|
|
|
2018-12-12 16:36:30 +01:00
|
|
|
extern GlobalProperty hw_compat_2_4[];
|
|
|
|
extern const size_t hw_compat_2_4_len;
|
|
|
|
|
2018-12-12 16:36:30 +01:00
|
|
|
extern GlobalProperty hw_compat_2_3[];
|
|
|
|
extern const size_t hw_compat_2_3_len;
|
|
|
|
|
2018-12-12 16:36:30 +01:00
|
|
|
extern GlobalProperty hw_compat_2_2[];
|
|
|
|
extern const size_t hw_compat_2_2_len;
|
|
|
|
|
2018-12-12 16:36:30 +01:00
|
|
|
extern GlobalProperty hw_compat_2_1[];
|
|
|
|
extern const size_t hw_compat_2_1_len;
|
|
|
|
|
2007-11-17 18:14:51 +01:00
|
|
|
#endif
|