2012-04-11 18:24:48 +02:00
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/*
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* QEMU Xtensa CPU
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*
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2012-04-11 18:24:49 +02:00
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* Copyright (c) 2011, Max Filippov, Open Source and Linux Lab.
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2012-04-11 18:24:48 +02:00
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* Copyright (c) 2012 SUSE LINUX Products GmbH
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* * Neither the name of the Open Source and Linux Lab nor the
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* names of its contributors may be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
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* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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2016-01-26 19:17:21 +01:00
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#include "qemu/osdep.h"
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include/qemu/osdep.h: Don't include qapi/error.h
Commit 57cb38b included qapi/error.h into qemu/osdep.h to get the
Error typedef. Since then, we've moved to include qemu/osdep.h
everywhere. Its file comment explains: "To avoid getting into
possible circular include dependencies, this file should not include
any other QEMU headers, with the exceptions of config-host.h,
compiler.h, os-posix.h and os-win32.h, all of which are doing a
similar job to this file and are under similar constraints."
qapi/error.h doesn't do a similar job, and it doesn't adhere to
similar constraints: it includes qapi-types.h. That's in excess of
100KiB of crap most .c files don't actually need.
Add the typedef to qemu/typedefs.h, and include that instead of
qapi/error.h. Include qapi/error.h in .c files that need it and don't
get it now. Include qapi-types.h in qom/object.h for uint16List.
Update scripts/clean-includes accordingly. Update it further to match
reality: replace config.h by config-target.h, add sysemu/os-posix.h,
sysemu/os-win32.h. Update the list of includes in the qemu/osdep.h
comment quoted above similarly.
This reduces the number of objects depending on qapi/error.h from "all
of them" to less than a third. Unfortunately, the number depending on
qapi-types.h shrinks only a little. More work is needed for that one.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
[Fix compilation without the spice devel packages. - Paolo]
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2016-03-14 09:01:28 +01:00
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#include "qapi/error.h"
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2012-05-06 12:41:53 +02:00
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#include "cpu.h"
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2020-07-01 04:27:02 +02:00
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#include "fpu/softfloat.h"
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2019-05-23 16:35:07 +02:00
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#include "qemu/module.h"
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2013-01-20 19:22:41 +01:00
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#include "migration/vmstate.h"
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2012-04-11 18:24:48 +02:00
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2013-06-21 19:09:18 +02:00
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static void xtensa_cpu_set_pc(CPUState *cs, vaddr value)
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{
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XtensaCPU *cpu = XTENSA_CPU(cs);
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cpu->env.pc = value;
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}
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2013-08-25 18:53:55 +02:00
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static bool xtensa_cpu_has_work(CPUState *cs)
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{
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2017-01-25 19:54:11 +01:00
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#ifndef CONFIG_USER_ONLY
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2013-08-25 18:53:55 +02:00
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XtensaCPU *cpu = XTENSA_CPU(cs);
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2016-12-14 03:52:08 +01:00
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return !cpu->env.runstall && cpu->env.pending_irq_level;
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2017-01-25 19:54:11 +01:00
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#else
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return true;
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#endif
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2013-08-25 18:53:55 +02:00
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}
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2019-09-06 18:57:13 +02:00
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#ifdef CONFIG_USER_ONLY
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static bool abi_call0;
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void xtensa_set_abi_call0(void)
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{
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abi_call0 = true;
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}
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bool xtensa_abi_call0(void)
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{
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return abi_call0;
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}
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#endif
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cpu: Use DeviceClass reset instead of a special CPUClass reset
The CPUClass has a 'reset' method. This is a legacy from when
TYPE_CPU used not to inherit from TYPE_DEVICE. We don't need it any
more, as we can simply use the TYPE_DEVICE reset. The 'cpu_reset()'
function is kept as the API which most places use to reset a CPU; it
is now a wrapper which calls device_cold_reset() and then the
tracepoint function.
This change should not cause CPU objects to be reset more often
than they are at the moment, because:
* nobody is directly calling device_cold_reset() or
qdev_reset_all() on CPU objects
* no CPU object is on a qbus, so they will not be reset either
by somebody calling qbus_reset_all()/bus_cold_reset(), or
by the main "reset sysbus and everything in the qbus tree"
reset that most devices are reset by
Note that this does not change the need for each machine or whatever
to use qemu_register_reset() to arrange to call cpu_reset() -- that
is necessary because CPU objects are not on any qbus, so they don't
get reset when the qbus tree rooted at the sysbus bus is reset, and
this isn't being changed here.
All the changes to the files under target/ were made using the
included Coccinelle script, except:
(1) the deletion of the now-inaccurate and not terribly useful
"CPUClass::reset" comments was done with a perl one-liner afterwards:
perl -n -i -e '/ CPUClass::reset/ or print' target/*/*.c
(2) this bit of the s390 change was done by hand, because the
Coccinelle script is not sophisticated enough to handle the
parent_reset call being inside another function:
| @@ -96,8 +96,9 @@ static void s390_cpu_reset(CPUState *s, cpu_reset_type type)
| S390CPU *cpu = S390_CPU(s);
| S390CPUClass *scc = S390_CPU_GET_CLASS(cpu);
| CPUS390XState *env = &cpu->env;
|+ DeviceState *dev = DEVICE(s);
|
|- scc->parent_reset(s);
|+ scc->parent_reset(dev);
| cpu->env.sigp_order = 0;
| s390_cpu_set_state(S390_CPU_STATE_STOPPED, cpu);
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <20200303100511.5498-1-peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2020-03-03 11:05:11 +01:00
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static void xtensa_cpu_reset(DeviceState *dev)
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2012-04-11 18:24:48 +02:00
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{
|
cpu: Use DeviceClass reset instead of a special CPUClass reset
The CPUClass has a 'reset' method. This is a legacy from when
TYPE_CPU used not to inherit from TYPE_DEVICE. We don't need it any
more, as we can simply use the TYPE_DEVICE reset. The 'cpu_reset()'
function is kept as the API which most places use to reset a CPU; it
is now a wrapper which calls device_cold_reset() and then the
tracepoint function.
This change should not cause CPU objects to be reset more often
than they are at the moment, because:
* nobody is directly calling device_cold_reset() or
qdev_reset_all() on CPU objects
* no CPU object is on a qbus, so they will not be reset either
by somebody calling qbus_reset_all()/bus_cold_reset(), or
by the main "reset sysbus and everything in the qbus tree"
reset that most devices are reset by
Note that this does not change the need for each machine or whatever
to use qemu_register_reset() to arrange to call cpu_reset() -- that
is necessary because CPU objects are not on any qbus, so they don't
get reset when the qbus tree rooted at the sysbus bus is reset, and
this isn't being changed here.
All the changes to the files under target/ were made using the
included Coccinelle script, except:
(1) the deletion of the now-inaccurate and not terribly useful
"CPUClass::reset" comments was done with a perl one-liner afterwards:
perl -n -i -e '/ CPUClass::reset/ or print' target/*/*.c
(2) this bit of the s390 change was done by hand, because the
Coccinelle script is not sophisticated enough to handle the
parent_reset call being inside another function:
| @@ -96,8 +96,9 @@ static void s390_cpu_reset(CPUState *s, cpu_reset_type type)
| S390CPU *cpu = S390_CPU(s);
| S390CPUClass *scc = S390_CPU_GET_CLASS(cpu);
| CPUS390XState *env = &cpu->env;
|+ DeviceState *dev = DEVICE(s);
|
|- scc->parent_reset(s);
|+ scc->parent_reset(dev);
| cpu->env.sigp_order = 0;
| s390_cpu_set_state(S390_CPU_STATE_STOPPED, cpu);
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <20200303100511.5498-1-peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2020-03-03 11:05:11 +01:00
|
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CPUState *s = CPU(dev);
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2012-04-11 18:24:48 +02:00
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XtensaCPU *cpu = XTENSA_CPU(s);
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XtensaCPUClass *xcc = XTENSA_CPU_GET_CLASS(cpu);
|
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CPUXtensaState *env = &cpu->env;
|
2020-07-01 04:27:02 +02:00
|
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bool dfpu = xtensa_option_enabled(env->config,
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XTENSA_OPTION_DFP_COPROCESSOR);
|
2012-04-11 18:24:48 +02:00
|
|
|
|
cpu: Use DeviceClass reset instead of a special CPUClass reset
The CPUClass has a 'reset' method. This is a legacy from when
TYPE_CPU used not to inherit from TYPE_DEVICE. We don't need it any
more, as we can simply use the TYPE_DEVICE reset. The 'cpu_reset()'
function is kept as the API which most places use to reset a CPU; it
is now a wrapper which calls device_cold_reset() and then the
tracepoint function.
This change should not cause CPU objects to be reset more often
than they are at the moment, because:
* nobody is directly calling device_cold_reset() or
qdev_reset_all() on CPU objects
* no CPU object is on a qbus, so they will not be reset either
by somebody calling qbus_reset_all()/bus_cold_reset(), or
by the main "reset sysbus and everything in the qbus tree"
reset that most devices are reset by
Note that this does not change the need for each machine or whatever
to use qemu_register_reset() to arrange to call cpu_reset() -- that
is necessary because CPU objects are not on any qbus, so they don't
get reset when the qbus tree rooted at the sysbus bus is reset, and
this isn't being changed here.
All the changes to the files under target/ were made using the
included Coccinelle script, except:
(1) the deletion of the now-inaccurate and not terribly useful
"CPUClass::reset" comments was done with a perl one-liner afterwards:
perl -n -i -e '/ CPUClass::reset/ or print' target/*/*.c
(2) this bit of the s390 change was done by hand, because the
Coccinelle script is not sophisticated enough to handle the
parent_reset call being inside another function:
| @@ -96,8 +96,9 @@ static void s390_cpu_reset(CPUState *s, cpu_reset_type type)
| S390CPU *cpu = S390_CPU(s);
| S390CPUClass *scc = S390_CPU_GET_CLASS(cpu);
| CPUS390XState *env = &cpu->env;
|+ DeviceState *dev = DEVICE(s);
|
|- scc->parent_reset(s);
|+ scc->parent_reset(dev);
| cpu->env.sigp_order = 0;
| s390_cpu_set_state(S390_CPU_STATE_STOPPED, cpu);
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <20200303100511.5498-1-peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2020-03-03 11:05:11 +01:00
|
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|
xcc->parent_reset(dev);
|
2012-04-11 18:24:48 +02:00
|
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|
2013-02-17 13:38:09 +01:00
|
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env->pc = env->config->exception_vector[EXC_RESET0 + env->static_vectors];
|
2012-04-11 18:24:49 +02:00
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env->sregs[LITBASE] &= ~1;
|
2017-01-25 19:54:11 +01:00
|
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#ifndef CONFIG_USER_ONLY
|
2012-04-11 18:24:49 +02:00
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env->sregs[PS] = xtensa_option_enabled(env->config,
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XTENSA_OPTION_INTERRUPT) ? 0x1f : 0x10;
|
2017-01-25 19:54:11 +01:00
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env->pending_irq_level = 0;
|
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#else
|
2019-09-06 18:57:13 +02:00
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env->sregs[PS] = PS_UM | (3 << PS_RING_SHIFT);
|
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if (xtensa_option_enabled(env->config,
|
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XTENSA_OPTION_WINDOWED_REGISTER) &&
|
|
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!xtensa_abi_call0()) {
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env->sregs[PS] |= PS_WOE;
|
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}
|
2020-08-29 12:47:58 +02:00
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env->sregs[CPENABLE] = 0xff;
|
2017-01-25 19:54:11 +01:00
|
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#endif
|
2012-04-11 18:24:49 +02:00
|
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env->sregs[VECBASE] = env->config->vecbase;
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env->sregs[IBREAKENABLE] = 0;
|
2016-11-12 07:40:18 +01:00
|
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|
env->sregs[MEMCTL] = MEMCTL_IL0EN & env->config->memctl_mask;
|
2012-12-05 04:15:20 +01:00
|
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env->sregs[ATOMCTL] = xtensa_option_enabled(env->config,
|
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XTENSA_OPTION_ATOMCTL) ? 0x28 : 0x15;
|
2014-02-15 17:49:09 +01:00
|
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env->sregs[CONFIGID0] = env->config->configid[0];
|
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env->sregs[CONFIGID1] = env->config->configid[1];
|
2019-04-19 01:37:00 +02:00
|
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env->exclusive_addr = -1;
|
2012-04-11 18:24:49 +02:00
|
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|
2017-01-25 19:54:11 +01:00
|
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#ifndef CONFIG_USER_ONLY
|
2012-04-11 18:24:49 +02:00
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reset_mmu(env);
|
2016-12-14 03:52:08 +01:00
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s->halted = env->runstall;
|
2017-01-25 19:54:11 +01:00
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#endif
|
2020-07-01 04:27:02 +02:00
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set_no_signaling_nans(!dfpu, &env->fp_status);
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set_use_first_nan(!dfpu, &env->fp_status);
|
2012-04-11 18:24:48 +02:00
|
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}
|
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2013-07-07 01:47:51 +02:00
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static ObjectClass *xtensa_cpu_class_by_name(const char *cpu_model)
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{
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ObjectClass *oc;
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char *typename;
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|
2017-10-05 15:50:58 +02:00
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typename = g_strdup_printf(XTENSA_CPU_TYPE_NAME("%s"), cpu_model);
|
2013-07-07 01:47:51 +02:00
|
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oc = object_class_by_name(typename);
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g_free(typename);
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if (oc == NULL || !object_class_dynamic_cast(oc, TYPE_XTENSA_CPU) ||
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object_class_is_abstract(oc)) {
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return NULL;
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}
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return oc;
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}
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|
2017-11-01 00:17:43 +01:00
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static void xtensa_cpu_disas_set_info(CPUState *cs, disassemble_info *info)
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|
{
|
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XtensaCPU *cpu = XTENSA_CPU(cs);
|
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info->private_data = cpu->env.config->isa;
|
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info->print_insn = print_insn_xtensa;
|
|
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}
|
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|
2013-01-16 04:19:35 +01:00
|
|
|
static void xtensa_cpu_realizefn(DeviceState *dev, Error **errp)
|
|
|
|
{
|
2013-06-28 23:18:47 +02:00
|
|
|
CPUState *cs = CPU(dev);
|
2013-01-16 04:19:35 +01:00
|
|
|
XtensaCPUClass *xcc = XTENSA_CPU_GET_CLASS(dev);
|
2016-10-20 13:26:03 +02:00
|
|
|
Error *local_err = NULL;
|
|
|
|
|
2017-01-25 19:54:11 +01:00
|
|
|
#ifndef CONFIG_USER_ONLY
|
|
|
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xtensa_irq_init(&XTENSA_CPU(dev)->env);
|
|
|
|
#endif
|
2017-08-24 18:31:38 +02:00
|
|
|
|
2016-10-20 13:26:03 +02:00
|
|
|
cpu_exec_realizefn(cs, &local_err);
|
|
|
|
if (local_err != NULL) {
|
|
|
|
error_propagate(errp, local_err);
|
|
|
|
return;
|
|
|
|
}
|
2013-01-16 04:19:35 +01:00
|
|
|
|
2013-06-28 23:18:47 +02:00
|
|
|
cs->gdb_num_regs = xcc->config->gdb_regmap.num_regs;
|
|
|
|
|
2013-07-27 02:53:25 +02:00
|
|
|
qemu_init_vcpu(cs);
|
|
|
|
|
2013-01-16 04:19:35 +01:00
|
|
|
xcc->parent_realize(dev, errp);
|
|
|
|
}
|
|
|
|
|
2012-04-11 18:24:50 +02:00
|
|
|
static void xtensa_cpu_initfn(Object *obj)
|
|
|
|
{
|
|
|
|
XtensaCPU *cpu = XTENSA_CPU(obj);
|
2013-07-07 01:47:51 +02:00
|
|
|
XtensaCPUClass *xcc = XTENSA_CPU_GET_CLASS(obj);
|
2012-04-11 18:24:50 +02:00
|
|
|
CPUXtensaState *env = &cpu->env;
|
|
|
|
|
2019-03-28 22:26:22 +01:00
|
|
|
cpu_set_cpustate_pointers(cpu);
|
2013-07-07 01:47:51 +02:00
|
|
|
env->config = xcc->config;
|
2013-01-20 01:46:45 +01:00
|
|
|
|
2017-01-25 19:54:11 +01:00
|
|
|
#ifndef CONFIG_USER_ONLY
|
2011-11-26 12:48:41 +01:00
|
|
|
env->address_space_er = g_malloc(sizeof(*env->address_space_er));
|
|
|
|
env->system_er = g_malloc(sizeof(*env->system_er));
|
2018-07-19 15:02:00 +02:00
|
|
|
memory_region_init_io(env->system_er, obj, NULL, env, "er",
|
2011-11-26 12:48:41 +01:00
|
|
|
UINT64_C(0x100000000));
|
|
|
|
address_space_init(env->address_space_er, env->system_er, "ER");
|
2017-01-25 19:54:11 +01:00
|
|
|
#endif
|
2012-04-11 18:24:50 +02:00
|
|
|
}
|
|
|
|
|
2021-05-17 12:51:28 +02:00
|
|
|
#ifndef CONFIG_USER_ONLY
|
2013-01-20 19:22:41 +01:00
|
|
|
static const VMStateDescription vmstate_xtensa_cpu = {
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|
|
|
.name = "cpu",
|
|
|
|
.unmigratable = 1,
|
|
|
|
};
|
2021-05-17 12:51:31 +02:00
|
|
|
|
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#include "hw/core/sysemu-cpu-ops.h"
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static const struct SysemuCPUOps xtensa_sysemu_ops = {
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};
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2021-05-17 12:51:28 +02:00
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#endif
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2013-01-20 19:22:41 +01:00
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2021-02-04 17:39:23 +01:00
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#include "hw/core/tcg-cpu-ops.h"
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static struct TCGCPUOps xtensa_tcg_ops = {
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.initialize = xtensa_translate_init,
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.cpu_exec_interrupt = xtensa_cpu_exec_interrupt,
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.tlb_fill = xtensa_cpu_tlb_fill,
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.debug_excp_handler = xtensa_breakpoint_handler,
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#ifndef CONFIG_USER_ONLY
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.do_interrupt = xtensa_cpu_do_interrupt,
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.do_transaction_failed = xtensa_cpu_do_transaction_failed,
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.do_unaligned_access = xtensa_cpu_do_unaligned_access,
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#endif /* !CONFIG_USER_ONLY */
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};
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2012-04-11 18:24:48 +02:00
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static void xtensa_cpu_class_init(ObjectClass *oc, void *data)
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{
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2013-01-20 19:22:41 +01:00
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DeviceClass *dc = DEVICE_CLASS(oc);
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2012-04-11 18:24:48 +02:00
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CPUClass *cc = CPU_CLASS(oc);
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XtensaCPUClass *xcc = XTENSA_CPU_CLASS(cc);
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2018-01-14 03:04:12 +01:00
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device_class_set_parent_realize(dc, xtensa_cpu_realizefn,
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&xcc->parent_realize);
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2013-01-16 04:19:35 +01:00
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cpu: Use DeviceClass reset instead of a special CPUClass reset
The CPUClass has a 'reset' method. This is a legacy from when
TYPE_CPU used not to inherit from TYPE_DEVICE. We don't need it any
more, as we can simply use the TYPE_DEVICE reset. The 'cpu_reset()'
function is kept as the API which most places use to reset a CPU; it
is now a wrapper which calls device_cold_reset() and then the
tracepoint function.
This change should not cause CPU objects to be reset more often
than they are at the moment, because:
* nobody is directly calling device_cold_reset() or
qdev_reset_all() on CPU objects
* no CPU object is on a qbus, so they will not be reset either
by somebody calling qbus_reset_all()/bus_cold_reset(), or
by the main "reset sysbus and everything in the qbus tree"
reset that most devices are reset by
Note that this does not change the need for each machine or whatever
to use qemu_register_reset() to arrange to call cpu_reset() -- that
is necessary because CPU objects are not on any qbus, so they don't
get reset when the qbus tree rooted at the sysbus bus is reset, and
this isn't being changed here.
All the changes to the files under target/ were made using the
included Coccinelle script, except:
(1) the deletion of the now-inaccurate and not terribly useful
"CPUClass::reset" comments was done with a perl one-liner afterwards:
perl -n -i -e '/ CPUClass::reset/ or print' target/*/*.c
(2) this bit of the s390 change was done by hand, because the
Coccinelle script is not sophisticated enough to handle the
parent_reset call being inside another function:
| @@ -96,8 +96,9 @@ static void s390_cpu_reset(CPUState *s, cpu_reset_type type)
| S390CPU *cpu = S390_CPU(s);
| S390CPUClass *scc = S390_CPU_GET_CLASS(cpu);
| CPUS390XState *env = &cpu->env;
|+ DeviceState *dev = DEVICE(s);
|
|- scc->parent_reset(s);
|+ scc->parent_reset(dev);
| cpu->env.sigp_order = 0;
| s390_cpu_set_state(S390_CPU_STATE_STOPPED, cpu);
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <20200303100511.5498-1-peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2020-03-03 11:05:11 +01:00
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device_class_set_parent_reset(dc, xtensa_cpu_reset, &xcc->parent_reset);
|
2013-01-20 19:22:41 +01:00
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2013-07-07 01:47:51 +02:00
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cc->class_by_name = xtensa_cpu_class_by_name;
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2013-08-25 18:53:55 +02:00
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cc->has_work = xtensa_cpu_has_work;
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2013-05-27 01:33:50 +02:00
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cc->dump_state = xtensa_cpu_dump_state;
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2013-06-21 19:09:18 +02:00
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cc->set_pc = xtensa_cpu_set_pc;
|
2013-06-29 04:18:45 +02:00
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cc->gdb_read_register = xtensa_cpu_gdb_read_register;
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cc->gdb_write_register = xtensa_cpu_gdb_write_register;
|
2014-09-12 20:04:17 +02:00
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cc->gdb_stop_before_watchpoint = true;
|
2019-04-03 02:46:30 +02:00
|
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|
#ifndef CONFIG_USER_ONLY
|
2021-05-17 12:51:31 +02:00
|
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cc->sysemu_ops = &xtensa_sysemu_ops;
|
2013-06-29 18:55:54 +02:00
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cc->get_phys_page_debug = xtensa_cpu_get_phys_page_debug;
|
2021-05-17 12:51:28 +02:00
|
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|
dc->vmsd = &vmstate_xtensa_cpu;
|
2013-06-29 18:55:54 +02:00
|
|
|
#endif
|
2017-11-01 00:17:43 +01:00
|
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|
cc->disas_set_info = xtensa_cpu_disas_set_info;
|
2021-02-04 17:39:23 +01:00
|
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|
cc->tcg_ops = &xtensa_tcg_ops;
|
2012-04-11 18:24:48 +02:00
|
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|
}
|
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|
static const TypeInfo xtensa_cpu_type_info = {
|
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|
|
.name = TYPE_XTENSA_CPU,
|
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|
|
.parent = TYPE_CPU,
|
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|
|
.instance_size = sizeof(XtensaCPU),
|
2012-04-11 18:24:50 +02:00
|
|
|
.instance_init = xtensa_cpu_initfn,
|
2013-07-07 01:47:51 +02:00
|
|
|
.abstract = true,
|
2012-04-11 18:24:48 +02:00
|
|
|
.class_size = sizeof(XtensaCPUClass),
|
|
|
|
.class_init = xtensa_cpu_class_init,
|
|
|
|
};
|
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|
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|
|
static void xtensa_cpu_register_types(void)
|
|
|
|
{
|
|
|
|
type_register_static(&xtensa_cpu_type_info);
|
|
|
|
}
|
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|
|
|
type_init(xtensa_cpu_register_types)
|