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target/arm: Implement VFP fp16 VCVT between float and integer

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Implement the fp16 versions of the VFP VCVT instruction forms which
convert between floating point and integer.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20200828183354.27913-13-peter.maydell@linaro.org
This commit is contained in:
Peter Maydell 2020-08-28 19:33:21 +01:00
parent 274afbb121
commit 0094e9f475
2 changed files with 69 additions and 0 deletions
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65
target/arm/translate-vfp.c.inc
View file

@ -2845,6 +2845,35 @@ static bool trans_VCVT_dp(DisasContext *s, arg_VCVT_dp *a)
return true;
}
static bool trans_VCVT_int_hp(DisasContext *s, arg_VCVT_int_sp *a)
{
TCGv_i32 vm;
TCGv_ptr fpst;
if (!dc_isar_feature(aa32_fp16_arith, s)) {
return false;
}
if (!vfp_access_check(s)) {
return true;
}
vm = tcg_temp_new_i32();
neon_load_reg32(vm, a->vm);
fpst = fpstatus_ptr(FPST_FPCR_F16);
if (a->s) {
/* i32 -> f16 */
gen_helper_vfp_sitoh(vm, vm, fpst);
} else {
/* u32 -> f16 */
gen_helper_vfp_uitoh(vm, vm, fpst);
}
neon_store_reg32(vm, a->vd);
tcg_temp_free_i32(vm);
tcg_temp_free_ptr(fpst);
return true;
}
static bool trans_VCVT_int_sp(DisasContext *s, arg_VCVT_int_sp *a)
{
TCGv_i32 vm;
@ -3067,6 +3096,42 @@ static bool trans_VCVT_fix_dp(DisasContext *s, arg_VCVT_fix_dp *a)
return true;
}
static bool trans_VCVT_hp_int(DisasContext *s, arg_VCVT_sp_int *a)
{
TCGv_i32 vm;
TCGv_ptr fpst;
if (!dc_isar_feature(aa32_fp16_arith, s)) {
return false;
}
if (!vfp_access_check(s)) {
return true;
}
fpst = fpstatus_ptr(FPST_FPCR_F16);
vm = tcg_temp_new_i32();
neon_load_reg32(vm, a->vm);
if (a->s) {
if (a->rz) {
gen_helper_vfp_tosizh(vm, vm, fpst);
} else {
gen_helper_vfp_tosih(vm, vm, fpst);
}
} else {
if (a->rz) {
gen_helper_vfp_touizh(vm, vm, fpst);
} else {
gen_helper_vfp_touih(vm, vm, fpst);
}
}
neon_store_reg32(vm, a->vd);
tcg_temp_free_i32(vm);
tcg_temp_free_ptr(fpst);
return true;
}
static bool trans_VCVT_sp_int(DisasContext *s, arg_VCVT_sp_int *a)
{
TCGv_i32 vm;

4
target/arm/vfp.decode
View file

@ -210,6 +210,8 @@ VCVT_sp ---- 1110 1.11 0111 .... 1010 11.0 .... @vfp_dm_ds
VCVT_dp ---- 1110 1.11 0111 .... 1011 11.0 .... @vfp_dm_sd
# VCVT from integer to floating point: Vm always single; Vd depends on size
VCVT_int_hp ---- 1110 1.11 1000 .... 1001 s:1 1.0 .... \
vd=%vd_sp vm=%vm_sp
VCVT_int_sp ---- 1110 1.11 1000 .... 1010 s:1 1.0 .... \
vd=%vd_sp vm=%vm_sp
VCVT_int_dp ---- 1110 1.11 1000 .... 1011 s:1 1.0 .... \
@ -229,6 +231,8 @@ VCVT_fix_dp ---- 1110 1.11 1.1. .... 1011 .1.0 .... \
vd=%vd_dp imm=%vm_sp opc=%vcvt_fix_op
# VCVT float to integer (VCVT and VCVTR): Vd always single; Vd depends on size
VCVT_hp_int ---- 1110 1.11 110 s:1 .... 1001 rz:1 1.0 .... \
vd=%vd_sp vm=%vm_sp
VCVT_sp_int ---- 1110 1.11 110 s:1 .... 1010 rz:1 1.0 .... \
vd=%vd_sp vm=%vm_sp
VCVT_dp_int ---- 1110 1.11 110 s:1 .... 1011 rz:1 1.0 .... \