target/riscv: convert to DisasContextBase
Notes: - Did not convert {num,max}_insns, since the corresponding code will go away in the next patch. - ctx->pc becomes ctx->base.pc_next, and ctx->next_pc becomes ctx->pc_succ_insn. While at it, convert the remaining tb->cflags readers to tb_cflags(). Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Cc: Michael Clark <mjc@sifive.com> Cc: Palmer Dabbelt <palmer@sifive.com> Cc: Sagar Karandikar <sagark@eecs.berkeley.edu> Cc: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Signed-off-by: Emilio G. Cota <cota@braap.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
parent
b2e32021e7
commit
0114db1c82
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@ -40,14 +40,12 @@ static TCGv load_val;
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#include "exec/gen-icount.h"
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typedef struct DisasContext {
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struct TranslationBlock *tb;
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target_ulong pc;
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target_ulong next_pc;
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DisasContextBase base;
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/* pc_succ_insn points to the instruction following base.pc_next */
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target_ulong pc_succ_insn;
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uint32_t opcode;
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uint32_t flags;
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uint32_t mem_idx;
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int singlestep_enabled;
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DisasJumpType is_jmp;
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/* Remember the rounding mode encoded in the previous fp instruction,
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which we have already installed into env->fp_status. Or -1 for
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no previous fp instruction. Note that we exit the TB when writing
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@ -78,21 +76,21 @@ static const int tcg_memop_lookup[8] = {
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static void generate_exception(DisasContext *ctx, int excp)
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{
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tcg_gen_movi_tl(cpu_pc, ctx->pc);
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tcg_gen_movi_tl(cpu_pc, ctx->base.pc_next);
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TCGv_i32 helper_tmp = tcg_const_i32(excp);
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gen_helper_raise_exception(cpu_env, helper_tmp);
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tcg_temp_free_i32(helper_tmp);
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ctx->is_jmp = DISAS_NORETURN;
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ctx->base.is_jmp = DISAS_NORETURN;
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}
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static void generate_exception_mbadaddr(DisasContext *ctx, int excp)
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{
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tcg_gen_movi_tl(cpu_pc, ctx->pc);
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tcg_gen_movi_tl(cpu_pc, ctx->base.pc_next);
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tcg_gen_st_tl(cpu_pc, cpu_env, offsetof(CPURISCVState, badaddr));
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TCGv_i32 helper_tmp = tcg_const_i32(excp);
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gen_helper_raise_exception(cpu_env, helper_tmp);
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tcg_temp_free_i32(helper_tmp);
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ctx->is_jmp = DISAS_NORETURN;
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ctx->base.is_jmp = DISAS_NORETURN;
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}
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static void gen_exception_debug(void)
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@ -114,12 +112,12 @@ static void gen_exception_inst_addr_mis(DisasContext *ctx)
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static inline bool use_goto_tb(DisasContext *ctx, target_ulong dest)
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{
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if (unlikely(ctx->singlestep_enabled)) {
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if (unlikely(ctx->base.singlestep_enabled)) {
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return false;
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}
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#ifndef CONFIG_USER_ONLY
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return (ctx->tb->pc & TARGET_PAGE_MASK) == (dest & TARGET_PAGE_MASK);
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return (ctx->base.tb->pc & TARGET_PAGE_MASK) == (dest & TARGET_PAGE_MASK);
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#else
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return true;
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#endif
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@ -131,10 +129,10 @@ static void gen_goto_tb(DisasContext *ctx, int n, target_ulong dest)
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/* chaining is only allowed when the jump is to the same page */
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tcg_gen_goto_tb(n);
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tcg_gen_movi_tl(cpu_pc, dest);
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tcg_gen_exit_tb((uintptr_t)ctx->tb + n);
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tcg_gen_exit_tb((uintptr_t)ctx->base.tb + n);
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} else {
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tcg_gen_movi_tl(cpu_pc, dest);
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if (ctx->singlestep_enabled) {
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if (ctx->base.singlestep_enabled) {
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gen_exception_debug();
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} else {
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tcg_gen_exit_tb(0);
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@ -513,7 +511,7 @@ static void gen_jal(CPURISCVState *env, DisasContext *ctx, int rd,
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target_ulong next_pc;
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/* check misaligned: */
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next_pc = ctx->pc + imm;
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next_pc = ctx->base.pc_next + imm;
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if (!riscv_has_ext(env, RVC)) {
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if ((next_pc & 0x3) != 0) {
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gen_exception_inst_addr_mis(ctx);
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@ -521,11 +519,11 @@ static void gen_jal(CPURISCVState *env, DisasContext *ctx, int rd,
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}
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}
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if (rd != 0) {
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tcg_gen_movi_tl(cpu_gpr[rd], ctx->next_pc);
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tcg_gen_movi_tl(cpu_gpr[rd], ctx->pc_succ_insn);
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}
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gen_goto_tb(ctx, 0, ctx->pc + imm); /* must use this for safety */
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ctx->is_jmp = DISAS_NORETURN;
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gen_goto_tb(ctx, 0, ctx->base.pc_next + imm); /* must use this for safety */
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ctx->base.is_jmp = DISAS_NORETURN;
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}
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static void gen_jalr(CPURISCVState *env, DisasContext *ctx, uint32_t opc,
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@ -548,7 +546,7 @@ static void gen_jalr(CPURISCVState *env, DisasContext *ctx, uint32_t opc,
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}
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if (rd != 0) {
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tcg_gen_movi_tl(cpu_gpr[rd], ctx->next_pc);
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tcg_gen_movi_tl(cpu_gpr[rd], ctx->pc_succ_insn);
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}
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tcg_gen_exit_tb(0);
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@ -556,7 +554,7 @@ static void gen_jalr(CPURISCVState *env, DisasContext *ctx, uint32_t opc,
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gen_set_label(misaligned);
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gen_exception_inst_addr_mis(ctx);
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}
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ctx->is_jmp = DISAS_NORETURN;
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ctx->base.is_jmp = DISAS_NORETURN;
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break;
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default:
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@ -602,15 +600,15 @@ static void gen_branch(CPURISCVState *env, DisasContext *ctx, uint32_t opc,
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tcg_temp_free(source1);
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tcg_temp_free(source2);
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gen_goto_tb(ctx, 1, ctx->next_pc);
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gen_goto_tb(ctx, 1, ctx->pc_succ_insn);
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gen_set_label(l); /* branch taken */
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if (!riscv_has_ext(env, RVC) && ((ctx->pc + bimm) & 0x3)) {
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if (!riscv_has_ext(env, RVC) && ((ctx->base.pc_next + bimm) & 0x3)) {
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/* misaligned */
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gen_exception_inst_addr_mis(ctx);
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} else {
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gen_goto_tb(ctx, 0, ctx->pc + bimm);
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gen_goto_tb(ctx, 0, ctx->base.pc_next + bimm);
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}
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ctx->is_jmp = DISAS_NORETURN;
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ctx->base.is_jmp = DISAS_NORETURN;
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}
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static void gen_load(DisasContext *ctx, uint32_t opc, int rd, int rs1,
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@ -836,7 +834,7 @@ static void gen_atomic(DisasContext *ctx, uint32_t opc,
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if (rl) {
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tcg_gen_mb(TCG_MO_ALL | TCG_BAR_STRL);
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}
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if (tb_cflags(ctx->tb) & CF_PARALLEL) {
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if (tb_cflags(ctx->base.tb) & CF_PARALLEL) {
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l1 = gen_new_label();
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gen_set_label(l1);
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} else {
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@ -853,7 +851,7 @@ static void gen_atomic(DisasContext *ctx, uint32_t opc,
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tcg_gen_qemu_ld_tl(dat, src1, ctx->mem_idx, mop);
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tcg_gen_movcond_tl(cond, src2, dat, src2, dat, src2);
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if (tb_cflags(ctx->tb) & CF_PARALLEL) {
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if (tb_cflags(ctx->base.tb) & CF_PARALLEL) {
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/* Parallel context. Make this operation atomic by verifying
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that the memory didn't change while we computed the result. */
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tcg_gen_atomic_cmpxchg_tl(src2, src1, dat, src2, ctx->mem_idx, mop);
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@ -1317,7 +1315,7 @@ static void gen_system(CPURISCVState *env, DisasContext *ctx, uint32_t opc,
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rs1_pass = tcg_temp_new();
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imm_rs1 = tcg_temp_new();
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gen_get_gpr(source1, rs1);
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tcg_gen_movi_tl(cpu_pc, ctx->pc);
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tcg_gen_movi_tl(cpu_pc, ctx->base.pc_next);
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tcg_gen_movi_tl(rs1_pass, rs1);
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tcg_gen_movi_tl(csr_store, csr); /* copy into temp reg to feed to helper */
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@ -1338,12 +1336,12 @@ static void gen_system(CPURISCVState *env, DisasContext *ctx, uint32_t opc,
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/* always generates U-level ECALL, fixed in do_interrupt handler */
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generate_exception(ctx, RISCV_EXCP_U_ECALL);
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tcg_gen_exit_tb(0); /* no chaining */
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ctx->is_jmp = DISAS_NORETURN;
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ctx->base.is_jmp = DISAS_NORETURN;
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break;
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case 0x1: /* EBREAK */
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generate_exception(ctx, RISCV_EXCP_BREAKPOINT);
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tcg_gen_exit_tb(0); /* no chaining */
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ctx->is_jmp = DISAS_NORETURN;
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ctx->base.is_jmp = DISAS_NORETURN;
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break;
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#ifndef CONFIG_USER_ONLY
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case 0x002: /* URET */
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@ -1353,7 +1351,7 @@ static void gen_system(CPURISCVState *env, DisasContext *ctx, uint32_t opc,
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if (riscv_has_ext(env, RVS)) {
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gen_helper_sret(cpu_pc, cpu_env, cpu_pc);
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tcg_gen_exit_tb(0); /* no chaining */
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ctx->is_jmp = DISAS_NORETURN;
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ctx->base.is_jmp = DISAS_NORETURN;
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} else {
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gen_exception_illegal(ctx);
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}
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@ -1364,13 +1362,13 @@ static void gen_system(CPURISCVState *env, DisasContext *ctx, uint32_t opc,
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case 0x302: /* MRET */
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gen_helper_mret(cpu_pc, cpu_env, cpu_pc);
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tcg_gen_exit_tb(0); /* no chaining */
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ctx->is_jmp = DISAS_NORETURN;
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ctx->base.is_jmp = DISAS_NORETURN;
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break;
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case 0x7b2: /* DRET */
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gen_exception_illegal(ctx);
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break;
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case 0x105: /* WFI */
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tcg_gen_movi_tl(cpu_pc, ctx->next_pc);
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tcg_gen_movi_tl(cpu_pc, ctx->pc_succ_insn);
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gen_helper_wfi(cpu_env);
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break;
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case 0x104: /* SFENCE.VM */
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@ -1411,9 +1409,9 @@ static void gen_system(CPURISCVState *env, DisasContext *ctx, uint32_t opc,
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gen_io_end();
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gen_set_gpr(rd, dest);
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/* end tb since we may be changing priv modes, to get mmu_index right */
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tcg_gen_movi_tl(cpu_pc, ctx->next_pc);
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tcg_gen_movi_tl(cpu_pc, ctx->pc_succ_insn);
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tcg_gen_exit_tb(0); /* no chaining */
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ctx->is_jmp = DISAS_NORETURN;
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ctx->base.is_jmp = DISAS_NORETURN;
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break;
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}
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tcg_temp_free(source1);
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@ -1731,7 +1729,7 @@ static void decode_RV32_64G(CPURISCVState *env, DisasContext *ctx)
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break; /* NOP */
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}
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tcg_gen_movi_tl(cpu_gpr[rd], (sextract64(ctx->opcode, 12, 20) << 12) +
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ctx->pc);
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ctx->base.pc_next);
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break;
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case OPC_RISC_JAL:
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imm = GET_JAL_IMM(ctx->opcode);
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@ -1804,9 +1802,9 @@ static void decode_RV32_64G(CPURISCVState *env, DisasContext *ctx)
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if (ctx->opcode & 0x1000) {
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/* FENCE_I is a no-op in QEMU,
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* however we need to end the translation block */
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tcg_gen_movi_tl(cpu_pc, ctx->next_pc);
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tcg_gen_movi_tl(cpu_pc, ctx->pc_succ_insn);
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tcg_gen_exit_tb(0);
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ctx->is_jmp = DISAS_NORETURN;
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ctx->base.is_jmp = DISAS_NORETURN;
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} else {
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/* FENCE is a full memory barrier. */
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tcg_gen_mb(TCG_MO_ALL | TCG_BAR_SC);
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@ -1830,11 +1828,11 @@ static void decode_opc(CPURISCVState *env, DisasContext *ctx)
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if (!riscv_has_ext(env, RVC)) {
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gen_exception_illegal(ctx);
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} else {
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ctx->next_pc = ctx->pc + 2;
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ctx->pc_succ_insn = ctx->base.pc_next + 2;
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decode_RV32_64C(env, ctx);
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}
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} else {
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ctx->next_pc = ctx->pc + 4;
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ctx->pc_succ_insn = ctx->base.pc_next + 4;
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decode_RV32_64G(env, ctx);
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}
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}
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@ -1843,26 +1841,26 @@ void gen_intermediate_code(CPUState *cs, TranslationBlock *tb)
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{
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CPURISCVState *env = cs->env_ptr;
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DisasContext ctx;
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target_ulong pc_start;
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target_ulong page_start;
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int num_insns;
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int max_insns;
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pc_start = tb->pc;
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page_start = pc_start & TARGET_PAGE_MASK;
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ctx.pc = pc_start;
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ctx.base.pc_first = tb->pc;
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ctx.base.pc_next = ctx.base.pc_first;
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/* once we have GDB, the rest of the translate.c implementation should be
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ready for singlestep */
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ctx.singlestep_enabled = cs->singlestep_enabled;
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ctx.base.singlestep_enabled = cs->singlestep_enabled;
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ctx.base.tb = tb;
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ctx.base.is_jmp = DISAS_NEXT;
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ctx.tb = tb;
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ctx.is_jmp = DISAS_NEXT;
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page_start = ctx.base.pc_first & TARGET_PAGE_MASK;
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ctx.pc_succ_insn = ctx.base.pc_first;
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ctx.flags = tb->flags;
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ctx.mem_idx = tb->flags & TB_FLAGS_MMU_MASK;
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ctx.frm = -1; /* unknown rounding mode */
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num_insns = 0;
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max_insns = tb->cflags & CF_COUNT_MASK;
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max_insns = tb_cflags(ctx.base.tb) & CF_COUNT_MASK;
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if (max_insns == 0) {
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max_insns = CF_COUNT_MASK;
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}
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@ -1871,45 +1869,45 @@ void gen_intermediate_code(CPUState *cs, TranslationBlock *tb)
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}
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gen_tb_start(tb);
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while (ctx.is_jmp == DISAS_NEXT) {
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tcg_gen_insn_start(ctx.pc);
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while (ctx.base.is_jmp == DISAS_NEXT) {
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tcg_gen_insn_start(ctx.base.pc_next);
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num_insns++;
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if (unlikely(cpu_breakpoint_test(cs, ctx.pc, BP_ANY))) {
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tcg_gen_movi_tl(cpu_pc, ctx.pc);
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ctx.is_jmp = DISAS_NORETURN;
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if (unlikely(cpu_breakpoint_test(cs, ctx.base.pc_next, BP_ANY))) {
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tcg_gen_movi_tl(cpu_pc, ctx.base.pc_next);
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ctx.base.is_jmp = DISAS_NORETURN;
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gen_exception_debug();
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/* The address covered by the breakpoint must be included in
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[tb->pc, tb->pc + tb->size) in order to for it to be
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properly cleared -- thus we increment the PC here so that
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the logic setting tb->size below does the right thing. */
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ctx.pc += 4;
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ctx.base.pc_next += 4;
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goto done_generating;
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}
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if (num_insns == max_insns && (tb->cflags & CF_LAST_IO)) {
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if (num_insns == max_insns && (tb_cflags(ctx.base.tb) & CF_LAST_IO)) {
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gen_io_start();
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}
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ctx.opcode = cpu_ldl_code(env, ctx.pc);
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ctx.opcode = cpu_ldl_code(env, ctx.base.pc_next);
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decode_opc(env, &ctx);
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ctx.pc = ctx.next_pc;
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ctx.base.pc_next = ctx.pc_succ_insn;
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if (ctx.is_jmp == DISAS_NEXT &&
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if (ctx.base.is_jmp == DISAS_NEXT &&
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(cs->singlestep_enabled ||
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ctx.pc - page_start >= TARGET_PAGE_SIZE ||
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ctx.base.pc_next - page_start >= TARGET_PAGE_SIZE ||
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tcg_op_buf_full() ||
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num_insns >= max_insns ||
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singlestep)) {
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ctx.is_jmp = DISAS_TOO_MANY;
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ctx.base.is_jmp = DISAS_TOO_MANY;
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}
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}
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if (tb->cflags & CF_LAST_IO) {
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if (tb_cflags(ctx.base.tb) & CF_LAST_IO) {
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gen_io_end();
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}
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switch (ctx.is_jmp) {
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switch (ctx.base.is_jmp) {
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case DISAS_TOO_MANY:
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tcg_gen_movi_tl(cpu_pc, ctx.pc);
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tcg_gen_movi_tl(cpu_pc, ctx.base.pc_next);
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if (cs->singlestep_enabled) {
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gen_exception_debug();
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} else {
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@ -1923,14 +1921,15 @@ void gen_intermediate_code(CPUState *cs, TranslationBlock *tb)
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}
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done_generating:
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gen_tb_end(tb, num_insns);
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tb->size = ctx.pc - pc_start;
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tb->size = ctx.base.pc_next - ctx.base.pc_first;
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tb->icount = num_insns;
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#ifdef DEBUG_DISAS
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if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)
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&& qemu_log_in_addr_range(pc_start)) {
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qemu_log("IN: %s\n", lookup_symbol(pc_start));
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log_target_disas(cs, pc_start, ctx.pc - pc_start);
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&& qemu_log_in_addr_range(ctx.base.pc_first)) {
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qemu_log("IN: %s\n", lookup_symbol(ctx.base.pc_first));
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log_target_disas(cs, ctx.base.pc_first,
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ctx.base.pc_next - ctx.base.pc_first);
|
||||
qemu_log("\n");
|
||||
}
|
||||
#endif
|
||||
|
|
Loading…
Reference in a new issue