x86-iommu: introduce IEC notifiers
This patch introduces x86 IOMMU IEC (Interrupt Entry Cache) invalidation notifier list. When vIOMMU receives IEC invalidate request, all the registered units will be notified with specific invalidation requests. Intel IOMMU is the first provider that generates such a event. Signed-off-by: Peter Xu <peterx@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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@ -904,6 +904,12 @@ static void vtd_root_table_setup(IntelIOMMUState *s)
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(s->root_extended ? "(extended)" : ""));
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(s->root_extended ? "(extended)" : ""));
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}
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}
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static void vtd_iec_notify_all(IntelIOMMUState *s, bool global,
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uint32_t index, uint32_t mask)
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{
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x86_iommu_iec_notify_all(X86_IOMMU_DEVICE(s), global, index, mask);
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}
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static void vtd_interrupt_remap_table_setup(IntelIOMMUState *s)
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static void vtd_interrupt_remap_table_setup(IntelIOMMUState *s)
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{
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{
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uint64_t value = 0;
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uint64_t value = 0;
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@ -911,7 +917,8 @@ static void vtd_interrupt_remap_table_setup(IntelIOMMUState *s)
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s->intr_size = 1UL << ((value & VTD_IRTA_SIZE_MASK) + 1);
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s->intr_size = 1UL << ((value & VTD_IRTA_SIZE_MASK) + 1);
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s->intr_root = value & VTD_IRTA_ADDR_MASK;
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s->intr_root = value & VTD_IRTA_ADDR_MASK;
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/* TODO: invalidate interrupt entry cache */
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/* Notify global invalidation */
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vtd_iec_notify_all(s, true, 0, 0);
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VTD_DPRINTF(CSR, "int remap table addr 0x%"PRIx64 " size %"PRIu32,
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VTD_DPRINTF(CSR, "int remap table addr 0x%"PRIx64 " size %"PRIu32,
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s->intr_root, s->intr_size);
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s->intr_root, s->intr_size);
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@ -1413,6 +1420,21 @@ static bool vtd_process_iotlb_desc(IntelIOMMUState *s, VTDInvDesc *inv_desc)
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return true;
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return true;
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}
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}
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static bool vtd_process_inv_iec_desc(IntelIOMMUState *s,
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VTDInvDesc *inv_desc)
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{
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VTD_DPRINTF(INV, "inv ir glob %d index %d mask %d",
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inv_desc->iec.granularity,
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inv_desc->iec.index,
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inv_desc->iec.index_mask);
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vtd_iec_notify_all(s, !inv_desc->iec.granularity,
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inv_desc->iec.index,
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inv_desc->iec.index_mask);
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return true;
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}
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static bool vtd_process_inv_desc(IntelIOMMUState *s)
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static bool vtd_process_inv_desc(IntelIOMMUState *s)
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{
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{
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VTDInvDesc inv_desc;
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VTDInvDesc inv_desc;
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@ -1453,12 +1475,12 @@ static bool vtd_process_inv_desc(IntelIOMMUState *s)
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break;
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break;
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case VTD_INV_DESC_IEC:
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case VTD_INV_DESC_IEC:
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VTD_DPRINTF(INV, "Interrupt Entry Cache Invalidation "
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VTD_DPRINTF(INV, "Invalidation Interrupt Entry Cache "
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"not implemented yet");
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"Descriptor hi 0x%"PRIx64 " lo 0x%"PRIx64,
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/*
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inv_desc.hi, inv_desc.lo);
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* Since currently we do not cache interrupt entries, we can
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if (!vtd_process_inv_iec_desc(s, &inv_desc)) {
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* just mark this descriptor as "good" and move on.
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return false;
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*/
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}
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break;
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break;
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default:
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default:
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@ -296,12 +296,28 @@ typedef enum VTDFaultReason {
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#define VTD_CONTEXT_CACHE_GEN_MAX 0xffffffffUL
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#define VTD_CONTEXT_CACHE_GEN_MAX 0xffffffffUL
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/* Queued Invalidation Descriptor */
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/* Interrupt Entry Cache Invalidation Descriptor: VT-d 6.5.2.7. */
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struct VTDInvDesc {
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struct VTDInvDescIEC {
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uint64_t lo;
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uint32_t type:4; /* Should always be 0x4 */
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uint64_t hi;
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uint32_t granularity:1; /* If set, it's global IR invalidation */
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uint32_t resved_1:22;
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uint32_t index_mask:5; /* 2^N for continuous int invalidation */
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uint32_t index:16; /* Start index to invalidate */
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uint32_t reserved_2:16;
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};
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};
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typedef struct VTDInvDesc VTDInvDesc;
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typedef struct VTDInvDescIEC VTDInvDescIEC;
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/* Queued Invalidation Descriptor */
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union VTDInvDesc {
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struct {
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uint64_t lo;
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uint64_t hi;
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};
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union {
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VTDInvDescIEC iec;
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};
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};
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typedef union VTDInvDesc VTDInvDesc;
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/* Masks for struct VTDInvDesc */
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/* Masks for struct VTDInvDesc */
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#define VTD_INV_DESC_TYPE 0xf
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#define VTD_INV_DESC_TYPE 0xf
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@ -10,3 +10,6 @@ xen_pv_mmio_write(uint64_t addr) "WARNING: write to Xen PV Device MMIO space (ad
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# hw/i386/pc.c
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# hw/i386/pc.c
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mhp_pc_dimm_assigned_slot(int slot) "0x%d"
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mhp_pc_dimm_assigned_slot(int slot) "0x%d"
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mhp_pc_dimm_assigned_address(uint64_t addr) "0x%"PRIx64
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mhp_pc_dimm_assigned_address(uint64_t addr) "0x%"PRIx64
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# hw/i386/x86-iommu.c
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x86_iommu_iec_notify(bool global, uint32_t index, uint32_t mask) "Notify IEC invalidation: global=%d index=%" PRIu32 " mask=%" PRIu32
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@ -22,6 +22,33 @@
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#include "hw/boards.h"
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#include "hw/boards.h"
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#include "hw/i386/x86-iommu.h"
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#include "hw/i386/x86-iommu.h"
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#include "qemu/error-report.h"
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#include "qemu/error-report.h"
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#include "trace.h"
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void x86_iommu_iec_register_notifier(X86IOMMUState *iommu,
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iec_notify_fn fn, void *data)
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{
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IEC_Notifier *notifier = g_new0(IEC_Notifier, 1);
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notifier->iec_notify = fn;
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notifier->private = data;
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QLIST_INSERT_HEAD(&iommu->iec_notifiers, notifier, list);
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}
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void x86_iommu_iec_notify_all(X86IOMMUState *iommu, bool global,
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uint32_t index, uint32_t mask)
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{
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IEC_Notifier *notifier;
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trace_x86_iommu_iec_notify(global, index, mask);
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QLIST_FOREACH(notifier, &iommu->iec_notifiers, list) {
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if (notifier->iec_notify) {
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notifier->iec_notify(notifier->private, global,
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index, mask);
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}
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}
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}
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/* Default X86 IOMMU device */
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/* Default X86 IOMMU device */
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static X86IOMMUState *x86_iommu_default = NULL;
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static X86IOMMUState *x86_iommu_default = NULL;
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@ -46,7 +73,9 @@ X86IOMMUState *x86_iommu_get_default(void)
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static void x86_iommu_realize(DeviceState *dev, Error **errp)
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static void x86_iommu_realize(DeviceState *dev, Error **errp)
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{
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{
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X86IOMMUState *x86_iommu = X86_IOMMU_DEVICE(dev);
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X86IOMMUClass *x86_class = X86_IOMMU_GET_CLASS(dev);
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X86IOMMUClass *x86_class = X86_IOMMU_GET_CLASS(dev);
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QLIST_INIT(&x86_iommu->iec_notifiers);
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if (x86_class->realize) {
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if (x86_class->realize) {
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x86_class->realize(dev, errp);
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x86_class->realize(dev, errp);
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}
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}
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@ -46,9 +46,28 @@ struct X86IOMMUClass {
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MSIMessage *dst, uint16_t sid);
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MSIMessage *dst, uint16_t sid);
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};
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};
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/**
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* iec_notify_fn - IEC (Interrupt Entry Cache) notifier hook,
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* triggered when IR invalidation happens.
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* @private: private data
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* @global: whether this is a global IEC invalidation
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* @index: IRTE index to invalidate (start from)
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* @mask: invalidation mask
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*/
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typedef void (*iec_notify_fn)(void *private, bool global,
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uint32_t index, uint32_t mask);
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struct IEC_Notifier {
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iec_notify_fn iec_notify;
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void *private;
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QLIST_ENTRY(IEC_Notifier) list;
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};
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typedef struct IEC_Notifier IEC_Notifier;
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struct X86IOMMUState {
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struct X86IOMMUState {
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SysBusDevice busdev;
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SysBusDevice busdev;
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bool intr_supported; /* Whether vIOMMU supports IR */
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bool intr_supported; /* Whether vIOMMU supports IR */
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QLIST_HEAD(, IEC_Notifier) iec_notifiers; /* IEC notify list */
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};
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};
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/**
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/**
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@ -57,4 +76,25 @@ struct X86IOMMUState {
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*/
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*/
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X86IOMMUState *x86_iommu_get_default(void);
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X86IOMMUState *x86_iommu_get_default(void);
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/**
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* x86_iommu_iec_register_notifier - register IEC (Interrupt Entry
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* Cache) notifiers
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* @iommu: IOMMU device to register
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* @fn: IEC notifier hook function
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* @data: notifier private data
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*/
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void x86_iommu_iec_register_notifier(X86IOMMUState *iommu,
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iec_notify_fn fn, void *data);
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/**
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* x86_iommu_iec_notify_all - Notify IEC invalidations
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* @iommu: IOMMU device that sends the notification
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* @global: whether this is a global invalidation. If true, @index
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* and @mask are undefined.
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* @index: starting index of interrupt entry to invalidate
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* @mask: index mask for the invalidation
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*/
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void x86_iommu_iec_notify_all(X86IOMMUState *iommu, bool global,
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uint32_t index, uint32_t mask);
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#endif
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#endif
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