diff --git a/target-microblaze/translate.c b/target-microblaze/translate.c
index 1b937b3f0d..76b25704ba 100644
--- a/target-microblaze/translate.c
+++ b/target-microblaze/translate.c
@@ -150,6 +150,10 @@ static void read_carry(DisasContext *dc, TCGv d)
     tcg_gen_shri_tl(d, cpu_SR[SR_MSR], 31);
 }
 
+/*
+ * write_carry sets the carry bits in MSR based on bit 0 of v.
+ * v[31:1] are ignored.
+ */
 static void write_carry(DisasContext *dc, TCGv v)
 {
     TCGv t0 = tcg_temp_new();