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ppc/pnv: Use address_space_stq_be() when triggering an interrupt from PSI

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Include the XIVE_TRIGGER_PQ bit in the trigger data which is how
hardware signals to the IC that the PQ bits of the interrupt source
have been checked.

Signed-off-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <20191007084102.29776-3-clg@kaod.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
This commit is contained in:
Cédric Le Goater 2019-10-07 10:40:55 +02:00 committed by David Gibson
parent 106695ab12
commit 06d26eeb47
1 changed files with 12 additions and 3 deletions
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15
hw/ppc/pnv_psi.c
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@ -660,10 +660,19 @@ static void pnv_psi_notify(XiveNotifier *xf, uint32_t srcno)
uint32_t offset =
(psi->regs[PSIHB_REG(PSIHB9_IVT_OFFSET)] >> PSIHB9_IVT_OFF_SHIFT);
uint64_t lisn = cpu_to_be64(offset + srcno);
uint64_t data = XIVE_TRIGGER_PQ | offset | srcno;
MemTxResult result;
if (valid) {
cpu_physical_memory_write(notify_addr, &lisn, sizeof(lisn));
if (!valid) {
return;
}
address_space_stq_be(&address_space_memory, notify_addr, data,
MEMTXATTRS_UNSPECIFIED, &result);
if (result != MEMTX_OK) {
qemu_log_mask(LOG_GUEST_ERROR, "%s: trigger failed @%"
HWADDR_PRIx "\n", __func__, notif_port);
return;
}
}