mips-linux-user: Save and restore fpu and dsp from sigcontext

Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
This commit is contained in:
Richard Henderson 2013-02-10 10:30:44 -08:00 committed by Aurelien Jarno
parent 51cd14d3f5
commit 084d0497a0
3 changed files with 63 additions and 123 deletions

View file

@ -2508,18 +2508,17 @@ struct target_rt_sigframe {
/* Install trampoline to jump back from signal handler */
static inline int install_sigtramp(unsigned int *tramp, unsigned int syscall)
{
int err;
int err = 0;
/*
* Set up the return code ...
*
* li v0, __NR__foo_sigreturn
* syscall
*/
* Set up the return code ...
*
* li v0, __NR__foo_sigreturn
* syscall
*/
err = __put_user(0x24020000 + syscall, tramp + 0);
err |= __put_user(0x24020000 + syscall, tramp + 0);
err |= __put_user(0x0000000c , tramp + 1);
/* flush_cache_sigtramp((unsigned long) tramp); */
return err;
}
@ -2527,74 +2526,37 @@ static inline int
setup_sigcontext(CPUMIPSState *regs, struct target_sigcontext *sc)
{
int err = 0;
int i;
err |= __put_user(regs->active_tc.PC, &sc->sc_pc);
#define save_gp_reg(i) do { \
err |= __put_user(regs->active_tc.gpr[i], &sc->sc_regs[i]); \
} while(0)
__put_user(0, &sc->sc_regs[0]); save_gp_reg(1); save_gp_reg(2);
save_gp_reg(3); save_gp_reg(4); save_gp_reg(5); save_gp_reg(6);
save_gp_reg(7); save_gp_reg(8); save_gp_reg(9); save_gp_reg(10);
save_gp_reg(11); save_gp_reg(12); save_gp_reg(13); save_gp_reg(14);
save_gp_reg(15); save_gp_reg(16); save_gp_reg(17); save_gp_reg(18);
save_gp_reg(19); save_gp_reg(20); save_gp_reg(21); save_gp_reg(22);
save_gp_reg(23); save_gp_reg(24); save_gp_reg(25); save_gp_reg(26);
save_gp_reg(27); save_gp_reg(28); save_gp_reg(29); save_gp_reg(30);
save_gp_reg(31);
#undef save_gp_reg
__put_user(0, &sc->sc_regs[0]);
for (i = 1; i < 32; ++i) {
err |= __put_user(regs->active_tc.gpr[i], &sc->sc_regs[i]);
}
err |= __put_user(regs->active_tc.HI[0], &sc->sc_mdhi);
err |= __put_user(regs->active_tc.LO[0], &sc->sc_mdlo);
/* Not used yet, but might be useful if we ever have DSP suppport */
#if 0
if (cpu_has_dsp) {
err |= __put_user(mfhi1(), &sc->sc_hi1);
err |= __put_user(mflo1(), &sc->sc_lo1);
err |= __put_user(mfhi2(), &sc->sc_hi2);
err |= __put_user(mflo2(), &sc->sc_lo2);
err |= __put_user(mfhi3(), &sc->sc_hi3);
err |= __put_user(mflo3(), &sc->sc_lo3);
err |= __put_user(rddsp(DSP_MASK), &sc->sc_dsp);
/* Rather than checking for dsp existence, always copy. The storage
would just be garbage otherwise. */
err |= __put_user(regs->active_tc.HI[1], &sc->sc_hi1);
err |= __put_user(regs->active_tc.HI[2], &sc->sc_hi2);
err |= __put_user(regs->active_tc.HI[3], &sc->sc_hi3);
err |= __put_user(regs->active_tc.LO[1], &sc->sc_lo1);
err |= __put_user(regs->active_tc.LO[2], &sc->sc_lo2);
err |= __put_user(regs->active_tc.LO[3], &sc->sc_lo3);
{
uint32_t dsp = cpu_rddsp(0x3ff, regs);
err |= __put_user(dsp, &sc->sc_dsp);
}
/* same with 64 bit */
#ifdef CONFIG_64BIT
err |= __put_user(regs->hi, &sc->sc_hi[0]);
err |= __put_user(regs->lo, &sc->sc_lo[0]);
if (cpu_has_dsp) {
err |= __put_user(mfhi1(), &sc->sc_hi[1]);
err |= __put_user(mflo1(), &sc->sc_lo[1]);
err |= __put_user(mfhi2(), &sc->sc_hi[2]);
err |= __put_user(mflo2(), &sc->sc_lo[2]);
err |= __put_user(mfhi3(), &sc->sc_hi[3]);
err |= __put_user(mflo3(), &sc->sc_lo[3]);
err |= __put_user(rddsp(DSP_MASK), &sc->sc_dsp);
err |= __put_user(1, &sc->sc_used_math);
for (i = 0; i < 32; ++i) {
err |= __put_user(regs->active_fpu.fpr[i].d, &sc->sc_fpregs[i]);
}
#endif
#endif
#if 0
err |= __put_user(!!used_math(), &sc->sc_used_math);
if (!used_math())
goto out;
/*
* Save FPU state to signal context. Signal handler will "inherit"
* current FPU state.
*/
preempt_disable();
if (!is_fpu_owner()) {
own_fpu();
restore_fp(current);
}
err |= save_fp_context(sc);
preempt_enable();
out:
#endif
return err;
}
@ -2602,68 +2564,33 @@ static inline int
restore_sigcontext(CPUMIPSState *regs, struct target_sigcontext *sc)
{
int err = 0;
int i;
err |= __get_user(regs->CP0_EPC, &sc->sc_pc);
err |= __get_user(regs->active_tc.HI[0], &sc->sc_mdhi);
err |= __get_user(regs->active_tc.LO[0], &sc->sc_mdlo);
#define restore_gp_reg(i) do { \
err |= __get_user(regs->active_tc.gpr[i], &sc->sc_regs[i]); \
} while(0)
restore_gp_reg( 1); restore_gp_reg( 2); restore_gp_reg( 3);
restore_gp_reg( 4); restore_gp_reg( 5); restore_gp_reg( 6);
restore_gp_reg( 7); restore_gp_reg( 8); restore_gp_reg( 9);
restore_gp_reg(10); restore_gp_reg(11); restore_gp_reg(12);
restore_gp_reg(13); restore_gp_reg(14); restore_gp_reg(15);
restore_gp_reg(16); restore_gp_reg(17); restore_gp_reg(18);
restore_gp_reg(19); restore_gp_reg(20); restore_gp_reg(21);
restore_gp_reg(22); restore_gp_reg(23); restore_gp_reg(24);
restore_gp_reg(25); restore_gp_reg(26); restore_gp_reg(27);
restore_gp_reg(28); restore_gp_reg(29); restore_gp_reg(30);
restore_gp_reg(31);
#undef restore_gp_reg
#if 0
if (cpu_has_dsp) {
err |= __get_user(treg, &sc->sc_hi1); mthi1(treg);
err |= __get_user(treg, &sc->sc_lo1); mtlo1(treg);
err |= __get_user(treg, &sc->sc_hi2); mthi2(treg);
err |= __get_user(treg, &sc->sc_lo2); mtlo2(treg);
err |= __get_user(treg, &sc->sc_hi3); mthi3(treg);
err |= __get_user(treg, &sc->sc_lo3); mtlo3(treg);
err |= __get_user(treg, &sc->sc_dsp); wrdsp(treg, DSP_MASK);
}
#ifdef CONFIG_64BIT
err |= __get_user(regs->hi, &sc->sc_hi[0]);
err |= __get_user(regs->lo, &sc->sc_lo[0]);
if (cpu_has_dsp) {
err |= __get_user(treg, &sc->sc_hi[1]); mthi1(treg);
err |= __get_user(treg, &sc->sc_lo[1]); mthi1(treg);
err |= __get_user(treg, &sc->sc_hi[2]); mthi2(treg);
err |= __get_user(treg, &sc->sc_lo[2]); mthi2(treg);
err |= __get_user(treg, &sc->sc_hi[3]); mthi3(treg);
err |= __get_user(treg, &sc->sc_lo[3]); mthi3(treg);
err |= __get_user(treg, &sc->sc_dsp); wrdsp(treg, DSP_MASK);
}
#endif
err |= __get_user(used_math, &sc->sc_used_math);
conditional_used_math(used_math);
preempt_disable();
if (used_math()) {
/* restore fpu context if we have used it before */
own_fpu();
err |= restore_fp_context(sc);
} else {
/* signal handler may have used FPU. Give it up. */
lose_fpu();
for (i = 1; i < 32; ++i) {
err |= __get_user(regs->active_tc.gpr[i], &sc->sc_regs[i]);
}
err |= __get_user(regs->active_tc.HI[1], &sc->sc_hi1);
err |= __get_user(regs->active_tc.HI[2], &sc->sc_hi2);
err |= __get_user(regs->active_tc.HI[3], &sc->sc_hi3);
err |= __get_user(regs->active_tc.LO[1], &sc->sc_lo1);
err |= __get_user(regs->active_tc.LO[2], &sc->sc_lo2);
err |= __get_user(regs->active_tc.LO[3], &sc->sc_lo3);
{
uint32_t dsp;
err |= __get_user(dsp, &sc->sc_dsp);
cpu_wrdsp(dsp, 0x3ff, regs);
}
for (i = 0; i < 32; ++i) {
err |= __get_user(regs->active_fpu.fpr[i].d, &sc->sc_fpregs[i]);
}
preempt_enable();
#endif
return err;
}

View file

@ -504,6 +504,9 @@ void mips_cpu_list (FILE *f, fprintf_function cpu_fprintf);
#define cpu_signal_handler cpu_mips_signal_handler
#define cpu_list mips_cpu_list
extern void cpu_wrdsp(uint32_t rs, uint32_t mask_num, CPUMIPSState *env);
extern uint32_t cpu_rddsp(uint32_t mask_num, CPUMIPSState *env);
#define CPU_SAVE_VERSION 3
/* MMU modes definitions. We carefully match the indices with our

View file

@ -3643,7 +3643,7 @@ void helper_dmthlip(target_ulong rs, target_ulong ac, CPUMIPSState *env)
}
#endif
void helper_wrdsp(target_ulong rs, target_ulong mask_num, CPUMIPSState *env)
void cpu_wrdsp(uint32_t rs, uint32_t mask_num, CPUMIPSState *env)
{
uint8_t mask[6];
uint8_t i;
@ -3709,7 +3709,12 @@ void helper_wrdsp(target_ulong rs, target_ulong mask_num, CPUMIPSState *env)
env->active_tc.DSPControl = dsp;
}
target_ulong helper_rddsp(target_ulong masknum, CPUMIPSState *env)
void helper_wrdsp(target_ulong rs, target_ulong mask_num, CPUMIPSState *env)
{
return cpu_wrdsp(rs, mask_num, env);
}
uint32_t cpu_rddsp(uint32_t mask_num, CPUMIPSState *env)
{
uint8_t mask[6];
uint32_t ruler, i;
@ -3718,7 +3723,7 @@ target_ulong helper_rddsp(target_ulong masknum, CPUMIPSState *env)
ruler = 0x01;
for (i = 0; i < 6; i++) {
mask[i] = (masknum & ruler) >> i ;
mask[i] = (mask_num & ruler) >> i ;
ruler = ruler << 1;
}
@ -3760,6 +3765,11 @@ target_ulong helper_rddsp(target_ulong masknum, CPUMIPSState *env)
return temp;
}
target_ulong helper_rddsp(target_ulong mask_num, CPUMIPSState *env)
{
return cpu_rddsp(mask_num, env);
}
#undef MIPSDSP_LHI
#undef MIPSDSP_LLO