ahci: construct PIO Setup FIS for PIO commands
PIO commands should put a PIO Setup FIS in the receive area when data transfer ends. Currently QEMU does not do this and only places the D2H FIS at the end of the operation. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: John Snow <jsnow@redhat.com> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
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@ -587,6 +587,71 @@ static void ahci_write_fis_sdb(AHCIState *s, int port, uint32_t finished)
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ahci_trigger_irq(s, &s->dev[port], PORT_IRQ_SDB_FIS);
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ahci_trigger_irq(s, &s->dev[port], PORT_IRQ_SDB_FIS);
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}
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}
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static void ahci_write_fis_pio(AHCIDevice *ad, uint16_t len)
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{
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AHCIPortRegs *pr = &ad->port_regs;
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uint8_t *pio_fis, *cmd_fis;
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uint64_t tbl_addr;
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dma_addr_t cmd_len = 0x80;
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if (!ad->res_fis || !(pr->cmd & PORT_CMD_FIS_RX)) {
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return;
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}
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/* map cmd_fis */
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tbl_addr = le64_to_cpu(ad->cur_cmd->tbl_addr);
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cmd_fis = dma_memory_map(ad->hba->as, tbl_addr, &cmd_len,
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DMA_DIRECTION_TO_DEVICE);
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if (cmd_fis == NULL) {
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DPRINTF(ad->port_no, "dma_memory_map failed in ahci_write_fis_pio");
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ahci_trigger_irq(ad->hba, ad, PORT_IRQ_HBUS_ERR);
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return;
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}
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if (cmd_len != 0x80) {
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DPRINTF(ad->port_no,
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"dma_memory_map mapped too few bytes in ahci_write_fis_pio");
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dma_memory_unmap(ad->hba->as, cmd_fis, cmd_len,
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DMA_DIRECTION_TO_DEVICE, cmd_len);
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ahci_trigger_irq(ad->hba, ad, PORT_IRQ_HBUS_ERR);
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return;
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}
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pio_fis = &ad->res_fis[RES_FIS_PSFIS];
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pio_fis[0] = 0x5f;
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pio_fis[1] = (ad->hba->control_regs.irqstatus ? (1 << 6) : 0);
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pio_fis[2] = ad->port.ifs[0].status;
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pio_fis[3] = ad->port.ifs[0].error;
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pio_fis[4] = cmd_fis[4];
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pio_fis[5] = cmd_fis[5];
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pio_fis[6] = cmd_fis[6];
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pio_fis[7] = cmd_fis[7];
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pio_fis[8] = cmd_fis[8];
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pio_fis[9] = cmd_fis[9];
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pio_fis[10] = cmd_fis[10];
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pio_fis[11] = cmd_fis[11];
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pio_fis[12] = cmd_fis[12];
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pio_fis[13] = cmd_fis[13];
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pio_fis[14] = 0;
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pio_fis[15] = ad->port.ifs[0].status;
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pio_fis[16] = len & 255;
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pio_fis[17] = len >> 8;
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pio_fis[18] = 0;
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pio_fis[19] = 0;
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if (pio_fis[2] & ERR_STAT) {
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ahci_trigger_irq(ad->hba, ad, PORT_IRQ_TF_ERR);
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}
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ahci_trigger_irq(ad->hba, ad, PORT_IRQ_PIOS_FIS);
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dma_memory_unmap(ad->hba->as, cmd_fis, cmd_len,
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DMA_DIRECTION_TO_DEVICE, cmd_len);
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}
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static void ahci_write_fis_d2h(AHCIDevice *ad, uint8_t *cmd_fis)
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static void ahci_write_fis_d2h(AHCIDevice *ad, uint8_t *cmd_fis)
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{
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{
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AHCIPortRegs *pr = &ad->port_regs;
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AHCIPortRegs *pr = &ad->port_regs;
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@ -1031,6 +1096,11 @@ out:
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}
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}
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s->end_transfer_func(s);
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s->end_transfer_func(s);
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if (!(s->status & DRQ_STAT)) {
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/* done with PIO send/receive */
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ahci_write_fis_pio(ad, le32_to_cpu(ad->cur_cmd->status));
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}
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}
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}
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static void ahci_start_dma(IDEDMA *dma, IDEState *s,
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static void ahci_start_dma(IDEDMA *dma, IDEState *s,
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