s390x/tcg: Implement 32/128 bit for VECTOR FP (ADD|DIVIDE|MULTIPLY|SUBTRACT)

In case of 128bit, we always have a single element. Add new helpers for
reading/writing 32/128 bit floats.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: David Hildenbrand <david@redhat.com>
Message-Id: <20210608092337.12221-14-david@redhat.com>
Signed-off-by: Cornelia Huck <cohuck@redhat.com>
This commit is contained in:
David Hildenbrand 2021-06-08 11:23:24 +02:00 committed by Cornelia Huck
parent 8c18fa5b3e
commit 0987961da9
3 changed files with 153 additions and 14 deletions

View file

@ -247,7 +247,9 @@ DEF_HELPER_6(gvec_vstrc_cc_rt16, void, ptr, cptr, cptr, cptr, env, i32)
DEF_HELPER_6(gvec_vstrc_cc_rt32, void, ptr, cptr, cptr, cptr, env, i32)
/* === Vector Floating-Point Instructions */
DEF_HELPER_FLAGS_5(gvec_vfa32, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env, i32)
DEF_HELPER_FLAGS_5(gvec_vfa64, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env, i32)
DEF_HELPER_FLAGS_5(gvec_vfa128, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env, i32)
DEF_HELPER_4(gvec_wfc64, void, cptr, cptr, env, i32)
DEF_HELPER_4(gvec_wfk64, void, cptr, cptr, env, i32)
DEF_HELPER_FLAGS_5(gvec_vfce64, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env, i32)
@ -260,15 +262,21 @@ DEF_HELPER_FLAGS_4(gvec_vcdg64, TCG_CALL_NO_WG, void, ptr, cptr, env, i32)
DEF_HELPER_FLAGS_4(gvec_vcdlg64, TCG_CALL_NO_WG, void, ptr, cptr, env, i32)
DEF_HELPER_FLAGS_4(gvec_vcgd64, TCG_CALL_NO_WG, void, ptr, cptr, env, i32)
DEF_HELPER_FLAGS_4(gvec_vclgd64, TCG_CALL_NO_WG, void, ptr, cptr, env, i32)
DEF_HELPER_FLAGS_5(gvec_vfd32, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env, i32)
DEF_HELPER_FLAGS_5(gvec_vfd64, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env, i32)
DEF_HELPER_FLAGS_5(gvec_vfd128, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env, i32)
DEF_HELPER_FLAGS_4(gvec_vfi64, TCG_CALL_NO_WG, void, ptr, cptr, env, i32)
DEF_HELPER_FLAGS_4(gvec_vfll32, TCG_CALL_NO_WG, void, ptr, cptr, env, i32)
DEF_HELPER_FLAGS_4(gvec_vflr64, TCG_CALL_NO_WG, void, ptr, cptr, env, i32)
DEF_HELPER_FLAGS_5(gvec_vfm32, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env, i32)
DEF_HELPER_FLAGS_5(gvec_vfm64, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env, i32)
DEF_HELPER_FLAGS_5(gvec_vfm128, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env, i32)
DEF_HELPER_FLAGS_6(gvec_vfma64, TCG_CALL_NO_WG, void, ptr, cptr, cptr, cptr, env, i32)
DEF_HELPER_FLAGS_6(gvec_vfms64, TCG_CALL_NO_WG, void, ptr, cptr, cptr, cptr, env, i32)
DEF_HELPER_FLAGS_4(gvec_vfsq64, TCG_CALL_NO_WG, void, ptr, cptr, env, i32)
DEF_HELPER_FLAGS_5(gvec_vfs32, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env, i32)
DEF_HELPER_FLAGS_5(gvec_vfs64, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env, i32)
DEF_HELPER_FLAGS_5(gvec_vfs128, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env, i32)
DEF_HELPER_4(gvec_vftci64, void, ptr, cptr, env, i32)
#ifndef CONFIG_USER_ONLY

View file

@ -2501,29 +2501,94 @@ static DisasJumpType op_vfa(DisasContext *s, DisasOps *o)
{
const uint8_t fpf = get_field(s, m4);
const uint8_t m5 = get_field(s, m5);
gen_helper_gvec_3_ptr *fn;
if (fpf != FPF_LONG || extract32(m5, 0, 3)) {
gen_program_exception(s, PGM_SPECIFICATION);
return DISAS_NORETURN;
}
gen_helper_gvec_3_ptr *fn = NULL;
switch (s->fields.op2) {
case 0xe3:
fn = gen_helper_gvec_vfa64;
switch (fpf) {
case FPF_SHORT:
if (s390_has_feat(S390_FEAT_VECTOR_ENH)) {
fn = gen_helper_gvec_vfa32;
}
break;
case FPF_LONG:
fn = gen_helper_gvec_vfa64;
break;
case FPF_EXT:
if (s390_has_feat(S390_FEAT_VECTOR_ENH)) {
fn = gen_helper_gvec_vfa128;
}
break;
default:
break;
}
break;
case 0xe5:
fn = gen_helper_gvec_vfd64;
switch (fpf) {
case FPF_SHORT:
if (s390_has_feat(S390_FEAT_VECTOR_ENH)) {
fn = gen_helper_gvec_vfd32;
}
break;
case FPF_LONG:
fn = gen_helper_gvec_vfd64;
break;
case FPF_EXT:
if (s390_has_feat(S390_FEAT_VECTOR_ENH)) {
fn = gen_helper_gvec_vfd128;
}
break;
default:
break;
}
break;
case 0xe7:
fn = gen_helper_gvec_vfm64;
switch (fpf) {
case FPF_SHORT:
if (s390_has_feat(S390_FEAT_VECTOR_ENH)) {
fn = gen_helper_gvec_vfm32;
}
break;
case FPF_LONG:
fn = gen_helper_gvec_vfm64;
break;
case FPF_EXT:
if (s390_has_feat(S390_FEAT_VECTOR_ENH)) {
fn = gen_helper_gvec_vfm128;
}
break;
default:
break;
}
break;
case 0xe2:
fn = gen_helper_gvec_vfs64;
switch (fpf) {
case FPF_SHORT:
if (s390_has_feat(S390_FEAT_VECTOR_ENH)) {
fn = gen_helper_gvec_vfs32;
}
break;
case FPF_LONG:
fn = gen_helper_gvec_vfs64;
break;
case FPF_EXT:
if (s390_has_feat(S390_FEAT_VECTOR_ENH)) {
fn = gen_helper_gvec_vfs128;
}
break;
default:
break;
}
break;
default:
g_assert_not_reached();
}
if (!fn || extract32(m5, 0, 3)) {
gen_program_exception(s, PGM_SPECIFICATION);
return DISAS_NORETURN;
}
gen_gvec_3_ptr(get_field(s, v1), get_field(s, v2),
get_field(s, v3), cpu_env, m5, fn);
return DISAS_NEXT;

View file

@ -78,16 +78,38 @@ static void handle_ieee_exc(CPUS390XState *env, uint8_t vxc, uint8_t vec_exc,
}
}
static float32 s390_vec_read_float32(const S390Vector *v, uint8_t enr)
{
return make_float32(s390_vec_read_element32(v, enr));
}
static float64 s390_vec_read_float64(const S390Vector *v, uint8_t enr)
{
return make_float64(s390_vec_read_element64(v, enr));
}
static float128 s390_vec_read_float128(const S390Vector *v)
{
return make_float128(s390_vec_read_element64(v, 0),
s390_vec_read_element64(v, 1));
}
static void s390_vec_write_float32(S390Vector *v, uint8_t enr, float32 data)
{
return s390_vec_write_element32(v, enr, data);
}
static void s390_vec_write_float64(S390Vector *v, uint8_t enr, float64 data)
{
return s390_vec_write_element64(v, enr, data);
}
static void s390_vec_write_float128(S390Vector *v, float128 data)
{
s390_vec_write_element64(v, 0, data.high);
s390_vec_write_element64(v, 1, data.low);
}
typedef float64 (*vop64_2_fn)(float64 a, float_status *s);
static void vop64_2(S390Vector *v1, const S390Vector *v2, CPUS390XState *env,
bool s, bool XxC, uint8_t erm, vop64_2_fn fn,
@ -160,6 +182,29 @@ DEF_GVEC_VOP2_64(vclgd)
DEF_GVEC_VOP2(vfi, round_to_int)
DEF_GVEC_VOP2(vfsq, sqrt)
typedef float32 (*vop32_3_fn)(float32 a, float32 b, float_status *s);
static void vop32_3(S390Vector *v1, const S390Vector *v2, const S390Vector *v3,
CPUS390XState *env, bool s, vop32_3_fn fn,
uintptr_t retaddr)
{
uint8_t vxc, vec_exc = 0;
S390Vector tmp = {};
int i;
for (i = 0; i < 4; i++) {
const float32 a = s390_vec_read_float32(v2, i);
const float32 b = s390_vec_read_float32(v3, i);
s390_vec_write_float32(&tmp, i, fn(a, b, &env->fpu_status));
vxc = check_ieee_exc(env, i, false, &vec_exc);
if (s || vxc) {
break;
}
}
handle_ieee_exc(env, vxc, vec_exc, retaddr);
*v1 = tmp;
}
typedef float64 (*vop64_3_fn)(float64 a, float64 b, float_status *s);
static void vop64_3(S390Vector *v1, const S390Vector *v2, const S390Vector *v3,
CPUS390XState *env, bool s, vop64_3_fn fn,
@ -183,15 +228,36 @@ static void vop64_3(S390Vector *v1, const S390Vector *v2, const S390Vector *v3,
*v1 = tmp;
}
#define DEF_GVEC_VOP3(NAME, OP) \
void HELPER(gvec_##NAME##64)(void *v1, const void *v2, const void *v3, \
CPUS390XState *env, uint32_t desc) \
typedef float128 (*vop128_3_fn)(float128 a, float128 b, float_status *s);
static void vop128_3(S390Vector *v1, const S390Vector *v2, const S390Vector *v3,
CPUS390XState *env, bool s, vop128_3_fn fn,
uintptr_t retaddr)
{
const float128 a = s390_vec_read_float128(v2);
const float128 b = s390_vec_read_float128(v3);
uint8_t vxc, vec_exc = 0;
S390Vector tmp = {};
s390_vec_write_float128(&tmp, fn(a, b, &env->fpu_status));
vxc = check_ieee_exc(env, 0, false, &vec_exc);
handle_ieee_exc(env, vxc, vec_exc, retaddr);
*v1 = tmp;
}
#define DEF_GVEC_VOP3_B(NAME, OP, BITS) \
void HELPER(gvec_##NAME##BITS)(void *v1, const void *v2, const void *v3, \
CPUS390XState *env, uint32_t desc) \
{ \
const bool se = extract32(simd_data(desc), 3, 1); \
\
vop64_3(v1, v2, v3, env, se, float64_##OP, GETPC()); \
vop##BITS##_3(v1, v2, v3, env, se, float##BITS##_##OP, GETPC()); \
}
#define DEF_GVEC_VOP3(NAME, OP) \
DEF_GVEC_VOP3_B(NAME, OP, 32) \
DEF_GVEC_VOP3_B(NAME, OP, 64) \
DEF_GVEC_VOP3_B(NAME, OP, 128)
DEF_GVEC_VOP3(vfa, add)
DEF_GVEC_VOP3(vfs, sub)
DEF_GVEC_VOP3(vfd, div)