target-ppc: consolidate load operations
Implement macro to consolidate load operations using newer tcg_gen_qemu_ld functions. Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
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@ -2462,50 +2462,32 @@ static inline void gen_align_no_le(DisasContext *ctx)
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}
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/*** Integer load ***/
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static inline void gen_qemu_ld8u(DisasContext *ctx, TCGv arg1, TCGv arg2)
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{
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tcg_gen_qemu_ld8u(arg1, arg2, ctx->mem_idx);
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#define DEF_MEMOP(op) ((op) | ctx->default_tcg_memop_mask)
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#define GEN_QEMU_LOAD_TL(ldop, op) \
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static void glue(gen_qemu_, ldop)(DisasContext *ctx, \
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TCGv val, \
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TCGv addr) \
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{ \
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tcg_gen_qemu_ld_tl(val, addr, ctx->mem_idx, op); \
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}
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static inline void gen_qemu_ld16u(DisasContext *ctx, TCGv arg1, TCGv arg2)
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{
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TCGMemOp op = MO_UW | ctx->default_tcg_memop_mask;
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tcg_gen_qemu_ld_tl(arg1, arg2, ctx->mem_idx, op);
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GEN_QEMU_LOAD_TL(ld8u, DEF_MEMOP(MO_UB))
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GEN_QEMU_LOAD_TL(ld16u, DEF_MEMOP(MO_UW))
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GEN_QEMU_LOAD_TL(ld16s, DEF_MEMOP(MO_SW))
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GEN_QEMU_LOAD_TL(ld32u, DEF_MEMOP(MO_UL))
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GEN_QEMU_LOAD_TL(ld32s, DEF_MEMOP(MO_SL))
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#define GEN_QEMU_LOAD_64(ldop, op) \
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static void glue(gen_qemu_, glue(ldop, _i64))(DisasContext *ctx, \
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TCGv_i64 val, \
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TCGv addr) \
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{ \
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tcg_gen_qemu_ld_i64(val, addr, ctx->mem_idx, op); \
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}
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static inline void gen_qemu_ld16s(DisasContext *ctx, TCGv arg1, TCGv arg2)
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{
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TCGMemOp op = MO_SW | ctx->default_tcg_memop_mask;
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tcg_gen_qemu_ld_tl(arg1, arg2, ctx->mem_idx, op);
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}
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static inline void gen_qemu_ld32u(DisasContext *ctx, TCGv arg1, TCGv arg2)
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{
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TCGMemOp op = MO_UL | ctx->default_tcg_memop_mask;
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tcg_gen_qemu_ld_tl(arg1, arg2, ctx->mem_idx, op);
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}
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static void gen_qemu_ld32u_i64(DisasContext *ctx, TCGv_i64 val, TCGv addr)
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{
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TCGv tmp = tcg_temp_new();
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gen_qemu_ld32u(ctx, tmp, addr);
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tcg_gen_extu_tl_i64(val, tmp);
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tcg_temp_free(tmp);
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}
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static inline void gen_qemu_ld32s(DisasContext *ctx, TCGv arg1, TCGv arg2)
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{
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TCGMemOp op = MO_SL | ctx->default_tcg_memop_mask;
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tcg_gen_qemu_ld_tl(arg1, arg2, ctx->mem_idx, op);
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}
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static void gen_qemu_ld32s_i64(DisasContext *ctx, TCGv_i64 val, TCGv addr)
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{
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TCGv tmp = tcg_temp_new();
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gen_qemu_ld32s(ctx, tmp, addr);
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tcg_gen_ext_tl_i64(val, tmp);
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tcg_temp_free(tmp);
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}
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GEN_QEMU_LOAD_64(ld32u, DEF_MEMOP(MO_UL))
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GEN_QEMU_LOAD_64(ld32s, DEF_MEMOP(MO_SL))
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static inline void gen_qemu_ld64(DisasContext *ctx, TCGv_i64 arg1, TCGv arg2)
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{
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