intel_iommu: introduce vtd_reset_caches()
Provide the function and use it in vtd_init(). Used to reset both context entry cache and iotlb cache for the whole IOMMU unit. Signed-off-by: Peter Xu <peterx@redhat.com> Reviewed-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Jason Wang <jasowang@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> (cherry picked from commitstable-3.006aba4ca52
) *functional dep. for2cc9ddcceb
Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
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92c7eec109
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0a818f87f7
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@ -227,6 +227,14 @@ static void vtd_reset_iotlb(IntelIOMMUState *s)
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vtd_iommu_unlock(s);
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}
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static void vtd_reset_caches(IntelIOMMUState *s)
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{
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vtd_iommu_lock(s);
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vtd_reset_iotlb_locked(s);
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vtd_reset_context_cache_locked(s);
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vtd_iommu_unlock(s);
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}
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static uint64_t vtd_get_iotlb_key(uint64_t gfn, uint16_t source_id,
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uint32_t level)
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{
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@ -3123,10 +3131,7 @@ static void vtd_init(IntelIOMMUState *s)
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s->cap |= VTD_CAP_CM;
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}
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vtd_iommu_lock(s);
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vtd_reset_context_cache_locked(s);
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vtd_reset_iotlb_locked(s);
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vtd_iommu_unlock(s);
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vtd_reset_caches(s);
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/* Define registers with default values and bit semantics */
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vtd_define_long(s, DMAR_VER_REG, 0x10UL, 0, 0);
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