target-ppc: add stxvh8x instruction
stxvh8x: Store VSX Vector Halfword*8 Vector (16-bit elements): +------+------+------+------+------+------+------+------+ | 0001 | 1011 | 2021 | 3031 | 4041 | 5051 | 6061 | 7071 | +------+------+------+------+------+------+------+------+ Store results in following: Big-Endian Storage +-------+-------+-------+-------+-------+-------+-------+-------+ | 00 01 | 10 11 | 20 21 | 30 31 | 40 41 | 50 51 | 60 61 | 70 71 | +-------+-------+-------+-------+-------+-------+-------+-------+ Little-Endian Storage +-------+-------+-------+-------+-------+-------+-------+-------+ | 01 00 | 11 10 | 21 20 | 31 30 | 41 40 | 51 50 | 61 60 | 71 70 | +-------+-------+-------+-------+-------+-------+-------+-------+ Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com> Reviewed-by: Richard Henderson <rth@twiddle.net> [dwg: Tweak commit description] Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
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@ -226,6 +226,37 @@ static void gen_stxvw4x(DisasContext *ctx)
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tcg_temp_free(EA);
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}
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static void gen_stxvh8x(DisasContext *ctx)
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{
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TCGv_i64 xsh = cpu_vsrh(xS(ctx->opcode));
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TCGv_i64 xsl = cpu_vsrl(xS(ctx->opcode));
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TCGv EA;
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if (unlikely(!ctx->vsx_enabled)) {
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gen_exception(ctx, POWERPC_EXCP_VSXU);
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return;
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}
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gen_set_access_type(ctx, ACCESS_INT);
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EA = tcg_temp_new();
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gen_addr_reg_index(ctx, EA);
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if (ctx->le_mode) {
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TCGv_i64 outh = tcg_temp_new_i64();
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TCGv_i64 outl = tcg_temp_new_i64();
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gen_bswap16x8(outh, outl, xsh, xsl);
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tcg_gen_qemu_st_i64(outh, EA, ctx->mem_idx, MO_BEQ);
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tcg_gen_addi_tl(EA, EA, 8);
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tcg_gen_qemu_st_i64(outl, EA, ctx->mem_idx, MO_BEQ);
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tcg_temp_free_i64(outh);
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tcg_temp_free_i64(outl);
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} else {
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tcg_gen_qemu_st_i64(xsh, EA, ctx->mem_idx, MO_BEQ);
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tcg_gen_addi_tl(EA, EA, 8);
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tcg_gen_qemu_st_i64(xsl, EA, ctx->mem_idx, MO_BEQ);
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}
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tcg_temp_free(EA);
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}
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#define MV_VSRW(name, tcgop1, tcgop2, target, source) \
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static void gen_##name(DisasContext *ctx) \
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{ \
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@ -16,6 +16,7 @@ GEN_HANDLER_E(stxsiwx, 0x1F, 0xC, 0x04, 0, PPC_NONE, PPC2_VSX207),
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GEN_HANDLER_E(stxsspx, 0x1F, 0xC, 0x14, 0, PPC_NONE, PPC2_VSX207),
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GEN_HANDLER_E(stxvd2x, 0x1F, 0xC, 0x1E, 0, PPC_NONE, PPC2_VSX),
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GEN_HANDLER_E(stxvw4x, 0x1F, 0xC, 0x1C, 0, PPC_NONE, PPC2_VSX),
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GEN_HANDLER_E(stxvh8x, 0x1F, 0x0C, 0x1D, 0, PPC_NONE, PPC2_ISA300),
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GEN_HANDLER_E(mfvsrwz, 0x1F, 0x13, 0x03, 0x0000F800, PPC_NONE, PPC2_VSX207),
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GEN_HANDLER_E(mtvsrwa, 0x1F, 0x13, 0x06, 0x0000F800, PPC_NONE, PPC2_VSX207),
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