From 14115b91ddb106b3e05c74c26a056b253ca666ea Mon Sep 17 00:00:00 2001 From: Alistair Francis Date: Fri, 23 Aug 2019 08:21:22 -0700 Subject: [PATCH] target/riscv: Fix mstatus dirty mask This is meant to mask off the hypervisor bits, but a typo caused it to mask MPP instead. Fixes: 1f0419cb04 ("target/riscv: Allow setting mstatus virtulisation bits") Signed-off-by: Alistair Francis Reviewed-by: Bin Meng Signed-off-by: Palmer Dabbelt --- target/riscv/csr.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/riscv/csr.c b/target/riscv/csr.c index 2789215b5e..f767ad24be 100644 --- a/target/riscv/csr.c +++ b/target/riscv/csr.c @@ -335,7 +335,7 @@ static int write_mstatus(CPURISCVState *env, int csrno, target_ulong val) * RV32: MPV and MTL are not in mstatus. The current plan is to * add them to mstatush. For now, we just don't support it. */ - mask |= MSTATUS_MPP | MSTATUS_MPV; + mask |= MSTATUS_MTL | MSTATUS_MPV; #endif }