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Patch queue for ppc - 2014-07-15

Browse source 
Some more bug fixes during the RC phase:
 
   - Fix huge page mapping regressions
   - Fix Book3S thread number enumeration
   - Fix Book3S VFIO permission issue
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Merge remote-tracking branch 'remotes/agraf/tags/signed-ppc-for-upstream' into staging

Patch queue for ppc - 2014-07-15

Some more bug fixes during the RC phase:

  - Fix huge page mapping regressions
  - Fix Book3S thread number enumeration
  - Fix Book3S VFIO permission issue

# gpg: Signature made Tue 15 Jul 2014 15:13:54 BST using RSA key ID 03FEDC60
# gpg: Can't check signature: public key not found

* remotes/agraf/tags/signed-ppc-for-upstream:
  sPAPR/IOMMU: Fix TCE entry permission
  spapr: Enable use of huge pages
  spapr: Move RMA memory region registration code
  ppc: memory: Replace memory_region_init_ram with memory_region_allocate_system_memory
  target-ppc: Fix number of threads per core limit

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Peter Maydell 2014-07-15 15:51:12 +01:00
parent 2c65ebe646 27e27782f7
commit 146ae00192
14 changed files with 50 additions and 65 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

2
hw/misc/vfio.c
View file

@ -2489,7 +2489,7 @@ static void vfio_iommu_map_notify(Notifier *n, void *data)
return;
}
if (iotlb->perm != IOMMU_NONE) {
if ((iotlb->perm & IOMMU_RW) != IOMMU_NONE) {
vaddr = memory_region_get_ram_ptr(mr) + xlat;
ret = vfio_dma_map(container, iotlb->iova,

3
hw/ppc/e500.c
View file

@ -701,8 +701,7 @@ void ppce500_init(MachineState *machine, PPCE500Params *params)
machine->ram_size = ram_size;
/* Register Memory */
memory_region_init_ram(ram, NULL, "mpc8544ds.ram", ram_size);
vmstate_register_ram_global(ram);
memory_region_allocate_system_memory(ram, NULL, "mpc8544ds.ram", ram_size);
memory_region_add_subregion(address_space_mem, 0, ram);
dev = qdev_create(NULL, "e500-ccsr");

7
hw/ppc/mac_newworld.c
View file

@ -200,13 +200,12 @@ static void ppc_core99_init(MachineState *machine)
}
/* allocate RAM */
memory_region_init_ram(ram, NULL, "ppc_core99.ram", ram_size);
vmstate_register_ram_global(ram);
memory_region_allocate_system_memory(ram, NULL, "ppc_core99.ram", ram_size);
memory_region_add_subregion(get_system_memory(), 0, ram);
/* allocate and load BIOS */
memory_region_init_ram(bios, NULL, "ppc_core99.bios", BIOS_SIZE);
vmstate_register_ram_global(bios);
memory_region_allocate_system_memory(bios, NULL, "ppc_core99.bios",
BIOS_SIZE);
if (bios_name == NULL)
bios_name = PROM_FILENAME;
filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);

8
hw/ppc/mac_oldworld.c
View file

@ -130,13 +130,13 @@ static void ppc_heathrow_init(MachineState *machine)
exit(1);
}
memory_region_init_ram(ram, NULL, "ppc_heathrow.ram", ram_size);
vmstate_register_ram_global(ram);
memory_region_allocate_system_memory(ram, NULL, "ppc_heathrow.ram",
ram_size);
memory_region_add_subregion(sysmem, 0, ram);
/* allocate and load BIOS */
memory_region_init_ram(bios, NULL, "ppc_heathrow.bios", BIOS_SIZE);
vmstate_register_ram_global(bios);
memory_region_allocate_system_memory(bios, NULL, "ppc_heathrow.bios",
BIOS_SIZE);
if (bios_name == NULL)
bios_name = PROM_FILENAME;
filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);

21
hw/ppc/ppc405_boards.c
View file

@ -199,8 +199,8 @@ static void ref405ep_init(MachineState *machine)
MemoryRegion *sysmem = get_system_memory();
/* XXX: fix this */
memory_region_init_ram(&ram_memories[0], NULL, "ef405ep.ram", 0x08000000);
vmstate_register_ram_global(&ram_memories[0]);
memory_region_allocate_system_memory(&ram_memories[0], NULL, "ef405ep.ram",
0x08000000);
ram_bases[0] = 0;
ram_sizes[0] = 0x08000000;
memory_region_init(&ram_memories[1], NULL, "ef405ep.ram1", 0);
@ -214,8 +214,7 @@ static void ref405ep_init(MachineState *machine)
33333333, &pic, kernel_filename == NULL ? 0 : 1);
/* allocate SRAM */
sram_size = 512 * 1024;
memory_region_init_ram(sram, NULL, "ef405ep.sram", sram_size);
vmstate_register_ram_global(sram);
memory_region_allocate_system_memory(sram, NULL, "ef405ep.sram", sram_size);
memory_region_add_subregion(sysmem, 0xFFF00000, sram);
/* allocate and load BIOS */
#ifdef DEBUG_BOARD_INIT
@ -246,8 +245,8 @@ static void ref405ep_init(MachineState *machine)
printf("Load BIOS from file\n");
#endif
bios = g_new(MemoryRegion, 1);
memory_region_init_ram(bios, NULL, "ef405ep.bios", BIOS_SIZE);
vmstate_register_ram_global(bios);
memory_region_allocate_system_memory(bios, NULL, "ef405ep.bios",
BIOS_SIZE);
if (bios_name == NULL)
bios_name = BIOS_FILENAME;
filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
@ -518,14 +517,12 @@ static void taihu_405ep_init(MachineState *machine)
DriveInfo *dinfo;
/* RAM is soldered to the board so the size cannot be changed */
memory_region_init_ram(&ram_memories[0], NULL,
memory_region_allocate_system_memory(&ram_memories[0], NULL,
"taihu_405ep.ram-0", 0x04000000);
vmstate_register_ram_global(&ram_memories[0]);
ram_bases[0] = 0;
ram_sizes[0] = 0x04000000;
memory_region_init_ram(&ram_memories[1], NULL,
memory_region_allocate_system_memory(&ram_memories[1], NULL,
"taihu_405ep.ram-1", 0x04000000);
vmstate_register_ram_global(&ram_memories[1]);
ram_bases[1] = 0x04000000;
ram_sizes[1] = 0x04000000;
ram_size = 0x08000000;
@ -567,8 +564,8 @@ static void taihu_405ep_init(MachineState *machine)
if (bios_name == NULL)
bios_name = BIOS_FILENAME;
bios = g_new(MemoryRegion, 1);
memory_region_init_ram(bios, NULL, "taihu_405ep.bios", BIOS_SIZE);
vmstate_register_ram_global(bios);
memory_region_allocate_system_memory(bios, NULL, "taihu_405ep.bios",
BIOS_SIZE);
filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
if (filename) {
bios_size = load_image(filename, memory_region_get_ram_ptr(bios));

5
hw/ppc/ppc405_uc.c
View file

@ -23,6 +23,7 @@
*/
#include "hw/hw.h"
#include "hw/ppc/ppc.h"
#include "hw/boards.h"
#include "ppc405.h"
#include "hw/char/serial.h"
#include "qemu/timer.h"
@ -973,8 +974,8 @@ static void ppc405_ocm_init(CPUPPCState *env)
ocm = g_malloc0(sizeof(ppc405_ocm_t));
/* XXX: Size is 4096 or 0x04000000 */
memory_region_init_ram(&ocm->isarc_ram, NULL, "ppc405.ocm", 4096);
vmstate_register_ram_global(&ocm->isarc_ram);
memory_region_allocate_system_memory(&ocm->isarc_ram, NULL, "ppc405.ocm",
4096);
memory_region_init_alias(&ocm->dsarc_ram, NULL, "ppc405.dsarc", &ocm->isarc_ram,
0, 4096);
qemu_register_reset(&ocm_reset, ocm);

5
hw/ppc/ppc4xx_devs.c
View file

@ -24,6 +24,7 @@
#include "hw/hw.h"
#include "hw/ppc/ppc.h"
#include "hw/ppc/ppc4xx.h"
#include "hw/boards.h"
#include "qemu/log.h"
#include "exec/address-spaces.h"
@ -694,8 +695,8 @@ ram_addr_t ppc4xx_sdram_adjust(ram_addr_t ram_size, int nr_banks,
if (bank_size <= size_left) {
char name[32];
snprintf(name, sizeof(name), "ppc4xx.sdram%d", i);
memory_region_init_ram(&ram_memories[i], NULL, name, bank_size);
vmstate_register_ram_global(&ram_memories[i]);
memory_region_allocate_system_memory(&ram_memories[i], NULL,
name, bank_size);
ram_bases[i] = base;
ram_sizes[i] = bank_size;
base += bank_size;

3
hw/ppc/prep.c
View file

@ -417,8 +417,7 @@ static void ppc_prep_init(MachineState *machine)
}
/* allocate RAM */
memory_region_init_ram(ram, NULL, "ppc_prep.ram", ram_size);
vmstate_register_ram_global(ram);
memory_region_allocate_system_memory(ram, NULL, "ppc_prep.ram", ram_size);
memory_region_add_subregion(sysmem, 0, ram);
if (linux_boot) {

19
hw/ppc/spapr.c
View file

@ -1223,6 +1223,8 @@ static void ppc_spapr_init(MachineState *machine)
int i;
MemoryRegion *sysmem = get_system_memory();
MemoryRegion *ram = g_new(MemoryRegion, 1);
MemoryRegion *rma_region;
void *rma = NULL;
hwaddr rma_alloc_size;
hwaddr node0_size = (nb_numa_nodes > 1) ? numa_info[0].node_mem : ram_size;
uint32_t initrd_base = 0;
@ -1239,7 +1241,7 @@ static void ppc_spapr_init(MachineState *machine)
cpu_ppc_hypercall = emulate_spapr_hypercall;
/* Allocate RMA if necessary */
rma_alloc_size = kvmppc_alloc_rma("ppc_spapr.rma", sysmem);
rma_alloc_size = kvmppc_alloc_rma(&rma);
if (rma_alloc_size == -1) {
hw_error("qemu: Unable to create RMA\n");
@ -1333,13 +1335,16 @@ static void ppc_spapr_init(MachineState *machine)
/* allocate RAM */
spapr->ram_limit = ram_size;
if (spapr->ram_limit > rma_alloc_size) {
ram_addr_t nonrma_base = rma_alloc_size;
ram_addr_t nonrma_size = spapr->ram_limit - rma_alloc_size;
memory_region_allocate_system_memory(ram, NULL, "ppc_spapr.ram",
spapr->ram_limit);
memory_region_add_subregion(sysmem, 0, ram);
memory_region_init_ram(ram, NULL, "ppc_spapr.ram", nonrma_size);
vmstate_register_ram_global(ram);
memory_region_add_subregion(sysmem, nonrma_base, ram);
if (rma_alloc_size && rma) {
rma_region = g_new(MemoryRegion, 1);
memory_region_init_ram_ptr(rma_region, NULL, "ppc_spapr.rma",
rma_alloc_size, rma);
vmstate_register_ram_global(rma_region);
memory_region_add_subregion(sysmem, 0, rma_region);
}
filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, "spapr-rtas.bin");

4
hw/ppc/spapr_iommu.c
View file

@ -81,7 +81,7 @@ static IOMMUTLBEntry spapr_tce_translate_iommu(MemoryRegion *iommu, hwaddr addr)
ret.iova = addr & page_mask;
ret.translated_addr = tce & page_mask;
ret.addr_mask = ~page_mask;
ret.perm = tce;
ret.perm = tce & IOMMU_RW;
}
trace_spapr_iommu_xlate(tcet->liobn, addr, ret.iova, ret.perm,
ret.addr_mask);
@ -223,7 +223,7 @@ static target_ulong put_tce_emu(sPAPRTCETable *tcet, target_ulong ioba,
entry.iova = ioba & page_mask;
entry.translated_addr = tce & page_mask;
entry.addr_mask = ~page_mask;
entry.perm = tce;
entry.perm = tce & IOMMU_RW;
memory_region_notify_iommu(&tcet->iommu, entry);
return H_SUCCESS;

3
hw/ppc/virtex_ml507.c
View file

@ -222,8 +222,7 @@ static void virtex_init(MachineState *machine)
env = &cpu->env;
qemu_register_reset(main_cpu_reset, cpu);
memory_region_init_ram(phys_ram, NULL, "ram", ram_size);
vmstate_register_ram_global(phys_ram);
memory_region_allocate_system_memory(phys_ram, NULL, "ram", ram_size);
memory_region_add_subregion(address_space_mem, ram_base, phys_ram);
dinfo = drive_get(IF_PFLASH, 0, 0);

13
target-ppc/kvm.c
View file

@ -1580,13 +1580,11 @@ int kvmppc_smt_threads(void)
}
#ifdef TARGET_PPC64
off_t kvmppc_alloc_rma(const char *name, MemoryRegion *sysmem)
off_t kvmppc_alloc_rma(void **rma)
{
void *rma;
off_t size;
int fd;
struct kvm_allocate_rma ret;
MemoryRegion *rma_region;
/* If cap_ppc_rma == 0, contiguous RMA allocation is not supported
* if cap_ppc_rma == 1, contiguous RMA allocation is supported, but
@ -1609,17 +1607,12 @@ off_t kvmppc_alloc_rma(const char *name, MemoryRegion *sysmem)
size = MIN(ret.rma_size, 256ul << 20);
rma = mmap(NULL, size, PROT_READ|PROT_WRITE, MAP_SHARED, fd, 0);
if (rma == MAP_FAILED) {
*rma = mmap(NULL, size, PROT_READ|PROT_WRITE, MAP_SHARED, fd, 0);
if (*rma == MAP_FAILED) {
fprintf(stderr, "KVM: Error mapping RMA: %s\n", strerror(errno));
return -1;
};
rma_region = g_new(MemoryRegion, 1);
memory_region_init_ram_ptr(rma_region, NULL, name, size, rma);
vmstate_register_ram_global(rma_region);
memory_region_add_subregion(sysmem, 0, rma_region);
return size;
}

4
target-ppc/kvm_ppc.h
View file

@ -31,7 +31,7 @@ int kvmppc_or_tsr_bits(PowerPCCPU *cpu, uint32_t tsr_bits);
int kvmppc_set_tcr(PowerPCCPU *cpu);
int kvmppc_booke_watchdog_enable(PowerPCCPU *cpu);
#ifndef CONFIG_USER_ONLY
off_t kvmppc_alloc_rma(const char *name, MemoryRegion *sysmem);
off_t kvmppc_alloc_rma(void **rma);
bool kvmppc_spapr_use_multitce(void);
void *kvmppc_create_spapr_tce(uint32_t liobn, uint32_t window_size, int *pfd,
bool vfio_accel);
@ -134,7 +134,7 @@ static inline int kvmppc_booke_watchdog_enable(PowerPCCPU *cpu)
}
#ifndef CONFIG_USER_ONLY
static inline off_t kvmppc_alloc_rma(const char *name, MemoryRegion *sysmem)
static inline off_t kvmppc_alloc_rma(void **rma)
{
return 0;
}

18
target-ppc/translate_init.c
View file

@ -9098,29 +9098,21 @@ static void ppc_cpu_unrealizefn(DeviceState *dev, Error **errp)
int ppc_get_compat_smt_threads(PowerPCCPU *cpu)
{
int ret = smp_threads;
PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu);
int ret = MIN(smp_threads, kvmppc_smt_threads());
switch (cpu->cpu_version) {
case CPU_POWERPC_LOGICAL_2_05:
ret = 2;
ret = MIN(ret, 2);
break;
case CPU_POWERPC_LOGICAL_2_06:
ret = 4;
ret = MIN(ret, 4);
break;
case CPU_POWERPC_LOGICAL_2_07:
ret = 8;
break;
default:
if (pcc->pcr_mask & PCR_COMPAT_2_06) {
ret = 4;
} else if (pcc->pcr_mask & PCR_COMPAT_2_05) {
ret = 2;
}
ret = MIN(ret, 8);
break;
}
return MIN(ret, smp_threads);
return ret;
}
int ppc_set_compat(PowerPCCPU *cpu, uint32_t cpu_version)