target/xtensa: extract test for debug exception
- mark break and break.n instructions; - collect debug cause bits from parameter 0 of instructions marked for debug exception; - put debug exception check right after syscall check; Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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@ -959,6 +959,7 @@ static void disas_xtensa_insn(CPUXtensaState *env, DisasContext *dc)
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uint32_t arg[MAX_OPCODE_ARGS];
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uint32_t raw_arg[MAX_OPCODE_ARGS];
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} slot_prop[MAX_INSN_SLOTS];
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uint32_t debug_cause = 0;
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if (len == XTENSA_UNDEFINED) {
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qemu_log_mask(LOG_GUEST_ERROR,
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@ -1040,6 +1041,9 @@ static void disas_xtensa_insn(CPUXtensaState *env, DisasContext *dc)
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gen_exception_cause(dc, ILLEGAL_INSTRUCTION_CAUSE);
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return;
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}
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if (ops->op_flags & XTENSA_OP_DEBUG_BREAK) {
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debug_cause |= ops->par[0];
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}
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}
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if ((op_flags & XTENSA_OP_PRIVILEGED) &&
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@ -1052,6 +1056,11 @@ static void disas_xtensa_insn(CPUXtensaState *env, DisasContext *dc)
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return;
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}
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if ((op_flags & XTENSA_OP_DEBUG_BREAK) && dc->debug) {
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gen_debug_exception(dc, debug_cause);
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return;
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}
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for (slot = 0; slot < slots; ++slot) {
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XtensaOpcodeOps *ops = slot_prop[slot].ops;
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@ -1515,14 +1524,6 @@ static void translate_bp(DisasContext *dc, const uint32_t arg[],
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tcg_temp_free(tmp);
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}
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static void translate_break(DisasContext *dc, const uint32_t arg[],
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const uint32_t par[])
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{
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if (dc->debug) {
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gen_debug_exception(dc, par[0]);
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}
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}
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static void translate_call0(DisasContext *dc, const uint32_t arg[],
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const uint32_t par[])
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{
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@ -2827,12 +2828,14 @@ static const XtensaOpcodeOps core_ops[] = {
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.par = (const uint32_t[]){TCG_COND_EQ},
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}, {
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.name = "break",
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.translate = translate_break,
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.translate = translate_nop,
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.par = (const uint32_t[]){DEBUGCAUSE_BI},
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.op_flags = XTENSA_OP_DEBUG_BREAK,
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}, {
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.name = "break.n",
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.translate = translate_break,
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.translate = translate_nop,
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.par = (const uint32_t[]){DEBUGCAUSE_BN},
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.op_flags = XTENSA_OP_DEBUG_BREAK,
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}, {
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.name = "bt",
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.translate = translate_bp,
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