Allow emulation of 32bit targets in the MIPS64 capable qemu version.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3007 c046a42c-6fe2-441c-8c8c-71466251a162
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@ -77,7 +77,6 @@ struct mips_def_t {
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/* MIPS CPU definitions */
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/* MIPS CPU definitions */
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static mips_def_t mips_defs[] =
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static mips_def_t mips_defs[] =
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{
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{
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#ifndef TARGET_MIPS64
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{
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{
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.name = "4Kc",
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.name = "4Kc",
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.CP0_PRid = 0x00018000,
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.CP0_PRid = 0x00018000,
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@ -135,7 +134,7 @@ static mips_def_t mips_defs[] =
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.CP1_fcr0 = (1 << FCR0_F64) | (1 << FCR0_L) | (1 << FCR0_W) |
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.CP1_fcr0 = (1 << FCR0_F64) | (1 << FCR0_L) | (1 << FCR0_W) |
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(1 << FCR0_D) | (1 << FCR0_S) | (0x93 << FCR0_PRID),
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(1 << FCR0_D) | (1 << FCR0_S) | (0x93 << FCR0_PRID),
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},
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},
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#else
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#ifdef TARGET_MIPS64
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{
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{
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.name = "R4000",
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.name = "R4000",
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.CP0_PRid = 0x00000400,
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.CP0_PRid = 0x00000400,
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