Fix erraneous fallthrough in MIPS trap implementation, thanks Atsushi Nemoto.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2247 c046a42c-6fe2-441c-8c8c-71466251a162
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@ -1276,6 +1276,7 @@ static void gen_trap (DisasContext *ctx, uint32_t opc,
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GEN_LOAD_REG_TN(T1, rt);
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GEN_LOAD_REG_TN(T1, rt);
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cond = 1;
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cond = 1;
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}
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}
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break;
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case OPC_TEQI:
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case OPC_TEQI:
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case OPC_TGEI:
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case OPC_TGEI:
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case OPC_TGEIU:
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case OPC_TGEIU:
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