SH4: Remove dyngen leftovers
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5126 c046a42c-6fe2-441c-8c8c-71466251a162
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@ -98,9 +98,7 @@ typedef struct CPUSH4State {
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uint32_t fpscr; /* floating point status/control register */
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uint32_t fpscr; /* floating point status/control register */
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uint32_t fpul; /* floating point communication register */
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uint32_t fpul; /* floating point communication register */
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/* temporary float registers */
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/* float point status register */
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float32 ft0, ft1;
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float64 dt0, dt1;
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float_status fp_status;
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float_status fp_status;
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/* Those belong to the specific unit (SH7750) but are handled here */
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/* Those belong to the specific unit (SH7750) but are handled here */
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@ -24,14 +24,6 @@
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#include "dyngen-exec.h"
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#include "dyngen-exec.h"
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register struct CPUSH4State *env asm(AREG0);
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register struct CPUSH4State *env asm(AREG0);
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register uint32_t T0 asm(AREG1);
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register uint32_t T1 asm(AREG2);
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//register uint32_t T2 asm(AREG3);
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#define FT0 (env->ft0)
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#define FT1 (env->ft1)
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#define DT0 (env->dt0)
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#define DT1 (env->dt1)
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#include "cpu.h"
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#include "cpu.h"
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#include "exec-all.h"
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#include "exec-all.h"
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@ -67,9 +67,6 @@ static TCGv cpu_pr, cpu_fpscr, cpu_fpul, cpu_flags;
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/* internal register indexes */
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/* internal register indexes */
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static TCGv cpu_flags, cpu_delayed_pc;
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static TCGv cpu_flags, cpu_delayed_pc;
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/* dyngen register indexes */
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static TCGv cpu_T[2];
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#include "gen-icount.h"
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#include "gen-icount.h"
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static void sh4_translate_init(void)
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static void sh4_translate_init(void)
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@ -88,8 +85,6 @@ static void sh4_translate_init(void)
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return;
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return;
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cpu_env = tcg_global_reg_new(TCG_TYPE_PTR, TCG_AREG0, "env");
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cpu_env = tcg_global_reg_new(TCG_TYPE_PTR, TCG_AREG0, "env");
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cpu_T[0] = tcg_global_reg_new(TCG_TYPE_I32, TCG_AREG1, "T0");
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cpu_T[1] = tcg_global_reg_new(TCG_TYPE_I32, TCG_AREG2, "T1");
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for (i = 0; i < 24; i++)
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for (i = 0; i < 24; i++)
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cpu_gregs[i] = tcg_global_mem_new(TCG_TYPE_I32, TCG_AREG0,
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cpu_gregs[i] = tcg_global_mem_new(TCG_TYPE_I32, TCG_AREG0,
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