target/ppc: Optimize emulation of vclzw instruction
Optimize Altivec instruction vclzw (Vector Count Leading Zeros Word). This instruction counts the number of leading zeros of each word element in source register and places result in the appropriate word element of destination register. Counting is to be performed in four iterations of for loop(one for each word elemnt of source register vB). Every iteration consists of loading appropriate word element from source register, counting leading zeros with tcg_gen_clzi_i32, and saving the result in appropriate word element of destination register. Signed-off-by: Stefan Brankovic <stefan.brankovic@rt-rk.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <1563200574-11098-7-git-send-email-stefan.brankovic@rt-rk.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
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@ -310,7 +310,6 @@ DEF_HELPER_4(vctsxs, void, env, avr, avr, i32)
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DEF_HELPER_2(vclzb, void, avr, avr)
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DEF_HELPER_2(vclzh, void, avr, avr)
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DEF_HELPER_2(vclzw, void, avr, avr)
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DEF_HELPER_2(vctzb, void, avr, avr)
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DEF_HELPER_2(vctzh, void, avr, avr)
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DEF_HELPER_2(vctzw, void, avr, avr)
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@ -1819,15 +1819,12 @@ VUPK(lsw, s64, s32, UPKLO)
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#define clzb(v) ((v) ? clz32((uint32_t)(v) << 24) : 8)
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#define clzh(v) ((v) ? clz32((uint32_t)(v) << 16) : 16)
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#define clzw(v) clz32((v))
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VGENERIC_DO(clzb, u8)
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VGENERIC_DO(clzh, u16)
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VGENERIC_DO(clzw, u32)
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#undef clzb
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#undef clzh
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#undef clzw
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#define ctzb(v) ((v) ? ctz32(v) : 8)
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#define ctzh(v) ((v) ? ctz32(v) : 16)
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@ -742,6 +742,32 @@ static void trans_vgbbd(DisasContext *ctx)
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tcg_temp_free_i64(avr[1]);
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}
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/*
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* vclzw VRT,VRB - Vector Count Leading Zeros Word
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*
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* Counting the number of leading zero bits of each word element in source
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* register and placing result in appropriate word element of destination
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* register.
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*/
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static void trans_vclzw(DisasContext *ctx)
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{
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int VT = rD(ctx->opcode);
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int VB = rB(ctx->opcode);
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TCGv_i32 tmp = tcg_temp_new_i32();
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int i;
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/* Perform count for every word element using tcg_gen_clzi_i32. */
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for (i = 0; i < 4; i++) {
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tcg_gen_ld_i32(tmp, cpu_env,
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offsetof(CPUPPCState, vsr[32 + VB].u64[0]) + i * 4);
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tcg_gen_clzi_i32(tmp, tmp, 32);
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tcg_gen_st_i32(tmp, cpu_env,
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offsetof(CPUPPCState, vsr[32 + VT].u64[0]) + i * 4);
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}
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tcg_temp_free_i32(tmp);
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}
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/*
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* vclzd VRT,VRB - Vector Count Leading Zeros Doubleword
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*
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@ -1283,7 +1309,7 @@ GEN_VAFORM_PAIRED(vmaddfp, vnmsubfp, 23)
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GEN_VXFORM_NOA(vclzb, 1, 28)
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GEN_VXFORM_NOA(vclzh, 1, 29)
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GEN_VXFORM_NOA(vclzw, 1, 30)
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GEN_VXFORM_TRANS(vclzw, 1, 30)
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GEN_VXFORM_TRANS(vclzd, 1, 31)
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GEN_VXFORM_NOA_2(vnegw, 1, 24, 6)
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GEN_VXFORM_NOA_2(vnegd, 1, 24, 7)
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