i386: Add FEAT_8000_0008_EBX CPUID feature word
Add the new feature word and the "ibpb" feature flag. Based on a patch by Paolo Bonzini. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Message-Id: <20180109154519.25634-5-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
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@ -483,6 +483,22 @@ static FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
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.tcg_features = TCG_APM_FEATURES,
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.unmigratable_flags = CPUID_APM_INVTSC,
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},
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[FEAT_8000_0008_EBX] = {
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.feat_names = {
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NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL,
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"ibpb", NULL, NULL, NULL,
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NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL,
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},
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.cpuid_eax = 0x80000008,
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.cpuid_reg = R_EBX,
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.tcg_features = 0,
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.unmigratable_flags = 0,
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},
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[FEAT_XSAVE] = {
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.feat_names = {
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"xsaveopt", "xsavec", "xgetbv1", "xsaves",
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@ -3130,7 +3146,7 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
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} else {
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*eax = cpu->phys_bits;
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}
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*ebx = 0;
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*ebx = env->features[FEAT_8000_0008_EBX];
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*ecx = 0;
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*edx = 0;
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if (cs->nr_cores * cs->nr_threads > 1) {
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@ -3593,6 +3609,7 @@ static void x86_cpu_expand_features(X86CPU *cpu, Error **errp)
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x86_cpu_adjust_feat_level(cpu, FEAT_8000_0001_EDX);
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x86_cpu_adjust_feat_level(cpu, FEAT_8000_0001_ECX);
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x86_cpu_adjust_feat_level(cpu, FEAT_8000_0007_EDX);
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x86_cpu_adjust_feat_level(cpu, FEAT_8000_0008_EBX);
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x86_cpu_adjust_feat_level(cpu, FEAT_C000_0001_EDX);
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x86_cpu_adjust_feat_level(cpu, FEAT_SVM);
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x86_cpu_adjust_feat_level(cpu, FEAT_XSAVE);
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@ -472,6 +472,7 @@ typedef enum FeatureWord {
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FEAT_8000_0001_EDX, /* CPUID[8000_0001].EDX */
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FEAT_8000_0001_ECX, /* CPUID[8000_0001].ECX */
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FEAT_8000_0007_EDX, /* CPUID[8000_0007].EDX */
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FEAT_8000_0008_EBX, /* CPUID[8000_0008].EBX */
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FEAT_C000_0001_EDX, /* CPUID[C000_0001].EDX */
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FEAT_KVM, /* CPUID[4000_0001].EAX (KVM_CPUID_FEATURES) */
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FEAT_HYPERV_EAX, /* CPUID[4000_0003].EAX */
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@ -669,6 +670,8 @@ typedef uint32_t FeatureWordArray[FEATURE_WORDS];
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#define CPUID_7_0_EDX_AVX512_4FMAPS (1U << 3) /* AVX512 Multiply Accumulation Single Precision */
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#define CPUID_7_0_EDX_SPEC_CTRL (1U << 26) /* Speculation Control */
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#define CPUID_8000_0008_EBX_IBPB (1U << 12) /* Indirect Branch Prediction Barrier */
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#define CPUID_XSAVE_XSAVEOPT (1U << 0)
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#define CPUID_XSAVE_XSAVEC (1U << 1)
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#define CPUID_XSAVE_XGETBV1 (1U << 2)
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