target/i386: split cpu_set_mxcsr() and make cpu_set_fpuc() inline
Split the cpu_set_mxcsr() and make cpu_set_fpuc() inline with specific tcg code. Signed-off-by: Yang Zhong <yang.zhong@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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@ -1594,7 +1594,6 @@ void QEMU_NORETURN raise_interrupt(CPUX86State *nenv, int intno, int is_int,
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/* cc_helper.c */
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extern const uint8_t parity_table[256];
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uint32_t cpu_cc_compute_all(CPUX86State *env1, int op);
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void update_fp_status(CPUX86State *env);
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static inline uint32_t cpu_compute_eflags(CPUX86State *env)
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{
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@ -1643,8 +1642,24 @@ static inline int32_t x86_get_a20_mask(CPUX86State *env)
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}
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/* fpu_helper.c */
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void cpu_set_mxcsr(CPUX86State *env, uint32_t val);
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void cpu_set_fpuc(CPUX86State *env, uint16_t val);
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void update_fp_status(CPUX86State *env);
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void update_mxcsr_status(CPUX86State *env);
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static inline void cpu_set_mxcsr(CPUX86State *env, uint32_t mxcsr)
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{
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env->mxcsr = mxcsr;
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if (tcg_enabled()) {
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update_mxcsr_status(env);
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}
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}
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static inline void cpu_set_fpuc(CPUX86State *env, uint16_t fpuc)
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{
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env->fpuc = fpuc;
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if (tcg_enabled()) {
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update_fp_status(env);
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}
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}
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/* mem_helper.c */
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void helper_lock_init(void);
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@ -1550,12 +1550,11 @@ void helper_xsetbv(CPUX86State *env, uint32_t ecx, uint64_t mask)
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#define SSE_RC_CHOP 0x6000
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#define SSE_FZ 0x8000
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void cpu_set_mxcsr(CPUX86State *env, uint32_t mxcsr)
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void update_mxcsr_status(CPUX86State *env)
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{
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uint32_t mxcsr = env->mxcsr;
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int rnd_type;
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env->mxcsr = mxcsr;
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/* set rounding mode */
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switch (mxcsr & SSE_RC_MASK) {
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default:
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@ -1581,12 +1580,6 @@ void cpu_set_mxcsr(CPUX86State *env, uint32_t mxcsr)
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set_flush_to_zero((mxcsr & SSE_FZ) ? 1 : 0, &env->fp_status);
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}
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void cpu_set_fpuc(CPUX86State *env, uint16_t val)
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{
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env->fpuc = val;
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update_fp_status(env);
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}
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void helper_ldmxcsr(CPUX86State *env, uint32_t val)
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{
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cpu_set_mxcsr(env, val);
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@ -280,7 +280,10 @@ static int cpu_post_load(void *opaque, int version_id)
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for(i = 0; i < 8; i++) {
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env->fptags[i] = (env->fptag_vmstate >> i) & 1;
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}
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if (tcg_enabled()) {
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update_fp_status(env);
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update_mxcsr_status(env);
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}
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cpu_breakpoint_remove_all(cs, BP_CPU);
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cpu_watchpoint_remove_all(cs, BP_CPU);
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