arm_gicv3_kvm: kvm_dist_get/put_priority: skip the registers banked by GICR_IPRIORITYR
While for_each_dist_irq_reg loop starts from GIC_INTERNAL, it forgot to
offset the date array and index. This will overlap the GICR registers
value and leave the last GIC_INTERNAL irq's registers out of update.
Fixes: 367b9f527b
Cc: qemu-stable@nongnu.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Signed-off-by: Shannon Zhao <zhaoshenglong@huawei.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -135,7 +135,14 @@ static void kvm_dist_get_priority(GICv3State *s, uint32_t offset, uint8_t *bmp)
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uint32_t reg, *field;
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int irq;
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field = (uint32_t *)bmp;
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/* For the KVM GICv3, affinity routing is always enabled, and the first 8
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* GICD_IPRIORITYR<n> registers are always RAZ/WI. The corresponding
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* functionality is replaced by GICR_IPRIORITYR<n>. It doesn't need to
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* sync them. So it needs to skip the field of GIC_INTERNAL irqs in bmp and
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* offset.
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*/
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field = (uint32_t *)(bmp + GIC_INTERNAL);
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offset += (GIC_INTERNAL * 8) / 8;
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for_each_dist_irq_reg(irq, s->num_irq, 8) {
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kvm_gicd_access(s, offset, ®, false);
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*field = reg;
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@ -149,7 +156,14 @@ static void kvm_dist_put_priority(GICv3State *s, uint32_t offset, uint8_t *bmp)
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uint32_t reg, *field;
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int irq;
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field = (uint32_t *)bmp;
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/* For the KVM GICv3, affinity routing is always enabled, and the first 8
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* GICD_IPRIORITYR<n> registers are always RAZ/WI. The corresponding
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* functionality is replaced by GICR_IPRIORITYR<n>. It doesn't need to
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* sync them. So it needs to skip the field of GIC_INTERNAL irqs in bmp and
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* offset.
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*/
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field = (uint32_t *)(bmp + GIC_INTERNAL);
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offset += (GIC_INTERNAL * 8) / 8;
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for_each_dist_irq_reg(irq, s->num_irq, 8) {
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reg = *field;
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kvm_gicd_access(s, offset, ®, true);
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