hw/arm/armsse: Give SSE-300 its own Property array
SSE-300 currently shares the SSE-200 Property array. This is bad principally because the default values of the CPU0_FPU and CPU0_DSP properties disable the FPU and DSP on the CPU. That is correct for the SSE-200 but not the SSE-300. Give the SSE-300 its own Property array with the correct SSE-300 specific settings: * SSE-300 has only one CPU, so no CPU1* properties * SSE-300 CPU has FPU and DSP Buglink: https://bugs.launchpad.net/qemu/+bug/1923861 Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210415182353.8173-1-peter.maydell@linaro.org
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@ -84,7 +84,7 @@ static Property iotkit_properties[] = {
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DEFINE_PROP_END_OF_LIST()
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DEFINE_PROP_END_OF_LIST()
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};
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};
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static Property armsse_properties[] = {
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static Property sse200_properties[] = {
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DEFINE_PROP_LINK("memory", ARMSSE, board_memory, TYPE_MEMORY_REGION,
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DEFINE_PROP_LINK("memory", ARMSSE, board_memory, TYPE_MEMORY_REGION,
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MemoryRegion *),
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MemoryRegion *),
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DEFINE_PROP_UINT32("EXP_NUMIRQ", ARMSSE, exp_numirq, 64),
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DEFINE_PROP_UINT32("EXP_NUMIRQ", ARMSSE, exp_numirq, 64),
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@ -97,6 +97,17 @@ static Property armsse_properties[] = {
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DEFINE_PROP_END_OF_LIST()
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DEFINE_PROP_END_OF_LIST()
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};
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};
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static Property sse300_properties[] = {
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DEFINE_PROP_LINK("memory", ARMSSE, board_memory, TYPE_MEMORY_REGION,
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MemoryRegion *),
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DEFINE_PROP_UINT32("EXP_NUMIRQ", ARMSSE, exp_numirq, 64),
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DEFINE_PROP_UINT32("SRAM_ADDR_WIDTH", ARMSSE, sram_addr_width, 15),
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DEFINE_PROP_UINT32("init-svtor", ARMSSE, init_svtor, 0x10000000),
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DEFINE_PROP_BOOL("CPU0_FPU", ARMSSE, cpu_fpu[0], true),
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DEFINE_PROP_BOOL("CPU0_DSP", ARMSSE, cpu_dsp[0], true),
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DEFINE_PROP_END_OF_LIST()
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};
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static const ARMSSEDeviceInfo iotkit_devices[] = {
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static const ARMSSEDeviceInfo iotkit_devices[] = {
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{
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{
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.name = "timer0",
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.name = "timer0",
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@ -519,7 +530,7 @@ static const ARMSSEInfo armsse_variants[] = {
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.has_cpuid = true,
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.has_cpuid = true,
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.has_cpu_pwrctrl = false,
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.has_cpu_pwrctrl = false,
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.has_sse_counter = false,
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.has_sse_counter = false,
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.props = armsse_properties,
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.props = sse200_properties,
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.devinfo = sse200_devices,
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.devinfo = sse200_devices,
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.irq_is_common = sse200_irq_is_common,
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.irq_is_common = sse200_irq_is_common,
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},
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},
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@ -537,7 +548,7 @@ static const ARMSSEInfo armsse_variants[] = {
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.has_cpuid = true,
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.has_cpuid = true,
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.has_cpu_pwrctrl = true,
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.has_cpu_pwrctrl = true,
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.has_sse_counter = true,
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.has_sse_counter = true,
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.props = armsse_properties,
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.props = sse300_properties,
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.devinfo = sse300_devices,
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.devinfo = sse300_devices,
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.irq_is_common = sse300_irq_is_common,
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.irq_is_common = sse300_irq_is_common,
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},
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},
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