RISC-V: Check PMP during Page Table Walks
The PMP should be checked when doing a page table walk, and report access fault exception if the to-be-read PTE failed the PMP check. Suggested-by: Jonathan Behrens <fintelia@gmail.com> Signed-off-by: Hesham Almatary <Hesham.Almatary@cl.cam.ac.uk> Reviewed-by: Palmer Dabbelt <palmer@sifive.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
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@ -81,6 +81,7 @@ enum {
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#define PRIV_VERSION_1_09_1 0x00010901
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#define PRIV_VERSION_1_09_1 0x00010901
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#define PRIV_VERSION_1_10_0 0x00011000
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#define PRIV_VERSION_1_10_0 0x00011000
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#define TRANSLATE_PMP_FAIL 2
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#define TRANSLATE_FAIL 1
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#define TRANSLATE_FAIL 1
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#define TRANSLATE_SUCCESS 0
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#define TRANSLATE_SUCCESS 0
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#define MMU_USER_IDX 3
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#define MMU_USER_IDX 3
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@ -230,6 +230,12 @@ restart:
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/* check that physical address of PTE is legal */
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/* check that physical address of PTE is legal */
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target_ulong pte_addr = base + idx * ptesize;
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target_ulong pte_addr = base + idx * ptesize;
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if (riscv_feature(env, RISCV_FEATURE_PMP) &&
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!pmp_hart_has_privs(env, pte_addr, sizeof(target_ulong),
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1 << MMU_DATA_LOAD, PRV_S)) {
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return TRANSLATE_PMP_FAIL;
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}
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#if defined(TARGET_RISCV32)
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#if defined(TARGET_RISCV32)
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target_ulong pte = ldl_phys(cs->as, pte_addr);
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target_ulong pte = ldl_phys(cs->as, pte_addr);
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#elif defined(TARGET_RISCV64)
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#elif defined(TARGET_RISCV64)
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@ -448,8 +454,10 @@ bool riscv_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
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(ret == TRANSLATE_SUCCESS) &&
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(ret == TRANSLATE_SUCCESS) &&
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!pmp_hart_has_privs(env, pa, TARGET_PAGE_SIZE, 1 << access_type,
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!pmp_hart_has_privs(env, pa, TARGET_PAGE_SIZE, 1 << access_type,
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mode)) {
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mode)) {
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ret = TRANSLATE_PMP_FAIL;
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}
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if (ret == TRANSLATE_PMP_FAIL) {
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pmp_violation = true;
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pmp_violation = true;
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ret = TRANSLATE_FAIL;
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}
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}
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if (ret == TRANSLATE_SUCCESS) {
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if (ret == TRANSLATE_SUCCESS) {
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tlb_set_page(cs, address & TARGET_PAGE_MASK, pa & TARGET_PAGE_MASK,
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tlb_set_page(cs, address & TARGET_PAGE_MASK, pa & TARGET_PAGE_MASK,
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