Convert IDE to use new dma helpers (Avi Kivity)
Use the new dma block helpers to perform dma disk I/O. Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6525 c046a42c-6fe2-441c-8c8c-71466251a162
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59a703ebaa
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76
hw/ide.c
76
hw/ide.c
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@ -33,6 +33,7 @@
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#include "ppc_mac.h"
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#include "ppc_mac.h"
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#include "mac_dbdma.h"
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#include "mac_dbdma.h"
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#include "sh.h"
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#include "sh.h"
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#include "dma.h"
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/* debug IDE devices */
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/* debug IDE devices */
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//#define DEBUG_IDE
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//#define DEBUG_IDE
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@ -423,7 +424,7 @@ typedef struct IDEState {
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int atapi_dma; /* true if dma is requested for the packet cmd */
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int atapi_dma; /* true if dma is requested for the packet cmd */
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/* ATA DMA state */
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/* ATA DMA state */
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int io_buffer_size;
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int io_buffer_size;
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QEMUIOVector iovec;
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QEMUSGList sg;
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/* PIO transfer handling */
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/* PIO transfer handling */
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int req_nb_sectors; /* number of sectors per interrupt */
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int req_nb_sectors; /* number of sectors per interrupt */
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EndTransferFunc *end_transfer_func;
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EndTransferFunc *end_transfer_func;
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@ -876,10 +877,8 @@ static int dma_buf_prepare(BMDMAState *bm, int is_write)
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uint32_t size;
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uint32_t size;
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} prd;
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} prd;
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int l, len;
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int l, len;
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void *mem;
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target_phys_addr_t l1;
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qemu_iovec_init(&s->iovec, s->nsector / (TARGET_PAGE_SIZE/512) + 1);
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qemu_sglist_init(&s->sg, s->nsector / (TARGET_PAGE_SIZE/512) + 1);
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s->io_buffer_size = 0;
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s->io_buffer_size = 0;
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for(;;) {
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for(;;) {
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if (bm->cur_prd_len == 0) {
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if (bm->cur_prd_len == 0) {
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@ -900,15 +899,10 @@ static int dma_buf_prepare(BMDMAState *bm, int is_write)
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}
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}
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l = bm->cur_prd_len;
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l = bm->cur_prd_len;
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if (l > 0) {
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if (l > 0) {
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l1 = l;
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qemu_sglist_add(&s->sg, bm->cur_prd_addr, l);
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mem = cpu_physical_memory_map(bm->cur_prd_addr, &l1, is_write);
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bm->cur_prd_addr += l;
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if (!mem) {
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bm->cur_prd_len -= l;
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break;
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s->io_buffer_size += l;
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}
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qemu_iovec_add(&s->iovec, mem, l1);
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bm->cur_prd_addr += l1;
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bm->cur_prd_len -= l1;
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s->io_buffer_size += l1;
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}
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}
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}
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}
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return 1;
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return 1;
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@ -916,14 +910,7 @@ static int dma_buf_prepare(BMDMAState *bm, int is_write)
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static void dma_buf_commit(IDEState *s, int is_write)
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static void dma_buf_commit(IDEState *s, int is_write)
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{
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{
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int i;
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qemu_sglist_destroy(&s->sg);
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for (i = 0; i < s->iovec.niov; ++i) {
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cpu_physical_memory_unmap(s->iovec.iov[i].iov_base,
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s->iovec.iov[i].iov_len, is_write,
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s->iovec.iov[i].iov_len);
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}
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qemu_iovec_destroy(&s->iovec);
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}
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}
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static void ide_dma_error(IDEState *s)
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static void ide_dma_error(IDEState *s)
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@ -1006,39 +993,6 @@ static int dma_buf_rw(BMDMAState *bm, int is_write)
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return 1;
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return 1;
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}
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}
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typedef struct {
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BMDMAState *bm;
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void (*cb)(void *opaque, int ret);
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QEMUBH *bh;
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} MapFailureContinuation;
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static void reschedule_dma(void *opaque)
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{
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MapFailureContinuation *cont = opaque;
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cont->cb(cont->bm, 0);
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qemu_bh_delete(cont->bh);
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qemu_free(cont);
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}
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static void continue_after_map_failure(void *opaque)
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{
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MapFailureContinuation *cont = opaque;
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cont->bh = qemu_bh_new(reschedule_dma, opaque);
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qemu_bh_schedule(cont->bh);
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}
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static void wait_for_bounce_buffer(BMDMAState *bmdma,
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void (*cb)(void *opaque, int ret))
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{
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MapFailureContinuation *cont = qemu_malloc(sizeof(*cont));
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cont->bm = bmdma;
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cont->cb = cb;
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cpu_register_map_client(cont, continue_after_map_failure);
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}
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static void ide_read_dma_cb(void *opaque, int ret)
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static void ide_read_dma_cb(void *opaque, int ret)
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{
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{
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BMDMAState *bm = opaque;
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BMDMAState *bm = opaque;
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@ -1080,15 +1034,10 @@ static void ide_read_dma_cb(void *opaque, int ret)
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s->io_buffer_size = n * 512;
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s->io_buffer_size = n * 512;
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if (dma_buf_prepare(bm, 1) == 0)
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if (dma_buf_prepare(bm, 1) == 0)
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goto eot;
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goto eot;
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if (!s->iovec.niov) {
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wait_for_bounce_buffer(bm, ide_read_dma_cb);
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return;
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}
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#ifdef DEBUG_AIO
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#ifdef DEBUG_AIO
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printf("aio_read: sector_num=%" PRId64 " n=%d\n", sector_num, n);
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printf("aio_read: sector_num=%" PRId64 " n=%d\n", sector_num, n);
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#endif
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#endif
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bm->aiocb = bdrv_aio_readv(s->bs, sector_num, &s->iovec, n,
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bm->aiocb = dma_bdrv_read(s->bs, &s->sg, sector_num, ide_read_dma_cb, bm);
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ide_read_dma_cb, bm);
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ide_dma_submit_check(s, ide_read_dma_cb, bm);
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ide_dma_submit_check(s, ide_read_dma_cb, bm);
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}
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}
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@ -1209,15 +1158,10 @@ static void ide_write_dma_cb(void *opaque, int ret)
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/* launch next transfer */
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/* launch next transfer */
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if (dma_buf_prepare(bm, 0) == 0)
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if (dma_buf_prepare(bm, 0) == 0)
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goto eot;
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goto eot;
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if (!s->iovec.niov) {
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wait_for_bounce_buffer(bm, ide_write_dma_cb);
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return;
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}
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#ifdef DEBUG_AIO
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#ifdef DEBUG_AIO
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printf("aio_write: sector_num=%" PRId64 " n=%d\n", sector_num, n);
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printf("aio_write: sector_num=%" PRId64 " n=%d\n", sector_num, n);
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#endif
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#endif
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bm->aiocb = bdrv_aio_writev(s->bs, sector_num, &s->iovec, n,
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bm->aiocb = dma_bdrv_write(s->bs, &s->sg, sector_num, ide_write_dma_cb, bm);
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ide_write_dma_cb, bm);
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ide_dma_submit_check(s, ide_write_dma_cb, bm);
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ide_dma_submit_check(s, ide_write_dma_cb, bm);
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}
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}
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