target-mips: fix DSP overflow macro and affected routines
The previous implementation incorrectly used same macro to detect overflow for addition and subtraction. This patch makes distinction between these two, and creates separate macros. The affected routines are changed accordingly. This change also includes additions to the existing tests for SUBQ_S_PH and SUBQ_S_W that would trigger the fixed issue, and it removes dead code from the test file. The last test case in subq_s_w.c is a bug found/reported/ isolated by Klaus Peichl from Dolby. Signed-off-by: Petar Jovanovic <petar.jovanovic@imgtec.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
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20c334a797
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@ -44,7 +44,8 @@ typedef union {
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/*** MIPS DSP internal functions begin ***/
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/*** MIPS DSP internal functions begin ***/
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#define MIPSDSP_ABS(x) (((x) >= 0) ? x : -x)
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#define MIPSDSP_ABS(x) (((x) >= 0) ? x : -x)
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#define MIPSDSP_OVERFLOW(a, b, c, d) (!(!((a ^ b ^ -1) & (a ^ c) & d)))
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#define MIPSDSP_OVERFLOW_ADD(a, b, c, d) (~(a ^ b) & (a ^ c) & d)
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#define MIPSDSP_OVERFLOW_SUB(a, b, c, d) ((a ^ b) & (a ^ c) & d)
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static inline void set_DSPControl_overflow_flag(uint32_t flag, int position,
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static inline void set_DSPControl_overflow_flag(uint32_t flag, int position,
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CPUMIPSState *env)
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CPUMIPSState *env)
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@ -142,7 +143,7 @@ static inline int16_t mipsdsp_add_i16(int16_t a, int16_t b, CPUMIPSState *env)
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tempI = a + b;
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tempI = a + b;
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if (MIPSDSP_OVERFLOW(a, b, tempI, 0x8000)) {
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if (MIPSDSP_OVERFLOW_ADD(a, b, tempI, 0x8000)) {
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set_DSPControl_overflow_flag(1, 20, env);
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set_DSPControl_overflow_flag(1, 20, env);
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}
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}
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@ -156,7 +157,7 @@ static inline int16_t mipsdsp_sat_add_i16(int16_t a, int16_t b,
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tempS = a + b;
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tempS = a + b;
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if (MIPSDSP_OVERFLOW(a, b, tempS, 0x8000)) {
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if (MIPSDSP_OVERFLOW_ADD(a, b, tempS, 0x8000)) {
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if (a > 0) {
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if (a > 0) {
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tempS = 0x7FFF;
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tempS = 0x7FFF;
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} else {
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} else {
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@ -175,7 +176,7 @@ static inline int32_t mipsdsp_sat_add_i32(int32_t a, int32_t b,
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tempI = a + b;
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tempI = a + b;
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if (MIPSDSP_OVERFLOW(a, b, tempI, 0x80000000)) {
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if (MIPSDSP_OVERFLOW_ADD(a, b, tempI, 0x80000000)) {
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if (a > 0) {
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if (a > 0) {
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tempI = 0x7FFFFFFF;
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tempI = 0x7FFFFFFF;
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} else {
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} else {
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@ -858,7 +859,7 @@ static inline uint16_t mipsdsp_sub_i16(int16_t a, int16_t b, CPUMIPSState *env)
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int16_t temp;
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int16_t temp;
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temp = a - b;
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temp = a - b;
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if (MIPSDSP_OVERFLOW(a, -b, temp, 0x8000)) {
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if (MIPSDSP_OVERFLOW_SUB(a, b, temp, 0x8000)) {
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set_DSPControl_overflow_flag(1, 20, env);
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set_DSPControl_overflow_flag(1, 20, env);
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}
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}
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@ -871,8 +872,8 @@ static inline uint16_t mipsdsp_sat16_sub(int16_t a, int16_t b,
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int16_t temp;
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int16_t temp;
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temp = a - b;
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temp = a - b;
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if (MIPSDSP_OVERFLOW(a, -b, temp, 0x8000)) {
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if (MIPSDSP_OVERFLOW_SUB(a, b, temp, 0x8000)) {
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if (a > 0) {
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if (a >= 0) {
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temp = 0x7FFF;
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temp = 0x7FFF;
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} else {
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} else {
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temp = 0x8000;
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temp = 0x8000;
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@ -889,8 +890,8 @@ static inline uint32_t mipsdsp_sat32_sub(int32_t a, int32_t b,
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int32_t temp;
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int32_t temp;
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temp = a - b;
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temp = a - b;
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if (MIPSDSP_OVERFLOW(a, -b, temp, 0x80000000)) {
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if (MIPSDSP_OVERFLOW_SUB(a, b, temp, 0x80000000)) {
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if (a > 0) {
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if (a >= 0) {
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temp = 0x7FFFFFFF;
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temp = 0x7FFFFFFF;
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} else {
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} else {
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temp = 0x80000000;
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temp = 0x80000000;
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@ -1004,7 +1005,7 @@ static inline uint32_t mipsdsp_sub32(int32_t a, int32_t b, CPUMIPSState *env)
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int32_t temp;
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int32_t temp;
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temp = a - b;
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temp = a - b;
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if (MIPSDSP_OVERFLOW(a, -b, temp, 0x80000000)) {
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if (MIPSDSP_OVERFLOW_SUB(a, b, temp, 0x80000000)) {
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set_DSPControl_overflow_flag(1, 20, env);
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set_DSPControl_overflow_flag(1, 20, env);
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}
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}
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@ -1017,7 +1018,7 @@ static inline int32_t mipsdsp_add_i32(int32_t a, int32_t b, CPUMIPSState *env)
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temp = a + b;
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temp = a + b;
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if (MIPSDSP_OVERFLOW(a, b, temp, 0x80000000)) {
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if (MIPSDSP_OVERFLOW_ADD(a, b, temp, 0x80000000)) {
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set_DSPControl_overflow_flag(1, 20, env);
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set_DSPControl_overflow_flag(1, 20, env);
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}
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}
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@ -2494,17 +2495,22 @@ void helper_##name(uint32_t ac, target_ulong rs, target_ulong rt, \
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int32_t temp63; \
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int32_t temp63; \
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int64_t dotp, acc; \
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int64_t dotp, acc; \
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uint64_t temp; \
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uint64_t temp; \
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bool overflow; \
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\
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\
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dotp = mipsdsp_mul_q31_q31(ac, rs, rt, env); \
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dotp = mipsdsp_mul_q31_q31(ac, rs, rt, env); \
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acc = ((uint64_t)env->active_tc.HI[ac] << 32) | \
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acc = ((uint64_t)env->active_tc.HI[ac] << 32) | \
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((uint64_t)env->active_tc.LO[ac] & MIPSDSP_LLO); \
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((uint64_t)env->active_tc.LO[ac] & MIPSDSP_LLO); \
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if (!is_add) { \
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if (is_add) { \
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dotp = -dotp; \
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temp = acc + dotp; \
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overflow = MIPSDSP_OVERFLOW_ADD((uint64_t)acc, (uint64_t)dotp, \
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temp, (0x01ull << 63)); \
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} else { \
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temp = acc - dotp; \
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overflow = MIPSDSP_OVERFLOW_SUB((uint64_t)acc, (uint64_t)dotp, \
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temp, (0x01ull << 63)); \
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} \
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} \
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\
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\
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temp = acc + dotp; \
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if (overflow) { \
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if (MIPSDSP_OVERFLOW((uint64_t)acc, (uint64_t)dotp, temp, \
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(0x01ull << 63))) { \
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temp63 = (temp >> 63) & 0x01; \
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temp63 = (temp >> 63) & 0x01; \
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if (temp63 == 1) { \
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if (temp63 == 1) { \
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temp = (0x01ull << 63) - 1; \
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temp = (0x01ull << 63) - 1; \
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@ -12,7 +12,8 @@ int main()
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resultdsp = 0x01;
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resultdsp = 0x01;
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__asm
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__asm
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("subq_s.ph %0, %2, %3\n\t"
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("wrdsp $0\n\t"
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"subq_s.ph %0, %2, %3\n\t"
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"rddsp %1\n\t"
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"rddsp %1\n\t"
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: "=r"(rd), "=r"(dsp)
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: "=r"(rd), "=r"(dsp)
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: "r"(rs), "r"(rt)
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: "r"(rs), "r"(rt)
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@ -27,7 +28,24 @@ int main()
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resultdsp = 0x01;
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resultdsp = 0x01;
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__asm
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__asm
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("subq_s.ph %0, %2, %3\n\t"
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("wrdsp $0\n\t"
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"subq_s.ph %0, %2, %3\n\t"
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"rddsp %1\n\t"
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: "=r"(rd), "=r"(dsp)
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: "r"(rs), "r"(rt)
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);
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dsp = (dsp >> 20) & 0x01;
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assert(dsp == resultdsp);
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assert(rd == result);
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rs = 0x12340000;
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rt = 0x87658000;
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result = 0x7FFF7FFF;
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resultdsp = 0x01;
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__asm
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("wrdsp $0\n\t"
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"subq_s.ph %0, %2, %3\n\t"
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"rddsp %1\n\t"
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"rddsp %1\n\t"
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: "=r"(rd), "=r"(dsp)
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: "=r"(rd), "=r"(dsp)
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: "r"(rs), "r"(rt)
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: "r"(rs), "r"(rt)
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@ -12,7 +12,8 @@ int main()
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resultdsp = 0x01;
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resultdsp = 0x01;
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__asm
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__asm
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("subq_s.w %0, %2, %3\n\t"
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("wrdsp $0\n\t"
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"subq_s.w %0, %2, %3\n\t"
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"rddsp %1\n\t"
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"rddsp %1\n\t"
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: "=r"(rd), "=r"(dsp)
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: "=r"(rd), "=r"(dsp)
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: "r"(rs), "r"(rt)
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: "r"(rs), "r"(rt)
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@ -24,10 +25,11 @@ int main()
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rs = 0x66666;
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rs = 0x66666;
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rt = 0x55555;
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rt = 0x55555;
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result = 0x11111;
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result = 0x11111;
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resultdsp = 0x01;
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resultdsp = 0x0;
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__asm
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__asm
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("subq_s.w %0, %2, %3\n\t"
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("wrdsp $0\n\t"
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"subq_s.w %0, %2, %3\n\t"
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"rddsp %1\n\t"
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"rddsp %1\n\t"
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: "=r"(rd), "=r"(dsp)
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: "=r"(rd), "=r"(dsp)
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: "r"(rs), "r"(rt)
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: "r"(rs), "r"(rt)
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@ -36,23 +38,37 @@ int main()
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assert(dsp == resultdsp);
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assert(dsp == resultdsp);
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assert(rd == result);
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assert(rd == result);
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rs = 0x0;
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#if 0
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rt = 0x80000000;
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rs = 0x35555555;
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result = 0x7FFFFFFF;
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rt = 0xf5555555;
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result = 0x80000000;
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resultdsp = 0x01;
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resultdsp = 0x01;
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__asm
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__asm
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("subq_s.w %0, %2, %3\n\t"
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("wrdsp $0\n\t"
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"subq_s.w %0, %2, %3\n\t"
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"rddsp %1\n\t"
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"rddsp %1\n\t"
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: "=r"(rd), "=r"(dsp)
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: "=r"(rd), "=r"(dsp)
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: "r"(rs), "r"(rt)
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: "r"(rs), "r"(rt)
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);
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);
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dsp = (dsp >> 20) & 0x01;
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dsp = (dsp >> 20) & 0x01;
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assert(dsp == resultdsp);
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assert(dsp == resultdsp);
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assert(rd == result);
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assert(rd == result);
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#endif
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rs = 0x80000000;
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rt = 0x80000000;
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result = 0;
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resultdsp = 0x00;
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__asm
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("wrdsp $0\n\t"
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"subq_s.w %0, %2, %3\n\t"
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"rddsp %1\n\t"
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: "=r"(rd), "=r"(dsp)
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: "r"(rs), "r"(rt)
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);
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dsp = (dsp >> 20) & 0x01;
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assert(dsp == resultdsp);
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assert(rd == result);
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return 0;
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return 0;
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}
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}
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