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hw/ssi/xilinx_spips: Convert lqspi_read() to read_with_attrs 

In the next commit we will implement the write_with_attrs()
handler. To avoid using different APIs, convert the read()
handler first.

Reviewed-by: Francisco Iglesias <frasse.iglesias@gmail.com>
Tested-by: Francisco Iglesias <frasse.iglesias@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
(cherry picked from commit 5937bd50d3)
Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
stable-4.0
Philippe Mathieu-Daudé 2019-07-15 14:17:03 +01:00 committed by Michael Roth
parent e11cd43f24
commit 255325da13
1 changed files with 11 additions and 12 deletions
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23
hw/ssi/xilinx_spips.c
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@ -1199,27 +1199,26 @@ static void lqspi_load_cache(void *opaque, hwaddr addr)
}
}
static uint64_t
lqspi_read(void *opaque, hwaddr addr, unsigned int size)
static MemTxResult lqspi_read(void *opaque, hwaddr addr, uint64_t *value,
unsigned size, MemTxAttrs attrs)
{
XilinxQSPIPS *q = opaque;
uint32_t ret;
XilinxQSPIPS *q = XILINX_QSPIPS(opaque);
if (addr >= q->lqspi_cached_addr &&
addr <= q->lqspi_cached_addr + LQSPI_CACHE_SIZE - 4) {
uint8_t *retp = &q->lqspi_buf[addr - q->lqspi_cached_addr];
ret = cpu_to_le32(*(uint32_t *)retp);
DB_PRINT_L(1, "addr: %08x, data: %08x\n", (unsigned)addr,
(unsigned)ret);
return ret;
} else {
lqspi_load_cache(opaque, addr);
return lqspi_read(opaque, addr, size);
*value = cpu_to_le32(*(uint32_t *)retp);
DB_PRINT_L(1, "addr: %08" HWADDR_PRIx ", data: %08" PRIx64 "\n",
addr, *value);
return MEMTX_OK;
}
lqspi_load_cache(opaque, addr);
return lqspi_read(opaque, addr, value, size, attrs);
}
static const MemoryRegionOps lqspi_ops = {
.read = lqspi_read,
.read_with_attrs = lqspi_read,
.endianness = DEVICE_NATIVE_ENDIAN,
.valid = {
.min_access_size = 1,