target/ppc: Simplify gen_debug_exception
Two of the call sites that use gen_debug_exception have already updated NIP. Only ppc_tr_breakpoint_check requires the update. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br> Message-Id: <20210512185441.3619828-7-matheus.ferst@eldorado.org.br> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
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@ -329,19 +329,7 @@ static uint32_t gen_prep_dbgex(DisasContext *ctx)
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static void gen_debug_exception(DisasContext *ctx)
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{
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TCGv_i32 t0;
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/*
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* These are all synchronous exceptions, we set the PC back to the
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* faulting instruction
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*/
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if ((ctx->exception != POWERPC_EXCP_BRANCH) &&
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(ctx->exception != POWERPC_EXCP_SYNC)) {
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gen_update_nip(ctx, ctx->base.pc_next);
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}
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t0 = tcg_const_i32(EXCP_DEBUG);
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gen_helper_raise_exception(cpu_env, t0);
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tcg_temp_free_i32(t0);
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gen_helper_raise_exception(cpu_env, tcg_constant_i32(EXCP_DEBUG));
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ctx->base.is_jmp = DISAS_NORETURN;
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}
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@ -9186,6 +9174,7 @@ static bool ppc_tr_breakpoint_check(DisasContextBase *dcbase, CPUState *cs,
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{
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DisasContext *ctx = container_of(dcbase, DisasContext, base);
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gen_update_nip(ctx, ctx->base.pc_next);
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gen_debug_exception(ctx);
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/*
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* The address covered by the breakpoint must be included in
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