target/arm: Always enable pac keys for user-only
Drop the pac properties. This approach cannot work as written
because the properties are applied before arm_cpu_reset, which
zeros SCTLR_EL1 (amongst everything else).
We can re-introduce the properties if they turn out to be useful.
But since linux 5.0 enables all of the keys, they may not be.
Fixes: 1ae9cfbd47
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
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42f6ed9193
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@ -185,6 +185,9 @@ static void arm_cpu_reset(CPUState *s)
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env->pstate = PSTATE_MODE_EL0t;
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/* Userspace expects access to DC ZVA, CTL_EL0 and the cache ops */
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env->cp15.sctlr_el[1] |= SCTLR_UCT | SCTLR_UCI | SCTLR_DZE;
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/* Enable all PAC keys. */
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env->cp15.sctlr_el[1] |= (SCTLR_EnIA | SCTLR_EnIB |
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SCTLR_EnDA | SCTLR_EnDB);
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/* Enable all PAC instructions */
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env->cp15.hcr_el2 |= HCR_API;
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env->cp15.scr_el3 |= SCR_API;
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@ -281,38 +281,6 @@ static void cpu_max_set_sve_vq(Object *obj, Visitor *v, const char *name,
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error_propagate(errp, err);
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}
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#ifdef CONFIG_USER_ONLY
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static void cpu_max_get_packey(Object *obj, Visitor *v, const char *name,
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void *opaque, Error **errp)
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{
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ARMCPU *cpu = ARM_CPU(obj);
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const uint64_t *bit = opaque;
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bool enabled = (cpu->env.cp15.sctlr_el[1] & *bit) != 0;
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visit_type_bool(v, name, &enabled, errp);
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}
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static void cpu_max_set_packey(Object *obj, Visitor *v, const char *name,
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void *opaque, Error **errp)
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{
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ARMCPU *cpu = ARM_CPU(obj);
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Error *err = NULL;
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const uint64_t *bit = opaque;
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bool enabled;
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visit_type_bool(v, name, &enabled, errp);
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if (!err) {
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if (enabled) {
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cpu->env.cp15.sctlr_el[1] |= *bit;
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} else {
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cpu->env.cp15.sctlr_el[1] &= ~*bit;
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}
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}
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error_propagate(errp, err);
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}
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#endif
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/* -cpu max: if KVM is enabled, like -cpu host (best possible with this host);
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* otherwise, a CPU with as many features enabled as our emulation supports.
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* The version of '-cpu max' for qemu-system-arm is defined in cpu.c;
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@ -388,34 +356,6 @@ static void aarch64_max_initfn(Object *obj)
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*/
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cpu->ctr = 0x80038003; /* 32 byte I and D cacheline size, VIPT icache */
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cpu->dcz_blocksize = 7; /* 512 bytes */
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/*
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* Note that Linux will enable enable all of the keys at once.
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* But doing it this way will allow experimentation beyond that.
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*/
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{
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static const uint64_t apia_bit = SCTLR_EnIA;
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static const uint64_t apib_bit = SCTLR_EnIB;
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static const uint64_t apda_bit = SCTLR_EnDA;
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static const uint64_t apdb_bit = SCTLR_EnDB;
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object_property_add(obj, "apia", "bool", cpu_max_get_packey,
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cpu_max_set_packey, NULL,
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(void *)&apia_bit, &error_fatal);
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object_property_add(obj, "apib", "bool", cpu_max_get_packey,
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cpu_max_set_packey, NULL,
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(void *)&apib_bit, &error_fatal);
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object_property_add(obj, "apda", "bool", cpu_max_get_packey,
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cpu_max_set_packey, NULL,
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(void *)&apda_bit, &error_fatal);
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object_property_add(obj, "apdb", "bool", cpu_max_get_packey,
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cpu_max_set_packey, NULL,
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(void *)&apdb_bit, &error_fatal);
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/* Enable all PAC keys by default. */
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cpu->env.cp15.sctlr_el[1] |= SCTLR_EnIA | SCTLR_EnIB;
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cpu->env.cp15.sctlr_el[1] |= SCTLR_EnDA | SCTLR_EnDB;
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}
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#endif
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cpu->sve_max_vq = ARM_MAX_VQ;
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