target-ppc: Add xsmaxcdp and xsmincdp instructions
xsmaxcdp: VSX Scalar Maximum Type-C Double-Precision xsmincdp: VSX Scalar Minimum Type-C Double-Precision Signed-off-by: Bharata B Rao <bharata@linux.vnet.ibm.com> Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
This commit is contained in:
parent
802fc7abd0
commit
2770deede0
|
@ -2679,6 +2679,44 @@ VSX_MAX_MIN(xsmindp, minnum, 1, float64, VsrD(0))
|
||||||
VSX_MAX_MIN(xvmindp, minnum, 2, float64, VsrD(i))
|
VSX_MAX_MIN(xvmindp, minnum, 2, float64, VsrD(i))
|
||||||
VSX_MAX_MIN(xvminsp, minnum, 4, float32, VsrW(i))
|
VSX_MAX_MIN(xvminsp, minnum, 4, float32, VsrW(i))
|
||||||
|
|
||||||
|
#define VSX_MAX_MINC(name, max) \
|
||||||
|
void helper_##name(CPUPPCState *env, uint32_t opcode) \
|
||||||
|
{ \
|
||||||
|
ppc_vsr_t xt, xa, xb; \
|
||||||
|
bool vxsnan_flag = false, vex_flag = false; \
|
||||||
|
\
|
||||||
|
getVSR(rA(opcode) + 32, &xa, env); \
|
||||||
|
getVSR(rB(opcode) + 32, &xb, env); \
|
||||||
|
getVSR(rD(opcode) + 32, &xt, env); \
|
||||||
|
\
|
||||||
|
if (unlikely(float64_is_any_nan(xa.VsrD(0)) || \
|
||||||
|
float64_is_any_nan(xb.VsrD(0)))) { \
|
||||||
|
if (float64_is_signaling_nan(xa.VsrD(0), &env->fp_status) || \
|
||||||
|
float64_is_signaling_nan(xb.VsrD(0), &env->fp_status)) { \
|
||||||
|
vxsnan_flag = true; \
|
||||||
|
} \
|
||||||
|
xt.VsrD(0) = xb.VsrD(0); \
|
||||||
|
} else if ((max && \
|
||||||
|
!float64_lt(xa.VsrD(0), xb.VsrD(0), &env->fp_status)) || \
|
||||||
|
(!max && \
|
||||||
|
float64_lt(xa.VsrD(0), xb.VsrD(0), &env->fp_status))) { \
|
||||||
|
xt.VsrD(0) = xa.VsrD(0); \
|
||||||
|
} else { \
|
||||||
|
xt.VsrD(0) = xb.VsrD(0); \
|
||||||
|
} \
|
||||||
|
\
|
||||||
|
vex_flag = fpscr_ve & vxsnan_flag; \
|
||||||
|
if (vxsnan_flag) { \
|
||||||
|
float_invalid_op_excp(env, POWERPC_EXCP_FP_VXSNAN, 0); \
|
||||||
|
} \
|
||||||
|
if (!vex_flag) { \
|
||||||
|
putVSR(rD(opcode) + 32, &xt, env); \
|
||||||
|
} \
|
||||||
|
} \
|
||||||
|
|
||||||
|
VSX_MAX_MINC(xsmaxcdp, 1);
|
||||||
|
VSX_MAX_MINC(xsmincdp, 0);
|
||||||
|
|
||||||
/* VSX_CMP - VSX floating point compare
|
/* VSX_CMP - VSX floating point compare
|
||||||
* op - instruction mnemonic
|
* op - instruction mnemonic
|
||||||
* nels - number of elements (1, 2 or 4)
|
* nels - number of elements (1, 2 or 4)
|
||||||
|
|
|
@ -431,6 +431,8 @@ DEF_HELPER_2(xscmpoqp, void, env, i32)
|
||||||
DEF_HELPER_2(xscmpuqp, void, env, i32)
|
DEF_HELPER_2(xscmpuqp, void, env, i32)
|
||||||
DEF_HELPER_2(xsmaxdp, void, env, i32)
|
DEF_HELPER_2(xsmaxdp, void, env, i32)
|
||||||
DEF_HELPER_2(xsmindp, void, env, i32)
|
DEF_HELPER_2(xsmindp, void, env, i32)
|
||||||
|
DEF_HELPER_2(xsmaxcdp, void, env, i32)
|
||||||
|
DEF_HELPER_2(xsmincdp, void, env, i32)
|
||||||
DEF_HELPER_2(xscvdphp, void, env, i32)
|
DEF_HELPER_2(xscvdphp, void, env, i32)
|
||||||
DEF_HELPER_2(xscvdpqp, void, env, i32)
|
DEF_HELPER_2(xscvdpqp, void, env, i32)
|
||||||
DEF_HELPER_2(xscvdpsp, void, env, i32)
|
DEF_HELPER_2(xscvdpsp, void, env, i32)
|
||||||
|
|
|
@ -808,6 +808,8 @@ GEN_VSX_HELPER_2(xscmpoqp, 0x04, 0x04, 0, PPC2_VSX)
|
||||||
GEN_VSX_HELPER_2(xscmpuqp, 0x04, 0x14, 0, PPC2_VSX)
|
GEN_VSX_HELPER_2(xscmpuqp, 0x04, 0x14, 0, PPC2_VSX)
|
||||||
GEN_VSX_HELPER_2(xsmaxdp, 0x00, 0x14, 0, PPC2_VSX)
|
GEN_VSX_HELPER_2(xsmaxdp, 0x00, 0x14, 0, PPC2_VSX)
|
||||||
GEN_VSX_HELPER_2(xsmindp, 0x00, 0x15, 0, PPC2_VSX)
|
GEN_VSX_HELPER_2(xsmindp, 0x00, 0x15, 0, PPC2_VSX)
|
||||||
|
GEN_VSX_HELPER_2(xsmaxcdp, 0x00, 0x10, 0, PPC2_ISA300)
|
||||||
|
GEN_VSX_HELPER_2(xsmincdp, 0x00, 0x11, 0, PPC2_ISA300)
|
||||||
GEN_VSX_HELPER_2(xscvdphp, 0x16, 0x15, 0x11, PPC2_ISA300)
|
GEN_VSX_HELPER_2(xscvdphp, 0x16, 0x15, 0x11, PPC2_ISA300)
|
||||||
GEN_VSX_HELPER_2(xscvdpsp, 0x12, 0x10, 0, PPC2_VSX)
|
GEN_VSX_HELPER_2(xscvdpsp, 0x12, 0x10, 0, PPC2_VSX)
|
||||||
GEN_VSX_HELPER_2(xscvdpqp, 0x04, 0x1A, 0x16, PPC2_ISA300)
|
GEN_VSX_HELPER_2(xscvdpqp, 0x04, 0x1A, 0x16, PPC2_ISA300)
|
||||||
|
|
|
@ -200,6 +200,8 @@ GEN_VSX_XFORM_300(xscmpoqp, 0x04, 0x04, 0x00600001),
|
||||||
GEN_VSX_XFORM_300(xscmpuqp, 0x04, 0x14, 0x00600001),
|
GEN_VSX_XFORM_300(xscmpuqp, 0x04, 0x14, 0x00600001),
|
||||||
GEN_XX3FORM(xsmaxdp, 0x00, 0x14, PPC2_VSX),
|
GEN_XX3FORM(xsmaxdp, 0x00, 0x14, PPC2_VSX),
|
||||||
GEN_XX3FORM(xsmindp, 0x00, 0x15, PPC2_VSX),
|
GEN_XX3FORM(xsmindp, 0x00, 0x15, PPC2_VSX),
|
||||||
|
GEN_XX3FORM(xsmaxcdp, 0x00, 0x10, PPC2_ISA300),
|
||||||
|
GEN_XX3FORM(xsmincdp, 0x00, 0x11, PPC2_ISA300),
|
||||||
GEN_XX2FORM_EO(xscvdphp, 0x16, 0x15, 0x11, PPC2_ISA300),
|
GEN_XX2FORM_EO(xscvdphp, 0x16, 0x15, 0x11, PPC2_ISA300),
|
||||||
GEN_XX2FORM(xscvdpsp, 0x12, 0x10, PPC2_VSX),
|
GEN_XX2FORM(xscvdpsp, 0x12, 0x10, PPC2_VSX),
|
||||||
GEN_XX2FORM(xscvdpspn, 0x16, 0x10, PPC2_VSX207),
|
GEN_XX2FORM(xscvdpspn, 0x16, 0x10, PPC2_VSX207),
|
||||||
|
|
Loading…
Reference in a new issue