target-mips: don't flush extra TLB on permissions upgrade
If the guest uses a TLBWI instruction for upgrading permissions, we don't need to flush the extra TLBs. This improve boot time performance by about 10%. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
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@ -1819,14 +1819,32 @@ static void r4k_fill_tlb(CPUMIPSState *env, int idx)
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void r4k_helper_tlbwi(CPUMIPSState *env)
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void r4k_helper_tlbwi(CPUMIPSState *env)
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{
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{
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r4k_tlb_t *tlb;
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int idx;
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int idx;
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target_ulong VPN;
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uint8_t ASID;
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bool G, V0, D0, V1, D1;
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idx = (env->CP0_Index & ~0x80000000) % env->tlb->nb_tlb;
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idx = (env->CP0_Index & ~0x80000000) % env->tlb->nb_tlb;
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tlb = &env->tlb->mmu.r4k.tlb[idx];
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VPN = env->CP0_EntryHi & (TARGET_PAGE_MASK << 1);
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#if defined(TARGET_MIPS64)
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VPN &= env->SEGMask;
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#endif
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ASID = env->CP0_EntryHi & 0xff;
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G = env->CP0_EntryLo0 & env->CP0_EntryLo1 & 1;
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V0 = (env->CP0_EntryLo0 & 2) != 0;
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D0 = (env->CP0_EntryLo0 & 4) != 0;
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V1 = (env->CP0_EntryLo1 & 2) != 0;
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D1 = (env->CP0_EntryLo1 & 4) != 0;
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/* Discard cached TLB entries. We could avoid doing this if the
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/* Discard cached TLB entries, unless tlbwi is just upgrading access
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tlbwi is just upgrading access permissions on the current entry;
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permissions on the current entry. */
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that might be a further win. */
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if (tlb->VPN != VPN || tlb->ASID != ASID || tlb->G != G ||
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r4k_mips_tlb_flush_extra (env, env->tlb->nb_tlb);
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(tlb->V0 && !V0) || (tlb->D0 && !D0) ||
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(tlb->V1 && !V1) || (tlb->D1 && !D1)) {
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r4k_mips_tlb_flush_extra(env, env->tlb->nb_tlb);
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}
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r4k_invalidate_tlb(env, idx, 0);
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r4k_invalidate_tlb(env, idx, 0);
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r4k_fill_tlb(env, idx);
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r4k_fill_tlb(env, idx);
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