Merge tpm 2020/05/06 v1

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Merge remote-tracking branch 'remotes/stefanberger/tags/pull-tpm-2020-05-06-1' into staging

Merge tpm 2020/05/06 v1

# gpg: Signature made Wed 06 May 2020 15:16:17 BST
# gpg:                using RSA key B818B9CADF9089C2D5CEC66B75AD65802A0B4211
# gpg: Good signature from "Stefan Berger <stefanb@linux.vnet.ibm.com>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: B818 B9CA DF90 89C2 D5CE  C66B 75AD 6580 2A0B 4211

* remotes/stefanberger/tags/pull-tpm-2020-05-06-1:
  hw: add compat machines for 5.1
  hw/arm/virt: Remove the compat forcing tpm-tis-device PPI to off
  tpm: tpm-tis-device: set PPI to false by default

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Peter Maydell 2020-05-06 21:13:05 +01:00
commit 298d893dd5
10 changed files with 72 additions and 13 deletions

View file

@ -2352,15 +2352,16 @@ static void machvirt_machine_init(void)
}
type_init(machvirt_machine_init);
static void virt_machine_5_1_options(MachineClass *mc)
{
}
DEFINE_VIRT_MACHINE_AS_LATEST(5, 1)
static void virt_machine_5_0_options(MachineClass *mc)
{
static GlobalProperty compat[] = {
{ TYPE_TPM_TIS_SYSBUS, "ppi", "false" },
};
compat_props_add(mc->compat_props, compat, G_N_ELEMENTS(compat));
virt_machine_5_1_options(mc);
}
DEFINE_VIRT_MACHINE_AS_LATEST(5, 0)
DEFINE_VIRT_MACHINE(5, 0)
static void virt_machine_4_2_options(MachineClass *mc)
{

View file

@ -28,6 +28,9 @@
#include "hw/mem/nvdimm.h"
#include "migration/vmstate.h"
GlobalProperty hw_compat_5_0[] = {};
const size_t hw_compat_5_0_len = G_N_ELEMENTS(hw_compat_5_0);
GlobalProperty hw_compat_4_2[] = {
{ "virtio-blk-device", "queue-size", "128"},
{ "virtio-scsi-device", "virtqueue_size", "128"},

View file

@ -95,6 +95,9 @@
#include "fw_cfg.h"
#include "trace.h"
GlobalProperty pc_compat_5_0[] = {};
const size_t pc_compat_5_0_len = G_N_ELEMENTS(pc_compat_5_0);
GlobalProperty pc_compat_4_2[] = {
{ "mch", "smbase-smram", "off" },
};

View file

@ -421,7 +421,7 @@ static void pc_i440fx_machine_options(MachineClass *m)
machine_class_allow_dynamic_sysbus_dev(m, TYPE_RAMFB_DEVICE);
}
static void pc_i440fx_5_0_machine_options(MachineClass *m)
static void pc_i440fx_5_1_machine_options(MachineClass *m)
{
PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
pc_i440fx_machine_options(m);
@ -430,6 +430,18 @@ static void pc_i440fx_5_0_machine_options(MachineClass *m)
pcmc->default_cpu_version = 1;
}
DEFINE_I440FX_MACHINE(v5_1, "pc-i440fx-5.1", NULL,
pc_i440fx_5_1_machine_options);
static void pc_i440fx_5_0_machine_options(MachineClass *m)
{
pc_i440fx_5_1_machine_options(m);
m->alias = NULL;
m->is_default = false;
compat_props_add(m->compat_props, hw_compat_5_0, hw_compat_5_0_len);
compat_props_add(m->compat_props, pc_compat_5_0, pc_compat_5_0_len);
}
DEFINE_I440FX_MACHINE(v5_0, "pc-i440fx-5.0", NULL,
pc_i440fx_5_0_machine_options);

View file

@ -351,7 +351,7 @@ static void pc_q35_machine_options(MachineClass *m)
m->max_cpus = 288;
}
static void pc_q35_5_0_machine_options(MachineClass *m)
static void pc_q35_5_1_machine_options(MachineClass *m)
{
PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
pc_q35_machine_options(m);
@ -359,6 +359,17 @@ static void pc_q35_5_0_machine_options(MachineClass *m)
pcmc->default_cpu_version = 1;
}
DEFINE_Q35_MACHINE(v5_1, "pc-q35-5.1", NULL,
pc_q35_5_1_machine_options);
static void pc_q35_5_0_machine_options(MachineClass *m)
{
pc_q35_5_1_machine_options(m);
m->alias = NULL;
compat_props_add(m->compat_props, hw_compat_5_0, hw_compat_5_0_len);
compat_props_add(m->compat_props, pc_compat_5_0, pc_compat_5_0_len);
}
DEFINE_Q35_MACHINE(v5_0, "pc-q35-5.0", NULL,
pc_q35_5_0_machine_options);

View file

@ -4600,14 +4600,25 @@ static void spapr_machine_latest_class_options(MachineClass *mc)
type_init(spapr_machine_register_##suffix)
/*
* pseries-5.0
* pseries-5.1
*/
static void spapr_machine_5_0_class_options(MachineClass *mc)
static void spapr_machine_5_1_class_options(MachineClass *mc)
{
/* Defaults for the latest behaviour inherited from the base class */
}
DEFINE_SPAPR_MACHINE(5_0, "5.0", true);
DEFINE_SPAPR_MACHINE(5_1, "5.1", true);
/*
* pseries-5.0
*/
static void spapr_machine_5_0_class_options(MachineClass *mc)
{
spapr_machine_5_1_class_options(mc);
compat_props_add(mc->compat_props, hw_compat_5_0, hw_compat_5_0_len);
}
DEFINE_SPAPR_MACHINE(5_0, "5.0", false);
/*
* pseries-4.2

View file

@ -801,14 +801,26 @@ bool css_migration_enabled(void)
} \
type_init(ccw_machine_register_##suffix)
static void ccw_machine_5_1_instance_options(MachineState *machine)
{
}
static void ccw_machine_5_1_class_options(MachineClass *mc)
{
}
DEFINE_CCW_MACHINE(5_1, "5.1", true);
static void ccw_machine_5_0_instance_options(MachineState *machine)
{
ccw_machine_5_1_instance_options(machine);
}
static void ccw_machine_5_0_class_options(MachineClass *mc)
{
ccw_machine_5_1_class_options(mc);
compat_props_add(mc->compat_props, hw_compat_5_0, hw_compat_5_0_len);
}
DEFINE_CCW_MACHINE(5_0, "5.0", true);
DEFINE_CCW_MACHINE(5_0, "5.0", false);
static void ccw_machine_4_2_instance_options(MachineState *machine)
{

View file

@ -91,7 +91,7 @@ static void tpm_tis_sysbus_reset(DeviceState *dev)
static Property tpm_tis_sysbus_properties[] = {
DEFINE_PROP_UINT32("irq", TPMStateSysBus, state.irq_num, TPM_TIS_IRQ),
DEFINE_PROP_TPMBE("tpmdev", TPMStateSysBus, state.be_driver),
DEFINE_PROP_BOOL("ppi", TPMStateSysBus, state.ppi_enabled, true),
DEFINE_PROP_BOOL("ppi", TPMStateSysBus, state.ppi_enabled, false),
DEFINE_PROP_END_OF_LIST(),
};

View file

@ -318,6 +318,9 @@ struct MachineState {
} \
type_init(machine_initfn##_register_types)
extern GlobalProperty hw_compat_5_0[];
extern const size_t hw_compat_5_0_len;
extern GlobalProperty hw_compat_4_2[];
extern const size_t hw_compat_4_2_len;

View file

@ -191,6 +191,9 @@ void pc_system_firmware_init(PCMachineState *pcms, MemoryRegion *rom_memory);
void pc_madt_cpu_entry(AcpiDeviceIf *adev, int uid,
const CPUArchIdList *apic_ids, GArray *entry);
extern GlobalProperty pc_compat_5_0[];
extern const size_t pc_compat_5_0_len;
extern GlobalProperty pc_compat_4_2[];
extern const size_t pc_compat_4_2_len;