nvic: Fix ARMv7M MPU_RBAR reads
Fix an incorrect mask expression in the handling of v7M MPU_RBAR reads that meant that we would always report the ADDR field as zero. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 1509732813-22957-1-git-send-email-peter.maydell@linaro.org
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@ -977,7 +977,7 @@ static uint32_t nvic_readl(NVICState *s, uint32_t offset, MemTxAttrs attrs)
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if (region >= cpu->pmsav7_dregion) {
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return 0;
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}
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return (cpu->env.pmsav7.drbar[region] & 0x1f) | (region & 0xf);
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return (cpu->env.pmsav7.drbar[region] & ~0x1f) | (region & 0xf);
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}
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case 0xda0: /* MPU_RASR (v7M), MPU_RLAR (v8M) */
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case 0xda8: /* MPU_RASR_A1 (v7M), MPU_RLAR_A1 (v8M) */
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