apic: Fix access to non-existent APIC
When running with -M isapc, there is no env->apic_state. Fix cpu_get/set_apic_* helpers to handle this corner case gracefully. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7048 c046a42c-6fe2-441c-8c8c-71466251a162
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11
hw/apic.c
11
hw/apic.c
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@ -280,6 +280,8 @@ void cpu_set_apic_base(CPUState *env, uint64_t val)
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#ifdef DEBUG_APIC
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#ifdef DEBUG_APIC
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printf("cpu_set_apic_base: %016" PRIx64 "\n", val);
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printf("cpu_set_apic_base: %016" PRIx64 "\n", val);
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#endif
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#endif
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if (!s)
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return;
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s->apicbase = (val & 0xfffff000) |
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s->apicbase = (val & 0xfffff000) |
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(s->apicbase & (MSR_IA32_APICBASE_BSP | MSR_IA32_APICBASE_ENABLE));
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(s->apicbase & (MSR_IA32_APICBASE_BSP | MSR_IA32_APICBASE_ENABLE));
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/* if disabled, cannot be enabled again */
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/* if disabled, cannot be enabled again */
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@ -294,14 +296,17 @@ uint64_t cpu_get_apic_base(CPUState *env)
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{
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{
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APICState *s = env->apic_state;
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APICState *s = env->apic_state;
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#ifdef DEBUG_APIC
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#ifdef DEBUG_APIC
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printf("cpu_get_apic_base: %016" PRIx64 "\n", (uint64_t)s->apicbase);
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printf("cpu_get_apic_base: %016" PRIx64 "\n",
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s ? (uint64_t)s->apicbase: 0);
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#endif
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#endif
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return s->apicbase;
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return s ? s->apicbase : 0;
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}
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}
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void cpu_set_apic_tpr(CPUX86State *env, uint8_t val)
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void cpu_set_apic_tpr(CPUX86State *env, uint8_t val)
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{
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{
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APICState *s = env->apic_state;
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APICState *s = env->apic_state;
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if (!s)
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return;
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s->tpr = (val & 0x0f) << 4;
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s->tpr = (val & 0x0f) << 4;
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apic_update_irq(s);
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apic_update_irq(s);
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}
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}
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@ -309,7 +314,7 @@ void cpu_set_apic_tpr(CPUX86State *env, uint8_t val)
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uint8_t cpu_get_apic_tpr(CPUX86State *env)
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uint8_t cpu_get_apic_tpr(CPUX86State *env)
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{
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{
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APICState *s = env->apic_state;
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APICState *s = env->apic_state;
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return s->tpr >> 4;
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return s ? s->tpr >> 4 : 0;
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}
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}
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/* return -1 if no bit is set */
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/* return -1 if no bit is set */
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